M302876 八、新型說明： 【新型所屬之技術領域】 丰創作係有 有關於一種藉由尖端放電而導出靜几旛電模組，特別是 〜的抗靜電模組。 【先前技#f】 推電:ί?Λ，靜電可能從外界進入電路板，例如經由觸 Ϊ::介面（例如手指觸摸到USB介面)、而進入 元件，例Γ—t累積在電路板上的靜電可能會損壞電子 高不超二二^晶片能承受外界進入的靜電塵最 抗靜電的元件，甩路板上（尤其是主機板）需要設置 ^ I f ^避免累積在電路板上的靜電造成高電壓 么兒路板上的元件。M302876 VIII. New Description: [New Technology Field] The Fengshen Department has an anti-static module that is used to derive static electricity modules by tip discharge, especially ~. [Previous technique #f] Pushing electricity: Λ?, static electricity may enter the circuit board from the outside, for example, through the touch:: interface (such as a finger touch to the USB interface), and enter the component, for example, t accumulated on the circuit board The static electricity may damage the electronic high not exceeding the 22nd chip. The chip can withstand the most antistatic components of the electrostatic dust entering the outside. The circuit board (especially the motherboard) needs to be set to ^ I f ^ to avoid static electricity accumulated on the circuit board. Causes high voltage components on the board.
Liode)般戶:使—用的抗靜電元件是齊納二㈣（Zener 置放置⑼mum電路板的相時，會設 起的區域為㈣_!連接墊（pad)，圖中矩形框A所圍 條訊號伟缘1G t極體（未圖示）的區域，其中有四 為齊辦二極體=了為接地佈線，3 〇為電源佈線，4 0 上的電導入接地佈、線3。，使累積丄板 b里不會超過電子元件的耐壓極限。 板 【新型内幻 電^的尺寸越來越小，在電路板上 了即，空間及成本’希望藉由原有的電路;； 5 M302876 展出抗靜電的結構。 有鑑於此，本創作之目的在於提供一種電路板上的抗 靜電模組’在原有的電路佈局的基礎上’無須改變設計或 增加額外的元件，可以達成與使用齊納二極體相同的效 果，又因為不改變原有的電路設計，因此還可以與原有的 齊納二極體合併使用，更加提高電路板的耐壓值。 本創作之抗靜電模組的較佳實施例，包括一鋪銅區 域，形成於一電路板上，該鋪銅區域設有一可放電的尖端 部，該尖端部係朝向該電路板的接地佈線。 ϋ 在上述之較佳實施例中，該尖端部與該接地佈線係保 持一適當的距離。 在上述之較佳實施例中，該距離的最小值為該電路板 的製程中所能容許的兩佈線間的最短距離。 在上述之較佳實施例中，尖端部也可以與抗靜電元件 一併使用，該抗靜電元件係連接該鋪銅區域以及該接地佈 線。 在上述之較佳實施例中，該抗靜電元件為一齊納二極 .體(Zener diode )。 在上述之較佳實施例中，該鋪銅區域為該抗靜電元件 的連接墊，使該抗靜電元件電性連接於該電路板。 、為了讓本創作之上述和其他目的、特徵、和優點能更 明顯易懂，下文特舉一較佳實施例，並配合所附圖示，作 詳細說明如下： 【實施方式】 第2圖為本創作的電路板的一較佳實施例。電路板 6 M302876 1000具有一本體500、複數條矾號佈線（在第2圖中為四 條）1〇〇、複數條接地佈線（在第2圖中為三條）202、204、 206/ —電源佈線300以及一抗靜電模組。抗靜電模組包 括複數個鋪銅區域（在第2圖中為四個）602、604、606、 6〇8。複數條訊號佈線100、複數條接地佈線2〇2、2〇4、 206、一電源接線300以及複數個舖銅區域6〇2、6〇4、6〇6、 608接形成於本體500上。訊號佈線丨〇〇分別係連接於鋪 銅區域6〇2、604、606、608，在圖面上方兩鋪銅區域6〇2 及604之間設置有電源佈線3〇〇,在下方兩鍤銅區域6〇6、 I» 608之間設置接地佈線2〇6，在上下兩排的鋪銅區域之間 設置有二條接地佈線202及204。 在鋪銅區域602上形成一三角形的可放電的尖端部 6021，其放電尖端朝向接地佈線2〇2，在本實施例中，在 接地佈線202上形成一尖端部2021，對應於尖端部6021， 以便縮短尖端部6〇21與接地佈線2〇2的距離。鋪銅區域 604也同樣形成一尖端部6041，其放電尖端朝向接地佈線 204，在接地佈線2〇4上也設有一尖端部2041，對應於尖 _ 端部0041 〇 另外’在接地佈線上也可不設置尖端部，如接地佈線 206，鋪銅區域606及608分別各形成兩個尖端部6061、 • 6081，其放電尖端均朝向接地佈線206，由於放電尖端 6061及6081與接地佈線2〇6構成尖端放電條件適當，因 此在接地佈線206上無須形成尖端部。 在各鋪銅區域形成的尖端部可以藉由與接地佈線之 間的電位差而產生放電的效果，藉此將來自外界經由訊號 佈線100傳遞進入電路板1〇⑻的靜電壓釋放到揍地佈線 7 M302876 202、204及206而導出。尖端部的數量、形狀及配置位 置並無限制，端視電路佈局的設計而定。而放電尖端與接 地佈線的距離是愈短愈好，但是受到電路板1〇〇〇製程上 的限制，必須取適當的距離，如果太短在電路板餘^的過 程中容易產生短路，以目前的技術而言，其距離最小可以 到 5 mil.。 將本創作的實際應用至主機板上做實 士 …-貫驗對象為 技嘉電子所生產的CAYMAN-RH主機板，從其USB接口 做靜電接觸測試，在第1圖所示的習知的電路佈局的3 下，最高可耐3.2kV的靜電壓，而以本創作所揭示的= 的電路佈局做試驗，則可耐4kV的電壓。因此本創。苒 揭露的構造的確可以提高電路板抗靜電的能力。作所 另外，對於某些耐靜電壓的要求更高的電路〜 可以將齊納二極體合併於抗靜電模組600中使用，各， 況下鋪銅區域6〇2、6〇4、6〇6及6〇8 此情 丄"丄 入乐2圖中顧& 央的連接墊400可作為齊納二極體與電路板ι〇⑽+面中 接的連接墊，兩連接墊400分別連接於電源佈喰3〇=歧％ 接地佈線206。如此本創作的尖端部產生放帝^ 从及 納二極體合併作用之下，使電路板二；及齊 9kV左右。 。的耐屋值可一 如上所述’也可以在電路板上’從原本作 :的連接墊突出而形成一可放電的尖端部，如此，：、 電以及背納二極體兩種方式可次啷攻 壓性。 卫用而&向電路杈的 4 η的ΐ據本解的輯’以原有的電路佈局為A礎 几夂更，可在不需要齊納二極體的情況下:、‘到相，些 D白勺 8 M302876 果，也可以與齊納二極體並用，符合更高的抗 抗體之外，本創作也可應用於顯示晶片的 上。—0連接墊或者是其他需要保護的I/O佈線 限定本::創佳實施例揭露如上，然其並非用以 和範圍内，當可者’在不脫離本創作之精神 T明寻利乾圍所界定者為準。 M302876 【圖式簡單說明】 第1圖為習知的電路板中抗靜電的佈局。 第2圖為本創作之抗靜電模組的示意圖。 【主要元件符號說明】 10〜訊號佈線； 20〜接地佈線； 30〜電源佈線； 100〜訊號佈線； 40〜齊納二極體之連接墊; 202、204、206〜接地佈線 300〜電源佈線； 500〜本體； 602、604、606、608〜铺銅區域； 1000〜電路板； 2021、2041〜尖端部； 6021、6041、6061、6081 〜尖端部。Liode): The antistatic component used is Zener II (four) (Zener placed the phase of the (9) mum circuit board, the area that will be set up is (4) _! connection pad (pad), the rectangular frame A in the figure In the area of the signal 1G t pole body (not shown), four of them are diodes for grounding, three for power wiring, three for power wiring, and four for electric grounding and cable 3. The cumulative 丄 plate b does not exceed the withstand voltage limit of the electronic components. The size of the board [new internal phantom power ^ is getting smaller and smaller, on the circuit board, space and cost 'hope to use the original circuit; 5 M302876 exhibits an antistatic structure. In view of this, the purpose of this creation is to provide an antistatic module on a circuit board that can be achieved and used without changing the design or adding additional components based on the original circuit layout. The same effect of the Zener diode, and because it does not change the original circuit design, it can also be combined with the original Zener diode to further improve the withstand voltage of the board. Preferred embodiment includes a copper-clad area Formed on a circuit board, the copper-clad region is provided with a dischargeable tip portion that faces the ground wiring of the circuit board. ϋ In the preferred embodiment described above, the tip portion is maintained with the ground wiring system. A suitable distance. In the preferred embodiment described above, the minimum distance is the shortest distance between the two wires that can be tolerated in the process of the board. In the preferred embodiment described above, the tip portion can also The antistatic element is used in conjunction with the antistatic element to connect the copper area and the ground wiring. In the preferred embodiment described above, the antistatic element is a Zener diode. In a preferred embodiment, the copper-clad area is a connection pad of the antistatic element, and the anti-static element is electrically connected to the circuit board. In order to make the above and other objects, features, and advantages of the present invention more BRIEF DESCRIPTION OF THE DRAWINGS The following is a detailed description of the preferred embodiment and the accompanying drawings, as follows: [Embodiment] FIG. 2 is a preferred embodiment of the circuit board of the present invention. Circuit board 6 M302876 10 00 has a body 500, a plurality of nickname wirings (four in the second figure), a plurality of ground wirings (three in the second figure) 202, 204, 206 / - power wiring 300 and primary resistance The antistatic module includes a plurality of copper-clad regions (four in FIG. 2) 602, 604, 606, and 6〇8. a plurality of signal wirings 100 and a plurality of ground wirings 2〇2, 2〇 4, 206, a power supply connection 300 and a plurality of copper-plated areas 6〇2, 6〇4, 6〇6, 608 are formed on the body 500. The signal wiring lines are respectively connected to the copper-clad area 6〇2. 604, 606, 608, between the two copper areas 6〇2 and 604 above the drawing surface, power supply wiring 3〇〇 is provided, and the grounding wiring 2〇6 is arranged between the lower two copper areas 6〇6 and I»608. Two ground wirings 202 and 204 are disposed between the two copper-plated areas. A triangular dischargeable tip portion 6021 is formed on the copper-clad region 602 with the discharge tip facing the ground wiring 2〇2. In the present embodiment, a tip end portion 2021 is formed on the ground wiring 202, corresponding to the tip end portion 6021. In order to shorten the distance between the tip end portion 6〇21 and the ground wiring 2〇2. The copper-clad region 604 also forms a tip portion 6041 whose discharge tip faces the ground wiring 204, and a tip portion 2041 is also provided on the ground wiring 2〇4, corresponding to the tip _ end portion 0041 〇 otherwise 'on the ground wiring A tip portion such as a ground wiring 206 is provided, and the copper-clad regions 606 and 608 are respectively formed with two tip portions 6061, 6081 whose discharge tips are all directed toward the ground wiring 206, and the tip ends 6061 and 6081 and the ground wiring 2〇6 constitute a tip. Since the discharge conditions are appropriate, it is not necessary to form the tip end portion on the ground wiring 206. The tip end portion formed in each of the copper-clad regions can be discharged by the potential difference from the ground wiring, thereby releasing the static voltage transmitted from the outside through the signal wiring 100 into the circuit board 1 (8) to the ground wiring 7 M302876 202, 204 and 206 are derived. The number, shape, and configuration of the tip are not limited, depending on the design of the circuit layout. The distance between the discharge tip and the grounding wiring is as short as possible, but it is limited by the manufacturing process of the circuit board, and the appropriate distance must be taken. If it is too short, the short circuit is likely to occur during the remaining process of the circuit board. In terms of technology, the distance can be as small as 5 mil. Applying the actual application of this creation to the motherboard to do the squad... The object of inspection is the CAYMAN-RH motherboard produced by GIGABYTE, and the electrostatic contact test is performed from its USB interface. The conventional circuit shown in Fig. 1 Under the layout of 3, the maximum resistance to 3.2kV static voltage, and the circuit layout of the = disclosed in this creation to test, can withstand 4kV voltage. Therefore, this creation.揭 The exposed structure does improve the board's ability to resist static electricity. In addition, for some circuits with higher static voltage resistance requirements, the Zener diodes can be combined into the antistatic module 600, and the copper areas are 6〇2, 6〇4, 6 in each case. 〇6 and 6〇8 This situation quot 丄 乐 2 图 图 顾 & & & & & & & & & & & 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接 连接Connect to the power supply 喰3〇=歧% ground wiring 206, respectively. Thus, the tip of this creation produces a combination of the emperor and the nano-polar body, so that the circuit board 2; and 9kV. . The resistance value of the house can be as described above, and can also be protruded from the original connection pad on the circuit board to form a dischargeable tip portion. Thus, the electric, and the anti-nano diode can be used in two ways.啷 Pressure resistance. Guardian and & to the circuit 杈 4 η according to the solution of the solution 'with the original circuit layout for the basis of a few, can be in the case of the Zener diode is not required:, 'to phase, Some of the D 8 M302876 can also be used in combination with Zener diodes, in addition to higher anti-antibody, this creation can also be applied to display wafers. -0 connection pad or other I/O wiring limitation that needs to be protected:: The best embodiment is disclosed above, but it is not used and scoped, and the person can't leave the spirit of this creation. The definition of the enclosure shall prevail. M302876 [Simple description of the diagram] Figure 1 shows the antistatic layout of the conventional circuit board. Figure 2 is a schematic diagram of the antistatic module of the present invention. [Main component symbol description] 10~signal wiring; 20~ground wiring; 30~power wiring; 100~signal wiring; 40~ Zener diode connection pad; 202, 204, 206~ ground wiring 300~ power wiring; 500 ~ body; 602, 604, 606, 608 ~ copper area; 1000 ~ circuit board; 2021, 2041 ~ tip; 6021, 6041, 6061, 6081 ~ tip.