TWM286985U - Memory module with smart-type power-saving and fault-tolerance - Google Patents

Memory module with smart-type power-saving and fault-tolerance Download PDF

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TWM286985U
TWM286985U TW94214424U TW94214424U TWM286985U TW M286985 U TWM286985 U TW M286985U TW 94214424 U TW94214424 U TW 94214424U TW 94214424 U TW94214424 U TW 94214424U TW M286985 U TWM286985 U TW M286985U
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Taiwan
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memory
fault
saving
power
cpu
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TW94214424U
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Chinese (zh)
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Wen-Tzeng Huang
Jin-Shing Chen
Jiun-Yan Liou
Tzeng-Huang Shr
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Regulus Technologies Co Ltd
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Priority to TW94214424U priority Critical patent/TWM286985U/en
Publication of TWM286985U publication Critical patent/TWM286985U/en

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M286985 p615-003.doc 八、新型說明: 【新型所屬之技術領域】 本新型係關於一種智慧型省電與容錯式記憶體模組,特別是關於一種 具有省電及容錯功能的智慧型省電記憶體模組。 【先前技術】 由於科技的進步,而且半導體的技術已進入奈米的製程,使得電子 產品,尤其是可攜式數位裝置的體積愈來愈小,更符合使用者攜帶方便的 麵· 要求,對電源消耗之要求也漸被重視。尤其是可攜式數位裝置,例如筆記 型電腦、PDA、FPGA、DSP及ARM-10、11攜帶外出使用時,大多使用電池以 作為可攜式數位裝置的供電來源。 : 可攜式數位裝置内的電路或裝置都會消耗電池的電力,尤其是目前要求 可攜式數位裝置的g己憶體容量要愈來愈大,例如有一隨位元的記麵容 量’無論是否有對該記憶體之全部或部分記憶體空間進行資料的存取,整 個記憶體都不斷地在耗電,如此行為,會很快地縮短了可攜式數位裝置的 電源持續使用B夺間。 咖在某些情況下會造成部蝴^糊壞而賴存取或储存資 若對轉触鐘空财„_會較料料料 間故而物咖崎。嫩·晴部分記德: -個新L ΓΓ雜^峨趟刪,蝴更換 °己隐體,而增加更新設備的費用。 因此,如何輸咖·,_她力,細歧位裝置電池 M286985 p615-003.doc 、 _航力可更持久,係為本案注者的設計方式。 【新型内容】 本新型之目的在於提供一種智慧型省電與容錯式記憶體模組設計,其具 有控制讀、體之工作②憶體區塊的大小,而僅該工作中的記憶體區塊會消 耗電池的電力,其它未工作中的之記憶體區塊則不會消耗電池的電力,如 此,可以達到省電的目的。 本新型之另-設計目的在於提供一種智慧型省電與容錯式記憶體模組, _纟具有容錯魏’而可對已故_記憶體㈣作標記,使可攜式數位裝置 不會對故障的記憶體空間進行資料存取,因此,可不必更換記憶體模組, 可節省更新設備的費用。 本新型在於提供一種智慧型省電與容錯式記憶體模組,其具一記憶體及 控制ϋ,藉以使CPU可對該記憶體進行f料存取,該控制器係輕接在該 CPU及該記憶體之間,該控制器根據該cpu之一位址命令,以控制該記憶體 之工作ό己憶體區塊的大小。其中更包含一備份記憶體,該控制器可對該記 _憶體故障不能使用的空間做標記,並切換至該備份記憶體,使該cpu不會 對故障不能使用的空間做資料的存取,且總體可用記憶體空間仍相同。 【實施方式】 以下參照附圖說明本新型之一較佳具體例。 圖1為本新型智慧型省電與容錯式記憶體模組應用於可攜式數位襄置之 系統方塊圖。智慧型省電與容錯式記憶體模組24主要包含控制器16及記 ⑧ 6 M286985 p615-003.doc 憶體14,控制器16可以接收CPu 12的位址信號,根據目前CPU所使用的 記憶體範圍,設定記憶區塊的0N或0FF。以圖丨為例,cpu已使用到記憶 區塊B1,B2,B3,因此控制器會控制這三個區塊的電源,使其設定為〇N,可 正常存取。而其他的記憶區塊似,85,864738並未被用到,因此控制器可 控制這五個記憶區塊的電源,使其設定為〇FF,達到省電的效果。 在圖1中,可攜式數位裝置10具有一 CPU 12、一記憶體14及一控制器 16 ’ 其中’記憶體 14 可以是一 DRAM、一 SDRAM、一 DDRAM、一 DDRn、一 DDRIE、或更高階記憶體,控制器16係可為一單獨的裝置或者内建於記憶 體14中。 CPU 12藉由一資料匯流排18對記憶體14進行資料的存取,cpu 12藉由 : 一位址匯流排20來選擇記憶體14存取的位址及空間大小,控制器16分別 二 藉由位址匯流排20及一控制線22以耦接在CPU 12及記憶體14之間。 同樣地,若記憶體14的容量為500M位元,當CPU 12需要不到l〇M位元 的記憶體空間來存取資料時,控制器16根據位置匯流排2〇所得到的這些 ^ 資訊’控制器16藉由控制線22來控制記憶體14使其有一約i〇M位元的記 憶體區塊是操作在工作狀態,而此操作中的工作狀態記憶體區塊才會消耗 電力,而未由控制器16所控制而成為工作狀態記憶體區塊是不會消耗電 力;若CPU 12需要另一記憶體空間來存取資料,則控制器16會在控制記 憶體14另一記憶體區塊以操作在工作狀態,以供Cpu 12足夠的記憶體空 ' 間來存取資料。如此,藉由控制器16來控制記憶體14之工作記憶體區塊 的大小,當記憶體區塊有被使用到時,則切換為0N,如果記憶體區塊未被 M286985 p615-003.doc 使用,則設為GFF,藉以铜可攜式數位裝置丨㈣省電效果。 若記憶體14有部分記憶體空間是故障而不能使用時,控制器16會對故 \ _記憶體空間做標記,而使咖12不會對故障的記麵空間進行資料的 存取,同並以該概術領域已知的方法,可使GPU 12個故_記憶體空 間而換換至備份記顏26進㈣料的存取,如此可使可攜植位裝置ι〇 具有容錯的功能,總記憶體的空間則不變。 本新型的優點係由控制器具有控制記憶體之工作記憶體區塊的大小,而 馨僅該工作記憶體區塊會消耗電力,私作之其餘的記憶體區塊則不會消耗 電力,如此以達到省電的目的;又,控制器具有容錯功能,而可對記憶體 妓_記誠蝴作,使可氣數錄置轉對轉的記憶體空間 餅資料存取,切驗備份記,域可不必麟記紐,可節省更新 ^ 設備的費用。 本案所揭露之技術’得域習本技術人士軌實施。對於本案之外形及 ^構上的敎以’仍屬本料撕保護細;_由本案㈣思及的各 種變化’並不脫離本案n本毅所未有之作法亦具備專概,麦依 提出專狀_π _上述之實侧尚不足以涵蓋本案職保護之專利範 圍,因此,提出申請專利範圍如附。 M286985 p615-003.doc 【圖式之簡單說明】 圖1係為本新型智慧型省電與容錯式記憶體模組應用於可攜式數位裝置 之系統方塊圖。 【元件符號之說明】 10................可攜式數位裝置M286985 p615-003.doc VIII. New Description: [New Technology Field] This new type is about a smart power-saving and fault-tolerant memory module, especially for a smart power-saving function with power saving and fault tolerance. Memory module. [Prior Art] Due to the advancement of technology and the technology of semiconductors have entered the process of nanotechnology, the volume of electronic products, especially portable digital devices, is getting smaller and smaller, which is more in line with the user's convenient surface requirements. The requirements for power consumption are also being taken seriously. In particular, portable digital devices, such as notebook computers, PDAs, FPGAs, DSPs, and ARM-10s, 11 are mostly used as a source of power for portable digital devices when they are used for out-of-home use. : The circuit or device in the portable digital device consumes the power of the battery. In particular, the capacity of the portable digital device is increasing. For example, there is a bit capacity of the bite device. There is access to all or part of the memory space of the memory, and the entire memory is constantly consuming power. Such behavior will quickly shorten the power consumption of the portable digital device. In some cases, the coffee will cause the part of the cake to be ruined. If you access or store the money, you will be able to touch the clock. If you touch the material, you will find it. L ΓΓ 峨趟 峨趟 蝴 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Persistence is the design method of the applicant. [New content] The purpose of this new model is to provide a smart power-saving and fault-tolerant memory module design, which has the function of controlling the reading and body work. However, only the memory block in the work consumes battery power, and other memory blocks that are not working do not consume battery power, so that power saving can be achieved. The purpose is to provide a smart power-saving and fault-tolerant memory module, _纟 has a fault-tolerant Wei' and can mark the late _memory (four), so that the portable digital device does not carry data on the faulty memory space. Access, therefore, without having to replace the memory module, The utility model can save the cost of updating the device. The invention provides a smart power-saving and fault-tolerant memory module, which has a memory and a control port, so that the CPU can access the memory, the controller Connected between the CPU and the memory, the controller controls the size of the working memory block of the memory according to the address command of the CPU, and further includes a backup memory. The controller can mark the space that cannot be used by the memory fault, and switch to the backup memory, so that the CPU does not access the space where the fault cannot be used, and the overall available memory space is still the same. [Embodiment] A preferred embodiment of the present invention will be described below with reference to the accompanying drawings. Fig. 1 is a block diagram of a system for a smart power-saving and fault-tolerant memory module applied to a portable digital device. The power-saving and fault-tolerant memory module 24 mainly includes a controller 16 and a memory 14 that can receive the address signal of the CPu 12 according to the memory range currently used by the CPU. Setting Recall the 0N or 0FF of the block. For example, the CPU has used the memory blocks B1, B2, and B3, so the controller controls the power of the three blocks to be set to 〇N, which can be saved normally. However, other memory blocks are similar, 85,864738 is not used, so the controller can control the power of these five memory blocks, set it to 〇FF, to achieve power saving effect. In Figure 1 The portable digital device 10 has a CPU 12, a memory 14 and a controller 16'. The memory 14 can be a DRAM, a SDRAM, a DDRAM, a DDRn, a DDRIE, or a higher-order memory. Controller 16 can be a separate device or built into memory 14. The CPU 12 accesses the memory 14 by means of a data bus 18, and the CPU 12 selects the address and space size of the memory 14 by the address bus 20, and the controller 16 borrows two. The address bus 20 and a control line 22 are coupled between the CPU 12 and the memory 14. Similarly, if the capacity of the memory 14 is 500 Mbits, when the CPU 12 needs less than 10 Mbytes of memory space to access the data, the controller 16 obtains the information according to the location bus 2 The controller 16 controls the memory 14 by the control line 22 to have a memory block of about iM bits operating in an active state, and the working state memory block in this operation consumes power. Without being controlled by the controller 16, the operating state memory block does not consume power; if the CPU 12 requires another memory space to access the data, the controller 16 controls another memory in the memory 14. The block is operated in a working state, so that the CPU 12 has enough memory space to access the data. Thus, the size of the working memory block of the memory 14 is controlled by the controller 16, and when the memory block is used, it is switched to 0N if the memory block is not M286985 p615-003.doc If used, it is set to GFF, and the copper portable digital device (4) can save power. If a part of the memory 14 is faulty and cannot be used, the controller 16 marks the space of the memory, so that the coffee 12 does not access the data of the faulty face space. In the method known in the general art field, the GPU can be switched to the backup memory 26 into the (four) material access, so that the portable device can be fault-tolerant. The total memory space is unchanged. The advantage of the novel is that the controller has the size of the working memory block for controlling the memory, and only the working memory block consumes power, and the rest of the memory block does not consume power. In order to achieve the purpose of power saving; in addition, the controller has a fault-tolerant function, and can be used for the memory 妓 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ You don't need to be able to save the cost of the equipment. The technology disclosed in this case has been implemented by the technical practitioners. For the external shape and structure of the case, the 仍 is still the torn material of the material; _ the various changes considered by the case (4) are not out of this case. The _π _ the above-mentioned real side is not enough to cover the patent scope of this case protection. Therefore, the scope of the patent application is attached. M286985 p615-003.doc [Simple description of the diagram] Figure 1 is a system block diagram of the smart power-saving and fault-tolerant memory module applied to the portable digital device. [Description of component symbols] 10................ Portable digital device

12................CPU 14................記憶體 16................控制器 18................資料匯流排 20................位址匯流排 - 22................控制線 。 24................智慧型省電與容錯式記憶體模組 26................備份記憶體 B1〜B8..........記憶區塊12................CPU 14................Memory 16............ ....controller 18..............data bus 20................address bus - 22. ............... control line. 24................Smart Power Saving and Fault Tolerant Memory Module 26................Backup Memory B1~ B8..........memory block

Claims (1)

可由一 CPU控制,該CPU可對該 M286985 九、申請專利範圍: 1· 一種智慧型省電與容錯式記憶體模組 曰慧型省電與容錯式記憶體模組進行資料存取,該智慧型省電與容錯 式記憶體模組包含: 一記憶體;以及 一控制器,麵接在該CPU及該記憶體之間,該控制器根據該cpu之一 位址命令,決定該記麵之卫作記鐘區塊_啟或關,使有被用到的 鲁到記憶體區塊開啟,未被用到的記憶體關閉,藉以達省電之目的者。 2·如申μ專她圍帛丨項所狀智慧型省電與容錯式記憶麵組,其中更 包含-備份記麵,該控可對該記憶體故障不能使㈣空間做標 • a ’並切換至該備份記憶體,使該CPU不會對故障不能使用的㈣做資 料的存取,且總體可用記憶體空間仍相同。 3·如申請專利範圍第i項所述之智慧型省電與容錯式記憶體模組,其中, 该控制器係為-單獨裝置或者内建於該記憶體中。 春4·如申請專利範圍第1項所述之智慧型省電與容錯式記憶體模組,其中, 該記憶體係為- DRAM、- SDRAM、一 D_、一臓n、一臟瓜、或更 高階記憶體。 5·如申請補範圍第1項所述之智慧型省電與容錯式記憶體模組,係可應 用於一可攜式數位裝置中。Can be controlled by a CPU, the CPU can be used for the M286985. 9. Patent application scope: 1. A smart power-saving and fault-tolerant memory module, the power-saving and fault-tolerant memory module for data access, the wisdom The power saving and fault-tolerant memory module comprises: a memory; and a controller, which is connected between the CPU and the memory, and the controller determines the face according to the address command of the CPU The Guardian Clock Block _Start or Close, so that the used Lu to memory block is turned on, and the unused memory is turned off, so as to save power. 2. If Shen Yu specializes in the smart power-saving and fault-tolerant memory quilt, she also includes a backup record, which can not make the (4) space mark for the memory failure. Switch to the backup memory so that the CPU does not access the data (4) that cannot be used for the fault, and the overall available memory space remains the same. 3. The intelligent power-saving and fault-tolerant memory module of claim i, wherein the controller is a separate device or built into the memory. Spring 4: The smart power-saving and fault-tolerant memory module described in claim 1, wherein the memory system is - DRAM, - SDRAM, a D_, a 臓n, a dirty melon, or High-order memory. 5. If you apply for the smart power-saving and fault-tolerant memory modules described in item 1, you can apply them to a portable digital device.
TW94214424U 2005-08-22 2005-08-22 Memory module with smart-type power-saving and fault-tolerance TWM286985U (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104115132A (en) * 2011-12-22 2014-10-22 英特尔公司 Power conservation by way of memory channel shutdown
TWI463321B (en) * 2007-01-10 2014-12-01 Mobile Semiconductor Corp Adaptive memory system for enhancing the performance of an external computing device
TWI673716B (en) * 2018-10-09 2019-10-01 慧榮科技股份有限公司 Flash memory controller, control method of flash memory controller and associated electronic device
RU2766271C1 (en) * 2021-03-17 2022-02-10 Акционерное общество «Информационные спутниковые системы» имени академика М.Ф.Решетнёва» Method for ensuring fault tolerance of memory elements

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI463321B (en) * 2007-01-10 2014-12-01 Mobile Semiconductor Corp Adaptive memory system for enhancing the performance of an external computing device
US8918618B2 (en) 2007-01-10 2014-12-23 Mobile Semiconductor Corporation Adaptive memory system for enhancing the performance of an external computing device
US9424182B2 (en) 2007-01-10 2016-08-23 Mobile Semiconductor Corporation Adaptive memory system for enhancing the performance of an external computing device
CN104115132A (en) * 2011-12-22 2014-10-22 英特尔公司 Power conservation by way of memory channel shutdown
US9612649B2 (en) 2011-12-22 2017-04-04 Intel Corporation Method and apparatus to shutdown a memory channel
CN104115132B (en) * 2011-12-22 2018-02-06 英特尔公司 The power save closed by means of storage channel
TWI614752B (en) * 2011-12-22 2018-02-11 英特爾公司 Power conservation by way of memory channel shutdown
US10521003B2 (en) 2011-12-22 2019-12-31 Intel Corporation Method and apparatus to shutdown a memory channel
TWI673716B (en) * 2018-10-09 2019-10-01 慧榮科技股份有限公司 Flash memory controller, control method of flash memory controller and associated electronic device
US10990292B2 (en) 2018-10-09 2021-04-27 Silicon Motion, Inc. Flash memory controller, control method of flash memory controller and associated electronic device
RU2766271C1 (en) * 2021-03-17 2022-02-10 Акционерное общество «Информационные спутниковые системы» имени академика М.Ф.Решетнёва» Method for ensuring fault tolerance of memory elements

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