TWM268820U - 2n phase, pulse-wave width adjustable circuit - Google Patents

2n phase, pulse-wave width adjustable circuit Download PDF

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Publication number
TWM268820U
TWM268820U TW92222306U TW92222306U TWM268820U TW M268820 U TWM268820 U TW M268820U TW 92222306 U TW92222306 U TW 92222306U TW 92222306 U TW92222306 U TW 92222306U TW M268820 U TWM268820 U TW M268820U
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Taiwan
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square wave
divider
circuit
frequency
pulse width
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TW92222306U
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Chinese (zh)
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Wen-Sheng Chen
Jau-Ren Li
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Eastec Power Technology Inc
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Priority to TW92222306U priority Critical patent/TWM268820U/en
Publication of TWM268820U publication Critical patent/TWM268820U/en

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  • Discharge-Lamp Control Circuits And Pulse- Feed Circuits (AREA)

Description

M268820 捌、新型說明: 【新型所屬之技術領域】 本新型是有關於一種脈波寬度調變電路,特別是指一 種可有效降低供應電源的輸出端之低頻漣波之2n相脈波 5 寬度調變電路。 【先前技術】 如圖1所示,是習知一種脈波寬度調變(以下簡稱 PWM)調光電路1〇,一般用以驅動LCD(液晶顯示器)之冷 陰極燈管以調控其亮度。PWM調光電路1〇接受來自一調 10 光訊號源Π之調光訊號輸入,以產生一 pwm訊號給後 端之一高頻點燈控制電路1 2,使高頻點燈控制電路1 2產 生一低頻P W Μ調光訊號輸出至後端之一點燈功率級1 3, 使點燈功率級1 3根據該低頻PWM調光訊號控制後端燈 管14之亮度。 15 然而,由於習知PWM調光電路1〇係以單一 pwM訊 號同時驅動多支燈管,使得當燈管數量增加(例如6支燈 管以上)時,將會產生下列缺點: (1)由於負載(即燈管數)變大,使得p WM調光電路i 〇 的電源1 5之輸出功率隨之增加,以致於當該等燈管被驅 2〇動而同時明滅的過程中(即調光過程中),將造成輸出功率 極大的變動(例如全亮時輸出100W,全暗時輸出〇w),而 使得電源1 5輸出端之電容器(圖未示)上的電壓將產生相 當大的低頻漣波,影響電容器的使用壽命,而對於提供電 力的電源1 5產生不良的影響。 M268820 ()取述由於该低頻負載變動會在電g 很大的低頻電壓竣波,此電壓漣波會窥至與此 接的其他電源中影響與其他電源連接之電子絮 () 者 由於低頻漣波極難以淚波哭 5系統中較易受低頻訊號干擾的電路將因:而°更 【新型内容】 因此,本新型之目的即在提供一種可有效 出端之低頻漣波之2n相脈波寬度調變電路。 於疋本新型之2相脈波寬度調變電路 10調變頻率下。該電路包括-方波產生器、!r、 器、個積分器及2n個比較器。其中:該方 以產生-第-方波,且該第一方波之震盪頻率 率的2^1倍。該等除2除法器係以2的幂次方 接排列,其中第一級除2除法器係與該方波產 15以根據該第一方波產生2n個相位相錯開之第 等積分器與最後一級除2除法器連接,用以分 二方波進行積分,以產生2n個近似三角波。 與各該積分器連接,用以將各該近似三角波璃 調光電壓)進行比較,以產生2n個具有該調變 20差各為36〇度/2n之脈波寬度調變訊號。藉此 電源輸出端之低頻漣波的功效。 【實施方式】 有關本新型之前述及其他技術内容、特點 以下配合參考圖式之三個較佳實施例的詳細說 氣15上產生 ,電源15連 :置。 濾除,所以 難以控制。 降低電源輸 ,工作在一 固除2除法 波產生器用 為該調變頻 由小到大串 生器連接, 一方波。该 別對該等第 該等比較器 一參考值( 頻率且相位 ’達到降低 每功效,在 明中,將可 M268820 清楚的明白。 r :閱圖2及圖3所示,是本新型2n相脈波寬度調變( 、_ :稱PWM)電路的第_較佳實施例。本實施例先以 5 10 15 η 1(係為本新型之一特例)之2相PWM電路2為例,該2 相PWM電路2包括一方波產生器21、一除2除法器22 、兩個積分哭 ^ . 、刀口口 “、24以及兩個比較器25、26。且2相 PWM電路2工作在-調變頻…下。 方波產生器21用以產生一第一方波A〇,其震盪頻率 為调變頻率fPWM的兩倍。 除2除法态22在本實施例中,是一 D型正反器 =使用J-K正反器或τ型正反器,以下簡稱正反器22)7,、 且第一方波Α〇輸入正反器η的時脈輸入端,並 :反器22的正輸出端Q拉回正反器22之輸入端D,以 精由第一方波A。觸發正反器22作動,而如目3所示 正反器22的正負輸出㈣Q及Q,得到兩互為反相之第二方 波Αι 、A2。且該等第二方波a】、μ之頻率為第—方 A〇的1/2倍’亦即與調變頻率f_相同。 彳 田然’如圖4所示,在本實施例中,另-特例是亦可 以一反相器28代替除2除法器22,並令方波產生哭 產生與調賴fPWM相同之一第一方波A。,並將二1 波A〇經由反相器28反相即可產生與一第—方波a方 之反相方波〜’,且第_方波Aq及其反相方波可2 成(等同於)該等第二方波Al、a2。 、 接著’如圖2所示,該等第二方波〜、八2分別輸入 20 M268820 積分器23、24進行籍八 〇丄#M268820 新型 Description of the new type: [Technical field to which the new type belongs] This new type relates to a pulse width modulation circuit, in particular to a 2n-phase pulse wave 5 width which can effectively reduce the low-frequency ripple at the output end of the power supply. Modulation circuit. [Prior art] As shown in FIG. 1, a pulse width modulation (hereinafter referred to as PWM) dimming circuit 10 is conventionally used to drive a cold cathode lamp of an LCD (liquid crystal display) to regulate its brightness. The PWM dimming circuit 10 receives a dimming signal input from a 10-light signal source Π to generate a pwm signal to a high-frequency lighting control circuit 12 on the back end, so that the high-frequency lighting control circuit 12 generates A low-frequency PW M dimming signal is output to one of the back-end lighting power levels 13 so that the lighting power level 13 controls the brightness of the back-end lamp tube 14 according to the low-frequency PWM dimming signal. 15 However, since the conventional PWM dimming circuit 10 uses a single pwM signal to drive multiple lamps at the same time, when the number of lamps increases (for example, more than 6 lamps), the following disadvantages will occur: (1) Because The load (ie, the number of lamps) becomes larger, so that the output power of the power source 15 of the p WM dimming circuit i 〇 increases accordingly, so that when these lamps are driven by 20 and turned on and off at the same time (that is, the dimming During the light process), it will cause a great change in output power (for example, 100W when fully bright, 0w when fully dark), and the voltage on the capacitor (not shown) at the output end of the power supply 15 will be quite large. The low-frequency ripple affects the service life of the capacitor, and has an adverse effect on the power supply 15 that provides power. M268820 () It is stated that the low-frequency load fluctuation will complete the low-frequency voltage with a large electrical g, and this voltage ripple will be seen in other power sources connected to it. The circuit that is more susceptible to low-frequency signals in the system is extremely difficult to cry because of 5 ° [New content] Therefore, the purpose of this new model is to provide a 2n-phase pulse wave with low-frequency ripple that can be effectively output Width modulation circuit. In the new 2-phase pulse width modulation circuit 10, the modulation frequency is adjusted. The circuit includes-square wave generator ,! r, device, integrator and 2n comparators. Among them: the square generates a first square wave, and the oscillating frequency of the first square wave is 2 ^ 1 times. The division 2 dividers are arranged in a power of 2. The first division 2 divider is a first integrator with a square wave of 15 to generate 2n phase shifts according to the first square wave. The last stage divide by 2 divider is connected to integrate two square waves to generate 2n approximate triangular waves. It is connected with each integrator to compare each approximate triangular wave glass dimming voltage) to generate 2n pulse width modulation signals each having a modulation 20 difference of 360 degrees / 2n. This takes advantage of the low-frequency ripple at the output of the power supply. [Embodiment] The foregoing and other technical contents and features related to the new model are described in detail below with reference to the three preferred embodiments of the drawings. The air 15 is generated and the power source 15 is connected. It is difficult to control because it is filtered out. Reduce the power supply and work in a fixed division 2 division. The wave generator is used for the modulation and conversion from small to large series generators, a square wave. The reference value (frequency and phase) of these comparators should be reduced. In the Ming, M268820 will clearly understand. R: See Figure 2 and Figure 3, this is the new 2n phase The _th preferred embodiment of the pulse width modulation (, _: called PWM) circuit. This embodiment first takes a 2-phase PWM circuit 2 of 5 10 15 η 1 (which is a special case of the new model) as an example. The two-phase PWM circuit 2 includes a one-wave generator 21, a divide-by-two divider 22, two integral gates ^., A knife edge ", 24, and two comparators 25 and 26. And the two-phase PWM circuit 2 works in -modulation Frequency conversion ... Down. The square wave generator 21 is used to generate a first square wave A0, whose oscillation frequency is twice the modulation frequency fPWM. Divide by 2 division state 22 In this embodiment, it is a D-type flip-flop. = Use JK flip-flop or τ-type flip-flop, hereinafter referred to as flip-flop 22) 7, and the first square wave A〇 input clock input terminal of the flip-flop η, and: the positive output terminal of the inverter 22 Q is pulled back to the input terminal D of the flip-flop 22, and the first square wave A is finely triggered. The flip-flop 22 is triggered to operate, and the positive and negative outputs 正 Q and Q of the flip-flop 22 are shown in item 3, and the two are inverted. phase The second square wave Aι, A2. And the frequency of the second square wave a], μ is 1/2 times of the first square A0 ', that is, the same as the modulation frequency f_. As shown in Fig. 4, in this embodiment, another-special case is that an inverter 28 can be used instead of the divide-by-2 divider 22, and the square wave can be generated to generate a first square wave A which is the same as the fPWM, and Inverting the two 1 waves A0 through the inverter 28 can generate an inverse square wave ~ 'from the first square wave a square, and the _ square wave Aq and its inverse square wave can be 20% (equivalent to ) The second square waves Al, a2., And then 'as shown in FIG. 2, the second square waves ~, 8 2 are respectively input 20 M268820 integrator 23, 24 for eight eight o ##

疋订積为,且由於積分器23、24是由RC 電路(或習知之線性穑公雷攸、% 償刀電路)所構成,因此,如圖3所示 4第方波Al、入2經由積分器23、24積分後將產生 兩個相差1 80度之近似三角波τ 1、τ2。 5 /然後,如圖2所示,近似三角》皮Ti、丁2被分別送入 較tm 2 5 2 6中與來自一調光訊號源5 〇並經一電阻分壓 網路51轉換後之參考值¥以進行比較,而產生兩個相位 差360/2(1 80度)之脈波寬度調變訊號(以下簡稱調變訊號 )PWM1及PWM2 (可西?人夫目国α^ ^ 1〇 、」配口參見圖3 )。此二調變訊號 及PWM2即可提供給後端之一高頻控制電路3〇, 使向頻控制電路30根據該二調變訊號pWMl及pwM2驅 動其後端之點燈功率級3丨使燈管32之亮度隨之變化。 因此,在以一調變訊號驅動一組燈管的情況下,由於 每一組燈管係分別由一調變訊號所控制而被輪流點亮,所 父同日守間只有一組燈管被點壳,而讓與電源5 2連接之 負載明顯變小,使得供應電源52之輸出功率在燈管明暗 切換間不致變化太大(例如全亮輸出10W,全暗輸出ow) ’因而降低在電源52輸出端之電容器上的電壓低頻連波 振幅’使對電谷器的影響降到最小,同時,亦可避免與此 2〇 電源52連接之其他電源受到低頻漣波的影響或干擾。 接著參見圖5所示,是本新型的第二較佳實施例,本The order product is, and since the integrators 23 and 24 are composed of an RC circuit (or a conventional linear circuit), the 4th square wave Al, and the second pass are shown in FIG. 3. The integrators 23 and 24 will generate two approximate triangular waves τ 1 and τ 2 that differ by 180 degrees. 5 / Then, as shown in FIG. 2, the approximate triangle ”skin Ti and Ding 2 are sent to tm 2 5 2 6 and converted from a dimming signal source 5 0 and converted by a resistor divider network 51. The reference value ¥ is used for comparison, and two pulse width modulation signals (hereinafter referred to as modulation signals) PWM1 and PWM2 with a phase difference of 360/2 (180 degrees) are generated. 〇 、 "distribution port see Figure 3). The two modulation signals and PWM2 can be provided to one of the high-frequency control circuits 30 at the back end, so that the frequency control circuit 30 drives its rear-end lighting power level 3 according to the two modulation signals pWMl and pwM2 to enable the lights. The brightness of the tube 32 changes accordingly. Therefore, in the case of driving a group of lamps with a modulation signal, since each group of lamps is controlled by a modulation signal and turned on in turn, only one group of lamps is switched on during the same day. Housing, so that the load connected to the power supply 52 is significantly reduced, so that the output power of the power supply 52 does not change too much between the light and dark switching of the lamp (for example, full bright output 10W, full dark output ow) 'Thus reduces the power supply 52 The low-frequency continuous wave amplitude of the voltage on the capacitor at the output terminal minimizes the influence on the valley device, and at the same time, it can prevent other power sources connected to this 20 power source 52 from being affected or interfered by low-frequency ripple. Referring next to FIG. 5, a second preferred embodiment of the present invention is shown.

實施例是以n = 2之四相PWM電路4為例,該四相PWM 電路4係工作在一調變頻率fpWM下,其包括一方波產生 器41 ’兩個(tli, =2)除2除法器42、43,四個(2n = 4)積分 M268820 器44〜47以及四個(2〇 = 4)比較器48〜51。 方波產生器41產生—第一方波A〆其震盪頻率為調 變頻率fPWM的2η·〗(η = 2)倍,即兩倍。且第一方波A〇被另 外送入一反相器52以產生—與第一方波A〇反相之反相方 5 波A〇’,如圖6所示。 除2除法器42及43在本實施例中是一 D型正反器( 下稱正反器42、43)。配合圖6所示,第一方波A〇經由 正反器42將其頻率除以2,而在正反器42的輸出端產生 兩個為第一方波A〇的1/2倍頻率且相位相反之第二方波 10 Q1A及Q1B。同理,第一方波之反相方波A〇,送入除2 除法為43後’亦將產生兩個頻率為該反相方波A〇,的1 /2 倍且相位相反之第二方波Q2A及q2B。且該等第二方波 Q1 A〜Q2B之頻率即為該調變頻率〇 然後’如圖5所示,該等第二方波Q1A〜Q2B被分別 15送入相對應之積分器44〜47進行積分,而如圖6所示, 產生兩兩互為相差180度之近似三角波T1〜T4。 最後’如圖5所示,將該等近似三角波Τ1〜Τ4分別 送入相對應之比較器48〜5 1中,以分別與來自一調光訊 號源50且經一電阻分壓網路51轉換後之參考電壓Vref 2〇進行比較’而產生四個相位差分別為360度/2n(即90度) 之脈波寬度調變訊號(以下簡稱調變訊號)PWM 1〜PWM4 ( 可配合參見圖6)。此四個調變訊號PWMI〜PWM4可被輸 入後纟而之一控制電路(即如圖2所示之高頻控制電路3 0及 點k功率級3 1 ),用以驅動更多組燈管(例如一對一分別 M268820 驅動一組燈管,或者一對多驅動複數組燈管),使燈管可 依上述方式被輪流點亮,藉而降低電源5 2上之低頻漣波 〇 再參見圖7所示’是本新型的第三較佳實施例,本實 5施例是以n = 3之八相PWM電路6為例,該八相PWM電 路6係工作在一調變頻率fPWM下,其包括一方波產生器 6 1,6個(Η 3= 6)除2除法器6 2〜6 7,8個(2n = 8)積分器(與 前述作用相同,故圖未示),以及8個(2n = 8)比較器(與前 述作用相同,故圖未示)。方波產生器61之震盪頻率為 10調變頻率fpwm的2n 1倍(即4倍),其產生一第一方波a〇 ’再由第一方波A〇經一反相器68產生一與第一方波A〇 反相之反相方波A〇’。該等除2除法器62〜67是以2的幂 次方由小至大串接排列,所以第一級會有兩個除2除法器 62及63並排,第二級會有四個除2除法器64〜67並排, 15第一級除2除法器62及63分別接受第一方波a〇及其反 相方波A〇’的輸入,以分別將第一方波A()及其反相方波 A〇’的頻率除2後輸出,而產生四個兩兩互為反相之第一 級第二方波Q1A’〜Q2B,。第二級除2除法器64〜67接受 第一級除2除法器62及63輸出之第一級第二方波 20 Q1 A’〜Q2B’,再分別將該等第一級第二方波⑴a,〜q2B,的 頻率除2後輸出,而產生八個相位兩兩互為反相之第二級 第二方波Q3A〜Q6B。最後,此等方波q3a〜q6B被分別 送入後端之積分器及比較器(圖未示,可參照圖5)進行積 分及比較後’即可產生相位差各為360度/2n(即45度)且 ίο 15 20 M268820 頻率與該調變頻率fpWM相同之八個調變訊號。因此,使 用者可根據需求,依照上述方法產生複數個調變訊 動各個燈管(或少數燈管),藉而,降低同一時間與U電源 52連接之負載量,進而降低供應電源52上之低頻漣波。 綜上所述,本新型之2n相脈波寬度調變電路,除 πΐ之特例已在圖2〜4有詳細說明外,對於2之情況 的=型藉由方波產生器產生震盪頻率為調變頻率fpwM . 倍之第一方波,^經一反相器產生一與第—方波反 相之反相方波,再藉由JTk)個除2除法器將第一方波及其 反相方波頻率除以^倍而產生2n個相位相錯開的方波 ,然後將該等方波分別經由積分器及比較器進行積分比較 ,,即可得到2n個相位差分別為%。度",且頻率為㈣ 變頻率fPWM之調變訊號,使得應用該等調變訊號去驅動 後端燈管(或其他負載)時,可讓該等燈管以輪流驅動方式 被點亮,使在同一時間與電源52連接之負載量減少,讓 電源端之輸出功率不致因燈管同時明滅而產生太大變化, 進而降低白知因所有燈管同時明滅在供應電源端所造成之 低頻漣波,而確實能達到本新型之功效與目的。 惟以上所述者,僅為本新型之較佳實施例而已,當不 、限疋本新型貫施之範圍,即大凡依本新型申請專利 範圍及新型說明書内容所作之簡單的等效變化與修飾,皆 應仍屬本新型專利涵蓋之範圍内。 〃 【圖式簡單說明】 圖1是習知一 PWM調光電路之一應用例示意圖; 10 M268820 圖2是本新型2n相脈波寬度調變電路之第一較佳實 施例的電路方塊圖; 圖3是第一實施例之波形圖; 圖4是第一實施例之另一實施態樣; 5 圖5是本新型之2n相脈波寬度調變電路之第二較佳 實施例的電路方塊圖; 圖6是第二實施例之波形圖;及 圖7是本新型之2n相脈波寬度調變電路之第三較佳 實施例的電路方塊圖。 10The embodiment is based on a four-phase PWM circuit 4 with n = 2 as an example. The four-phase PWM circuit 4 operates at a modulation frequency fpWM, and includes a square wave generator 41 ′ two (tli, = 2) divided by 2. Dividers 42, 43, four (2n = 4) integrals M268820, 44 to 47, and four (2 = 4) comparators 48 to 51. The square wave generator 41 generates the first square wave A. Its oscillation frequency is 2η · (η = 2) times, that is, twice, the modulation frequency fPWM. And the first square wave A0 is additionally sent to an inverter 52 to generate an inverting square wave A0 'which is opposite to the first square wave A0, as shown in FIG. The divide-by-2 dividers 42 and 43 are D-type flip-flops (hereinafter referred to as flip-flops 42 and 43) in this embodiment. As shown in FIG. 6, the frequency of the first square wave A 0 is divided by 2 through the flip-flop 42, and two frequencies which are 1/2 times the frequency of the first square wave A 0 are generated at the output of the flip-flop 42 and The second square wave 10 Q1A and Q1B with opposite phases. In the same way, the inverse square wave A0 of the first square wave, after entering the division 2 and dividing by 43, will also generate two second waves with a frequency of 1/2 times that of the inverse square wave A0, and the opposite phase. Square waves Q2A and q2B. And the frequency of the second square waves Q1 A ~ Q2B is the modulation frequency. Then, as shown in FIG. 5, the second square waves Q1A ~ Q2B are sent to the corresponding integrators 44 ~ 47 respectively. The integration is performed, and as shown in FIG. 6, approximate triangular waves T1 to T4 that are 180 degrees apart from each other are generated. Finally, as shown in FIG. 5, the approximate triangular waves T1 to T4 are sent to corresponding comparators 48 to 51, respectively, so as to be respectively converted from a dimming signal source 50 and a resistor voltage dividing network 51. The following reference voltage Vref 2 is compared to generate four pulse width modulation signals (hereinafter referred to as modulation signals) PWM 1 ~ PWM4 with phase differences of 360 degrees / 2n (ie, 90 degrees). 6). The four modulation signals PWMI ~ PWM4 can be input to one of the control circuits (ie, the high-frequency control circuit 3 0 and the point k power level 3 1 shown in FIG. 2) to drive more groups of lamps. (Such as one-to-one M268820 driving a group of lamps, or one-to-many driving multiple array lamps), so that the lamps can be lit in turn in the above manner, thereby reducing the low-frequency ripple on the power supply 52. See also FIG. 7 is a third preferred embodiment of the present invention. This embodiment 5 uses an eight-phase PWM circuit 6 of n = 3 as an example. The eight-phase PWM circuit 6 works under a modulation frequency fPWM. , Which includes one square wave generator 6 1, 6 (Η 3 = 6) divide 2 divider 6 2 to 6 7, 8 (2n = 8) integrator (same function as above, so not shown), and Eight (2n = 8) comparators (same function as before, so not shown). The oscillating frequency of the square wave generator 61 is 2n (ie, 4 times) of 2n of the 10 modulation frequency fpwm. It generates a first square wave a0 ′, which is then generated by the first square wave A0 through an inverter 68. The inverse square wave A0 'which is opposite to the first square wave A0. The division 2 dividers 62 to 67 are arranged in series from small to large in the power of 2, so the first stage will have two division 2 dividers 62 and 63 side by side, and the second stage will have four division 2 divisions. 64 to 67 side by side, 15 first stage divide 2 dividers 62 and 63 respectively accept the input of the first square wave a0 and its inverse square wave A0 'to separate the first square wave A () and its inverse. The frequency of the phase square wave A0 ′ is divided by 2 and output, and four first-stage second square waves Q1A ′ ~ Q2B, which are opposite to each other in pairs, are generated. The second stage divider 2 divider 64 ~ 67 accepts the first stage second square wave 20 Q1 A '~ Q2B' output from the first stage divide 2 divider 62 and 63, and then separates these first stage second square waves The frequency of 〜a, ~ q2B, is divided by 2 and output, and eight second-phase second square waves Q3A ~ Q6B whose phases are opposite to each other are generated. Finally, these square waves q3a ~ q6B are sent to the integrator and comparator (not shown in the figure, see Figure 5) at the back end for integration and comparison. 45 degrees) and ίο 15 20 M268820 Eight modulation signals with the same frequency as the modulation frequency fpWM. Therefore, the user can generate a plurality of modulation signals to activate each lamp (or a small number of lamps) according to the above method, thereby reducing the load connected to the U power supply 52 at the same time, and thereby reducing the load on the power supply 52. Low-frequency ripple. To sum up, the 2n-phase pulse width modulation circuit of this new model, except for the special case of πΐ, has been described in detail in Figures 2 to 4. For the case of 2 = type, the oscillation frequency generated by the square wave generator is The modulation frequency fpwM. Times the first square wave, an inverter generates an inverse square wave inverse to the first square wave through an inverter, and then divides the first square wave and its inverse by JTk) divide by 2 dividers. The phase square wave frequency is divided by ^ times to generate 2n square phase waves with staggered phases, and then these square waves are integrated and compared through an integrator and a comparator, respectively, and 2n phase differences are obtained as%. Degree, and the frequency is a modulation signal of the variable frequency fPWM, so that when these modulation signals are used to drive the back-end lamps (or other loads), the lamps can be lit in turn. The load connected to the power supply 52 is reduced at the same time, so that the output power of the power supply does not change too much because the lamps are turned on and off at the same time, thereby reducing the low frequency ripple caused by all lights on the power supply side. Wave, and indeed can achieve the efficacy and purpose of this new model. However, the above are only the preferred embodiments of the new model, and the scope of implementation of the new model is not limited, that is, simple equivalent changes and modifications made according to the scope of the patent application of the new model and the content of the new specification. , All should still fall within the scope of this new patent. 〃 [Brief description of the diagram] Figure 1 is a schematic diagram of an application example of a conventional PWM dimming circuit; 10 M268820 Figure 2 is a circuit block diagram of the first preferred embodiment of the new 2n-phase pulse width modulation circuit Figure 3 is a waveform diagram of the first embodiment; Figure 4 is another implementation of the first embodiment; Figure 5 is a second preferred embodiment of the new 2n-phase pulse width modulation circuit Circuit block diagram; FIG. 6 is a waveform diagram of the second embodiment; and FIG. 7 is a circuit block diagram of a third preferred embodiment of the novel 2n-phase pulse width modulation circuit. 10

11 M268820 【圓式之主要元件代表符號說明】 2 雨相PWM電路 6 八相PWM電路 23、24、44〜47積分器 28、52、68反相器 3 1點燈功率級 70調光訊號源 72電源 A〇’反相方波 4四相pwm電路 21 41、61方波產生器 25'26' 48〜51比較器 30高頻控制電路 32燈管 71電阻分壓網路 A〇第一方波 T1〜T4近似三角波11 M268820 [Description of the symbols of the main components of the round type] 2 Rain-phase PWM circuit 6 Eight-phase PWM circuit 23, 24, 44 ~ 47 Integrator 28, 52, 68 Inverter 3 1 Lighting power level 70 Dimming signal source 72 Power supply A〇 'Inverted square wave 4 four-phase pwm circuit 21 41, 61 Square wave generator 25' 26 '48 ~ 51 Comparator 30 High-frequency control circuit 32 Lamp tube 71 Resistor voltage divider network A〇First party Waves T1 ~ T4 are approximate triangle waves

22、42、43、62〜67除2除法器(正反器) A1、A2、Q1A、Q1B、Q2A、Q2B 第二方波 Q1A,〜Q2B,第一級第二方波 Q3A〜Q6B第二級第二方波 Vref參考值(調光電壓) PWM 1〜PWM4脈波寬度調變(PWM)訊號22, 42, 43, 62 ~ 67 Divider 2 (Flip-Flop) A1, A2, Q1A, Q1B, Q2A, Q2B Second square wave Q1A, ~ Q2B, second square wave of first stage Q3A ~ Q6B second Level Second Square Wave Vref Reference Value (Dimming Voltage) PWM 1 ~ PWM4 Pulse Width Modulation (PWM) Signal

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Claims (1)

M268820 玖、申請專利範圍: 1 · 一種2相脈波寬度調變電路,工作在一調變頻率下,該 電路包括: ~ + -方波產生器,用以產生—第一方波,且該第一方波 之震ί頻率為該調變頻率的211-1倍,其中n - 2 ; -個除2除法器,係以2的幂次方由小到大串接排 列,其中第一級除2除法器係與該方波產生器連接,以根 據該第一方波產生2"個相位相錯開之第二方波; 2個積分裔,與最後一級除2除法器連接用以分 別對該等第二方波進行積分,以產生2„個近似三角波; 一 2個比車乂為,與各該積分器連接,用以將各該近似 三角波與一參考值進行比較,以產生2"個具有該調變頻 率且相位差各為360度/2n之脈波寬度調變訊號。 2.依申請專利範圍帛1項所述之2、脈波寬度調變電路, 其中該等除2除法器係為一正反器。 .依申π專利乾圍第2項所述之2„相脈波寬度調變電路, 其中該等除2正反器可為D型正反器、】_K型正反器或Ί 型正反器其中之一。 4·依申請專利範圍第1項所述之2"相脈波寬度調變電路, 其中該20·1個除2除、、:t π〆 ’、’、去為、係以2的幂次方由小到大依序為 歹J串接成η· 1級除2電路。 5·依申請專利範圍第 更包括一反相器, 4項所述之2η相脈波寬度調變電路, 且°亥第一方波係送入該第一級除2電路 13 M268820 中,一除2除法器的時脈輸入端,而該第一方波經由該反 相器反向後係送入該第一級除2電路中黑 %甲之另一除2除法器 之時脈輸入端。 6.依申請專利範圍第1項所述之2n相脈波寬度調變電路, 其中該等積分器可以是-RC積分電路或一線性積分電路 7.—種2相脈波寬度調變電路,工作在一調變頻率下,該電 路包括: 一方波產生器,用以產生一第一方波,且該第一方波 之震盈頻率為該調變頻率的兩倍; 一除2除法器’與該方波產生器連接,以根據該第一 方波產生兩個相位差1 80度之第二方波; 兩個積分器,分別與該除2除法器連接,用以分別對 该專弟二方波進行積分,以產生兩個近似三角波,·及 兩個比較器’與各該積分器連接,用以將各該近似三 角波與一參考值進行比較,以產生兩個與該調變頻率相同 且相位差1 80度之脈波寬度調變訊號。 8·依申請專利範圍第7項所述之2相脈波寬度調變電路,其 中該除2除法器更可以一反相器取代,並使該方波產生器 產生與該調變頻率相同之第一方波,且該第一方波經由該 反相器反相後之反相方波與該第一方波之組合即形成兩個 相位差180度之第二方波。 14M268820 范围 、 Scope of patent application: 1 A 2-phase pulse width modulation circuit, which works at a modulation frequency, the circuit includes: ~ +-square wave generator for generating-the first square wave, and The frequency of the first square wave shock is 211-1 times the modulation frequency, where n-2;-a divide by 2 divider, arranged in series from small to large in the power of 2, where the first stage The divider 2 divider is connected to the square wave generator to generate 2 " second phase waves out of phase according to the first square wave; 2 integrals are connected to the last stage divider 2 divider to separately The second square waves are integrated to generate 2 „approximate triangular waves; a pair of ratios are connected to each of the integrators to compare each of the approximate triangular waves with a reference value to generate 2 " A pulse width modulation signal having the modulation frequency and a phase difference of 360 degrees / 2n each. 2. According to the item 2 of the patent application scope 2、2, the pulse width modulation circuit, where these are divided by 2 The divider is a flip-flop.. 2 phase pulse width modulation according to item 2 of the patent application patent , Those wherein K flip-flop or flip-flop Ί 2 except one flip-flop may be D flip-flop,] _. 4. The phase pulse width modulation circuit 2 according to item 1 in the scope of the patent application, wherein the 20 · 1 is divided by 2 and divided by: t π〆 ',', where is a power of 2. The power from small to large is connected in series to 串 J to form a η · 1 division by 2 circuit. 5. According to the scope of the patent application, the inverter includes an inverter, the 2η-phase pulse width modulation circuit described in item 4, and the first square wave system is sent to the first-stage division 2 circuit 13 M268820. A clock input terminal of a divide-by-2 divider, and the first square wave is fed to the clock input terminal of another divide-by-2 divider of black% A in the first-stage divide-by-2 circuit after being inverted by the inverter. . 6. The 2n-phase pulse width modulation circuit according to item 1 of the scope of the patent application, wherein the integrators may be -RC integration circuits or a linear integration circuit. 7. A 2-phase pulse width modulation circuit Circuit, working at a modulation frequency, the circuit includes: a square wave generator for generating a first square wave, and the shock frequency of the first square wave is twice the modulation frequency; A divider 'is connected to the square wave generator to generate two second square waves with a phase difference of 180 degrees according to the first square wave; two integrators are respectively connected to the divider 2 divider, and The specialist's two-square wave is integrated to generate two approximate triangular waves, and two comparators are connected to each of the integrators to compare each approximate triangular wave with a reference value to generate two and Pulse width modulation signals with the same modulation frequency and a phase difference of 180 degrees. 8. The 2-phase pulse width modulation circuit according to item 7 of the scope of the patent application, wherein the divide-by-2 divider can be replaced by an inverter, and the square-wave generator generates the same frequency as the modulation frequency. The first square wave, and the combination of the inverted square wave and the first square wave after the first square wave is inverted by the inverter forms two second square waves with a phase difference of 180 degrees. 14
TW92222306U 2003-12-19 2003-12-19 2n phase, pulse-wave width adjustable circuit TWM268820U (en)

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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111294046A (en) * 2020-02-18 2020-06-16 广州全盛威信息技术有限公司 Divider circuit and method for generating IQ signal and ultra-wideband local oscillation generator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111294046A (en) * 2020-02-18 2020-06-16 广州全盛威信息技术有限公司 Divider circuit and method for generating IQ signal and ultra-wideband local oscillation generator
CN111294046B (en) * 2020-02-18 2023-07-25 广州全盛威信息技术有限公司 Divider circuit, method and ultra wideband local oscillator generator for generating IQ signals

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