M256579 創作說明（1) 【新型所屬之技術領域】 本創作係提供—種印刷層數多、效能高、改善積層電 2内部雜散電容的積層晶片結構改良，本創作係在晶片本 陶瓷内埋入垂直的薄片狀銀製線圈（内電極），且該 f利用二端的銀電極向外導通；藉此，以往容易產 =电谷寄生效應、雜散電容量也能運用垂直 銀 線圈予以降低或排除。 【先前技術】 链i於現代電子元件的加工生產技術水準日漸提高，且各 p子產rm對於微型元件的需求也愈來愈高，因此，目前 曰：上的微型電子元件便呈現多樣化的趨勢，其中，積層 Γ ν、σ構的開發正是現今業界積極往小型化發展的重要產 :^去:内埋式積層晶片也正如火如荼地被開發改良，其 叙j t為了在有限的電路板空間内創造更多空間來架構 彳 並且尚有較佳線路連接性、低接腳數、高可靠 2:=:成本、高效率的生產及高組裝良率等優點，但 題產生别子在的積層晶片（如第三圖所示）卻會有下列問 方★其一，以往積層晶片（30)皆採水平堆疊内埋線圈的 奋：点：重水平堆疊方式在增加印刷電路的層數時，也 片垂直方向高度的增加，更致使電路板的厚 度必須相對增厚，不符合一般手 =; 的低厚度需求； P DA專间精松產品 ’、 以往積層晶片（3 0 )皆採水平堆疊内埋線圈的 M256579 、創作說明（2) 方式’由於其内部每一居綠 (Γ λ ^ ^ φ e a線圈對柒電極都有雜散電容 存在，，成電感的性能下％，而不能用在高頻率的 領域，以上問：已經是現八改 而上述原因也是本案創者最重要的競爭特色， 因此，本案創作研發動機。 及功效的改良，以期再晶片深入構思更具創意 作後，終於創作出一種,;：=:亚2…研發、試 感内部雜散電容的積層晶片結構：良：一、'文善積層電 【新型内容】 < 声曰3::ί二：’在於提供一種印刷層數多的積 狀銀_(内電極），藉==垂直積層的薄片 應、雜散電容量也能運用電容寄生效 排除。 且檟層的銀製線圈予以降低或 積声ΐ ^ :ί:: 7項1Γ ’在於提供—種低雜散電容量的 積s日日片、，、口構改良，本創作採用垂 圈（内電極），而垂直積層銀製線圈的；線 量干擾降低或排除且加寬作用頻寬的=式使^兄電容 本創作之第三項目的，在於提 度的積層晶片結構改良，本創作利用垂；：;冒力;=板厚 容易增加層&，其層數增加僅會 3方式可以較 佔用垂直方向的空間），故本創二=== (不 路板厚度。 3数彡日加不會增加電 M256579M256579 Creation Instructions (1) [Technical Field to which the New Type belongs] This creation is to provide an improved multilayer chip structure with a large number of printed layers, high efficiency and improved internal stray capacitance. This creation is embedded in the chip ceramic Vertical silver coils (internal electrodes) are inserted, and the f is turned on by the silver electrodes at both ends; by this, the previous easy production = parasitic effect of the valley, and stray capacitance can also be reduced or eliminated by the vertical silver coils. . [Previous technology] The processing and production technology level of chain i in modern electronic components is gradually increasing, and the demand for micro-components by each p-product rm is also increasing. Therefore, at present, the micro-electronic components on the top show a variety of The trend is that the development of multilayer Γ ν and σ structures is an important product of the industry's active development towards miniaturization: ^ To: Embedded multilayer wafers have also been developed and improved as they are in full swing. Create more space in the space to structure, and still have the advantages of better line connectivity, low pin count, high reliability 2: =: cost, efficient production, and high assembly yield, but the problem is different Laminated wafers (as shown in the third picture) have the following problems. First, in the past, the laminated wafers (30) used the horizontal stacking of embedded coils. Point: heavy horizontal stacking when increasing the number of printed circuit layers The increase of the height in the vertical direction of the tablet also causes the thickness of the circuit board to be relatively thick, which does not meet the low thickness requirements of ordinary hands; PDA special loose products', and the previous laminated wafers (30) use water. M256579 of stacked buried coils, creation instructions (2) Method 'Because every green (Γ λ ^ ^ φ ea coil inside the coil has stray capacitance on the 柒 electrode, the performance of the inductor is%, and it cannot be used. In the field of high frequency, the above question: It is already eight changes and the above reasons are also the most important competitive features of the creators of this case. Therefore, this case created an engine and improved the function, in order to further innovate the chip to conceive more creative work. Finally created a kind of;: =: Asia 2… Developed and tested the multilayer chip structure of internal stray capacitors: Good: First, 'Wenshan Multilayer Electricity [New Content] < Voice said 3 :: ί 二:' lie Provide a kind of printed silver with a large number of printed layers (internal electrode). By using the == vertical laminated sheet, the stray capacitance can also be eliminated by using the capacitor parasitic effect. And the silver coil of the layer can be reduced or the sound can be accumulated. ^ : ί :: 7 items 1Γ 'is to provide—a kind of low-stray electric capacity product s day, day, day, day, day, day, day, day, month, month, month, month, month, month, month, month, month, month, month, and month. Or exclude and widen the frequency The third item of the formula is to improve the structure of the multilayer chip. This creation uses vertical;:; force; = plate thickness is easy to increase the layer & the number of layers will increase only 3 The method can take up more space in the vertical direction), so the original two === (the thickness of the road board. 3 days after the increase will not increase the electricity M256579
有關本案創作為達 、 及其他功效，茲列舉_成^述目的、所採用之技術，手段 如後，相信本案創二=較佳可實施例並配合圖式詳細說明 得一深入而具體之瞭目的、特徵及其他優點，當可由之 的第一圖（透視圖）、中二I先请參閱第一圖所示，本創作 組態特徵，並清1展示出本創作詳實的結構及 -晶片本以=創=構特色係在於： 製成，在該陶瓷（i 2 ) 一㈤2:=陶瓷（1 2 )材質 (工i ) ; J ) 一鳊一體燒結有銀電極 數層銀製線圈（2 〇 )，苴孫3 $ p d ^ 其係呈薄片狀，且各銀製線 圈（2 0 )依序串連，該銀製線圈 本匕10)的陶内，並運用最==;片 ;j埋設連接於該晶片本體（i 0)的二端銀電極 (1 1 )内，該銀製線圈（2 〇 )薄片在該陶瓷（丄 内呈垂直狀積層排列；#此，以往容易產生的電容寄生效 應、雜散電容量也能運用垂直積層的銀製線圈（2 〇 )予 以降低或排除；以上所述，即為本創作各相關元件的相互 關係位置及其構造之概述。 【實施方式】 為了清楚說明本創作的作動方式與功效，再請配合參 閱第一圖所示： 本創作在該陶£ ( 1 2 )内埋入垂直積層的薄片狀銀 製線圈（2 0 )(又稱：内電極），藉由銀製線圈 (2 0 )垂直積層的方式較谷易增加層數，該銀製線圈Regarding the creation of this case, and other effects, I will list _cheng ^ the purpose, the technology used, and the means are as follows. I believe that the second case of this case = a preferred embodiment and a detailed description with the detailed illustration. Purpose, characteristics and other advantages, when the first picture (perspective view) and the second picture I can refer to are shown in the first picture, this creative configuration features, and clear 1 shows the detailed structure and chip of this creative The original characteristics of the structure are: made, in the ceramic (i 2) a ㈤ 2: = ceramic (1 2) material (work i); J) a sintered silver electrode with several layers of silver coil (2 〇) ， 苴 孙 3 $ pd ^ It is a thin sheet, and the silver coils (20) are connected in series, and the silver coils are used in the pottery of 10), and the most ==; piece; j buried connection In the silver electrode (1 1) at both ends of the wafer body (i 0), the silver coil (20) sheet is arranged in a vertical stack in the ceramic (丄); Stray capacitance can also be reduced or eliminated using vertically laminated silver coils (20); as mentioned above, This is an overview of the positions and structures of the related elements of this creation. [Embodiment] In order to clearly explain the working method and effect of this creation, please refer to the first figure together: This creation is in the pottery (1 2 ) The sheet-shaped silver coil (20) (also called: internal electrode) embedded in the vertical stack is embedded in the silver coil (20), and the number of layers is easier to increase than that of the valley. The silver coil
M256579 創作說明（4) (2 0 )的層數增加僅會增加晶片本體（^ ^佔用空間’不會讓晶片本體（i 〇 )厚度變得7更Z向 ::加！路板厚度），故本創作在提昇效能的同時 付5輕溥電子精密器材的要求（例如十 声輪旎 機、PDA)，而垂直積層銀製線圈（2〇見=手 也就不會造成fj #麻亦&雜^ & 的層數增加 昇、$你^： 的難題，本創作確實是一種可以摇 效能、印刷層數多、效能高、改善積 ：= 政電谷的積層晶片結構改良。 以内W雜 立 方面巧特別參閱第二圖之本創作雜散電容旦一 思圖，由於本創作係在該陶瓷（丄2 里不 薄片狀銀製線圈（2 〇 ) 垂直積層的 (垂直)，而不會產=電ί 相差⑽ 本體部份與銀電極因平行會產生相i二在中間 (C)，故本創作確實具有串聯雜散電容 量，也因此可適用於高頻率的領域/口㈣雜散電容 細上所述，本案之創新結構次 的薄片狀銀製線圈（内電極）1、 瓦内里入垂直積層 的銀電極向外導通，·藉A，以往銀製”利用二端 應、雜散電容量也能運用垂直：5 :電容寄生效 排除，所以本創作t『具有2層的銀製線圈予以降低或 疑，除此之外，在本案申,二，：利用性』應、已毋庸置 曾被公開使用，故本創作早已：2曾見於諸刊物，亦未 新型專利之申請，祈請牵予二專利法規，羑依法提出 便。 〜予審查並早日賜准專利，實感德 m M256579 圖式簡單說明 <圖式部份> 第一圖，係本創作之立體透視圖。 第二圖，係本創作之雜散電容量示意圖。 第三圖，係為習式之雜散電容量示意圖。 <圖號部份> 晶片本體（1 〇 ) 陶瓷（1 2 ) 銀製線圈（2 0 ) 積層晶片（30 ) 銀電極（1 1 ) 接頭（2 1 )M256579 Creation Note (4) (2 0) The increase in the number of layers will only increase the wafer body (^ ^ Occupied space 'will not make the thickness of the wafer body (i 〇) become 7 more Z-direction :: Plus! Road board thickness), Therefore, this creation pays for the requirements of 5 light-weight electronic precision equipment (such as ten sound wheels, PDA) while improving the performance, and the vertical stack of silver coils (20 see = hand will not cause fj # 麻 亦 & Miscellaneous ^ & increase the number of layers, $ you ^: The problem is that this creation is indeed a kind of chip structure that can shake the performance, print more layers, high efficiency, and improve the product: = Zhengdian Valley's multilayer chip structure improvement. Within Wmis For details, please refer to the second picture of the stray capacitor. As this creation is based on the ceramic (丄 2 is not a thin silver coil (20)), it is vertically laminated (vertical). = 电 ί Phase difference⑽ Because the body part and the silver electrode are parallel, phase i2 will be generated in the middle (C), so this creation does have series stray capacitance, so it can also be applied to high-frequency fields / port stray capacitance. As mentioned above, the innovative silver foil coil (inner Pole) 1. The silver electrode in the vertical stack of the watt inside is turned on outwards. · By A, the previous silver system can use vertical voltage with stray capacitance. 5: The capacitor parasitic effect is eliminated, so this creation t 『有The two-layer silver coil is lowered or suspected. In addition, in this case, two, "Usability" should be used publicly, so this creation has already been: 2 has been seen in publications, and no new patent For the application, I would like to invite the second patent regulations, and submit it according to the law. ~ Review and grant the quasi-patent as soon as possible, real sense m256579 Schematic description of the diagram < Schematic part > The first picture is the three-dimensional of this creation Perspective view. The second figure is a schematic diagram of the stray capacitance of this creation. The third figure is a schematic diagram of the stray capacitance of the formula. ≪ Figure number part > Chip body (1 〇) Ceramic (1 2) ) Silver coil (2 0) Laminated wafer (30) Silver electrode (1 1) Connector (2 1)
雜散電容（CStray capacitance (C
I 第9頁I Page 9