TWM255588U - Control circuit of single-chip for protecting from surges - Google Patents
Control circuit of single-chip for protecting from surges Download PDFInfo
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- TWM255588U TWM255588U TW93202316U TW93202316U TWM255588U TW M255588 U TWM255588 U TW M255588U TW 93202316 U TW93202316 U TW 93202316U TW 93202316 U TW93202316 U TW 93202316U TW M255588 U TWM255588 U TW M255588U
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M255588 五、創作說明(1) [創作所屬之技術領域 本創作是有關於_種焉達驅動電路,特別是針對一種 具低切換速度之雙極性馬達驅動電路。 [先前技術] 一般馬達,例如步進馬達及霍爾(Ha 1 1 )馬達為使馬達 運轉’需要使用控制旋轉,停土及位置的控制電路,同時 也需要有輪出驅動器使激磁電流流過驅動線圈,因此有各 種控制方法與激磁方法。在諸多方法中雙極性(Bipolar) 驅動為其中一種也被廣泛使用。 圖7所示為雙極性驅動器之結構,使用單一正電源,4 個NPN電晶體及一馬達線圈,&個電晶體之基極輸入分為 Eil,Ei2,Ei3,Ei4,透過此四個輸入可使Q1及Q4導通, Q 2及Q 3不導通,使電流由正電源經由電晶體q 4,節點n 2, 馬達線圈,節點Π,電晶體Q1而至負電源;或反向情形: 使Q 2及Q 3導通,Q1及Q 4不導通,電流由正電源經由電晶體 Q3 ’節點N1,馬達線圈,節點N2,電晶體Q2而至負電源。 、*、以上之習知雙極性馬達驅動器電路,或類似之電路, 远遇兩個困難點·⑴馬達線圈為一電感性負冑,根據電 M255588 五、創作說明(2) 磁學原理,此電感會有一反電動勢產生,其大小 ^ V =L*d i /dt ,其中△ V ··為電壓變化量 時 間 的 變 化 率 〇 此 一 電 壓 變 加 以 處 理 會 傷 害 連 接 於 其 及 Q3, Q2及 Q4不 可 同 時 打 開 過 , 造 成 燒 毀 過 熱 或 其 它 可 傳 統 上 的 解 決 方 式 為 在 電 容 穩 壓 二 極 體 以 及 控 制 在 〇 力口 上 保 護 元 件 雖 解 決 了 題 9 例 如 電 磁 干 擾 可 靠 性 序 控 制 也 造 成 使 用 上 的 困 難 ;L為電感值,di /dt為電流 化會在節點N1及N 2上反應, 上的 Ql,Q2,Q3及 Q4 ; (2) ,否則會有大的直流電流通 靠性問題。 N1及N 2上加上保護元件,諸 輸入時序確保大直流電流不 兩大困難點,但亦造成其他 較弱或較佔體積等。此外, 對 若 Q1 如 存 問 時 _作内容] 使 驅 磬於上述之先前技術中,加上保護元件造成電磁干 邊、町靠性較弱、較佔體積等問題,且時序控制也使得 用困難。故本創作提供一種具低切換速度之雙極性馬達 %電路,避免上述情形產生。 M255588 五、創作說明(3) - 本創作的一個目的,在於提供一種可降低反電動勢之 馬達驅動器電路。 本創作另一個目的在於提供一種無需特殊時序控制之 馬達驅動器電器。 上述目的可藉由一種具低切換速度之雙極性馬達驅動 器電路來完成’其要點在於將控制馬達開關之輸入時序信 號對轉換成另一控制用時序信號對,該時序信號對滿足·· (1 )切換速度較低’具有延遲時間為微秒級次(2)彼此不 重疊(Non-overlapping),兩時序信號所控制的電晶體不 會同時導通。 由於馬達的系統操作時間盔古 姊1下时間為冤秒級次,因此具有微秒 級次之該低速時序信號對眚暂μ # Z 並不影響馬達的系統操作 速度。精甶降低控制尾;告pq pq > ^ 大岫降低6遠峻願μ達竭閉蚪序信號的切換速度,大 路電流的產生,以上兩點矸湓位兩▲个日碉 器電路具有高穩定性及可靠度。 ^王使驅動 根據以上所述 驅動器電路,包含 吸收電流,該第一 之目的’本創作提供 :一第一電晶體與一 電晶體與該第二電晶 了一種雙極性馬達 第一電晶體,用以 體成共射極並接M255588 V. Creation Instructions (1) [Technical field to which this creation belongs] This creation is about a kind of drive circuit, especially for a bipolar motor drive circuit with low switching speed. [Prior art] General motors, such as stepper motors and Hall (Ha 1 1) motors, require a control circuit that controls rotation, stopping, and position for the motor to run. At the same time, a wheel-out driver is required to make the exciting current flow. There are various control methods and excitation methods for driving the coil. Bipolar driving is one of many methods that are also widely used. Figure 7 shows the structure of the bipolar driver. It uses a single positive power supply, 4 NPN transistors and a motor coil. The base inputs of the transistors are divided into Eil, Ei2, Ei3, and Ei4. Through these four inputs, Q1 and Q4 can be turned on, Q 2 and Q 3 can be turned off, and the current can be passed from the positive power source through the transistor q 4, node n 2, the motor coil, node Π, and transistor Q1 to the negative power source; or the reverse situation: Q 2 and Q 3 are turned on, Q1 and Q 4 are not turned on, and the current is passed from the positive power source through the transistor Q3 'node N1, the motor coil, the node N2, and the transistor Q2 to the negative power source. , *, The above-mentioned conventional bipolar motor driver circuit, or a similar circuit, is far from two difficult points: the motor coil is an inductive negative, according to electricity M255588 5. Creation instructions (2) magnetic principle, this There will be a back-EMF in the inductor, its size ^ V = L * di / dt, where △ V ·· is the rate of change of the voltage change time. This voltage change will damage the connection to it and Q3, Q2 and Q4. Opened at the same time, causing overheating or other traditional solutions can be used in the capacitor voltage regulator diode and control on the 0 force port to protect the component although the problem 9 such as electromagnetic interference reliability sequence control also causes difficulties in use; L is the inductance value, and di / dt is the currentization reaction at nodes N1 and N2, Q1, Q2, Q3, and Q4; (2), otherwise there will be a large DC current reliability problem. Protection components are added to N1 and N2, and the input timings ensure that large DC currents are not two major difficulties, but they also cause other weak or bulky components. In addition, if Q1 is in question, make the content] drive the above-mentioned prior technology, add protection components to cause problems such as electromagnetic dry edges, weak reliance, and volume, and timing control also makes use of difficult. Therefore, this creation provides a bipolar motor% circuit with low switching speed to avoid the above situation. M255588 V. Creation Instructions (3)-One purpose of this creation is to provide a motor driver circuit that reduces back-EMF. Another purpose of this creation is to provide a motor driver appliance that does not require special timing control. The above purpose can be accomplished by a bipolar motor driver circuit with a low switching speed. The main point is to convert the input timing signal pair that controls the motor switch into another control timing signal pair. The timing signal pair satisfies ... (1 Low switching speed 'has a delay time of microsecond order (2) Non-overlapping with each other, and the transistors controlled by the two timing signals will not be turned on at the same time. Because the system operation time of the motor is 1 second, the low-speed timing signal with the microsecond order does not affect the system operation speed of the motor. Precisely reduce the control tail; report pq pq > ^ Reduce the switching speed of the sequence signal by 6 times and hope to reach the exhaustion sequence signal, the generation of the road current, the two points above the two ▲ sundial circuit has a high Stability and reliability. ^ The driver of the driver according to the above-mentioned driver circuit, including the absorption of current, the first purpose of this' provided: a first transistor and a transistor and the second transistor a bipolar motor first transistor, To form a common emitter in parallel
•第9頁 M255588 五、創作說明(4) 地,該第一 第 號與一第二時序輪,^體基極^別接受一第一時序輸入信 體,其連接成達靈 I號’、〜電晶體與一第四電晶 集極,該第四電曰、、、Ό構’用以驅動電流至該第二電晶體 電晶體與一苐六=曰射極連接該第一電晶體集極;一苐五 電流至該第一電晶=體,其連接成達靈頓結構,用以驅動 電晶體集極,复:—集極’該第六電晶體射極連接該第二 並連接-第電;第=晶;與該第五電晶體共射極 極體與一第一電阳,該第二電晶體基極串接一第一二 晶體基極串接一莖-連接於該第一電晶體集極,該第五電 電晶體集極一 極體與—第:電阻而連接於該第一 接地,用以吸收^晶體與一第八電晶冑,其射極分別 極,該第八電晶體盥 电日日骚基 與-第十電晶Μ,用:接:::,、基極;-第九電晶體 晶體射極連接於;:極之連接點,該第十電 、弟八電aa體與第二電晶體共基極之連接 ^丄二中,該第九電晶體與第十電晶體成共集極並連接一 一外接電壓;一第十一電晶體與一第十二電晶體,其連 接f達靈頓結構,該第十一電晶體基極接受該第一時序輸 入#唬’該第十一電晶體集極與該第十二電晶體基極相連 接並經由一第一電容接地,該第十二電晶體射極經由一第 三電阻而與該第九電晶體基極相連接;及一第十三電晶體 與一第十四電晶體,其連接成達靈頓結構,該第十三電晶 體基極接受該第二時序輸入信號,該第十三電晶體集極與• Page 9 M255588 V. Creative Instructions (4) The first number and a second timing wheel, the base of the body ^ do n’t accept a first timing input body, which is connected to Daring I ' The transistor is connected to a fourth transistor collector. The fourth transistor is used to drive a current to the second transistor and the first transistor is connected to the first transistor. Collector; one to five currents to the first transistor = body, which is connected into a Darlington structure to drive the transistor collector, complex:-the collector 'the sixth transistor emitter is connected to the second and Connected-the first electricity; the third crystal; the common emitter with the fifth transistor and a first anode, the second transistor base in series with a first two crystal base in series with a stem-connected to the The first transistor collector, the fifth transistor collector, and the first and the first resistor are connected to the first ground to absorb the crystal and an eighth transistor, and the emitters thereof are respectively The eighth transistor and the tenth transistor are used to connect to the tenth transistor M, with: connected to :: ,, the base;-the ninth transistor crystal emitter is connected to ;: the connection point of the pole, The connection between the tenth and eighth electric aa body and the second transistor common base ^ In the second, the ninth transistor and the tenth transistor form a common collector and are connected to an external voltage; an eleventh The crystal and a twelfth transistor are connected to the Darlington structure. The eleventh transistor base accepts the first timing input. The eleventh transistor collector and the twelfth transistor The bases are connected and grounded via a first capacitor, the twelfth transistor emitter is connected to the ninth transistor base via a third resistor; and a thirteenth transistor is connected to a fourteenth transistor A crystal connected to a Darlington structure, the thirteenth transistor base receives the second timing input signal, the thirteenth transistor collector and
第10頁 M255588 五、創作說明(5) 該第十的電晶體基極相連接並經由一第二電容接地,言 十四電晶體射極經由_第四電阻而與該第十 該第十—電晶體與該第十三電晶體^ 運接該第二外接電壓。 第 相 並 -第 電阻 一端 電阻 十電 第十 間; 接電 根據上述構 五電阻,位 ,位於該第 連接該第四 一端連接該 ’一端連接 阻 一電阻 及一第 壓之間 連 位 想’其中雙極性馬達驅動器電路更包^ 於該第一電晶體基極與射極之間;一角 一電晶體基極與射極之間;一第七電Ρ」 電晶體基極,且另一端接地;一第八零 第六電晶體基極,且另一端搔地;一寿 該第九電晶體基極,且另一端接地;一 接該第十電晶體基極’且另一端接地· 於該第九電晶體集極與該第二外接電屬 電阻,位於該第十電晶體集極與該第二 六 九 第 之 外 根據上述構想,其中該第七曰 號至該第十四雷日電日日體集極送出一筹 -信號至該第Πΐ二Γϊ八電晶體集極送注 :時’該第七電晶體的集i保持n一電晶體“ :體與該第四電晶體無法導通,用】:位’造成該第 該第四電晶體同時導通,當該第方止該第-電晶 =八電晶體的集極保持為低電:電全,閉 δ亥第六電晶體無法導⑨,用;成:第-電晶 止該第二電晶體與該 信 第 關 電 與 ) 與 M255588 五、創作說明(6) 電晶體同時導通。 根據上述構想,其中該第七電晶體集極送出一第二信 號至該第十四電晶體射極,且該第八電晶體集極送出一第 一信號至該第十二電晶體射極,當該第一電晶體未完全關 閉時,該第七電晶體的集極保持為低電位,造成該第二電 晶體與該第四電晶體無法導通,用以防止該第一電晶體與 該第四電晶體同時導通,當該第二電晶體未完全關閉時, 該第八電晶體的集極保持為低電位,造成該第一電晶體與 該第六電晶體無法導通’用以防止該第二電晶體與該第六 電晶體同時導通。 根據上述構想,其中該第七電晶體集極送出一第二信 號至該第十電晶體基極,且該第八電晶體集極送出一第一 信號至該第九電晶體基極,當該第一電晶體未完全關閉 時,該第七電晶體的集極保持為低電位,造成該第二電晶 體與該第四電晶體無法導通,用以防止該第一電晶體與該 第四電晶體同時導通,當該第二電晶體未完全關閉時,該 第八電晶體的集極保持為低電位,造成該第一電晶體與該 第六電晶體無法導通^用以防止該第二電晶體與該第六電 晶體同時導通。 根據以上所述之目的,本創作提供了一種雙極性馬達 驅動器電路,包含··一第一電晶體與一第二電晶體,用以Page 10 M255588 V. Creative Instructions (5) The tenth transistor base is connected and grounded via a second capacitor. The fourteen transistor emitter is connected to the tenth tenth via the fourth resistor. The transistor and the thirteenth transistor are connected to the second external voltage. The first phase is parallel to the first resistance. The tenth and tenth resistors are connected at one end. The connection is based on the above-mentioned five resistors, which are located between the first connection, the fourth end, the one end, the resistance, and the first voltage. 'Among them, the bipolar motor driver circuit is more enclosed between the base of the first transistor and the emitter; between the base of the transistor and the emitter at a corner; a seventh transistor P', and the other end Ground; an eighth zero sixth transistor base, and the other end grounded; one lifetime the ninth transistor base, and the other end grounded; one connected to the tenth transistor base, and the other end grounded at The ninth transistor collector and the second external electrical resistor are located outside the tenth transistor collector and the second sixty-ninth. According to the above concept, the seventh to the fourteenth thunderstorms The solar body collector sends a chip-signal to the Πΐ 二 Γϊ eight transistor collector. Note: At the time, 'the seventh transistor's set i remains n-transistor': the body and the fourth transistor cannot be connected, Use]: Bit 'causes the fourth transistor to be turned on at the same time. The first transistor stops the collector of the eighth transistor, and the collector of the eight transistor is kept low: full, closed, and the sixth transistor cannot be turned on. Use: The first transistor stops the second transistor and the Letter No. and M255588 V. Creative Instructions (6) The transistor is turned on at the same time. According to the above concept, the seventh transistor collector sends a second signal to the fourteenth transistor emitter, and the first transistor The eight transistor collector sends a first signal to the twelfth transistor emitter. When the first transistor is not completely turned off, the collector of the seventh transistor is kept at a low potential, causing the second transistor. It cannot be connected to the fourth transistor to prevent the first transistor and the fourth transistor from conducting at the same time. When the second transistor is not completely turned off, the collector of the eighth transistor is kept at a low potential. The first transistor and the sixth transistor cannot be connected to prevent the second transistor and the sixth transistor from being turned on at the same time. According to the above concept, the seventh transistor collector sends a second signal to The tenth transistor base, and the eighth transistor set Send a first signal to the ninth transistor base, and when the first transistor is not completely turned off, the collector of the seventh transistor remains at a low potential, causing the second transistor and the fourth transistor Cannot be turned on to prevent the first transistor and the fourth transistor from being turned on simultaneously. When the second transistor is not completely turned off, the collector of the eighth transistor is kept at a low potential, causing the first transistor The sixth transistor cannot be connected with the sixth transistor to prevent the second transistor and the sixth transistor from conducting at the same time. According to the above-mentioned purpose, the present invention provides a bipolar motor driver circuit, including a first Transistor and a second transistor for
第12頁 M255588 五、創作說明(7) 吸收電流,.謗第一電晶體與該第二 地’該弟一、絮^ 〜電晶體成共射極並接 口♦溆一筮-扯 電晶體基極分別挺為一筮一卩士广认 唬與一第一盼序輸入信 一 接又一第一吩序輸入信 體,其連接成達靈頓^ ^ ’ 、二電晶體與一第四電晶 集極’該第四電晶體:極連:c至:第二電晶體 電晶體與一第六電晶體,J:連接成電晶體集極,—第五 電流至該第一電曰齅隹上八按成達靈頓結構,用以驅動 電晶體集極1;該f六電晶體射極連接該第二 並連接-第-外接電壓 與該第五電晶體共射極 極體與弟-電阻而連接於該第日二:按:一 晶體基極串接-第二 電曰曰體集極,該第五電 電晶體集極;一第七電晶=盘一=二電阻而連接於該第一 接地’用以吸收電流,該第:二】晶體’其射極分別 一第三電阻連接於該第七;m電:體射極經由 L _^ t 示七尾日日體與第一電晶體共基極之連 接點’該第十電晶體射極經由一第四電阻連接於該第八電 晶體與第二電晶體共基極之連接點,纟中,該第九電晶體 與第十電晶體成共集極並連接一第二外接電壓;一第十一 電晶體’其與該第九電晶體連接成達靈頓結構,該第十一 電晶體基極接受該第一時序輸入信號,該第__電晶體集 極與該第九電晶體基極相連接並經由一第一電容接地;及 一第十三電晶體’其與該第十電晶體連接成達靈頓結構, 該第十三電晶體基極接受該第二時序輸入信號,該第十三Page 12 M255588 V. Creation instructions (7) Absorb current, defame the first transistor and the second place 'The brother I, Su ^ ~ The transistor is a common emitter and interface ♦ 溆 筮-pull the transistor base The poles are very widely recognized by a group of people and a first input sequence, one after another, and the first input sequence, which is connected to form a Darlington ^ ^, two transistors and a fourth battery. Crystal collector: the fourth transistor: pole connection: c to: the second transistor and a sixth transistor, J: connected to the transistor collector, the fifth current to the first transistor The upper eight presses form a Darlington structure for driving transistor collector 1; the f six-transistor emitter is connected to the second and connected -th-external voltage and the fifth transistor common-emitter body and brother-resistor And connected to the second day: Press: a crystal base in series-the second electric body collector, the fifth electric transistor collector; a seventh transistor = disk one = two resistors connected to the first A ground is used to absorb current, the second: two] crystals whose emitters are respectively connected to the seventh by a third resistor; m electricity: the body emitter shows seven tails via L _ ^ t The connection point of the common base of the solar body and the first transistor. The emitter of the tenth transistor is connected to the connection point of the common base of the eighth transistor and the second transistor via a fourth resistor. The ninth transistor and the tenth transistor have a common collector and are connected to a second external voltage; an eleventh transistor is connected to the ninth transistor to form a Darlington structure, and the eleventh transistor has a base receiving The first timing input signal, the __ transistor collector is connected to the ninth transistor base and grounded via a first capacitor; and a thirteenth transistor 'is connected to the tenth transistor Into a Darlington structure, the thirteenth transistor base receives the second timing input signal, the thirteenth
第13頁 M255588 五、創作說明(8) 電晶體集極與該第十電晶體基極相連接並經由一第二電容 接地。 根據上述構想,其中雙極性馬達驅動器電路更包含: 一第五電阻,位於該第一電晶體基極與射極之間;一第六 電阻,位於該第二電晶體基極與射極之間;一第七電阻, 一端連接該第四電晶體基極,且另一端接地;及一第八電 阻,一端連接該第六電晶體基極,且另一端接地。Page 13 M255588 5. Creation instructions (8) The transistor collector is connected to the tenth transistor base and grounded via a second capacitor. According to the above concept, the bipolar motor driver circuit further includes: a fifth resistor between the base and the emitter of the first transistor; a sixth resistor between the base and the emitter of the second transistor A seventh resistor having one end connected to the fourth transistor base and the other end to ground; and an eighth resistor having one end connected to the sixth transistor base and the other end to ground.
根據上述構想,其中該第七電晶體集極送出一第二信 號至該第十電晶體基極,且該第八電晶體集極送出一第一 信號至該第九電晶體基極,當該第一電晶體未完全關閉 時,該第七電晶體的集極保持為低電位’造成該第二電晶 體與該第四電晶體無法導通,用以防止該第一電晶體與該 第四電晶體同時導通,當該第二電晶體未完全關閉時,該 第八電晶體的集極保持為低電位,造成該第一電晶體與該 第六電晶體無法導通’用以防止該第二電晶體與該第六電 晶體同時導通。According to the above concept, wherein the seventh transistor collector sends a second signal to the tenth transistor base, and the eighth transistor collector sends a first signal to the ninth transistor base, when the When the first transistor is not completely turned off, the collector of the seventh transistor is kept at a low potential, so that the second transistor and the fourth transistor cannot be conducted to prevent the first transistor and the fourth transistor from conducting. The crystals are turned on at the same time. When the second transistor is not completely turned off, the collector of the eighth transistor is kept at a low potential, causing the first transistor and the sixth transistor to fail to conduct to prevent the second transistor. The crystal is turned on simultaneously with the sixth transistor.
根據上述構想,其中該第七電晶體集極送出一第二信 號至該第十電晶體射極,且該第八電晶體集極送出一第一 信號至該第九電晶體射極,當該第一電晶體未完全關閉 時,該第七電晶體的集極保持為低電位’造成該第二電晶 體與該第四電晶體無法導通,用以防止該第一電晶體與該According to the above concept, wherein the seventh transistor collector sends a second signal to the tenth transistor emitter, and the eighth transistor collector sends a first signal to the ninth transistor emitter, when the When the first transistor is not completely turned off, the collector of the seventh transistor is kept at a low potential, so that the second transistor and the fourth transistor cannot be conducted, so as to prevent the first transistor from connecting to the fourth transistor.
第14頁 M255588 五、創作說明(9) 第四電晶體同時導通,t ”電晶體的集極保持為低電位,造成該第 晶體同時導通。帛以防止該弟-電曰曰體與該第六電 [實施方式] 本創作的些實施例會詳細描述如下。然而,除了詳 細描述外二本創作還可以廣泛地在其他的實施例施行,且 本創作的範圍不受限定,其以之後的專利範圍為準。 本創作之雙極性馬達驅動器電路的第一 於圖:A〜1C,其中可分成A、B兩部份,第一部份佳電實路施例不 包Ϊ :部份,包含:*為吸收電流用的NPN電 丁 π ί口观1 1興1 2 ,作為驅動電流至Ω 9 ΡΝΡ電晶體Q3與ΝΡΝ電晶體Q4連接成達靈頓結構',以及 驅t電流至Q1的PNP電晶體扣與NpN電晶體 頓 結構,_成共射極連接於一外接電壓vcc,接上達:頓 接:=極,Q6的射極接到Q2的集極,Q3的基極再串接 一個二極體D1與一電阻R1而接於⑽的集極, ^ 1 f 接一個二極體D2與電阻R2而接於…的 “= Q2兩者的集極之間。 呆徑馬達接於Q1與Page 14 M255588 V. Creation instructions (9) The fourth transistor is turned on at the same time, and the collector of t ”transistor is kept at a low potential, causing the second transistor to be turned on at the same time. In order to prevent the brother-electric body and the first transistor Liudian [Implementation] Some examples of this creation will be described in detail below. However, in addition to the detailed description, the second creation can also be widely implemented in other embodiments, and the scope of this creation is not limited. The range shall prevail. The first of the bipolar motor driver circuit in this creation is shown in the figure: A ~ 1C, which can be divided into two parts, A and B. The first part of Jiadian Road is not included in the examples: part, including : * Is the NPN electrode D1 for the absorption of current 1 1 1 12 1 as the drive current to Ω 9 PN transistor Q3 and PN transistor Q4 are connected to form a Darlington structure, and to drive t current to Q1 PNP transistor buckle and NpN transistor crystal structure, _ common emitter is connected to an external voltage vcc, connected to :: connect: = pole, the emitter of Q6 is connected to the collector of Q2, and the base of Q3 is then connected in series A diode D1 and a resistor R1 are connected to the collector of ⑽, ^ 1 f is connected to a diode D2 And the resistor R2 is connected between the collectors of "= Q2". The idle path motor is connected to Q1 and
第15頁 M255588 五、創作說明(10) 第二部份電路包含:作為吸收電流用的電晶體 兩者的射極均接地’ Q7的基極接至Q1的基極,_ ϋ /lQ2的基極;作為提供電流用的NPN電晶體Q9與 07盘’ 之集極分別接至外接電壓VDD,Q9的射極連接於 Q1兩者之基極的連接點,用以提供Qm Qi的基極電、 ^,Q10的射極連接於q_Q2兩者之基極的連接點,用以 提供Q8與Q2的基極電流;PNP電晶體Q1丨與NpN電晶體qi 接成達靈頓結構,PNP電晶體Q13與NpN電晶體Qu連接成 靈頓結構,Q11與Q13的基極分別接受輸入的時序信號ΕΗ -、β i 2 Q11與Q13成共射極連接而外接至外接電遷vdd, Q 1 1之集極與Q 1 2之基極的共同點經由電容c丨而接地,Q J 3 之集極與Q14之基極的共同點經由電容〇2而接地,Q12之射 極經由電阻R3而接至NPN電晶體Q9的基極。Q14之射極經由 電阻R4而接至NPN電晶體Qi〇的基極。 藉由將Q7的集極信號〇χ2接至qi 4的基極,且將該Q8的 集極信號0X1接至該Q1 2的基極(圖1 a);或將0X2接至Q1 4的 射極’且將該0X1接至Q12的射極(圖ιβ);或將〇Χ2接至qi〇 的基極’且將該0X1接至Q9的基極(圖lc),使得··(丨)當Q1 未完全關閉時,Q7的集極電位〇χ2保持為低值(藉由適當的 選擇外加電壓VDD大小與電阻值R3,可控制Q7在飽和區操 作),造成Q2與Q4無法導通;(2)當Q2未完全關閉時,Q8的 集極電位0X 1保持為低值(同樣地,卩辟皮控制在飽和區操Page 15 M255588 V. Creative Instructions (10) The second part of the circuit contains: the emitters of the transistors used to absorb the current are grounded, the base of Q7 is connected to the base of Q1, and the base of _ ϋ / lQ2 The collectors of the NPN transistors Q9 and 07 disks used to provide current are connected to the external voltage VDD, and the emitter of Q9 is connected to the connection point of the bases of Q1 to provide the base voltage of Qm Qi. , ^, The emitter of Q10 is connected to the connection point of the bases of q_Q2 to provide the base current of Q8 and Q2; the PNP transistor Q1 丨 and the NpN transistor qi are connected to form a Darlington structure, and the PNP transistor Q13 and NpN transistor Qu are connected to form a Lington structure, and the bases of Q11 and Q13 respectively receive input timing signals ΕΗ-, β i 2 Q11 and Q13 are connected to a common emitter and externally connected to an external electrical switch vdd, Q 1 1 The common point of the collector and the base of Q 1 2 is grounded via the capacitor c 丨, the common point of the collector of QJ 3 and the base of Q14 is grounded via the capacitor 02, and the emitter of Q12 is connected to the NPN via the resistor R3 Base of transistor Q9. The emitter of Q14 is connected to the base of NPN transistor Qi0 via resistor R4. By connecting the collector signal Q7 of Q7 to the base of qi 4 and the collector signal 0X1 of Q8 to the base of Q1 2 (Figure 1a); or 0X2 to the emitter of Q1 4 Pole and connect 0X1 to the emitter of Q12 (Figure ιβ); or connect 0 × 2 to the base of qi〇 'and connect 0X1 to the base of Q9 (Figure lc), so that (·) When Q1 is not completely turned off, the collector potential of Q7, χ2, remains low (by appropriate selection of the applied voltage VDD and the resistance value R3, Q7 can be controlled to operate in the saturation region), causing Q2 and Q4 to fail to conduct; 2) When Q2 is not completely turned off, Q8's collector potential 0X 1 remains low (again, Pipi is controlled to operate in the saturation region)
第16頁 M255588 五、創作說明(11) 作^仏成…與Q6無法導通,因此,藉由信號0X2與0X1之 反饋,可確保短路路徑,即Q6、Q2同時導通,或該Q4、 同時導通的情況不會產生。 Μ部方面,藉由QU、Q12、電容c卜與電阻1^3所形成 1路’以及Q13、Q14、電容C2、與電阻以所形成的 r:!=rmQi4的基極端所看到的等效電阻分別 m極電阻之万倍,因此,時間常數(,值)被放 大冷七’達到降低切換速度的目的。 前述第一較佳實施例的變化樣態示於圖2a〜2 ί於另加了一些電阻如下:qi的基極與射極之 Γ ΐ射極之間分別串接一電阻,Q4的基極、 Γ ΐ二極、Q1°的基極分別串接-電阻而接 電壓VDD。藉由加上這虺電阻, :f至卜接 些參數❶ 一电丨貝】更易於調整電路上的一 本創作之第二較實施例示於圖3A及3B中。表考圖以, -部份完全相同,在IL 線包圍者)與圖1a的第 圖3A的第二部分相較於圖u的第二部份,相異處 Q12與Q14不復存在。詳而士之 ^ ' 丁作砰而a之,圖1 A中,左側之Q j !、Q】2Page 16 M255588 V. Creation Instructions (11) Make… and Q6 can not be connected, therefore, by the feedback of signals 0X2 and 0X1, you can ensure the short-circuit path, that is, Q6, Q2 are turned on at the same time, or Q4, are turned on at the same time. The situation does not occur. As for the M part, it can be seen through QU, Q12, capacitor c, and resistor 1 ^ 3, and Q13, Q14, capacitor C2, and resistor at the base end of r:! = RmQi4. The effective resistance is 10,000 times the resistance of the m-pole, respectively. Therefore, the time constant (, value) is amplified by the cold seven 'to achieve the purpose of reducing the switching speed. The variation of the foregoing first preferred embodiment is shown in Fig. 2a ~ 2. Some additional resistors are added as follows: a resistor is connected in series between the base of qi and the emitter of Γ, and the base of Q4 is connected in series. , Γ ΐ two poles, and Q1 ° bases are connected in series-resistance and connected to voltage VDD. By adding this 虺 resistance,: f to 卜 to get some parameters ❶ 电 电】] It is easier to adjust a second comparative embodiment of the creation on the circuit shown in Figures 3A and 3B. According to the table test,-part is completely the same, surrounded by the IL line) and the second part of Fig. 1a and Fig. 3A. Compared with the second part of Fig. U, the differences Q12 and Q14 no longer exist. Details ^ 'Ding Zuo bang and a, in Figure 1 A, the left Q j!, Q】 2
第17頁 M255588 五、創作說明(12) 所形成的達靈頓結構以單一 pNp電晶體Q1丨來取代,電阻R3 亦移至Q 9的射極。右側的情況亦類似,省略其說明。 類=於圖1 ’反饋信號0X2與0X1亦有兩種接法,說明 如下:藉由將Q7的集極信號0X2接至Q10的基極,且將Q8的 集極信號0X1接至q9的基極(如圖3A),或將〇χ2接至Q1〇的 射極’且將0X1接至Q9的射極(如圖3B),同樣可確保短路 路徑不會產生。 類似地,藉由QU、Q9、電容C1、與電阻R3所形成的 j ^ ^路,以及QU、Q10、電容C2、與電阻R4所形成的部 ^ &沾μ f於Q9或Q1 〇的基極端所看到的等效電阻分別為 到降低切換速度的因此,時間常數被放大^倍,達 更易雪ί由對前述第二較佳實施例加上-些電阻, 更易於調整電路上的一此炎 4Β中,其中_基極^極^此種變化樣態示於圖做 接地。 4落Q6的基極分別串接一電阻而 參考圖5,以圖5 A作為於入 別加在習知技術(圖7 )與:的時序#號E i 1與E i 2,分 所得的輸出電流分別顥示於 ^乂圖2A為例)的電路上, 、圖5B與圖5C中。圖5A中,在橫Page 17 M255588 V. Creation Note (12) The Darlington structure formed is replaced by a single pNp transistor Q1 丨, and the resistor R3 is also moved to the emitter of Q9. The situation on the right is similar, and its explanation is omitted. Class = In Figure 1, there are also two connection methods for the feedback signals 0X2 and 0X1, which are explained as follows: By connecting the collector signal 0X2 of Q7 to the base of Q10, and connecting the collector signal 0X1 of Q8 to the base of q9 (See Figure 3A), or connect 0x2 to the emitter of Q1〇 'and 0X1 to the emitter of Q9 (see Figure 3B), which can also ensure that a short-circuit path does not occur. Similarly, the path formed by QU, Q9, capacitor C1, and resistor R3, and the part formed by QU, Q10, capacitor C2, and resistor R4 are ^ & μ f in Q9 or Q1. The equivalent resistance seen at the base terminal is to reduce the switching speed. Therefore, the time constant is enlarged by ^ times to make it easier to snow. By adding some resistors to the aforementioned second preferred embodiment, it is easier to adjust the circuit resistance. In this inflammation 4B, the _base ^ pole ^ this change is shown in the figure for grounding. 4 bases of Q6 are respectively connected with a resistor in series and refer to FIG. 5, and FIG. 5A is used as a subtraction added to the conventional technique (FIG. 7) and the timing sequence # E i 1 and E i 2 are divided into The output currents are shown in the circuit shown in Figure 2A as an example, Figure 5B and Figure 5C. In Figure 5A, the horizontal
第18頁 M255588 五 、創作說明(13) 軸標示為2 0 0至2 10之間有一段時間,Eu與 此時在習知技術的電路上(圖5B )出現高達i的:, =傷害積體電路。而在本創作的電路上(圖5〇,二 的土:持在約5~371mA的範圍,證明本創作能抑制大電流-Page 18 M255588 V. Creation instructions (13) The axis is marked between 2 0 and 2 10 for a period of time. Eu and this time appear as high as i on the circuit of the conventional technology (Figure 5B):, = damage product Body circuit. And on the circuit of this creation (Figure 50, 2 of the soil: held in the range of about 5 ~ 371mA, it proves that this creation can suppress large currents-
麥考圖6,同樣採用圖5 A所示的輸入信號e 土丨與E丨2, 分別加在習知技術(圖7)與本創作(以圖2A為例)的電路 上,所得的輸出電壓(端子DO與DOB之間的電位差)八 不於圖6A與圖6B中。比較該兩圖,可知圖6A所示的習知、 路中,出現了超過90伏的突波,而圖6B所示之本創作的 路中,最大的突波不超20伏,證明本創作能抑制大電壓 產生·综合圖5與圖6,可知本創作相較於習知電路,征 良好之保護電路效果。 供 即使本創作係藉由舉出數個較佳實施例來描述,但h 本,作並不限定於所舉出之實施例。先前雖舉出與敘述^ 特定實施例,但是顯而易見地,其它未脫離本創作所揭示 之精神下,所完成之等效改變或修飾,均應包含在本創作 之申請專利範圍内。此外,凡其它未脫離本創作所揭示之 精神下’所完成之其他類似與近似改變或修飾,也均包含 在本創作之申請專利範圍内。同時應以最廣之定義來解^ 本創作之範圍,藉以包含所有的修飾與類似結構。Figure 6 of McCaw, also uses the input signals e soil 丨 and E 丨 2 shown in FIG. 5A, and adds them to the circuit of the conventional technology (Figure 7) and this creation (taking Figure 2A as an example), the resulting output The voltage (potential difference between the terminals DO and DOB) is no longer than that shown in FIGS. 6A and 6B. Comparing the two pictures, it can be seen that the surge shown in FIG. 6A has a surge exceeding 90 volts, and the largest surge in the original creation shown in FIG. 6B does not exceed 20 volts, which proves the creation Can suppress the generation of large voltages. Figure 5 and Figure 6 can be integrated. It can be seen that compared with the conventional circuit, this creation has a better protection circuit effect. Even though the present invention is described by citing several preferred embodiments, the present invention is not limited to the illustrated embodiments. Although specific examples have been cited and described previously, it is obvious that other equivalent changes or modifications made without departing from the spirit disclosed in this creation should be included in the scope of the patent application for this creation. In addition, all other similar and similar changes or modifications made without departing from the spirit disclosed in this creation are also included in the scope of patent application for this creation. At the same time, the scope of this creation should be interpreted in the broadest definition, so as to include all modifications and similar structures.
第19頁 M255588 圖式簡單說明 圖1 A〜1 C表示本創作之具低切換速度之雙極性馬達驅動器 電路的第一較佳實施例; 圖2 A〜2C表示上述第一較佳實施例的變化樣態; 圖3 A及3 B表示本創作之具低切換速度之雙極性馬達驅動器 路的第二較佳實施例; 圖4A及4B表示上述第二較佳實施例的變化樣態;The M255588 diagram on page 19 is a simple illustration. Figures 1A ~ 1C show the first preferred embodiment of the bipolar motor driver circuit with low switching speed of this creation; Figures 2A ~ 2C show the first preferred embodiment of the above Variations; Figures 3A and 3B show the second preferred embodiment of the bipolar motor driver circuit with low switching speed of the present invention; Figures 4A and 4B show the modification of the second preferred embodiment;
圖5表示以本創作與先前技術作比較,在相同的輸入信號 之下,所分別得到的電流模擬結果; 圖6表示以本創作與習知技術作比較,在相同的輸入信號 之下,所分別得到的電壓模擬結果; 圖7表示一種習知的雙極性馬達驅動器的結構。 圖式符號說明:Fig. 5 shows the current simulation results obtained by comparing this creation with the prior art under the same input signal. Fig. 6 shows the comparison between this creation and the conventional technique under the same input signal. The voltage simulation results obtained respectively; FIG. 7 shows the structure of a conventional bipolar motor driver. Schematic symbol description:
Q’ 1、Q’ 2、Q’ 3、Q’ 4 : NPN電晶體 E’ Η、E’ i2、E’ i3、E’ i4:分別為 Q’ :l、Q,2、Q’ 3、Q,4之 基極輸入 Nl、 N2:節點 Μ、Μ ’ :馬達線圈Q '1, Q' 2, Q '3, Q' 4: NPN transistors E 'Η, E' i2, E 'i3, E' i4: respectively Q ': l, Q, 2, Q' 3 Q, 4 base inputs N1, N2: nodes M, M ': motor coil
第20頁 M255588 圖式簡單說明 〇卜 Q2、Q4、Q6、Q7、Q8、Q9、Q10、Q12、Q14: NPN 電晶 體 Q3、 Q5、 Q1卜 Q13: PNP電晶體 E i 1、E i 2 :時序信號 VCC、VDD:外接電壓 ΪΠ、R2、R3、R4、R5、R6、R7、R8、R9、RIO、RH、The M255588 diagram on page 20 is a simple explanation: Q2, Q4, Q6, Q7, Q8, Q9, Q10, Q12, Q14: NPN transistors Q3, Q5, Q1 and Q13: PNP transistors E i 1, E i 2: Timing signals VCC, VDD: external voltages ΪΠ, R2, R3, R4, R5, R6, R7, R8, R9, RIO, RH,
R 1 2 :電阻 D 1、D 2 :二極體 C 1、C 2 :電容 0X卜0X2 :集極信號 DO、 D0B:端子R 1 2: Resistance D 1, D 2: Diode C 1, C 2: Capacitance 0X, 0X2: Collector signal DO, D0B: Terminal
第21頁Page 21
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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TWI478482B (en) * | 2012-07-24 | 2015-03-21 | Anpec Electronics Corp | Motor driving circuit and method |
TWI481185B (en) * | 2013-06-28 | 2015-04-11 | Feeling Technology Corp | A driving switching system applied to motor |
US9774283B2 (en) | 2012-07-24 | 2017-09-26 | Anpec Electronics Corporation | Motor driving circuit and method |
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Cited By (3)
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TWI478482B (en) * | 2012-07-24 | 2015-03-21 | Anpec Electronics Corp | Motor driving circuit and method |
US9774283B2 (en) | 2012-07-24 | 2017-09-26 | Anpec Electronics Corporation | Motor driving circuit and method |
TWI481185B (en) * | 2013-06-28 | 2015-04-11 | Feeling Technology Corp | A driving switching system applied to motor |
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