TWI849322B - Bottom and middle edge rings - Google Patents

Abstract

A bottom ring is configured to support a moveable edge ring. The edge ring is configured to be raised and lowered relative to a substrate support. The bottom ring includes an upper surface that is stepped, an annular inner diameter, an annular outer diameter, a lower surface, and a plurality of vertical guide channels provided through the bottom ring from the lower surface to the upper surface of the bottom ring. Each of the guide channels includes a first region having a smaller diameter than the guide channel, and the guide channels are configured to receive respective lift pins for raising and lowering the edge ring.

Description

Bottom and middle edge ring

This disclosure relates to a movable edge ring in a substrate processing system.

Cross-references to related applications

This disclosure is related to the subject matter of international application PCT/US2017/043527 filed on July 24, 2017. The entire disclosure of the aforementioned application is hereby incorporated by reference into the disclosure of this application.

The background description provided herein is intended to generally present the context of the present disclosure. The work of the inventors listed herein, to the extent described in this prior art section, and implementations that may not otherwise qualify as prior art at the time of filing, are not admitted, either expressly or impliedly, as prior art to the present disclosure.

A substrate processing system may be used to process substrates such as semiconductor wafers. Exemplary processes that may be performed on the substrate include, but are not limited to, chemical vapor deposition (CVD), atomic layer deposition (ALD), conductor etching, and/or other etching, deposition, or cleaning processes. The substrate may be disposed on a substrate support, such as a susceptor, an electrostatic chuck (ESC), etc., in a processing chamber of the substrate processing system. During etching, a gas mixture containing one or more precursors may be introduced into the processing chamber, and a plasma may be used to initiate a chemical reaction.

The substrate support may include a ceramic layer configured to support a wafer. For example, the wafer may be clamped to the ceramic layer during processing. The substrate support may include an edge ring configured around the exterior of the substrate support (e.g., outside of and/or adjacent to the periphery). The edge ring may be configured to confine the plasma to a volume above the substrate, protect the substrate support from corrosion caused by the plasma, etc.

The bottom ring is configured to support a movable edge ring. The edge ring is configured to be raised and lowered relative to the substrate support. The bottom ring includes a stepped upper surface, an annular inner diameter, an annular outer diameter, a lower surface, and a plurality of vertical guide channels disposed through the bottom ring from the lower surface of the bottom ring to the upper surface of the bottom ring. Each of the guide channels includes a first region having a smaller diameter than the guide channel, and the guide channels are configured to accommodate individual lift pins for raising and lowering the edge ring.

In other features, the guide channels have a diameter between 0.063" and 0.067". Each of the guide channels comprises a cavity on the lower surface of the bottom ring, wherein the cavities have a larger diameter than the guide channels. The transition region between the guide channels and the cavity is chamfered. The chamfered transition region has a height and width between 0.020" and 0.035", and an angle between 40° and 50°. The inner diameter of the step in the upper surface is at least 13.0". In one embodiment, the bottom ring comprises an upper extension extending radially inward, and in another embodiment, the guide channels pass through the upper extension.

Among other features, the bottom ring includes a guide feature extending upward from the top surface of the bottom ring. The guide channel passes through the guide feature. The guide feature includes a first region of the guide channel. The top surface includes an inner annular edge, and wherein the guide feature and the inner annular edge define a groove. The height of the guide feature is greater than the height of the inner annular edge. At least one of the first upper corner and the second upper corner of the guide feature is chamfered. The top surface includes an inner annular edge and an outer annular edge, wherein the guide feature and the inner annular edge define a first groove, and wherein the guide feature and the outer annular edge define a second groove.

Among other features, the upper surface includes at least two directional changes. The upper surface includes at least five directional changes. The upper surface includes at least five alternating vertical and horizontal paths. The bottom ring has a first outer diameter and a second outer diameter greater than the first outer diameter. The bottom ring includes an annular lip extending radially outward from an outer diameter of the bottom ring. The lower surface includes a plurality of cavities configured to align with bolt holes in a bottom plate of the substrate support.

The intermediate ring is disposed on the bottom ring and supports the movable edge ring. The edge ring is configured to be raised and lowered relative to the substrate support. The intermediate ring includes a stepped upper surface, an inner diameter of the ring, an outer diameter of the ring, a lower surface, a guide feature defining the outer diameter of the ring, an inner annular edge defining the inner diameter of the ring, and a groove defined between the guide feature and the inner annular edge.

Among other features, at least one of the first upper corner and the second upper corner of the guide feature is chamfered. The middle ring is "U" shaped. The upper surface includes at least four directional changes. The upper surface includes at least five alternating vertical and horizontal paths.

Further applicable areas of the present disclosure will become apparent from the implementation methods, the scope of the invention patent application and the drawings. The detailed description and specific examples are intended for illustrative purposes only and are not intended to limit the scope of the present disclosure.

100: Substrate processing system

102: Chamber

104: Upper electrode

106: Substrate support

108: Substrate

109: Shower head

110: Base plate

112: Ceramic layer

114: Thermal resistance layer (bonding layer)

116: Channel

120:RF generation system

122:RF voltage generator

124:Matching and allocating networks

130: Gas delivery system

132: Gas source

134: Valve

136:Mass flow controller

140: Manifold

142: Temperature controller

144: Heating element

146: Coolant assembly

150: Valve

152: Pump

160: Controller

170:Robot

172: Loading locking unit

176: Seals

180:Edge ring

184: Bottom ring

200:Support

204: Substrate

208:Interior part

212: External part

216: Bottom ring

220: Edge Ring

224: Ceramic layer

228: Controller

232:Actuator

236: Sales

300: Substrate support

304: Insulation board

308: Base plate

312: Ceramic layer

316: Substrate

320: Bottom ring

324: Edge Ring

328: Guidance Channel

332: Lifting pin

336: Middle ring

340: Ceramic sleeve

344: Top

348: Guidance Features Department

352: Circular edge

356: Groove

360: Interface

364: First Path

368: Second Path

372:Joint layer

376: Seals

380: Wall

384: Wall

388: Inner wall

400: Baseboard support

404: Insulation board

408: Base plate

412: Ceramic layer

416: Substrate

420: Bottom ring

424: Edge Ring

428: Guidance Channel

432: Lifting pin

434:Stairs

436: Corner

444: Corner

448: Corner

456: Corner

458: Inner wall

460: Guidance Features Department

464: Ring edge

468: Groove

472: Interface

476: Corner

480: Corner

484: Corner

500: Baseboard support

504: Insulation board

508: Base plate

512: Ceramic layer

516: Substrate

520: Bottom ring

524: Edge Ring

526: Edge Ring

528: Guidance Channel

532: Lifting pin

536: Middle ring

540: Guidance Features Department

544: Ring edge

548: Groove

552: Interface

556: Corner

558: Corner

560: Corner

562: Corner

564: Corner

568: Inner wall

600: Bottom ring

604: Insulation Body Ring

608: Guidance Channel

612: Lifting pin

616: Grooving

620: protrusion

700: Baseboard support

704: Bottom ring

708: Bottom ring

712: Bottom ring

716: Insulation plate

720: Base plate

724: Ceramic layer

728: Guidance Channel

732: Lifting pin

734: Narrow area

736: Guidance Features Department

740: Edge

742: Inner annular edge

744: Groove

746: Guidance Features Department

748: Edge

750: Inner annular edge

752: First groove

754: Outer annular edge

756: Second groove

760: Corner

764: Corner

768: Corner

800: Baseboard support

804: Bottom ring

808: Bottom ring

812: Bottom ring

816: Insulation plate

820: Base plate

824: Ceramic layer

828:Joint layer

832: Seals

836: Guidance Channel

840: Lifting pin

842: Narrow area

844: Ceramic sleeve

846: Guidance Features Department

848:Edge

850: Outer annular edge

852: Groove

856:Incision

860:Edge

872: Pad

876: Upper edge

880: Dashed arrow

900: Middle ring

904: Inner annular edge

908: Outer annular edge

912: Groove

916: Corner

920: Corner

1000: Substrate support

1004: Bottom ring

1008: Insulation board

1012: Base plate

1016: Ceramic layer

1020:Joint layer

1024: Seal

1028: Guidance Channel

1032: Lifting pin

1036: Narrow area

1040: Ceramic sleeve

1044:Pad

1048: Lips

1052: Bolts

1056: Bolt mounting hole

1060: Ceramic embolism

1064:Incision

The present disclosure can be more fully understood from the implementation and the accompanying drawings, wherein: FIG. 1 is a functional block diagram of an example processing chamber according to the present disclosure; FIG. 2A shows an example movable edge ring in a lowered position according to the present disclosure; FIG. 2B shows an example movable edge ring in an elevated position according to the present disclosure; FIG. 3A shows a first example substrate support including a movable edge ring according to the present disclosure; FIG. 3B shows a second example substrate support including a movable edge ring according to the present disclosure; and FIG. 4A shows a third example substrate support including a movable edge ring according to the present disclosure. FIG4B shows a fourth example substrate support including a movable edge ring according to the present disclosure; FIG4C shows a fifth example substrate support including a movable edge ring according to the present disclosure; FIG5A shows a sixth example substrate support including a movable edge ring according to the present disclosure; FIG5B shows a seventh example substrate support including a movable edge ring according to the present disclosure; FIG6A shows a bottom view of an example bottom ring of a substrate support according to the present disclosure; FIG6B shows a clocking feature portion (clocking feature portion) of the bottom ring of a substrate support according to the present disclosure; FIG. 7A shows a first example of a bottom ring configured to support a movable edge ring according to the present disclosure; FIG. 7B shows a second example of a bottom ring configured to support a movable edge ring according to the present disclosure; FIG. 7C shows a third example of a bottom ring configured to support a movable edge ring according to the present disclosure; FIG. 8A shows a third example of a bottom ring configured to support a movable edge ring according to the present disclosure. Four examples; FIG. 8B shows a fifth example of a bottom ring configured to support a movable edge ring according to the present disclosure; FIG. 8C shows a sixth example of a bottom ring configured to support a movable edge ring according to the present disclosure; FIG. 9 shows a middle ring configured to support a movable edge ring according to the present disclosure; and FIG. 10A and 10B show a seventh example of a bottom ring configured to support a movable edge ring according to the present disclosure.

In the drawings, reference numerals may be repeated to identify similar and/or identical elements.

A substrate support in a substrate processing system may include an edge ring. The upper surface of the edge ring may extend above the upper surface of the substrate support, such that the upper surface of the substrate support (and in some examples, the upper surface of a substrate disposed on the substrate support) is recessed relative to the edge ring. This recess may be referred to as a pocket. The distance between the upper surface of the edge ring and the upper surface of the substrate may be referred to as a "pocket depth." Typically, the pocket depth is fixed based on the height of the edge ring relative to the upper surface of the substrate.

Some implementations of the etching process may vary due to characteristics of the substrate processing system, substrate, gas mixture, etc. For example, the flow pattern and therefore the etch rate and etch uniformity may vary based on the pocket depth of the edge ring, the edge ring geometry (i.e., shape), and other variables including but not limited to gas flow rate, gas type, injection angle, injection location, etc. Therefore, varying the configuration of the edge ring (e.g., including edge ring height and/or geometry) may change the gas velocity distribution across the substrate surface.

Some substrate processing systems may implement movable (e.g., adjustable) edge rings and/or replaceable edge rings. In one example, the height of the movable edge ring may be adjusted during processing to control etch uniformity. The edge ring may be coupled to an actuator that is configured to raise and lower the edge ring in response to a controller, a user interface, etc. In one example, a controller of the substrate processing system controls the height of the edge ring during processing, between processing steps, etc. based on a specific recipe being executed and associated gas injection parameters. In addition, the edge ring and other components may include consumables that wear/corrode over time. Therefore, the height of the edge ring may be adjusted to compensate for corrosion. In other examples, the edge ring may be removable and replaceable (e.g., to replace a corroded or damaged edge ring, to replace an edge ring with an edge ring having a different geometry, etc.). Examples of substrate processing systems implementing movable and replaceable edge rings may be found in U.S. Patent Application No. 14/705,430 filed on May 6, 2015, the entire contents of which are hereby incorporated by reference into this disclosure.

Substrate processing systems and methods according to the principles of the present disclosure include a middle edge ring and a bottom edge ring configured to support a movable top edge ring.

Referring now to FIG. 1 , an example substrate processing system 100 is shown. By way of example only, the substrate processing system 100 may be used to perform etching using RF plasma and/or other suitable substrate processing. The substrate processing system 100 includes a processing chamber 102 that surrounds the other components of the substrate processing system 100 and houses the RF plasma. The substrate processing chamber 102 includes an upper electrode 104 and a substrate support 106, such as an electrostatic chuck (ESC). During operation, a substrate 108 is disposed on the substrate support 106. Although a particular substrate processing system 100 and chamber 102 are shown as examples, the principles of the present disclosure may be applied to other types of substrate processing systems and chambers, such as substrate processing systems that generate plasma in situ, implement remote plasma generation and delivery (e.g., using plasma tubes, microwave tubes), etc.

By way of example only, the upper electrode 104 may include a gas distribution device such as a showerhead 109 that introduces and distributes a process gas (e.g., an etching process gas). The showerhead 109 may include a rod including one end connected to a top surface of a processing chamber. The base is typically cylindrical and extends radially outward from an opposite end of the rod at a location spaced from the top surface of the processing chamber. The surface or faceplate of the base of the showerhead that faces the substrate includes a plurality of holes through which a process gas or a flushing gas flows. Alternatively, the upper electrode 104 may include a conductive plate and the process gas may be introduced in another manner.

The substrate support 106 includes a conductive bottom plate 110 as a lower electrode. The bottom plate 110 supports a ceramic layer 112. In some examples, the ceramic layer 112 may include a heating layer, such as a ceramic multi-zone heating plate. A thermal resistance layer 114 (e.g., a bonding layer) may be disposed between the ceramic layer 112 and the bottom plate 110. The bottom plate 110 may include one or more coolant channels 116 for flowing a coolant through the bottom plate 110.

The RF generation system 120 generates an RF voltage and outputs the RF voltage to one of the upper electrode 104 and the lower electrode (e.g., the bottom plate 110 of the substrate support 106). The other of the upper electrode 104 and the bottom plate 110 can be DC grounded, AC grounded, or floating. By way of example only, the RF generation system 120 can include an RF voltage generator 122 that generates an RF voltage that is fed to the upper electrode 104 or the bottom plate 110 through a matching and distribution network 124. In other examples, the plasma can be generated inductively or remotely. As shown for purposes of illustration, although the RF generation system 120 corresponds to a capacitively coupled plasma (CCP) system, the principles of the present disclosure may also be implemented in other suitable systems, such as, by way of example only: a transformer coupled plasma (TCP) system, a CCP cathode system, a remote microwave plasma generation and delivery system, etc.

The gas delivery system 130 includes one or more gas sources 132-1, 132-2, ..., and 132-N (collectively referred to as gas sources 132), where N is an integer greater than 0. The gas source supplies one or more gases (e.g., etching gas, carrier gas, purge gas, etc.) and mixtures thereof. The gas source may also supply purge gas. The gas source 132 is connected to the manifold 140 via valves 134-1, 134-2, ..., and 134-N (collectively referred to as valves 134) and mass flow controllers 136-1, 136-2, ..., and 136-N (collectively referred to as mass flow controllers 136). The output of the manifold 140 is fed to the processing chamber 102. By way of example only, the output of manifold 140 is fed to showerhead 109.

The temperature controller 142 may be connected to a plurality of heating elements 144, such as thermal control elements (TCEs) disposed in the ceramic layer 112. For example, the heating elements 144 may include, but are not limited to, macroscopic heating elements corresponding to each zone in a multi-zone heating plate, and/or an array of microscopic heating elements disposed across multiple zones of the multi-zone heating plate. The temperature controller 142 may be used to control the plurality of heating elements 144 to control the temperature of the substrate support 106 and the substrate 108.

The temperature controller 142 can communicate with the coolant assembly 146 to control the coolant flowing through the channel 116. For example, the coolant assembly 146 can include a coolant pump and a storage tank. The temperature controller 142 operates the coolant assembly 146 to selectively flow the coolant through the channel 116 to cool the substrate support 106.

The valve 150 and pump 152 may be used to evacuate reactants from the processing chamber 102. The system controller 160 may be used to control components of the substrate processing system 100. The robot 170 may be used to deliver substrates to and remove substrates from the substrate support 106. For example, the robot 170 may transfer substrates between the substrate support 106 and the load lock 172. Although shown as a separate controller, the temperature controller 142 may be implemented within the system controller 160. In some examples, a protective seal 176 may be disposed around the periphery of the bonding layer 114 between the ceramic layer 112 and the base plate 110.

The substrate support 106 includes an edge ring 180. The edge ring 180 may correspond to a top ring, which may be supported by a bottom ring 184. As described in more detail below, in some examples, the edge ring 180 may be further supported by one or more of an intermediate ring (not shown in FIG. 1 ), a stepped portion of the ceramic layer 112, etc. The edge ring 180 is movable relative to the substrate 108 (e.g., movable upward and downward in a vertical direction). For example, the edge ring 180 may be controlled by an actuator responsive to the controller 160. In some examples, the edge ring 180 can be adjusted during substrate processing (i.e., the edge ring 180 can be an adjustable edge ring). In other examples, the edge ring 180 can be removable (e.g., removed through a plenum using the robot 170 while the processing chamber 102 is under vacuum). In still other examples, the edge ring 180 can be both adjustable and removable.

2A and 2B, an example substrate support 200 is shown with a substrate 204 disposed thereon. The substrate support 200 may include a base or pedestal having an inner portion (e.g., corresponding to an ESC) 208 and an outer portion 212. In an example, the outer portion 212 may be independent of the inner portion 208 and movable relative to the inner portion 208. For example, the outer portion 212 may include a bottom ring 216 and a top edge ring 220. The substrate 204 is disposed on the inner portion 208 (e.g., on a ceramic layer 224) for processing. A controller 228 communicates with one or more actuators 232 to selectively raise and lower the edge ring 220. For example, the edge ring 220 may be raised and/or lowered during processing to adjust the pocket depth of the support 200. In another example, the edge ring 220 may be raised to facilitate removal and replacement of the edge ring 220.

By way of example only, the edge ring 220 is shown in a fully lowered position in FIG. 2A and in a fully raised position in FIG. 2B . As shown, the actuator 232 corresponds to a pin actuator configured to selectively extend and retract the pin 236 in a vertical direction. Other suitable types of actuators may be used in other examples. By way of example only, the edge ring 220 corresponds to a ceramic or quartz edge ring, however other suitable materials (e.g., silicon carbide, yttrium oxide, etc.) may be used. In FIG. 2A , the controller 228 communicates with the actuator 232 to directly raise and lower the edge ring 220 via the pin 236. In some examples, the inner portion 208 may move relative to the outer portion 212 .

Features of an example substrate support 300 are shown in more detail in FIGS. 3A and 3B . The substrate support 300 includes an insulator ring or plate 304 and a bottom plate (e.g., a bottom plate of an ESC) 308 disposed on the insulator plate 304. The bottom plate 308 supports a ceramic layer 312 that is configured to support a substrate 316 disposed thereon for processing. In FIG. 3A , the ceramic layer 312 has a non-stepped configuration. In FIG. 3B , the ceramic layer 312 has a stepped configuration. The substrate support 300 includes a bottom ring 320 that supports an upper (“top”) edge ring 324. One or more through holes or guide channels 328 may be formed through the insulator plate 304, the bottom ring 320, and/or the bottom plate 308 to accommodate individual lift pins 332 configured to selectively raise and lower the edge ring 324. For example, the guide channels 328 serve as pin alignment holes for individual lift pins 332. As shown in FIG. 3B, the substrate support 300 may further include an intermediate ring 336 configured between the bottom ring 320 and the edge ring 324. In a stepped configuration, the intermediate ring 336 overlaps the ceramic layer 312 and is configured to support the outer edge of the substrate 316.

The lift pins 332 may include a corrosion resistant material such as sapphire. The outer surface of the lift pins 332 may be smoothly polished to reduce friction between the lift pins 332 and the structural features of the bottom ring 320 to facilitate movement. In some examples, one or more ceramic sleeves 340 may be disposed in the guide channels 328 around the lift pins 332. Each of the lift pins 332 may include a rounded upper end 344 to minimize the contact area between the upper end 344 and the edge ring 324. The smooth outer surface, rounded upper end 344, guide channel 328, and/or ceramic sleeve 340 facilitate raising and lowering of the edge ring 324 while preventing the lift pins 332 from sticking during movement.

As shown in FIG. 3A , the bottom ring 320 includes a guide feature 348. In FIG. 3B , the middle ring 336 includes a guide feature 348. For example, the guide feature 348 corresponds to a raised annular edge 352 extending upward from the bottom ring 320/middle ring 336. In FIG. 3A , the guide channel 328 and the lift pin 332 extend through the guide feature 348 to engage with the edge ring 324. Conversely, in FIG. 3B , the guide channel 328 and the lift pin 332 extend through the bottom ring 320 to engage with the edge ring 324 without passing through the middle ring 336.

The edge ring 324 includes an annular bottom groove 356 configured to receive the guide feature 348. For example, the profile (i.e., cross-sectional) shape of the edge ring 324 can generally correspond to a "U" shape configured to receive the guide feature 348, although other suitable shapes may be used. In addition, while the upper surface of the edge ring 324 is shown as being generally horizontal (i.e., parallel to the upper surface of the substrate support 300), in other examples, the upper surface of the edge ring 324 can have a different profile. For example, the upper surface of the edge ring 324 can be sloped or angled, rounded, etc. In some examples, the upper surface of the edge ring 324 is sloped so that the thickness at the inner diameter of the edge ring 324 is greater than the thickness at the outer diameter of the edge ring 324 to compensate for corrosion at the inner diameter.

Thus, the bottom surface of the edge ring 324 is configured to be complementary to the upper surface of the bottom ring 320 in FIG. 3A , or the individual surfaces of the bottom ring 320 and the intermediate ring 336 in FIG. 3B . Furthermore, the interface 360 between the edge ring 324 and the bottom ring 320/intermediate ring 336 is complex. In other words, the bottom surface of the edge ring 324 and the corresponding interface 360 include multiple changes in direction (e.g., 90 degree changes in direction, upward and downward steps, alternating horizontal and vertical orthogonal paths, etc.), rather than providing a direct (e.g., line-of-sight) path between the edge ring 324 and the bottom ring 320/intermediate ring 336 to the internal structure of the substrate support 300. Generally, the possibility of plasma and process material leakage may increase within a substrate support including multiple interface rings (e.g., top edge ring 324 and one or more of middle ring 336 and bottom ring 320). This possibility may further increase when the movable edge ring 324 is raised during processing. Therefore, interface 360 (and in particular the profile of edge ring 324) is configured to prevent process materials, plasma, etc. from reaching the internal structure of substrate support 300.

For example, as shown in FIG. 3A , the interface 360 includes five directional changes to limit access to the guide channel 328 and lift pins 332, the ceramic layer 312, the back and edge of the substrate 316, etc. In contrast, as shown in FIG. 3B , the interface 360 includes seven directional changes in the first path 364 and five directional changes in the second path 368 to limit access to the guide channel 328 and lift pins 332, the ceramic layer 312, the back and edge of the substrate 316, the bonding layer 372, the seal 376, etc. Thus, the interface 360 reduces the possibility of plasma leakage and ignition, corrosion, etc. that may affect the internal structure of the substrate support 300.

The profile (i.e., cross-sectional) shape of the edge ring 324 (and the interface surfaces of the bottom ring 320, the intermediate ring 336, etc.) is designed to facilitate manufacturing and reduce manufacturing costs. For example, the walls 380, 384 and the guide features 348 of the groove 356 can be substantially vertical (e.g., compared to a parabola, a trapezoid, a triangle, etc.) to facilitate manufacturing and prevent plasma and process material leakage. By way of example only, substantially vertical can be defined as perpendicular to the upper and/or lower surface of the edge ring 324, within 1° of the normal to the upper and/or lower surface of the edge ring 324, parallel to the direction of movement of the edge ring 324, etc. Additionally, the vertical walls 380, 384 maintain the alignment of the edge ring 324 relative to the guide feature 348 during movement of the edge ring 324. In contrast, when the respective profiles of the groove 356 and the guide feature 348 are parabolic, trapezoidal, triangular, etc., upward movement of the edge ring 324 results in a significant separation between the wall 380 and the wall 384.

The surfaces of the edge ring 324, the bottom ring 320, and the intermediate ring 336 within the interface 360 (and particularly within the groove 356) are relatively smooth and continuous to minimize friction between the edge ring 324 and the guide feature 348 during movement of the edge ring 324. For example, the individual surfaces of the edge ring 324, the bottom ring 320, and the intermediate ring 336 within the interface 360 may undergo additional polishing to achieve a desired surface smoothness. In other examples, the surfaces of the edge ring 324, the bottom ring 320, and the intermediate ring 336 within the interface 360 may be coated with a material that further reduces friction. In yet other examples, the surfaces of edge ring 324, bottom ring 320, and intermediate ring 336 within interface 360 (and particularly edge ring 324) may not have screw holes and/or similar component features. In this way, particle generation due to contact between surfaces (e.g., during movement of edge ring 324) may be minimized.

When the edge ring 324 is raised during processing for adjustment as described above, the controller 228 as described in FIGS. 2A and 2B is configured to limit the adjustable range of the edge ring 324 based on the height H of the guide feature 348. For example, the adjustable range may be limited to less than the height H of the guide feature 348. For example, if the guide feature 348 has a height H of approximately 0.24" (e.g., 0.22"-0.26"), the adjustable range of the edge ring 324 may be 0.25". In other words, the edge ring 324 may be raised from a fully lowered position (e.g., 0.0") to a fully raised position (e.g., 0.25") without completely removing the guide feature 348 from the groove 356 in the edge ring 324. Thus, even in the fully raised position, the edge ring 324 still overlaps at least a portion of the guide feature 348. Limiting the range of the edge ring 324 in this manner maintains the complex interface 360 as described above and prevents lateral misalignment of the edge ring 324. The depth of the groove 356 can be approximately equal to the height H of the guide feature 348 (e.g., within 5%). The depth of the groove 356 can be at least 50% of the thickness of the edge ring. By way of example only, the adjustable range of the edge ring 324 of Figure 3A is 0.15" to 0.25", while the adjustable range of the edge ring 324 of Figure 3B is 0.05" to 0.15". For example, the thickness (i.e., height) of the edge ring 324 may be between about 0.50" (e.g., 0.45" to 0.55") and about 0.6" (e.g., 0.58" to 0.620"), and the depth of the groove 356 may be about 0.30" (e.g., 0.29" to 0.31").

For example, the "thickness" of the edge ring 324 as used herein may refer to the thickness of the edge ring 324 at the inner diameter of the edge ring 324 (e.g., the thickness/height of the edge ring 324 at the inner wall 388). In some examples, the thickness of the edge ring 324 may not be uniform across the entire upper surface of the edge ring 324 (e.g., the upper surface of the edge ring 324 may be sloped as described above, such that the thickness at the inner wall 388 is greater than the thickness at the outer diameter of the edge ring 324). However, since corrosion caused by exposure to plasma may increase at the inner wall 388 relative to the outer diameter of the edge ring 324, the edge ring 324 may be formed such that the inner wall 388 has at least a predetermined thickness to compensate for the increased corrosion at the inner wall 388. By way of example only, the inner wall 388 is substantially vertical to avoid contacting the substrate 316 during movement of the edge ring 324.

Referring now to Figures 4A, 4B, and 4C, another example substrate support 400 is shown in more detail. The substrate support 400 includes an insulator ring or plate 404 and a bottom plate 408 disposed on the insulator plate 404. The bottom plate 408 supports a ceramic layer 412, which is configured to support a substrate 416 disposed thereon for processing. In Figure 4A, the ceramic layer 412 has a non-stepped configuration. In Figures 4B and 4C, the ceramic layer 412 has a stepped configuration. The substrate support 400 includes a bottom ring 420 that supports an upper edge ring 424. In the stepped configuration, the edge ring 424 overlaps the ceramic layer 412. One or more through holes or guide channels 428 may be formed through the insulator plate 404, the bottom ring 420, and/or the bottom plate 408 to accommodate individual lift pins 432 configured to selectively raise and lower the edge ring 424. For example, the guide channels 428 serve as pin alignment holes for individual ones of the lift pins 432.

In the examples of FIGS. 4A, 4B, and 4C, edge ring 424 is configured to support an outer edge of substrate 416 disposed on ceramic layer 412. For example, the inner diameter of edge ring 424 includes step 434 configured to support an outer edge of substrate 416. Thus, edge ring 424 may be raised and lowered to facilitate removal and replacement of edge ring 424, but may not be raised and lowered during processing (i.e., edge ring 424 is non-adjustable). For example, lift pins 432 may be used to raise edge ring 424 for removal and replacement (e.g., using robot 170).

In one example, the lower inner corner 436 of the edge ring 424 may be chamfered to facilitate alignment (i.e., centering) of the edge ring 424 on the substrate support 400. Conversely, the upper outer corner 444 and/or the lower inner corner 448 of the ceramic layer 412 may be chamfered complementary to the corner 436. Thus, when the edge ring 424 is lowered onto the substrate support 400, the chamfered corner 436 interacts with the chamfered corners 444/448 to self-center the edge ring 424 on the substrate support 400.

The upper outer corner 456 of the edge ring 424 may be chamfered to facilitate removal of the edge ring 424 from the processing chamber 102. For example, because the substrate support 400 is configured for in-situ removal of the edge ring 424 (i.e., without fully opening and venting the processing chamber 102), the edge ring 424 is configured to be removed through a plenum. Typically, the size of the plenum is selected to accommodate a substrate of a predetermined size (e.g., 300 mm). However, the edge ring 424 has a diameter that is significantly larger than the substrate 416 and a typical edge ring 424 may not fit through the plenum. Therefore, the diameter of the edge ring 424 is reduced (e.g., compared to the edge ring 324 shown in Figures 3A and 3B). For example, the outer diameter of edge ring 324 is similar to the outer diameter of bottom ring 320. In contrast, the outer diameter of edge ring 424 is significantly smaller than the outer diameter of bottom ring 420. By way of example only, the outer diameter of edge ring 424 is less than or equal to approximately 13" (e.g., 12.5" to 13"). Chamfering outer corner 456 further facilitates the transfer of edge ring 424 through the air chamber.

By way of example only, the chamfer of the outer corner may have a height of 0.050" to 0.070", a width of 0.030" to 0.050", and an angle of 25-35°. In some examples, the chamfer of the lower corner 436 may have a height of approximately 0.025" (e.g., 0.015" to 0.040"), a width of approximately 0.015" (e.g., 0.005" to 0.030"), and an angle of approximately 60° (50-70°). By way of example only, the thickness (i.e., height) of the edge ring 424 is approximately but not greater than 0.275" (e.g., 0.25" to 0.30"). For example, the thickness of the edge ring 424 may not exceed the height of the plenum of the processing chamber 102 to allow for removal of the edge ring 424. By way of example only, the "thickness" of the edge ring 424 as used herein may refer to the thickness of the edge ring 424 at the inner diameter of the edge ring 424 (e.g., the thickness/height of the edge ring 424 at the inner wall 458) as described above with respect to FIGS. 3A and 3B.

As shown in FIG. 4C , the bottom ring 420 includes a guide feature 460. For example, the guide feature 460 corresponds to a raised annular edge 464 extending upward from the bottom ring 420. The guide channel 428 and the lift pin 432 extend through the bottom ring 420 to engage with the edge ring 424. The edge ring 424 includes an annular bottom groove 468 configured to accommodate the guide feature 460. For example, the profile of the edge ring 424 can roughly correspond to a "U" shape configured to accommodate the guide feature 460.

3A and 3B , the bottom surface of the edge ring 424 in FIG. 4C is configured to complement the respective top surfaces of the bottom ring 420 and the ceramic layer 412 to form a complex interface 472. In other words, the interface 472 includes multiple changes in direction (e.g., 90 degree changes in direction) rather than providing a direct path to the internal structure of the substrate support 400 between the edge ring 424 and the bottom ring 420. In some examples, portions of the guide features 460, the edge ring 424, the bottom ring 420, and/or the ceramic layer 412 within the interface 472 may be chamfered to facilitate alignment (i.e., centering) of the edge ring 424 on the substrate support 400. For example, the lower inner corner 476 of the inner diameter of the edge ring 424 and the corresponding lower inner corner 480 and/or upper outer corner 484 of the ceramic layer 412 are chamfered. In other examples, mechanical alignment of the guide feature 460 within the groove 468 centers the edge ring 424. In some examples, the chamfer of the lower corner 476 may have a height of about 0.025" (e.g., 0.015" to 0.040"), a width of about 0.015" (e.g., 0.005" to 0.030"), and an angle of about 60° (e.g., 50-60°).

Referring now to FIGS. 5A and 5B , another example substrate support 500 is shown in more detail. The substrate support 500 includes an insulator ring or plate 504 and a bottom plate 508 disposed on the insulator plate 504. The bottom plate 508 supports a ceramic layer 512 that is configured to support a substrate 516 disposed thereon for processing. In FIG. 5A , the ceramic layer 512 has a non-stepped configuration. In FIG. 5B , the ceramic layer 512 has a stepped configuration. The substrate support 500 includes a bottom ring 520 that supports an upper edge ring 524 (as shown in FIG. 5A ) or an upper edge ring 526 (as shown in FIG. 5B ). One or more through holes or guide channels 528 may be formed through the insulator plate 504, the bottom ring 520, and/or the bottom plate 508 to accommodate individual lift pins 532 configured to selectively raise and lower the edge rings 524/526. For example, the guide channels 528 serve as pin alignment holes for individual lift pins 532. As shown in FIG. 5B, the substrate support 500 may further include an intermediate ring 536 configured between the bottom ring 520 and the edge ring 526. In a stepped configuration, the intermediate ring 536 overlaps the ceramic layer 512 and is configured to support the outer edge of the substrate 516.

The examples of FIGS. 5A and 5B combine features of the adjustable edge ring 324 of FIGS. 3A and 3B and the removable/replaceable edge ring of FIGS. 4A, 4B, and 4C. For example, even in the stepped configuration of FIG. 5B, edge ring 526 does not extend below and support substrate 516. Thus, edge ring 524/526 can be raised and lowered during processing. By way of example only, the adjustable range of edge ring 524 of FIG. 5A is 0.05" to 0.15", while the adjustable range of edge ring 526 of FIG. 5B is 0.02" to 0.05". Additionally, the outer diameter of the edge ring 524/526 is reduced as described with respect to FIGS. 4A, 4B, and 4C to facilitate the transfer of the edge ring 524/526 through the air chamber. Thus, the edge ring 524/526 is removable and replaceable in situ as described above.

As shown in FIG. 5A , the bottom ring 520 includes a guide feature 540. In FIG. 5B , the middle ring 536 includes a guide feature 540. For example, the guide feature 540 corresponds to a raised annular edge 544 extending upward from the bottom ring 520/middle ring 536. In each of FIGS. 5A and 5B , the guide channel 528 and the lift pin 532 extend through the bottom ring 520 to engage with the edge ring 524/526. For example, the edge ring 524/526 includes an annular bottom groove 548 configured to accommodate the guide feature 540. For example, the profile of edge ring 524/526 may roughly correspond to a "U" shape configured to accommodate guide feature 540.

3A, 3B, and 4C, the bottom surface of the edge ring 524/526 is configured to complement the respective upper surfaces of the bottom ring 520 and the intermediate ring 536 to form a complex interface 552. In other words, the interface 552 includes multiple changes in direction (e.g., 90 degree changes in direction) rather than providing a direct path to the internal structure of the substrate support 500 between the edge ring 524/526 and the bottom ring 520. In some examples, portions of the guide features 540, the edge ring 524/526, the bottom ring 520, and/or the intermediate ring 536 within the interface 552 may be chamfered to facilitate alignment (i.e., centering) of the edge ring 524/526 on the substrate support 500. For example, in FIG. 5A , corners 556 and 558 of edge ring 524 and complementary corner 560 of guide feature 540 and corner 562 of bottom ring 520 are chamfered. In contrast, in FIG. 5B , only corner 556 of edge ring 526 and corner 560 of middle ring 536 are chamfered. Upper outer corner 564 of edge ring 524 may be chamfered to facilitate removal of edge ring 524 from processing chamber 102 as described above with respect to FIGS. 4A , 4B and 4C .

By way of example only, the chamfers of the lower corners 556 and 558 may have a height and width of approximately 0.005" to 0.030" and an angle of approximately 25 to 35°. For example, the thickness (i.e., height) of the edge ring 524/526 may be approximately but not greater than 0.25" (e.g., 0.25" to 0.26"), and the depth of the recess 548 may be 0.200" to 0.220". The difference between the thickness of the edge ring 524/526 and the depth of the recess 548 may be no less than 0.075". For example, the thickness of the edge ring 524/526 may not exceed the height of the plenum of the processing chamber 102 to allow removal of the edge ring 524/526. However, the thickness of the edge ring 524/526 can also be maximized without exceeding the height of the air chamber to optimize the adjustability of the edge ring 524/526. In other words, because the edge ring 524/526 wears over time, the amount that the edge ring 524/526 can be raised without having to be replaced increases in proportion to the thickness of the edge ring 524/526. By way of example only, the "thickness" of edge ring 524/526 as used herein may mean the thickness of edge ring 524/526 at the inner diameter of edge ring 524/526 (e.g., the thickness/height of edge ring 524/5264 at inner wall 568) as described above with respect to FIGS. 3A, 3B, 4A, 4B, and 4C.

6A and 6B, an example bottom ring 600 (e.g., corresponding to any of bottom rings 320, 420, or 520) may implement a clocking feature to facilitate alignment of the bottom ring 600 with the insulator ring 604. The bottom ring 600 includes a plurality of guide channels 608 configured to receive respective lift pins 612 extending through the insulator ring 604. The bottom ring 600 further includes one or more clocking features, such as notches 616. The notches 616 are configured to receive complementary structures, such as protrusions 620 extending upwardly from the insulator ring 604. Thus, the bottom ring 600 can be installed so that the notches 616 align with and accommodate the protrusions 620 to ensure that the guide channels 608 are aligned with individual ones of the lift pins 612.

7A, 7B, and 7C, a substrate support 700 includes example bottom rings 704, 708, and 712 configured to support a top movable edge ring in a non-stepped configuration according to the principles of the present disclosure. For example, as shown in FIG7A, bottom ring 704 is configured to support edge ring 324 of FIG3A. As shown in FIG7B, bottom ring 708 is configured to support edge ring 424 of FIG4A. As shown in FIG7C, bottom ring 712 is configured to support edge ring 524 of FIG5A. Respective upper surfaces of each of the bottom rings 704, 708, and 712 are stepped. In other words, each of the individual upper surfaces has at least two different heights.

The substrate support 700 includes an insulator ring or plate 716 and a bottom plate (e.g., a bottom plate of an ESC) 720 disposed on the insulator plate 716. The bottom plate 720 supports a ceramic layer 724 that is configured to support a substrate thereon for processing. One or more through holes or guide channels 728 may be formed through the insulator plate 716 and the bottom rings 704, 708, 712 to accommodate lift pins 732 configured to selectively raise and lower individual edge rings. For example, the guide channels 728 serve as pin alignment holes for individual ones of the lift pins 732. The gap between the lift pins 732 and the inner surface of the guide channels 728 is minimized to reduce plasma leakage. In other words, the diameter of the guide channel 728 is only slightly larger (e.g., 0.005"-0.010" larger) than the diameter of the lift pin 732. For example, the lift pin 732 may have a diameter of 0.057"-0.061" while the guide channel 728 has a diameter of 0.063"-0.067". In some examples, the guide channel 728 includes a narrow region 734 having a smaller diameter than other portions of the guide channel 728 to further limit plasma leakage. For example, the narrow region 734 may have a diameter that is 0.002-0.004" smaller than the diameter of the guide channel 728. Similarly, in some examples, the lift pin 732 may include a narrow region located within the narrow region 734 of the guide channel 728.

As shown in FIG. 7A , the bottom ring 704 includes a guide feature 736. For example, the guide feature 736 corresponds to a raised annular edge 740 extending upward from the bottom ring 704. The edge 740 and the inner annular edge 742 define a groove 744. The guide channel 728 and the lift pin 732 extend through the guide feature 736. The upper surface of the bottom ring 704 is configured to complement the bottom surface of the edge ring 324 to form a complex interface including multiple directional changes as described above. The respective widths of the groove 744 and the edge 740 are selected to minimize the gap between the respective vertical surfaces of the groove 744 and the edge 740 and the complementary vertical surfaces on the bottom of the edge ring 324. For example, the gap may be less than 0.02".

Similarly, as shown in FIG. 7C , the bottom ring 712 includes a guide feature 746. For example, the guide feature 746 corresponds to a raised annular edge 748 extending upwardly from the bottom ring 712. The edge 748 and the inner annular edge 750 define a first groove 752, while the edge 748 and the outer annular edge 754 define a second groove 756. The guide channel 728 and the lift pin 732 extend through the bottom ring 712. The upper surface of the bottom ring 712 is configured to complement the bottom surface of the edge ring 524 to form a complex interface including multiple directional changes as described above. The height of edge 748 is greater than the height of inner annular edge 750 to facilitate engagement of edge 748 with edge ring 524 prior to contact between inner annular edge 750 and edge ring 524.

In some examples, portions of the guide feature 746 and/or the bottom ring 712 may be chamfered to facilitate alignment (i.e., centering) of the edge ring 524 on the substrate support 700. For example, corners 760 and 764 of the guide feature 746 and corner 768 of the bottom ring 712 are chamfered. In some examples, the chamfer of corner 760 may have a height and width of at least about 0.008" (e.g., 0.007" to 0.011") and an angle of 15-25°. The chamfer of corner 764 may have a height and width of at least about 0.01" (e.g., 0.01" to 0.02") and an angle of 20-35°. The chamfer of corner 768 may have a height and width of at least about 0.010" (e.g., 0.010" to 0.030") and an angle of 20-35°.

The inner diameter of bottom rings 704, 708 and 712 may be at least 11.5" (e.g., between 11.5" and 11.7"). The outer diameter of bottom rings 704, 708 and 712 may be no greater than 14" (e.g., between 13.8" and 14.1"). The stepped inner diameter of bottom rings 708 and 712 at 772 is selected to accommodate the outer diameter of edge ring 424 or 524. For example, the outer diameter of edge ring 424 or 524 may be approximately 12.8" (e.g., +/- 0.10"). Therefore, the inner diameter of bottom rings 708 and 712 at 772 may be at least 13.0".

8A, 8B, and 8C, a substrate support 800 includes example bottom rings 804, 808, and 812 configured to support a top movable edge ring in a stepped configuration according to the principles of the present disclosure. For example, as shown in FIG8A, bottom ring 804 is configured to support edge ring 324 of FIG3B. As shown in FIG8B, bottom ring 808 is configured to support edge ring 424 of FIG4C. As shown in FIG8C, bottom ring 812 is configured to support edge ring 526 of FIG5B. Bottom rings 804 and 812 can be further configured to support middle ring 336 of FIG3B and middle ring 536 of FIG5B, respectively. The respective upper surfaces of each of the bottom rings 804, 808, and 812 are stepped. In other words, each of the respective upper surfaces has at least two different heights.

The substrate support 800 includes an insulator ring or plate 816 and a bottom plate (e.g., a bottom plate of an ESC) 820 disposed on the insulator plate 816. The bottom plate 820 supports a ceramic layer 824 that is configured to support a substrate thereon for processing. A bonding layer 828 can be disposed between the bottom plate 820 and the ceramic layer 824, and a seal 832 surrounds the bonding layer 828. One or more through holes or guide channels 836 can be formed through the insulator plate 816 and the bottom ring 804, 808, 812 to accommodate lift pins 840 configured to selectively raise and lower individual edge rings. For example, the guide channels 836 serve as pin alignment holes for individual ones of the lift pins 840. The gap between the lift pin 840 and the inner surface of the guide channel 836 is minimized to reduce plasma leakage. In other words, the diameter of the guide channel 836 is only slightly larger than the diameter of the lift pin 840 (e.g., 0.005"-0.010" larger). For example, the lift pin 840 may have a diameter of 0.1" and the guide channel 836 has a diameter of 0.105". In some examples, the guide channel 836 includes a narrow region 842 having a smaller diameter than other portions of the guide channel 836 to further limit plasma leakage. For example, the narrow region 842 may have a diameter that is 0.002-0.004" smaller than the diameter of the guide channel 836. In some examples, one or more ceramic sleeves 844 may be disposed within the guide channel 836 surrounding the lift pin 840.

As shown in FIG8B , the bottom ring 808 includes a guide feature 846. For example, the guide feature 846 corresponds to a raised annular edge 848 extending upward from the bottom ring 808. The edge 848 and the outer annular edge 850 define a groove 852. The upper surface of the bottom ring 808 is configured to complement the bottom surface of the edge ring 424 to form a complex interface including multiple directional changes as described above. The respective widths of the groove 852 and the edge 848 are selected to minimize the gap between the respective vertical surfaces of the groove 852 and the edge 848 and the complementary vertical surfaces on the bottom of the edge ring 424. For example, the gap may be less than 0.010". In contrast, as shown in FIGS. 8A and 8C, bottom rings 804 and 812 are configured to support intermediate rings 336 and 536 having respective guide features 348 and 540. Thus, the upper surfaces of bottom rings 804 and 812 are configured to join the upper surfaces of intermediate rings 336 and 536 and complement the bottom surfaces of edge rings 324 and 526 to form a complex interface including multiple directional changes as described above.

In examples where the guide channel 836 includes a ceramic sleeve 844 (e.g., examples where the guide channel 836 is routed through the bottom plate 820), the bottom rings 804, 808, and 812 can be configured to accommodate the ceramic sleeve 844. For example, the bottom rings 804, 808, and 812 can include clearance features, such as a cavity or cutout 856 having a diameter larger than the guide channel 836, to accommodate the upper end of the ceramic sleeve 844. In some examples, the bottom rings 804, 808, and 812 can be installed behind the lift pin 840. Therefore, the respective openings in the bottom rings 804, 808, and 812 can include chamfered edges 860 to facilitate installation of the bottom rings 804, 808, and 812 on the lift pin 840. For example, the chamfer of edge 860 may have a height and width of 0.020" to 0.035" and an angle of 40-50°.

As shown in FIGS. 8B and 8C , the stepped inner diameters of bottom rings 808 and 812 at 862 are selected to accommodate the outer diameters of edge ring 424 of FIG. 4C and edge ring 526 of FIG. 5B . For example, the outer diameters of edge rings 424 and 526 may be approximately 12.8” (e.g., +/- 0.10”). Thus, the inner diameters of bottom rings 808 and 812 at 862 may be at least 13.0”. Thus, the gap between bottom rings 808 and 812 and the outer diameters of edge rings 424 and 526 may be minimized while still preventing contact between the vertical surfaces of bottom rings 808 and 812 and edge rings 424 and 526.

In some examples, as shown in FIG8B , the bottom ring 808 may include a first outer diameter at 864 and a second outer diameter at 868. The second outer diameter at 868 is greater than the first outer diameter at 864. For example, the substrate support 800 may include a liner 872 that protects outer portions of the insulator plate 816, the bottom plate 820, the bottom ring 808, etc. However, the liner 872 may not protect the upper portion of the bottom ring 808 exposed to the plasma, and increased corrosion of the bottom ring 808 in the area adjacent to the upper edge 876 of the bottom plate 820 may occur (as shown by the dashed arrow 880). Therefore, the bottom ring 808 includes additional material at the second outer diameter 868 to compensate for the increased corrosion.

Referring now to FIG. 9 , an example intermediate ring 900 is shown. The intermediate ring 900 may be disposed in a configuration where the top edge ring is otherwise supported by the upper surfaces of two different components of the substrate support. For example, as shown in FIGS. 3B and 5B (corresponding to FIGS. 8A and 8C , respectively), the top edge ring overlaps with a respective ceramic layer and a respective bottom ring. Thus, the intermediate ring 900 is configured to support a portion of the top edge ring that is otherwise supported by the ceramic layer. As shown, the intermediate ring 900 is in a “U” shape.

The intermediate ring 900 includes an inner annular edge 904 and an outer annular edge 908 defining a groove 912. The groove 912 is configured to receive a respective top edge ring (e.g., edge ring 324 or 526). In contrast, the outer annular edge 908 serves as a guide feature to center the top edge ring 324 or 526 during replacement as described above in FIGS. 3B and 5B. In some examples, corners 916 and 920 are chamfered to facilitate engagement with the top edge ring. For example, the chamfer of corner 916 may have a height and width of at least about 0.010" (e.g., 0.005" to 0.015") and an angle of about 20° (e.g., 15-25°). The chamfer of corner 920 may have a height and width of at least about 0.015" (e.g., 0.010" to 0.020") and an angle of about 30° (e.g., 25-35°). The width of outer annular edge 908 is selected to minimize the gap between the individual vertical surfaces of outer annular edge 908 and the complementary vertical surfaces on the bottom of edge ring 324 or 526. For example, the gap may be less than 0.010" to limit plasma leakage.

Referring now to FIGS. 10A and 10B , two cross-sectional views of a substrate support 1000 depict a bottom ring 1004 configured to support a top movable edge ring in a stepped configuration in accordance with the principles of the present disclosure. For example, the bottom ring 1004 is configured to support an edge ring (e.g., 526) in a configuration similar to that shown in FIGS. 5B and 8C . The bottom ring 1004 may be further configured to support an intermediate ring in a configuration similar to that shown in FIG. 5B .

The substrate support 1000 includes an insulator ring or plate 1008 and a bottom plate (e.g., a bottom plate of an ESC) 1012 disposed on the insulator plate 1008. The bottom plate 1012 supports a ceramic layer 1016 that is configured to support a substrate thereon for processing. A bonding layer 1020 may be disposed between the bottom plate 1012 and the ceramic layer 1016, and a seal 1024 surrounds the bonding layer 1020. As shown in FIG. 10A , one or more through holes or guide channels 1028 may be formed through the insulator plate 1008, the bottom plate 1012, and the bottom ring 1004 to accommodate lift pins 1032 configured to selectively raise and lower the edge ring. For example, the guide channel 1028 serves as a pin alignment hole for each of the lift pins 1032. The gap between the lift pin 1032 and the inner surface of the guide channel 1028 is minimized to reduce plasma leakage. In other words, the diameter of the guide channel 1028 is only slightly larger than the diameter of the lift pin 1032 (e.g., 0.005"-0.010" larger). For example, the lift pin 1032 may have a diameter of 0.1" and the guide channel 1028 has a diameter of 0.105". In some examples, the guide channel 1028 includes a narrow region 1036 having a smaller diameter than other portions of the guide channel 1028 to further limit plasma leakage. For example, the narrow region 1036 may have a diameter that is 0.002-0.004" smaller than the diameter of the guide channel 1028. In some examples, one or more ceramic sleeves 1040 may be disposed within the guide channel 1028 surrounding the lift pin 1032.

The substrate support 1000 may include a liner 1044 configured to surround and protect elements of the substrate support 1000, such as the insulator plate 1008, the bottom plate 1012, and the bottom ring 1004. The bottom ring 1004 shown in Figures 10A and 10B includes an annular lip 1048 extending radially outward from the bottom ring 1004 on the liner 1044. When the liner 1044 is present, the lip 1048 facilitates installation and removal of the bottom ring 1004.

As shown in FIG. 10B , the bottom plate 1012 can be coupled to the insulator plate 1008 using bolts 1052 inserted into respective bolt mounting holes 1056. Ceramic plugs 1060 are disposed on the bolts 1052 to prevent plasma leakage in the bolt mounting holes 1056 and between the bottom ring 1004 and the bottom plate 1012. The bottom ring 1004 shown in FIG. 10B includes interstitial features such as cavities or cutouts 1064 to accommodate the ceramic plugs 1060.

The foregoing is merely illustrative in nature and is in no way intended to limit the present disclosure, its application, or use. The broad teachings of the present disclosure may be implemented in a variety of ways. Therefore, although the present disclosure includes specific examples, the true scope of the present disclosure should not be so limited, as other variations will become apparent upon study of the drawings, specification, and the following claims. It should be understood that one or more steps in the method may be performed in a different order (or simultaneously) without changing the principles of the present disclosure. In addition, although various embodiments are described above as having certain features, any one or more of these features described with respect to any embodiment of the present disclosure may be implemented in combination with features of any other embodiment, even if the combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and substitution of one or more embodiments for one another is still within the scope of this disclosure.

Spatial and functional relationships between components (e.g., between modules, circuit components, semiconductor layers, etc.) are described using a variety of terms, including: "connected," "joined," "coupled," "adjacent," "adjacent," "next to," "on," "above," "below," and "configured." When a relationship between a first and a second component is described in the above disclosure, unless explicitly described as "direct," the relationship may be a direct relationship, in which no other intervening components are present between the first and second components, or an indirect relationship, in which one or more intervening components are present (spatially or functionally) between the first and second components. When used herein, the phrase "at least one of A, B, and C" should be understood to mean the logic (A or B or C) using the non-exclusive logic of "or", and should not be understood to mean "at least one of A, at least one of B, and at least one of C".

In some embodiments, the controller is part of a system, which may be part of the examples above. Such systems may include semiconductor processing equipment, which includes a processing tool or tools, a chamber or chambers, a platform or platforms for processing, and/or specific processing components (wafer pedestals, airflow systems, etc.). These systems may be integrated with electronic devices that are used to control the operation of these systems before, during, and after semiconductor wafer or substrate processing. The electronic devices may be referred to as "controllers" and may control various components or sub-parts of a system or systems. Depending on the processing requirements and/or type of system, the controller can be programmed to control any of the processes disclosed herein, including: delivery of process gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer to and from a tool and other transfer tools and/or load locks connected or interfaced with a particular system.

Broadly speaking, a controller may be defined as an electronic device having integrated circuits, logic, memory, and/or software that receives commands, issues commands, controls operations, enables cleaning operations, enables endpoint measurements, etc. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). The program instructions may be instructions communicated to the controller in the form of individual settings (or program files) that define operating parameters for a particular process to be performed on a semiconductor wafer or system. In some embodiments, the operating parameters may be part of a recipe defined by a process engineer to perform one or more processing steps during die fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or wafers.

In some embodiments, the controller may be part of or coupled to a computer that is integrated with the system, coupled to the system, otherwise networked to the system, or a combination of the above. For example, the controller may be all or part of a computer system in the "cloud" or on a wafer fab host computer system that allows remote access to wafer processing. The computer may allow remote access to the system to monitor the current progress of manufacturing operations, review the history of past manufacturing operations, review trends or performance metrics from multiple manufacturing operations, to change parameters of the current process, to set processing steps after the current operation, or to initiate a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system via a network, which may include a local area network or the Internet. The remote computer may include a user interface that allows for the input or programming of parameters and/or settings, which are then communicated from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specifies parameters for various processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool to which the controller is configured to interface or control. Thus, as described above, the controller may be distributed, such as by including one or more distributed controllers that are networked together and work toward a common purpose (such as the process and control described herein). An example of a distributed controller used for these purposes would be one or more integrated circuits in the chamber that communicate with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) to combine to control the process in the chamber.

Without limitation, example systems may include plasma etching chambers or modules, deposition chambers or modules, spin-clean chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing system associated with or used in the fabrication and/or production of semiconductor wafers.

As described above, depending on the process step or steps to be performed by the tool, the controller may communicate with one or more of the following: other tool circuits or modules, other tool components, group tools, other tool interfaces, adjacent tools, adjacent tools, tools located throughout the factory, a host computer, another controller, or tools used for material transfer that carry containers of wafers to and from tool locations and/or load ports within a semiconductor manufacturing facility.

The foregoing is illustrative in nature and is in no way intended to limit the present disclosure, its application, or use. The broad teachings of the present disclosure can be implemented in a variety of ways. Therefore, although the present disclosure includes specific examples, the true scope of the present disclosure should not be so limited, as other variations will become apparent after studying the drawings, the specification, and the scope of the following patent applications. It should be understood that one or more steps in the method can be performed in a different order (or simultaneously) without changing the principles of the present disclosure. In addition, although each embodiment is described above as having certain features, any one or more of these features described with respect to any embodiment of the present disclosure may be implemented in combination with the features of any other embodiment, even if the combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and substitution of one or more embodiments for one another is still within the scope of this disclosure.

Spatial and functional relationships between components (e.g., between modules, circuit components, semiconductor layers, etc.) are described using a variety of terms, including: "connected," "joined," "coupled," "adjacent," "adjacent," "next to," "on," "above," "below," and "configured." When a relationship between a first and a second component is described in the above disclosure, unless explicitly described as "direct," the relationship may be a direct relationship, in which no other intervening components are present between the first and second components, or an indirect relationship, in which one or more intervening components are present (spatially or functionally) between the first and second components. When used herein, the phrase "at least one of A, B, and C" should be understood to mean the logic (A or B or C) using the non-exclusive logic of "or", and should not be understood to mean "at least one of A, at least one of B, and at least one of C".

In some embodiments, the controller is part of a system, which may be part of the examples above. Such systems may include semiconductor processing equipment, which includes a processing tool or tools, a chamber or chambers, a platform or platforms for processing, and/or specific processing components (wafer pedestals, airflow systems, etc.). These systems may be integrated with electronic devices that are used to control the operation of these systems before, during, and after semiconductor wafer or substrate processing. The electronic devices may be referred to as "controllers" and may control various components or sub-parts of a system or systems. Depending on the processing requirements and/or type of system, the controller can be programmed to control any of the processes disclosed herein, including: delivery of process gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer to and from a tool and other transfer tools and/or load locks connected or interfaced with a particular system.

Broadly speaking, a controller can be defined as an electronic device having integrated circuits, logic, memory, and/or software that receives commands, issues commands, controls operations, enables cleaning operations, enables endpoint measurements, etc. The integrated circuits can include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). The program instructions can be instructions that are communicated to the controller in the form of individual settings (or program files) that define the operating parameters for a particular process to be performed on a semiconductor wafer or system. In some embodiments, the operating parameters may be part of a recipe defined by a process engineer to perform one or more processing steps during die fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or wafers.

In some embodiments, the controller may be part of or coupled to a computer that is integrated with the system, coupled to the system, otherwise networked to the system, or a combination of the above. For example, the controller may be all or part of a computer system in the "cloud" or on a wafer fab host computer system that allows remote access to wafer processing. The computer may allow remote access to the system to monitor the current progress of manufacturing operations, review the history of past manufacturing operations, review trends or performance metrics from multiple manufacturing operations, to change parameters of the current process, to set processing steps after the current operation, or to initiate a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system via a network, which may include a local area network or the Internet. The remote computer may include a user interface that allows the input or programming of parameters and/or settings, which are then transmitted from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specifies parameters for various processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool to which the controller is configured to interface or control. Thus, as described above, the controller may be distributed, such as by including one or more distributed controllers that are networked together and work toward a common purpose (such as the process and control described herein). An example of a distributed controller used for these purposes would be one or more integrated circuits in the chamber that communicate with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) to combine to control the process in the chamber.

Without limitation, example systems may include plasma etching chambers or modules, deposition chambers or modules, spin-clean chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing system associated with or used in the fabrication and/or production of semiconductor wafers.

As described above, depending on the process step or steps to be performed by the tool, the controller may communicate with one or more of the following: other tool circuits or modules, other tool components, group tools, other tool interfaces, adjacent tools, adjacent tools, tools located throughout the factory, a host computer, another controller, or tools used for material transfer that carry containers of wafers to and from tool locations and/or load ports within a semiconductor manufacturing facility.

300: Substrate support

304: Insulation board

308: Base plate

312: Ceramic layer

316: Substrate

320: Bottom ring

324: Edge Ring

328: Guidance Channel

332: Lifting pin

344: Top

348: Guidance Features Department

352: Circular edge

356: Groove

360: Interface

380: Wall

384: Wall

388: Inner wall

Claims (10)

A bottom ring is configured to support a movable edge ring, wherein the movable edge ring is configured to be raised and lowered relative to a substrate support, the bottom ring comprising: an upper surface; an annular inner diameter; an annular outer diameter; a lower surface; and a plurality of vertical guide channels configured to respectively accommodate a plurality of lift pins for raising and lowering the movable edge ring, wherein each of the plurality of vertical guide channels is provided from the bottom surface; The lower surface of the bottom ring extends to the upper surface of the bottom ring, each of the plurality of vertical guide channels includes a portion having a predetermined diameter, each of the plurality of vertical guide channels includes a narrow area between the portion and the upper surface, the narrow area having a diameter smaller than the predetermined diameter, and each of the plurality of vertical guide channels includes a cavity adjacent to the lower surface, the cavity having a diameter larger than the predetermined diameter. A bottom ring as described in claim 1, wherein the transition areas between the plurality of vertical guide channels and the cavities are chamfered. The bottom ring as claimed in claim 2, wherein the chamfered transition regions have a height and width between 0.020" and 0.035", and an angle defined between 40° and 50° relative to the bottom surface. A bottom ring as described in claim 1, wherein the bottom ring includes an upper extension portion extending radially inward. A bottom ring as described in claim 4, wherein the plurality of vertical guide channels pass through the upper extension. The bottom ring as described in claim 1, wherein the upper surface includes a first step and a second step. A bottom ring as described in claim 1, wherein an outer corner of the bottom ring is chamfered. A bottom ring as described in claim 6, wherein the plurality of vertical guide channels extend through the first step and the second step is arranged radially outward of the first step. A bottom ring as described in claim 1, wherein the lower portion of the ring outer diameter has a first outer diameter and the upper portion of the ring outer diameter has a second outer diameter greater than the first outer diameter. A bottom ring as described in claim 1, wherein the lower surface includes a plurality of cavities offset from the plurality of vertical guide channels, the cavities being configured to align with bolt holes in a bottom plate of the substrate support.

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