TWI845157B - Pixel circuit - Google Patents

Abstract

A pixel circuit is provided. The pixel circuit includes a light emitting element and a driving block. The light emitting element has an anode and a cathode receiving a system low voltage. The driving block is coupled to the anode of the light-emitting element, and receives at least one display data, so as to provide a driving current to the light-emitting element during a light-emitting period based on the at least one display data. The light-emitting period is divided into a plurality of sub-light-emitting periods, and a current value of the driving current in a main sub-light-emitting period of the sub-light-emitting periods is greater than a current value of the driving current in each of the remaining sub-light-emitting periods of the sub-light-emitting periods.

Description

Pixel circuit

The present invention relates to a pixel circuit, and in particular to a pixel circuit having an active light-emitting element.

In modern times, due to the self-luminous characteristics of LED displays, the backlight module can be omitted, thereby reducing the size and weight and tending to be thinner, making it more competitive in the future. Compared with organic light-emitting diode displays (OLED), LED displays have the advantages of high material stability, long service life, high brightness, nanosecond-level high-speed response, high-speed modulation and signal carrying, so they are gradually becoming the mainstream of the development of new generation displays.

Pixel circuits with light-emitting diodes generally have problems such as thin film transistor variation, IR drop, and chromaticity variation. The most common solution is to use a pulse width modulation (PWM) circuit. However, when displaying low grayscale, the display time of the grayscale is too short, so the display panel with a pulse width modulation circuit is prone to problems such as uneven brightness (mura) of the low grayscale panel. In addition, there are also pixel circuits that combine pulse width modulation circuits and pulse amplitude modulation (PAM) circuits. However, this type of pixel circuit uses more circuit components, so when used in high-resolution panels, there will be insufficient layout space, making the pixel circuit difficult to design. Based on the above problems, pixel circuits using LEDs still need new solutions to meet different application environments.

The present invention provides a pixel circuit that can improve the grayscale color deviation of the pixel circuit.

The pixel circuit of the present invention includes a light-emitting element and a driving block. The light-emitting element has an anode and a cathode receiving a system low voltage. The driving block is coupled to the anode of the light-emitting element and receives at least one display data to provide a driving current to the light-emitting element during a light-emitting period based on the at least one display data. The light-emitting period is divided into a plurality of sub-light-emitting periods, and the current value of the driving current in a main sub-light-emitting period of these sub-light-emitting periods is greater than the current value of the driving current in each of the remaining sub-light-emitting periods of these sub-light-emitting periods.

Based on the above, the pixel circuit of the embodiment of the present invention divides a single luminous period into multiple sub-luminous periods, and independently sets the current value of the driving current in each sub-luminous period, thereby making the current value of at least one sub-luminous period higher, thereby improving the grayscale color deviation of the pixel circuit.

In order to make the above features and advantages of the present invention more clearly understood, the following is a detailed description of the embodiments with the accompanying drawings.

100, 100a~100f: Pixel circuit

110, 110a~110f: driving block

C1: first capacitor

C2: Second capacitor

C3: The third capacitor

C4: The fourth capacitor

CS: control signal

Data: Display data

Data_m: Main display data

Data_s: Sub-display data

EM: First light signal

EM_m: Second light signal

EM_s: The third luminous signal

Idr: driving current

Imain: Main current

Isub: sub-current

Pem: Luminescence period

Pm: Main subluminescence period

PN-1, PN: period

Px, Py: sub-luminescence period

SN: Second scanning signal

SN-1: First scanning signal

T1: First transistor

T10: The tenth transistor

T11: Eleventh transistor

T12: twelfth transistor

T13: Thirteenth transistor

T14: Fourteenth transistor

T15: The fifteenth transistor

T16: Sixteenth transistor

T17: Seventeenth transistor

T18: Eighteenth transistor

T19: The nineteenth transistor

T2: Second transistor

T20: Twentieth transistor

T21: The twenty-first transistor

T22: The twenty-second transistor

T23: The twenty-third transistor

T24: The twenty-fourth transistor

T25: Twenty-fifth transistor

T26: Twenty-sixth transistor

T3: The third transistor

T4: The fourth transistor

T5: The fifth transistor

T6: Sixth transistor

T7: Seventh transistor

T8: The eighth transistor

T9: Ninth transistor

uLED: micro-light emitting diode

Vcom: common voltage

Vdd: system high voltage

Vp: control voltage

Vss: system low voltage

Figure 1 is a system schematic diagram of a pixel circuit according to an embodiment of the present invention.

FIG2A is a system schematic diagram of a pixel circuit according to the first embodiment of the present invention.

Figure 2B is a schematic diagram of the driving waveform of the pixel circuit according to the first embodiment of the present invention.

FIG3A is a system schematic diagram of a pixel circuit according to the second embodiment of the present invention.

FIG3B is a schematic diagram of the driving waveform of the pixel circuit according to the second embodiment of the present invention.

FIG4A is a system schematic diagram of a pixel circuit according to the third embodiment of the present invention.

FIG4B is a schematic diagram of the driving waveform of the pixel circuit according to the third embodiment of the present invention.

FIG5A is a system schematic diagram of a pixel circuit according to the fourth embodiment of the present invention.

FIG5B is a schematic diagram of the driving waveform of the pixel circuit according to the fourth embodiment of the present invention.

FIG6A is a system schematic diagram of a pixel circuit according to the fifth embodiment of the present invention.

FIG6B is a schematic diagram of the driving waveform of the pixel circuit according to the fifth embodiment of the present invention.

FIG7A is a system schematic diagram of a pixel circuit according to the sixth embodiment of the present invention.

FIG7B is a schematic diagram of the driving waveform of the pixel circuit according to the sixth embodiment of the present invention.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by ordinary technicians in the field to which the present invention belongs. It will be further understood that those terms as defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and the present invention, and will not be interpreted as an idealized or overly formal meaning unless expressly defined as such in this document.

It should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and/or parts, these elements, components, regions, and/or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, the "first element", "component", "region", "layer" or "part" discussed below can be referred to as the second element, component, region, layer or part without departing from the teachings of this article.

The terms used herein are for the purpose of describing specific embodiments only and are not limiting. As used herein, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms, including "at least one". " or "means" and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the relevant listed items. It should also be understood that when used in this specification, the term "includes" and/or "includes" specifies the presence of the features, regions, wholes, steps, operations, elements, and/or parts, but does not exclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, parts, and/or combinations thereof.

FIG1 is a system schematic diagram of a pixel circuit according to an embodiment of the present invention. Referring to FIG1 , in this embodiment, the pixel circuit 100 includes a light-emitting element (herein, a micro light-emitting diode uLED is used as an example) and a driving block 110. The micro light-emitting diode uLED has an anode and a cathode receiving a system low voltage Vss. The driving block 110 is coupled to the anode of the micro light-emitting diode uLED and receives at least one display data Data to provide a driving current Idr to the micro light-emitting diode uLED during each light-emitting period Pem based on the received display data Data.

In this embodiment, a single luminous period Pem is divided into a plurality of sub-luminous periods (such as Pm, Px, Py), and in each sub-luminous period (such as Pm, Px, Py), the driving current Idr is a fixed current level. The current value of the driving current Idr in the main sub-luminous period Pm of these sub-luminous periods Pm, Px, Py is greater than the current value of the driving current Idr in each of the remaining sub-luminous periods Px, Py in the sub-luminous period (such as Pm, Px, Py), and the current value of the driving current Idr in these sub-luminous periods Pm, Px, Py can decrease in sequence. For example, the current value of the driving current Idr in the main sub-luminescence period Pm can be greater than the current value of the driving current Idr in the sub-luminescence period Px, and the current value of the driving current Idr in the sub-luminescence period Px can be greater than or equal to the current value of the driving current Idr in the sub-luminescence period Py, and the rest is analogous.

Generally speaking, since the color point of the micro-LED uLED changes with the current, when the gray scale changes, the color gamut of the micro-LED uLED based on the color television broadcasting standard established by the National Television System Committee (NTSC) of the United States will become smaller and the gray scale chromaticity will change. According to the above, since the brightness of the micro-LED uLED is determined by the integral of the current value of the driving current Idr in each sub-lighting period (such as Pm, Px, Py), but the grayscale color shift variation of the micro-LED uLED is determined by the degree of change of the driving current Idr (that is, the difference from the maximum value), the current value of the driving current Idr in at least one sub-lighting period (such as Pm, Px, Py) is higher through time division, thereby improving the grayscale color shift variation of the pixel circuit 100.

FIG2A is a system diagram of a pixel circuit according to the first embodiment of the present invention. Referring to FIG1 and FIG2A , the pixel circuit 100a can be used as a further description of the pixel circuit 100, wherein the same or similar components are numbered the same or similarly. In the present embodiment, the driving block 110a includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11 and a twelfth transistor T12, wherein the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11 and the twelfth transistor T12 are N-type transistors as an example, but the present embodiment is not limited thereto.

The first transistor T1 includes a first end receiving the first scanning signal SN-1, a control end receiving the first scanning signal SN-1, and a second end. The second transistor T2 includes a first end, a control end receiving the first scanning signal SN-1, and a second end coupled to the second end of the first transistor T1. The third transistor T3 includes a first end coupled to the second end of the first transistor T1, a control end receiving the second scanning signal SN, and a second end, wherein the second scanning signal SN is, for example, later than the first scanning signal SN-1.

The fourth transistor T4 includes a first end coupled to the first end of the second transistor T2, a control end receiving the second scanning signal SN, and a second end. The fifth transistor T5 includes a first end coupled to the second end of the third transistor T3, a control end receiving the second scanning signal SN, and a second end coupled to the anode of the micro light-emitting diode uLED. The sixth transistor T6 includes a first end coupled to the second end of the fourth transistor T4, a control end receiving the second scanning signal SN, and a second end coupled to the anode of the micro light-emitting diode uLED.

The seventh transistor T7 includes a first end receiving the system high voltage Vdd, a control end receiving the first light emitting signal EM, and a second end. The eighth transistor T8 includes a first end coupled to the second end of the seventh transistor T7, a control end coupled to the second end of the first transistor T1, and a second end coupled to the second end of the third transistor T3. The ninth transistor T9 includes a first end coupled to the second end of the seventh transistor T7, a control end receiving the second scanning signal SN, and a second end receiving the sub-display data Data_s.

The tenth transistor T10 includes a first end for receiving the system high voltage Vdd, a control end for receiving the second light emitting signal EM_m, and a second end. The eleventh transistor T11 includes a first end coupled to the second end of the tenth transistor T10, a control end for receiving the second scanning signal SN, and a second end for receiving the main display data Data_m. The twelfth transistor T12 includes a first end coupled to the second end of the tenth transistor T10, a control end coupled to the first end of the second transistor T2, and a second end coupled to the second end of the fourth transistor T4.

FIG2B is a schematic diagram of the driving waveform of the pixel circuit according to the first embodiment of the present invention. Please refer to FIG1, FIG2A and FIG2B. In the embodiment of the present invention, a single luminous period Pem is divided into two sub-luminous periods Pm and Px, wherein the first luminous signal EM is enabled (for example, a high voltage level) in the entire luminous period Pem, and the second luminous signal EM_m is enabled only in the main sub-luminous period Pm.

During the period PN-1 when the first scanning signal SN-1 is enabled, the second scanning signal SN, the first light-emitting signal EM and the second light-emitting signal EM_m are disabled (e.g., at a low voltage level). At this time, the first transistor T1, the second transistor T2, the eighth transistor T8 and the twelfth transistor T12 are turned on, and the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the ninth transistor T9, the tenth transistor T10 and the eleventh transistor T11 are turned off. In this way, the pixel circuit 100a can be reset.

During the period PN when the second scanning signal SN is enabled, the first scanning signal SN-1, the first light-emitting signal EM and the second light-emitting signal EM_m are disabled. At this time, the third transistor T3, the fourth transistor T4, the eighth transistor T8, the ninth transistor T9, the eleventh transistor T11 and the twelfth transistor T12 are turned on, and the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7 and the tenth transistor T10 are turned off. In this way, data can be written to the pixel circuit 100a based on the main display data Data_m and the sub-display data Data_s, and the critical voltage of the eighth transistor T8 and the twelfth transistor T12 can be compensated.

During the main sub-lighting period Pm, the first light-emitting signal EM and the second light-emitting signal EM_m are enabled, and the first scanning signal SN-1 and the second scanning signal SN are disabled. At this time, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the tenth transistor T10 and the twelfth transistor T12 are turned on, and the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the ninth transistor T9, and the eleventh transistor T11 are turned off. Thus, the turned-on sixth transistor T6, the tenth transistor T10 and the twelfth transistor T12 provide the main current Imain to the anode of the micro light-emitting diode uLED based on the main display data Data_m, and the turned-on fifth transistor T5, the seventh transistor T7 and the eighth transistor T8 provide the sub-current Isub to the anode of the micro light-emitting diode uLED based on the sub-display data Data_s, that is, the driving current Idr at this time is the sum of the main current Imain and the sub-current Isub.

During the sub-light-emitting period Px, the first light-emitting signal EM is enabled, and the first scanning signal SN-1, the second scanning signal SN and the second light-emitting signal EM_m are disabled. At this time, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8 and the tenth transistor T10 are turned on, and the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the ninth transistor T9, the eleventh transistor T11 and the twelfth transistor T12 are turned off. Thus, the main current Imain disappears, and only the fifth transistor T5, the seventh transistor T7, and the eighth transistor T8 that are turned on provide the sub-current Isub to the anode of the micro light-emitting diode uLED based on the sub-display data Data_s, that is, the driving current Idr at this time only includes the sub-current Isub. Thus, this embodiment uses the second luminous signal EM_m to control the ratio of Pm and Px during the sub-luminous period.

FIG3A is a system schematic diagram of a pixel circuit according to the second embodiment of the present invention. Referring to FIG2A and FIG3A, the pixel circuit 100b is substantially the same as the pixel circuit 100a, wherein the same or similar components use the same or similar reference numerals. In this embodiment, the pixel circuit 100b further includes a thirteenth transistor T13. In this embodiment, the thirteenth transistor T13 includes a first end receiving a system low voltage Vss, a control end receiving a third light emitting signal EM_s, and a second end coupled to the first end of the second transistor T2, and the tenth transistor T10 receives the first light emitting signal EM instead of the second light emitting signal EM_m.

FIG3B is a schematic diagram of a driving waveform of a pixel circuit according to the second embodiment of the present invention. Referring to FIG2A, FIG2B, FIG3A and FIG3B, in the embodiment of the present invention, a single luminous period Pem is still taken as an example of two sub-luminous periods Pm and Px, and the operation of the pixel circuit 100b in the periods PN-1 and PN and the main sub-luminous period Pm is substantially the same as that of the pixel circuit 100a. During the sub-luminous period Px, the third luminous signal EM_s is enabled to turn on the thirteenth transistor T13, and the system low voltage Vss is conducted to the control terminal of the twelfth transistor T12 through the turned-on thirteenth transistor T13 to turn off the twelfth transistor T12. Thus, the main current Imain disappears, and only the fifth transistor T5, the seventh transistor T7, and the eighth transistor T8 that are turned on provide the sub-current Isub to the anode of the micro light-emitting diode uLED based on the sub-display data Data_s, that is, the driving current Idr at this time only includes the sub-current Isub. Thus, this embodiment uses the third luminous signal EM_s to control the ratio of Pm and Px during the sub-luminous period.

FIG4A is a system diagram of a pixel circuit according to a third embodiment of the present invention. Referring to FIG1 and FIG4A , the pixel circuit 100c can be used as a further description of the pixel circuit 100, wherein the same or similar components are numbered the same or similarly. In the present embodiment, the driving block 110c includes a fourteenth transistor T14, a fifteenth transistor T15, a sixteenth transistor T16, a seventeenth transistor T17, an eighteenth transistor T18, a nineteenth transistor T19, a twentieth transistor T20, a twenty-first transistor T21, a first capacitor C1, and a second capacitor C2, wherein the fourteenth transistor T14, the fifteenth transistor T15, the sixteenth transistor T16, the seventeenth transistor T17, the eighteenth transistor T18, the nineteenth transistor T19, the twentieth transistor T20, and the twenty-first transistor T21 are N-type transistors as an example, but the present embodiment is not limited thereto.

The fourteenth transistor T14 includes a first end for receiving the system high voltage Vdd, a control end for receiving the first scanning signal SN-1, and a second end. The first capacitor C1 is coupled between the second end of the fourteenth transistor T14 and the common voltage Vcom. The fifteenth transistor T15 includes a first end coupled to the second end of the fourteenth transistor T14, a control end for receiving the control signal CS, and a second end. The second capacitor C2 is coupled between the second end of the fifteenth transistor T15 and the common voltage Vcom.

The sixteenth transistor T16 includes a first end for receiving the sub-display data Data_s, a control end for receiving the second scanning signal SN, and a second end coupled to the second end of the fifteenth transistor T15. The seventeenth transistor T17 includes a first end for receiving the main display data Data_m, a control end for receiving the second scanning signal SN, and a second end. The eighteenth transistor T18 includes a first end for receiving the system high voltage Vdd, a control end for receiving the first light-emitting signal EM, and a second end coupled to the second end of the seventeenth transistor T17.

The nineteenth transistor T19 includes a first end coupled to the second end of the seventeenth transistor T17, a control end coupled to the second end of the fourteenth transistor T14, and a second end. The twentieth transistor T20 includes a first end coupled to the second end of the fourteenth transistor T14, a control end receiving the second scanning signal SN, and a second end coupled to the second end of the nineteenth transistor T19. The twenty-first transistor T21 includes a first end coupled to the second end of the nineteenth transistor T19, a control end receiving the first luminous signal EM, and a second end coupled to the anode of the micro light-emitting diode uLED.

FIG4B is a schematic diagram of the driving waveform of the pixel circuit according to the third embodiment of the present invention. Please refer to FIG1, FIG4A and FIG4B. In the embodiment of the present invention, a single luminous period Pem is divided into two sub-luminous periods Pm and Px, wherein the first luminous signal EM is enabled (for example, a high voltage level) during the entire luminous period Pem.

During the period PN-1 when the first scanning signal SN-1 is enabled, the second scanning signal SN, the first light-emitting signal EM and the control signal CS are disabled (e.g., at a low voltage level). At this time, the fourteenth transistor T14 is turned on, and the fifteenth transistor T15, the sixteenth transistor T16, the seventeenth transistor T17, the eighteenth transistor T18, the twentieth transistor T20 and the twenty-first transistor T21 are turned off. In this way, the pixel circuit 100c can be reset.

During the period PN when the second scanning signal SN is enabled, the first scanning signal SN-1, the first light-emitting signal EM and the control signal CS are disabled (e.g., at a low voltage level). At this time, the sixteenth transistor T16, the seventeenth transistor T17, the nineteenth transistor T19 and the twentieth transistor T20 are turned on, and the fourteenth transistor T14, the fifteenth transistor T15, the eighteenth transistor T18 and the twenty-first transistor T21 are turned off. In this way, data can be written to the pixel circuit 100c based on the main display data Data_m and the sub-display data Data_s, and the critical voltage of the nineteenth transistor T19 can be compensated.

During the main sub-lighting period Pm, the first light-emitting signal EM is enabled, and the first scanning signal SN-1, the second scanning signal SN and the control signal CS are disabled. At this time, the sixteenth transistor T16, the eighteenth transistor T18, and the nineteenth transistor T19 are turned on, and the fourteenth transistor T14, the fifteenth transistor T15, the seventeenth transistor T17, the twentieth transistor T20, and the twenty-first transistor T21 are turned off. Thus, the control voltage Vp of the nineteenth transistor T19 will be equal to the voltage level provided by the main display data Data_m, so the driving block 110c can provide a driving current Idr based on the main display data Data_m.

During the sub-light-emitting period Px, the first light-emitting signal EM and the control signal CS are enabled, and the first scanning signal SN-1 and the second scanning signal SN are disabled. At this time, the fifteenth transistor T15, the sixteenth transistor T16, the eighteenth transistor T18, and the nineteenth transistor T19 are turned on, and the fourteenth transistor T14, the fifteenth transistor T15, the seventeenth transistor T17, the twentieth transistor T20, and the twenty-first transistor T21 are turned off. Thus, the control voltage Vp of the nineteenth transistor T19 is approximately the average value of the voltage level provided by the main display data Data_m and the sub-display data Data_s, so the driving block 110c can provide a driving current Idr based on the average value of the voltage level provided by the main display data Data_m and the sub-display data Data_s.

FIG5A is a system schematic diagram of a pixel circuit according to the fourth embodiment of the present invention. Referring to FIG4A and FIG5A, the pixel circuit 100d is substantially the same as the pixel circuit 100c, wherein the same or similar components use the same or similar reference numerals. In this embodiment, the first end of the sixteenth transistor T16 of the pixel circuit 100d receives the common voltage Vcom.

FIG5B is a schematic diagram of the driving waveform of the pixel circuit according to the fourth embodiment of the present invention. Referring to FIG4A, FIG4B, FIG5A and FIG5B, in the embodiment of the present invention, the single luminous period Pem is still taken as an example of two sub-luminous periods Pm and Px, and the operation of the pixel circuit 100d in the periods PN-1 and PN and the main sub-luminous period Pm is substantially the same as that of the pixel circuit 100c. During the sub-luminous period Px, the control signal CS is enabled to turn on the sixteenth transistor T16. Thus, the control voltage Vp of the nineteenth transistor T19 is approximately the average value of the voltage level provided by the main display data Data_m and the common voltage Vcom, so the driving block 110d can provide the driving current Idr based on the average value of the voltage level provided by the main display data Data_m and the common voltage Vcom.

FIG6A is a system schematic diagram of a pixel circuit according to the fifth embodiment of the present invention. Referring to FIG1 and FIG6A, the pixel circuit 100e can be used as a further description of the pixel circuit 100, wherein the same or similar components use the same or similar reference numerals. In the present embodiment, the driving block 110e includes a twenty-second transistor T22, a twenty-third transistor T23, a twenty-fourth transistor T24, a twenty-fifth transistor T25, a twenty-sixth transistor T26, a third capacitor C3, and a fourth capacitor C4, wherein the twenty-second transistor T22, the twenty-third transistor T23, the twenty-fourth transistor T24, the twenty-fifth transistor T25, and the twenty-sixth transistor T26 are N-type transistors as an example, but the present embodiment is not limited thereto.

The twenty-second transistor T22 includes a first end for receiving the main display data Data_m, a control end for receiving the second scanning signal SN, and a second end. The third capacitor C3 is coupled between the second end of the twenty-second transistor T22 and the common voltage Vcom. The twenty-third transistor T23 includes a first end coupled to the second end of the twenty-second transistor T22, a control end for receiving the control signal CS, and a second end. The fourth capacitor C4 is coupled between the second end of the twenty-third transistor T23 and the common voltage Vcom.

The twenty-fourth transistor T24 includes a first end for receiving the sub-display data Data_s, a control end for receiving the second scanning signal SN, and a second end coupled to the second end of the twenty-third transistor T23. The twenty-fifth transistor T25 includes a first end for receiving the system high voltage Vdd, a control end for receiving the first light-emitting signal EM, and a second end. The twenty-sixth transistor T26 includes a first end coupled to the second end of the twenty-fifth transistor T25, a control end coupled to the second end of the twenty-second transistor T22, and a second end coupled to the anode of the micro light-emitting diode uLED.

FIG6B is a schematic diagram of the driving waveform of the pixel circuit according to the fifth embodiment of the present invention. Please refer to FIG1, FIG6A and FIG6B. In the embodiment of the present invention, a single luminous period Pem is divided into two sub-luminous periods Pm and Px, wherein the first luminous signal EM is enabled (for example, a high voltage level) during the entire luminous period Pem.

During the period PN when the second scanning signal SN is enabled, the first light emitting signal EM and the control signal CS are disabled (e.g., at a low voltage level). At this time, the twenty-second transistor T22 and the twenty-fourth transistor T24 are turned on, and the twenty-third transistor T23 and the twenty-fifth transistor T25 are turned off. In this way, data can be written to the pixel circuit 100e based on the main display data Data_m and the sub-display data Data_s.

During the main sub-luminescence period Pm, the first luminescence signal EM is enabled, and the second scanning signal SN and the control signal CS are disabled. At this time, the twenty-fifth transistor T25 and the twenty-sixth transistor T26 are turned on, and the twenty-second transistor T22, the twenty-third transistor T23 and the twenty-fourth transistor T24 are turned off. Thereby, the control voltage Vp of the twenty-sixth transistor T26 will be equal to the voltage level provided by the main display data Data_m, so the driving block 110e can provide a driving current Idr based on the main display data Data_m.

During the sub-light-emitting period Px, the first light-emitting signal EM and the control signal CS are enabled, and the second scanning signal SN is disabled. At this time, the twenty-third transistor T23, the twenty-fifth transistor T25, and the twenty-sixth transistor T26 are turned on, and the twenty-second transistor T22 and the twenty-fourth transistor T24 are turned off. Thus, the control voltage Vp of the twenty-sixth transistor T26 is approximately the average value of the voltage level provided by the main display data Data_m and the sub-display data Data_s, so the driving block 110e can provide a driving current Idr based on the average value of the voltage level provided by the main display data Data_m and the sub-display data Data_s.

FIG. 7A is a system schematic diagram of a pixel circuit according to the sixth embodiment of the present invention. Referring to FIG. 6A and FIG. 7A , the pixel circuit 100f is substantially the same as the pixel circuit 100e, wherein the same or similar components use the same or similar reference numerals. In this embodiment, the first end of the twenty-fourth transistor T24 of the pixel circuit 100f receives the common voltage Vcom.

FIG. 7B is a schematic diagram of a driving waveform of a pixel circuit according to the sixth embodiment of the present invention. Referring to FIG. 6A, FIG. 6B, FIG. 6A and FIG. 6B, in the embodiment of the present invention, a single luminous period Pem is still taken as an example of two sub-luminous periods Pm and Px, and the operation of the pixel circuit 100f in the period PN and the main sub-luminous period Pm is substantially the same as that of the pixel circuit 100e. During the sub-luminous period Px, the control signal CS is enabled to turn on the twenty-fourth transistor T24. Thus, the control voltage Vp of the twenty-fourth transistor T24 is approximately the average value of the voltage level provided by the main display data Data_m and the common voltage Vcom, so the driving block 110f can provide the driving current Idr based on the average value of the voltage level provided by the main display data Data_m and the common voltage Vcom.

In summary, the pixel circuit of the embodiment of the present invention divides a single luminous period into multiple sub-luminous periods, and independently sets the current value of the driving current in each sub-luminous period, thereby making the current value of at least one sub-luminous period higher, thereby improving the grayscale color deviation of the pixel circuit.

Although the present invention has been disclosed as above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of the attached patent application.

100: Pixel circuit

110: Drive block

Data: Display data

Idr: driving current

Pem: Luminescence period

Pm: Main subluminescence period

Px, Py: sub-luminescence period

uLED: micro-light emitting diode

Vss: system low voltage

Claims (7)

A pixel circuit includes: a light-emitting element having an anode and a cathode receiving a system low voltage; a driving block coupled to the anode of the light-emitting element and receiving at least one display data to provide a driving current to the light-emitting element during a light-emitting period based on the at least one display data, wherein the light-emitting period is divided into a plurality of sub-light-emitting periods, the driving current is greater than 0 during the light-emitting period, and the current value of the driving current in a main sub-light-emitting period of the sub-light-emitting periods is greater than the current value of the driving current in each of the remaining sub-light-emitting periods of the sub-light-emitting periods. The pixel circuit as claimed in claim 1, wherein the driving block comprises: a first transistor, comprising a first end receiving a first scanning signal, a control end receiving the first scanning signal, and a second end; a second transistor, comprising a first end, a control end receiving the first scanning signal, and a second end coupled to the second end of the first transistor; a third transistor, comprising a first end coupled to the second end of the first transistor, a control end receiving a second scanning signal, and a second end; a fourth transistor a transistor, comprising a first end coupled to the first end of the second transistor, a control end receiving the second scanning signal, and a second end; a fifth transistor, comprising a first end coupled to the second end of the third transistor, a control end receiving the second scanning signal, and a second end coupled to the anode of the light-emitting element; a sixth transistor, comprising a first end coupled to the second end of the fourth transistor, a control end receiving the second scanning signal, and a second end coupled to the anode of the light-emitting element; a third a seventh transistor, comprising a first end receiving a system high voltage, a control end receiving a first light-emitting signal, and a second end; an eighth transistor, comprising a first end coupled to the second end of the seventh transistor, a control end coupled to the second end of the first transistor, and a second end coupled to the second end of the third transistor; a ninth transistor, comprising a first end coupled to the second end of the seventh transistor, a control end receiving the second scanning signal, and a second end receiving a sub-display data; a tenth transistor, comprising a first end coupled to the second end of the seventh transistor, a control end receiving the second scanning signal, and a second end receiving a sub-display data; A transistor, including a first end receiving the system high voltage, a control end receiving a second light-emitting signal, and a second end; an eleventh transistor, including a first end coupled to the second end of the tenth transistor, a control end receiving the second scanning signal, and a second end receiving a main display data; and a twelfth transistor, including a first end coupled to the second end of the tenth transistor, a control end coupled to the first end of the second transistor, and a second end coupled to the second end of the fourth transistor. The pixel circuit as described in claim 2, wherein the driving block further includes: a thirteenth transistor, including a first end receiving the system low voltage, a control end receiving a third light-emitting signal, and a second end coupled to the first end of the second transistor. The pixel circuit as described in claim 1, wherein the driving block includes: a fourteenth transistor, including a first end receiving a system high voltage, a control end receiving a first scanning signal, and a second end; a first capacitor coupled between the second end of the fourteenth transistor and a common voltage; a fifteenth transistor, including a first end coupled to the second end of the fourteenth transistor, a control end receiving a control signal, and a second end; a second capacitor coupled between the second end of the fifteenth transistor and the common voltage; a sixteenth transistor, including a first end, a control end receiving a second scanning signal, and a second end coupled to the second end of the fifteenth transistor, wherein the first end of the sixteenth transistor receives one of a sub-display data and the common voltage; a seventeenth transistor, including a control end receiving a main display data; a first end for receiving the system high voltage, a control end for receiving the second scanning signal, and a second end; an eighteenth transistor, including a first end for receiving the system high voltage, a control end for receiving a light-emitting signal, and a second end coupled to the second end of the seventeenth transistor; a nineteenth transistor, including a first end coupled to the second end of the seventeenth transistor, a control end coupled to the second end of the fourteenth transistor, and a second end; a twentieth transistor, including a first end coupled to the second end of the fourteenth transistor, a control end for receiving the second scanning signal, and a second end coupled to the second end of the nineteenth transistor; and a twenty-first transistor, including a first end coupled to the second end of the nineteenth transistor, a control end for receiving the light-emitting signal, and a second end coupled to the anode of the light-emitting element. The pixel circuit as described in claim 1, wherein the driving block includes: a twenty-second transistor, including a first end receiving a main display data, a control end receiving a scanning signal, and a second end; a third capacitor coupled between the second end of the twenty-second transistor and a common voltage; a twenty-third transistor, including a first end coupled to the second end of the twenty-second transistor, a control end receiving a control signal, and a second end; a fourth capacitor coupled between the second end of the twenty-third transistor and the common voltage; a twenty-fourth transistor, including a third capacitor coupled between the second end of the twenty-third transistor and the common voltage; a first end, a control end for receiving the scanning signal, and a second end coupled to the second end of the 23rd transistor, wherein the first end of the 24th transistor receives one of a sub-display data and the common voltage; a 25th transistor, including a first end for receiving a system high voltage, a control end for receiving a light-emitting signal, and a second end; and a 26th transistor, including a first end coupled to the second end of the 25th transistor, a control end coupled to the second end of the 22nd transistor, and a second end coupled to the anode of the light-emitting element. A pixel circuit as described in claim 1, wherein during each of the sub-light-emitting periods, the driving current is a fixed current level. A pixel circuit as described in claim 1, wherein the light-emitting element is a micro light-emitting diode.

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