TWI841324B - Gamma voltage generator, source driver and display apparatus - Google Patents

Abstract

A gamma voltage generator, a source driver and a display apparatus are provided. The gamma voltage generator includes a gamma voltage generating circuit and a plurality of buffers. The gamma voltage generating circuit has a plurality of voltage input end nodes and a plurality of voltage output end nodes for outputting the predetermined number of gamma voltages based on input voltages from the plurality of voltage input end nodes. Each buffer has an input end receive a corresponding gamma reference voltage, and an output end coupled to a corresponding voltage input end node. The gamma voltage generating circuit includes multiple resistor units connected in series, and each resistor unit is configured to have a second resistance value when operating in the second mode less than a first resistance value when operating in the first mode.

Description

Gamma voltage generator, source driver and display device

This application generally relates to the field of display technology, and more specifically, to a gamma voltage generator, a source driver including a gamma voltage generator, and a display device.

The display device includes a display panel and a driver. The display panel includes scan lines, data lines and pixels. The driver may include a gate driver and a source driver. Each pixel may emit light of brightness corresponding to a data voltage provided by a corresponding data line in response to a gate signal provided by a corresponding gate line. The gamma voltage generator in the source driver (for example, included in the source driver integrated circuit IC) can generate a plurality of gamma voltages corresponding to a plurality of grayscale values respectively based on the gamma reference voltage, and can convert the grayscale value of the display data into a data voltage using each gamma voltage, so that each pixel is displayed based on the corresponding data voltage.

Therefore, it is very important to quickly establish and stabilize the various gamma voltages used to generate data voltages to ensure the display effect.

According to one aspect of the present application, a gamma voltage generator is provided, which is connected to the gamma voltage generator and is used to output a predetermined amount of gamma voltage, and each channel circuit selects at least one gamma voltage according to input display data to generate a corresponding data voltage, wherein the gamma voltage generator includes: a gamma voltage generating circuit having a plurality of first voltage input terminals, a plurality of second voltage input terminals, and a plurality of voltage output terminals; a plurality of basic buffers, each of which has an input terminal receiving a corresponding gamma reference voltage and an output terminal connected to a corresponding A first voltage input terminal; and a plurality of dynamic buffers, each of which receives a corresponding gamma reference voltage at its input terminal and is connected to a corresponding second voltage input terminal at its output terminal, and is configured to operate in a first mode or a second mode, wherein each dynamic buffer does not output a buffer voltage in the first mode, and outputs a buffer voltage to the connected second voltage input terminal in the second mode, wherein at least a portion of the plurality of dynamic buffers switches from the first mode to the second mode based on an update or change of the display data.

According to another aspect of the present application, a gamma voltage generator is provided, comprising: a gamma voltage generating circuit having a plurality of voltage input terminals and a plurality of voltage output terminals, the plurality of voltage output terminals outputting a predetermined amount of gamma voltage based on input voltages from the plurality of voltage input terminals; and a plurality of buffers electrically connected to the plurality of voltage input terminals, respectively, wherein the gamma voltage generating circuit comprises a plurality of resistor units connected in series, and the connection nodes of adjacent resistor units are connected to one voltage output terminal, and each resistor unit is configured such that a second resistance value when operating in a second mode is less than a first resistance value when operating in a first mode.

According to another aspect of the present application, a source driver is also provided, comprising: a gamma voltage generator as described above; and a plurality of channel circuits connected to the gamma voltage generator, for generating respective data voltages corresponding to input display data using the gamma voltage output by the gamma voltage generator.

According to another aspect of the present application, a display device is also provided, comprising: a display panel; and a source driver as described above, used to drive the display panel.

According to the gamma voltage generator of the embodiment of the present application, by introducing a dynamic buffer and/or a variable resistor unit, when the gamma voltage needs to be reestablished and stabilized (for example, when display data is updated or changed), the offset of the generated gamma voltage relative to the expected gamma voltage can be reduced, and the driving capability of the gamma voltage output by the gamma voltage generation circuit can be improved, while the process of establishing and stabilizing the gamma voltage is accelerated, thereby ensuring the display effect. In addition, by changing the working mode of the dynamic buffer only when the display data changes, the total power consumption can be saved. In addition, when multiple source driver circuits drive the same display panel, multiple source driver circuits all use the gamma voltage generator of the embodiment of the present application, which can reduce the display color difference and thus improve the display effect.

10: Display device

20: Display drive device

30: Display panel

22: Source driver

21: Gate driver

23: Timing controller

201,400,1200,1400-1,1400-2,1500-1,1500-2: Gamma voltage generator

VG, VGM: Gamma voltage

210: Shift register

220: latch circuit

310,320: Gamma reference voltage circuit

311,321,1220: Buffer

312,322,410,1210,1411,1412,1511,1512: Gamma voltage generation circuit

31,32: Source driver circuit

420: Basic buffer

430: Dynamic buffer

IN1: First voltage input terminal

IN2: Second voltage input terminal

O: Voltage output terminal

IN: voltage input terminal

R1, R2, R3, R4: resistors

SW, SW1, SW2, SW3: switch

OP: Operational amplifier

EN: Enable signal

DET: Voltage difference detection module

RVA: Resistor unit

RS: Multiple resistor units

SWB: Bypass switch

P,P’: Power transmission terminal

The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate embodiments of the present disclosure and together with the description are used to explain the principles of the present disclosure.

Figures 1A-1B show schematic block diagrams of a display device according to an embodiment of the present disclosure.

FIG. 2 is an exemplary block diagram of a source driver included in the display device of FIGS. 1A-1B .

3A-3B are exemplary circuit diagrams of a gamma voltage generator included in the source driver of FIG. 2 .

FIG4 is an exemplary circuit diagram of a gamma voltage generator according to an embodiment of the present application.

FIG5 shows a mode switching timing diagram based on a change in display data according to an embodiment of the present application.

FIG6 shows a mode switching timing diagram based on the update of display data according to an embodiment of the present application.

FIG7 shows another mode switching timing diagram based on the update of display data according to an embodiment of the present application.

Figures 8-11 show an example structure of a dynamic buffer according to an embodiment of the present application.

FIG12A shows a schematic diagram of another gamma voltage generator according to an embodiment of the present application.

FIG12B shows an example circuit structure of a resistor unit.

FIG13 shows a schematic diagram of another gamma voltage generator according to an embodiment of the present application.

Figures 14-15 show schematic diagrams of a source driver including two source driver circuits according to an embodiment of the present application.

It should be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of this disclosure. In addition, it should be understood that the words and terms used herein are for descriptive purposes and should not be considered limiting. The use of "includes," "including," or "having" and variations thereof herein are intended to cover the items listed thereafter and their equivalents as well as additional items. Unless otherwise limited, the term "connected" and variations thereof herein are used in a broad sense and cover direct and indirect connections, and may include electrical or physical connections.

1A-1B show schematic block diagrams of a display device according to an embodiment of the present disclosure. Referring to FIG. 1A , a display device 10 according to an exemplary embodiment of the present invention may include a display drive device 20 and a display panel 30. In some embodiments of the present disclosure, the display panel 30 may be a liquid crystal display (LCD) panel or an organic light emitting diode (OLED) panel, but the display panel 30 is not limited to any specific type of display panel.

As shown in FIG. 1B , the display driver 20 may include: a gate driver 21 and a source driver 22 for inputting display data received from an external processor or the like to a display panel 30; and a timing controller 23 for controlling the gate driver and the source driver. The timing controller 23 may control the gate driver and the source driver according to a vertical synchronization signal and a horizontal synchronization signal. The display panel 30 may include a plurality of pixels PX arranged along a plurality of gate lines G1 to Gm and a plurality of data lines S1 to Sn.

The display device 10 can display images in units of frames. The time required to display one frame can be referred to as a vertical cycle, and the vertical cycle can be determined by the frame frequency of the display device 10. During one vertical cycle, the gate driver 21 can sequentially scan the plurality of gate lines G1 to Gm. The time for the gate driver 21 to scan each of the plurality of gate lines G1 to Gm can be referred to as a horizontal cycle. During one horizontal cycle (the pulse interval of two horizontal synchronization signals (Hsync)), the source driver 22 can input a data voltage to the pixels PX on each of the data lines S1 to Sn. The data voltage may be a voltage output by the source driver 22 based on display data, and the brightness of each pixel PX may be determined by its corresponding data voltage.

The processor for sending display data to the display drive device 20 may be an application processor (AP) in the case of a mobile device, or may be a central processing unit (CPU) or a single chip system (SoC) in the case of a desktop computer, a laptop computer, a television, etc. Specifically, the processor may be understood as a processing device having an arithmetic function. The processor may generate display data to be displayed by the display device 10, or receive display data from a memory, a communication module, etc. and send the display data to the display drive device 20.

FIG. 2 is an exemplary block diagram of a source driver included in the display device of FIGS. 1A-1B .

2, the source driver 22 may include a gamma voltage generator 201 and a plurality of channel circuits CH. Each channel circuit CH includes a shift register 210, a latch circuit 220, a digital-to-analog converter DAC 230, a source buffer BF 240, etc. Each element included in the source driver 22 is not limited to the embodiment shown in FIG. 2, and may be variously modified in other embodiments.

The gamma voltage generator 201 generates a plurality of gamma voltages VG and provides the plurality of gamma voltages VG to each channel circuit CH. The gamma voltage generator 201 may determine the number of the plurality of gamma voltages VG based on the number of bits of the display data. For example, when the display data is 8-bit data, the number of the plurality of gamma voltages VG may be 256 or less, and when the display data is 10-bit data, the number of the plurality of gamma voltages VG may be 1024 or less. In other words, when the display data is n-bit data, the plurality of gamma voltages VG may have a maximum of 2 ⁿ different voltage values. It should be understood that the specific values of the multiple gamma voltages VG can be selected according to actual circumstances.

After the shift register 210 receives the corresponding display data RGB and captures it in time sequence, the latch circuit 220 can sample and hold the display data according to the shift sequence of the shift register 210. The latch circuit 220 can output the latched display data RGB to the digital-to-analog converter DAC 230.

The digital-to-analog converter DAC 230 in each channel circuit CH may generate a data voltage Vdata from a plurality of gamma voltages VG. The digital-to-analog converter DAC 230 may select at least one of the plurality of gamma voltages VG in response to the latched display data RGB from the latch circuit, and may output the selected voltage as the data voltage Vdata. The digital-to-analog converter DAC 230 may include a plurality of switch elements for selecting at least one of the plurality of gamma voltages. For example, the digital-to-analog converter DAC 230 may output a data voltage Vdata corresponding to a grayscale value by using a separate lookup table defining a relationship between the grayscale value and a plurality of gamma voltages, or by performing a logic process on the grayscale value. For example, the data voltage Vdata may have 256 voltage levels corresponding to an 8-bit grayscale value. The data voltage Vdata corresponding to each grayscale value may be located on a gamma curve. More specifically, the digital-to-analog converter DAC 230 may output a data voltage Vdata corresponding to a gamma curve by a linear logic process of a plurality of gamma voltages. Alternatively, in some cases, the data voltage may be generated based on more than two selected gamma voltages.

The source buffer 240 in each channel circuit CH can be connected to a corresponding data line provided in the display panel. The source buffer 240 can receive and amplify the data voltage Vdata from the digital-to-analog converter DAC 230, and can apply the amplified data voltage Vdata to the corresponding data line. The data voltage Vdata mentioned below refers to the amplified data voltage Vdata.

FIG. 3A is an exemplary circuit diagram of a gamma voltage generator included in the source driver 22 of FIG. 2 . The source driver may include a source driver circuit, such as an integrated circuit (IC).

As shown in FIG. 3A , the gamma voltage generator 201 of the source driver includes a plurality of buffers 311 and a gamma voltage generating circuit 312, and the source driver 22 may further include a gamma reference voltage circuit 310. The gamma reference voltage circuit 310 may be inside or outside the gamma voltage generator 201.

The gamma reference voltage circuit 310 provides multiple gamma reference voltages for generating gamma voltages, the input end of each buffer receives a gamma reference voltage, and the output end outputs the buffer voltage to the gamma voltage generating circuit 312. The gamma voltage generating circuit 312 generates multiple gamma voltages according to the multiple buffer voltages output by the multiple buffers. Each buffer can be implemented with an operational amplifier (OP), for example, one input end of the operational amplifier is connected to its output end, and the other input end is connected to the gamma reference voltage circuit 310 to receive the corresponding gamma reference voltage.

As an example, the gamma reference voltage circuit 310 may be in the form of a resistor string (which may be referred to as a source resistor string) composed of a plurality of resistors connected in series, so as to divide the input voltage input to both ends of the resistor string to obtain the plurality of gamma reference voltages. Similarly, the gamma voltage generating circuit 312 can also be in the form of a resistor string (which can be called a gamma resistor string), and the input voltage input to the two ends of the resistor string is divided to generate multiple gamma voltages, wherein the multiple buffer voltages output by the multiple buffers are respectively provided to part of the connection nodes between the adjacent resistors of the gamma resistor string, and at least part of the connection nodes of the gamma resistor string can be connected to or used as the output terminal (also called output terminal node or node, etc., for connection) of the gamma voltage generating circuit 312. It should be noted that one resistor symbol shown in the figure can represent multiple resistors.

As mentioned above, quickly establishing and stabilizing each gamma voltage is crucial to ensuring the display effect, so corresponding solutions are needed. For example, in the case of high frame rate display operation, the display time allocated to each frame is relatively short, so the requirement for the establishment time of the gamma voltage is relatively high, and stable gamma voltages are also conducive to generating accurate data voltages.

In addition, as the size of display panels becomes larger and larger, two or more source driver circuits (e.g., source driver integrated circuit ICs) may be used to drive the same display panel. However, due to the limitations of manufacturing and design processes, the gamma voltages generated by the gamma voltage generators included in the two or more source driver circuits driving the same display panel may be different, which may cause non-uniformity in the display of the display panel, for example, there is a significant color difference between the display areas controlled by different source driver circuits.

In this regard, FIG. 3B shows an example in which two source driver circuits are included in the source driver (for example, each source driver circuit can be integrated into one IC) so that the two source driver circuits drive the same display panel together. Of course, the source driver may include more than two source driver circuits.

As shown in FIG3B , the first source driver circuit 31 (IC1) and the second source driver circuit 32 (IC2) have the same circuit structure, and their respective gamma voltage generators 201 include multiple buffers (311; 321) and gamma voltage generating circuits (312; 322). Each source driver circuit (31; 32) may also include a gamma reference voltage circuit (310; 320), such as a source resistor string, for providing the required gamma reference voltage to the gamma voltage generator 201, respectively.

At least one power transmission terminal P of the first source driver circuit 31 (IC1) is electrically connected to at least one corresponding power transmission terminal P' of the second source driver circuit 32 (IC2) to form an electrical connection between the source driver circuit 31 (IC1) and the source driver circuit 32 (IC2). The number of electrical connections between the power transmission terminals of the first source driver circuit 31 (IC1) and the second source driver circuit 32 (IC2) is determined according to design requirements, and the present disclosure is not limited to a specific number.

According to the present disclosed embodiment, the first source driver circuit 31 (IC1) acts as a master circuit and the second source driver circuit 32 (IC2) acts as a slave circuit, all buffers in the second source driver circuit 32 (IC2) can be turned off, or according to the circuit structure (for example, the connection method of the source resistor string and the gamma resistor string), all buffers except the buffer that provides the maximum gamma reference voltage and the minimum gamma reference voltage (the same as the maximum gamma reference voltage and the minimum gamma reference voltage in the first source driver) to the second gamma voltage generating circuit are turned off. In this case, the at least one power transmission terminal P included in the first source driver circuit 31 (IC1) as the output terminal of the first source driver circuit 31 (IC1) can be connected to the power transmission terminal of the second source driver circuit 32 (IC2) through the electrical connection between the first source driver circuit 31 (IC1) and the power transmission terminal of the second source driver circuit 32 (IC2). The at least one power transmission terminal P' of the input terminal of the first source driver circuit 32 (IC2) provides the buffer voltage output from the output end of at least one buffer inside the first source driver circuit 31 (IC1) to provide these buffer voltages to the gamma voltage generator inside the second source driver circuit 32 (IC2); and vice versa.

As shown in FIG3B , the buffers that are turned off are shown in gray, the buffers that are turned on are shown in white, and in the second source driver circuit 32, only the uppermost and lowermost buffers are enabled, and the other buffers are turned off. In this way, through the electrical connection between the power transmission terminals of the above two source driver circuits, the multiple buffer voltages of the multiple buffers in the first source driver circuit are also provided to the gamma voltage generation circuit of the second source driver circuit (or more source driver circuits, if any). Therefore, this method can reduce the voltage difference between the gamma reference voltages used by the two source driver circuits and the voltage difference between the generated gamma voltages, because the second source driver circuit can use the same multiple buffer voltages, maximum gamma reference voltage and minimum gamma reference voltage as the first source driver circuit to generate multiple gamma voltages, so that when two or more source driver integrated circuits (ICs) drive the same display panel, the display uniformity can be improved to a certain extent, thereby improving the display effect.

Since in the gamma voltage generator of Figures 3A-3B, the gamma voltage at some output terminals in the gamma resistor string is established and stabilized by multiple buffer voltages output by multiple buffers, and since for the gamma resistor string, the gamma voltage at some output terminals is provided by the buffer voltage output by some buffers, when the input voltage at both ends of the gamma resistor string is divided, the voltage at each voltage division node can be quickly obtained, that is, the gamma voltage at all output terminals can be established and stabilized as quickly as possible, and the driving capability of the generated gamma voltage can be improved. However, according to the number of bits of the grayscale value, the number of gamma voltages that need to be generated is generally large, such as 256, 512 or 1024, and the number of buffers is much smaller in comparison (because the buffers may also cause gamma voltage errors due to process mismatch, so too many buffers will cause large gamma voltage errors), so the gamma voltage establishment and stabilization time will still be relatively long, which may no longer meet current requirements, especially under high frame rate display operations. In addition, even though the voltage difference between the gamma reference voltages used by the two source driver circuits and the voltage difference between the generated gamma voltages can be reduced in FIG. 3B , the transmission of the voltage signal takes time due to the parasitic resistance of the wires connected between the power transmission terminals of the two source driver circuits, so the build-up and stabilization time of the gamma voltage in the slave circuit is slower than that of the master circuit, which may also cause color difference problems in the displayed image, especially under high frame rate display operation where the build-up and stabilization time requirements are more stringent.

Therefore, a gamma voltage generator is needed that can quickly establish and stabilize the gamma voltage to ensure the display effect of the display panel. In addition, it is also hoped that even when two or more source driver circuits (corresponding to including two or more gamma voltage generators) drive the same display panel, such a gamma voltage generator can ensure a uniform display effect of the display panel.

FIG4 shows a schematic diagram of a gamma voltage generator according to an embodiment of the present application.

As shown in FIG. 4 , the gamma voltage generator 400 includes a gamma voltage generating circuit 410, a plurality of basic buffers (420-IN1/IN2, 420-1, 420-2, ..., 420-N1, hereinafter collectively referred to as 420) and a plurality of dynamic buffers (430-1, 430-2, ..., 430-N2, hereinafter collectively referred to as 430). The gamma voltage generator 400 may be included in a source driver circuit (IC), such as IC1 or IC2 shown in FIG. 3B .

The gamma voltage generating circuit 410 has a plurality of first voltage input terminals IN1, a plurality of second voltage input terminals IN2, and a plurality of voltage output terminals O, and the plurality of voltage output terminals are used to output a predetermined amount of gamma voltage. Optionally, the gamma voltage generating circuit 410 can be a gamma resistor string composed of multiple resistors connected in series, each connection node between the resistors in the gamma resistor string can serve as or be connected to a voltage output terminal, and each of the multiple first voltage input terminals IN1 and the multiple second voltage input terminals IN2 can be connected to a corresponding voltage output terminal O, so that a buffer voltage can be output from a corresponding voltage output terminal O (and each buffer voltage can serve as a gamma voltage). For the purpose of illustration, the multiple first voltage input terminals IN1 and the multiple second voltage input terminals IN2 are shown separately from the corresponding voltage output terminals O in FIG4 , but it should be understood that each voltage input terminal and the corresponding voltage output terminal may be the same terminal, for example, a connection node between adjacent resistors in a gamma resistor string. In addition, the symbol of a resistor between a pair of adjacent voltage input terminals shown in FIG4 is only for illustration, and it may actually include multiple resistors (for example, in series) without being limited to the number shown in the figure, so as to output the gamma voltage at each connection node of the multiple resistors (connected to or as multiple voltage output terminals).

Each basic buffer 420 receives a corresponding gamma reference voltage at its respective input terminal (e.g., connected to a corresponding output node of the gamma reference voltage circuit), and an output terminal is connected to a corresponding first voltage input terminal among the plurality of first voltage input terminals; and each dynamic buffer 430 receives a corresponding gamma reference voltage at its respective input terminal (e.g., connected to a corresponding output node of the gamma reference voltage circuit), and an output terminal is connected to a corresponding second voltage input terminal among the plurality of second voltage input terminals, and is configured to operate in the first mode or the second mode. Each dynamic buffer does not output a buffer voltage in the first mode, and outputs a buffer voltage to the connected second voltage input terminal in the second mode.

For example, for the dynamic buffer 430-1, when in the first mode, the dynamic buffer 430-1 is turned off, the voltage at its input end will not be output to the output end, so its output end will not provide a buffer voltage to the second voltage input terminal IN2 connected thereto; when in the second mode, the dynamic buffer 430-1 is turned on, the voltage at its input end will be output to the output end, so its output end will provide a buffer voltage to the second voltage input terminal IN2 connected thereto. Other dynamic buffers also work synchronously with the dynamic buffer 430-1, so in the first mode, the dynamic buffer can be regarded as not working.

In this way, when the gamma voltage generator 400 is not connected to other gamma voltage generators, or the gamma voltage generator 400 needs to output a buffer voltage to other gamma voltage generators (such as as a main circuit in the case of more than two source driver circuits described later), the gamma voltage generator 400 can output multiple gamma voltages VGM at multiple voltage output terminals O based on the buffer voltages of multiple basic buffers and optionally the buffer voltages of multiple dynamic buffers. Furthermore, when the gamma voltage generator 400 is connected to other gamma voltage generators but does not need to output buffer voltage to other gamma voltage generators (such as when more than two source driver circuits are described later as slave circuits), the multiple basic buffers are not enabled, or only the two basic buffers providing the maximum gamma reference voltage and the minimum gamma reference voltage may be enabled.

For example, the first mode is a standby mode, and the second mode is a boost mode. The boost mode is applicable to the period before the predetermined amount of gamma voltage generated is stabilized (i.e., multiple buffer voltages are required to establish and stabilize the multiple gamma voltages at the output terminals of the gamma voltage generator), and the standby mode is applicable to the period after the predetermined amount of gamma voltage generated is stabilized.

Therefore, based on the gamma voltage generator 400 shown in FIG. 4 , when the gamma voltage needs to be established and stabilized, multiple dynamic buffers can be operated in the second mode, so that multiple basic buffers and multiple dynamic buffers provide buffer voltages to the gamma voltage generating circuit 410, thereby increasing the speed of establishing and stabilizing the gamma voltage, and after the gamma voltage is established and stabilized, the multiple dynamic buffers are operated in the first mode to avoid excessive buffers from introducing unwanted gamma voltage errors.

In addition, in some embodiments, when the gamma voltage needs to be established and stabilized, only a portion of the multiple dynamic buffers can be operated in the second mode without having to operate all dynamic buffers in the second mode. For example, in one embodiment, for a specific image mode, only the dynamic buffer that outputs a gamma voltage with a lower value is turned on. In addition, although FIG. 4 shows that the dynamic buffer and the basic buffer are alternately configured, this is only exemplary, and no dynamic buffer may be configured between every two basic buffers, or one or more dynamic buffers may be configured so that there is at least one second voltage input terminal between each pair of adjacent first voltage input terminals in the multiple first voltage input terminals of the gamma voltage generating circuit, or there is no second voltage input terminal. The deployment of the dynamic buffer and the number of dynamic buffers that need to operate in the second mode can be determined in an appropriate manner according to system requirements.

As described with reference to FIG. 2 , the gamma voltage generator is connected to a plurality of channel circuits, and each channel circuit selects at least one gamma voltage from a plurality of gamma voltages output by the gamma voltage generator to generate a data voltage according to the display data (referred to as pixel data) for a certain pixel currently applied to the channel circuit. Each channel circuit is used to sequentially provide data voltages to a row (column) of pixels on a data line in the order of row scanning. For example, for data writing of the first row of pixels, a plurality of channel circuits need to output Vdata1, Vdata2, ... to their respective corresponding data lines. Thus, for example, to generate Vdata1, the first channel circuit needs to select at least one gamma voltage according to the display data (e.g., grayscale value or data code, also referred to as pixel data) for the first row and first column of the pixel (pixel PX(1,1)), thereby obtaining the corresponding data voltage Vdata1; to generate Vdata2, the second channel circuit needs to select at least one gamma voltage according to the display data (pixel data) for the second row and first column of the pixel (pixel PX(1,2)), thereby obtaining the corresponding data voltage Vdata2. The operation process of the other channel circuits for the pixels of the first column is similar. The operation process of multiple channel circuits when writing data for the pixels of other columns is also similar.

Therefore, the update or change of display data mentioned in the context of this application may refer to the update or change of pixel data loaded into one or more channel circuits. For example, after the scanning cycle of the current column of pixels ends, the display data for the next column of pixels is loaded into the multiple channel circuits to output multiple data voltages (the number is the same as the number of channel circuits) to the next column of pixels on the panel. For each channel circuit, the display data for the pixel (i.e., pixel data) loaded into the channel circuit is updated (the value of the pixel data may also change). That is, the updating of display data may refer to the switching between two pixel data for two adjacent pixels in the same row loaded into any channel circuit, regardless of whether the two pixel data have changed; and the changing of display data may refer to the switching between two pixel data for two adjacent pixels in the same row loaded into any channel circuit, and the two pixel data have changed, for example, the two grayscale values corresponding to the two pixel data have changed.

During the display process, if the display data changes, the data voltage output by one or more channel circuits changes. Since multiple channel circuits are connected to the voltage output terminal of the gamma voltage generator, the multiple gamma voltages output by the gamma voltage generator will be affected by the change of the data voltage. For example, the channel circuit needs to draw current from the gamma resistor string that generates the multiple gamma voltages, so the multiple gamma voltages will be disturbed. If the display data is updated but not changed, the multiple gamma voltages output by the gamma voltage generator may not be affected.

That is, when the display data changes, that is, when the pixel data applied to any channel circuit changes (causing the data voltage to change and thus the multiple gamma voltages to be disturbed), the multiple gamma voltages output by the gamma voltage generator need to be quickly re-established and stabilized. Therefore, for the gamma voltage generator shown in FIG. 4 , when the display data changes, at least a portion of the multiple dynamic buffers can be operated in the second mode, so that the at least a portion of the multiple dynamic buffers can also provide a buffer voltage to the gamma voltage generating circuit 410, so that the buffer voltage can be combined with the buffer voltage output by the multiple basic buffers (included in the same gamma voltage generator or in other gamma voltage generators), thereby increasing the gamma voltage. The speed of establishing and stabilizing the multiple gamma voltages output by the generator, and after the multiple gamma voltages are established and stabilized (for example, after a predetermined period of time, the predetermined time can be determined according to the structure of the gamma voltage generating circuit and the empirical value, as long as the multiple gamma voltages can be allowed to establish and stabilize), at least a portion of the multiple dynamic buffers are returned to the first mode operation to avoid excessive buffers introducing unwanted gamma voltage errors.

Figure 5 shows the mode switching timing diagram based on the change of display data.

As shown in FIG5 , if the updated display data (e.g., pixel data) has the same value as the previous display data, for example, the display data D2 for the pixel in the 1st row of the i-th column (i is an integer greater than or equal to 1) is the same as the display data D3 for the pixel in the 1st row of the i+1-th column (pixel PX(i+1,1)), that is, the display data has not changed, then the multiple dynamic buffers may not switch from the first mode to the second mode, but may remain in the first mode (i.e., do not output the buffer voltage).

For example, this implementation is very beneficial for the AOD mode. In the AOD mode, only a small part of the screen displays the AOD image, and when data is written to the pixels in the remaining area that does not display the image, it can be regarded as that there is no change between the two display data of two adjacent pixels in the same row of the area. Therefore, in the scanning cycle corresponding to these pixels in the area, the multiple dynamic buffers can be kept operating in the first mode, which can save total power consumption.

Therefore, the dynamic buffer can operate in the second mode to output the buffer voltage only when the display data changes, which saves the overall power consumption because for the case where the display data does not change (for example, a large area black image), the dynamic buffer operates in the first mode and does not output the buffer voltage.

In addition, in some cases, even if the display data changes, the multiple gamma voltages output by the gamma voltage generator may be less affected and may not need to be reestablished and stabilized. In these cases, it can be determined whether the multiple dynamic buffers need to operate in the second mode based on the difference between the actual value and the expected value of some gamma voltages. For example, since the gamma reference voltage circuit can provide an accurate voltage value (expected value) at the input of the multiple buffers, at least a portion of the multiple dynamic buffers can be configured to switch to the second mode in response to the voltage at the input of any dynamic buffer being different from the voltage at the connected second voltage input terminal IN2 (also an actual gamma voltage output at a voltage output node), and switch to the first mode after a predetermined period of time, or in response to the voltage at the input of the multiple dynamic buffers being the same as the voltage at the second voltage input terminal IN2.

In addition, in other embodiments, in order to more easily control the mode switching of multiple dynamic buffers, the multiple dynamic buffers can be switched from the first mode to the second mode according to the update of the display data, that is, as long as the display data is updated, even if it does not change, the multiple dynamic buffers (or part of them) can also perform mode switching. The update of the display data is synchronized with the horizontal synchronization signal (Hsync) or the shift of the scanning signal, that is, the update cycle of the display data is the same as the scanning cycle.

FIG6 shows a mode switching timing diagram based on the update of display data according to an embodiment of the present application.

As shown in FIG6 , switching from the first mode (standby mode) to the second mode (trigger mode) is synchronized with the update of the display data, that is, when the display data is updated, for example, from display data D1 to display data D2, or from display data D2 to display data D3, or from display data D3 to display data D4, multiple dynamic buffers can enter the second mode, and then exit the second mode and enter the first mode after a period of time. The period of time can have a predetermined duration, which is configured to allow multiple gamma voltages output by the gamma voltage generating circuit to be established and stabilized in the second mode.

In this case, since the update of the display data is synchronized with the shift of the horizontal synchronization signal (Hsync) or the scanning signal, the mode switching of the multiple dynamic buffers can be controlled according to the horizontal synchronization signal (Hsync) or the scanning signal.

FIG7 shows another mode switching timing diagram based on the update of display data according to an embodiment of the present application.

In this embodiment, the switch from the first mode (standby mode) to the second mode (trigger mode) is completed before the display data is updated, so as to establish and stabilize the required multiple gamma voltages in advance. It should be noted that since the update of the display data may involve a change in the value of the display data, which will cause the conversion of the data voltage, and the data voltage conversion has a greater impact on the multiple gamma voltages, the predetermined duration of the second mode preferably overlaps with the time for the data voltage conversion corresponding to the update or change of the display data, that is, the predetermined duration of the second mode at least lasts until the data voltage conversion time is completed.

In the embodiment shown in FIG. 7 , the mode is switched from the first mode to the second mode at a predetermined time point before the display data is updated. Because the source driver processes the timing of the display data update, the mode switching can be well controlled, and the duration of the second mode can be fixed, or the duration of the second mode can be controlled according to whether the data voltage conversion is completed (the duration of the second mode is not fixed). For example, as described above, the data voltage conversion can be determined by detecting the voltage difference between the input and output ends of the dynamic buffer, because after the data voltage conversion is completed, the gamma voltage will be less affected, that is, the detected voltage difference is smaller.

The following introduces several example structures of dynamic buffers in combination with Figures 8-11.

In some embodiments, each dynamic buffer includes a buffer and a switching module, and the various components included in the same dynamic buffer can be considered to correspond to each other. Each switching module is configured to prohibit the corresponding buffer from outputting a buffer voltage in a first mode, and to allow the corresponding buffer to output a buffer voltage in a second mode.

Optionally, the buffer included in the dynamic buffer may have the same structure as a general buffer or the same structure as a basic buffer, for example, composed of an operational amplifier, but not limited thereto.

In FIG8 , each switching module includes a switch SW, and a first end of the switch SW is connected to the output end of the corresponding operational amplifier (OP), and a second end is connected to the corresponding second voltage input terminal to which the output end of the dynamic buffer including the operational amplifier is connected, wherein the switch SW is turned off in the first mode so that the dynamic buffer does not output the buffer voltage, and is turned on in the second mode so that the dynamic buffer outputs the buffer voltage.

In FIG9 , each switching module includes a first switch SW1, a second switch SW2 and a third switch SW3, wherein: a first end of the first switch SW1 is connected to the output end of the corresponding operational amplifier, and a second end is connected to a corresponding second voltage input end of the corresponding dynamic buffer of the operational amplifier; a first end of the second switch SW2 and a first end of the third switch SW3 are commonly connected to an input end of the corresponding operational amplifier, a second end of the second switch SW2 is connected to the output end of the corresponding operational amplifier, and a second end of the third switch SW3 is connected to the corresponding second voltage input end (the other input end of the corresponding operational amplifier is used to receive a gamma reference voltage). In the first mode, the first switch SW1 and the third switch SW3 are turned off at the same time, so that the dynamic buffer does not output the buffer voltage (the second switch SW2 can be turned on or off), and in the second mode, the first switch SW1 and the third switch SW3 are turned on at the same time, and the second switch SW2 is turned off, so that the dynamic buffer outputs the buffer voltage. In this implementation, the feedback control of the dynamic buffer (composed of the connection loop between the input and output of the operational amplifier) can be unaffected by the parasitic resistance of the switch SW1 connected between the output of the operational amplifier and the gamma voltage generation circuit, thereby allowing the gamma voltage to be established and stabilized more accurately and quickly.

In FIG. 10 , each dynamic buffer includes a buffer, wherein the buffer is used to switch between an enabled and disabled state according to an enable signal, so that the dynamic buffer switches between a first mode and a second mode. For example, an operational amplifier can be enabled or disabled in response to an enable signal EN from a controller such as within an IC, so that the dynamic buffer outputs or does not output a buffer voltage.

In addition, as described above, in the case where the dynamic buffer can switch from the first mode to the second mode in response to the voltage at the input terminal of any dynamic buffer being different from the voltage at the connected second voltage input terminal (i.e., at a voltage output terminal), the dynamic buffer may include a voltage difference detection module in addition to the buffer (e.g., operational amplifier) and the switching module. Optionally, the voltage difference detection module may include a comparator.

As shown in Figure 11, the first detection end of each voltage difference detection module DET is connected to the first input end of the corresponding operational amplifier, the second detection end is connected to the second voltage input end connected to the corresponding dynamic buffer, and the output end of each voltage difference detection module outputs a switching control signal.

Each switching module is configured to allow the output terminal of the corresponding operational amplifier to output a buffer voltage to a second voltage input terminal connected to the corresponding dynamic buffer in the second mode or prohibit the output terminal of the corresponding operational amplifier in the first mode based on the switching control signal of the corresponding voltage difference detection module or the switching control signal of other voltage difference detection modules.

For example, if the voltage difference detection module in any one or more dynamic buffers detects that the input voltages of its two input terminals are different, for example, the voltage difference exceeds a predetermined threshold (0 or other values), it indicates that the multiple gamma voltages generated by the gamma voltage generation circuit may be inaccurate, and the gamma voltage needs to be reestablished and stabilized. Therefore, the voltage difference detection module can output a switching control signal to control these dynamic buffers or part of them to work together in the second mode to reestablish and stabilize the gamma voltage.

In FIG11 , the switching module of the dynamic buffer may also adopt the structure of the switching module shown in the previous reference FIG8-10 , for example, an implementation of one switch, three switches, and an implementation of the dynamic buffer responding to an enable signal, as shown in FIG8-10 .

In this way, the voltage difference detection module controls the mode switching of the dynamic buffer by detecting the difference between the actual gamma voltage and the expected gamma voltage. Therefore, the duration of the second mode (for example, the conduction time of the switch SW in FIG8 ) can be adjusted based on the stable performance of each gamma voltage output by the gamma voltage generator. For example, if the data voltage changes at a larger level, causing more current to be drawn from the resistor string of the gamma voltage generating circuit, thus causing the actual gamma voltage to deviate more from the desired gamma voltage, it may be necessary to control the dynamic buffer to operate in the second mode for a longer duration to provide higher drive capability so that the actual gamma voltage is the same as the desired gamma voltage.

Optionally, although in many cases the structure of each dynamic buffer in each source driver circuit is the same, in other cases this is not necessary, as long as the dynamic buffers can switch modes synchronously. For example, it is not necessary to set a voltage difference detection module in each dynamic buffer, and some dynamic buffers can adopt a structure such as described in Figures 8-10.

The gamma voltage generator described in the above reference Figures 4 and 5-11 introduces a dynamic buffer, so that when the gamma voltage needs to be re-established and stabilized, the dynamic buffer is made to output the buffer voltage, thereby improving the driving ability of the gamma voltage output by the gamma voltage generating circuit and the speed of establishing and stabilizing the gamma voltage, and after the gamma voltage is established and stabilized, the dynamic buffer is made not to output the buffer voltage to avoid introducing unwanted errors in the gamma voltage. In addition, by changing the working mode of the dynamic buffer only when the display data changes, that is, switching from the first mode to the second mode, and not changing the working mode of the dynamic buffer when the display data does not change, the total power consumption can be saved.

The above embodiments of introducing a dynamic buffer can be considered to increase the driving capability of the gamma voltage output by the gamma voltage generating circuit. This can also be equivalently achieved by reducing the resistance value of the resistance string in other embodiments where the gamma voltage generating circuit includes a resistor string.

FIG12A shows a schematic diagram of another gamma voltage generator according to an embodiment of the present application.

As shown in FIG. 12A , the gamma voltage generator 1200 (which may be the gamma voltage generator in FIG. 2 ) includes a gamma voltage generating circuit 1210 and a plurality of buffers (1220-1, 1220-2, ..., 1220-N, hereinafter collectively referred to as 1220). The gamma voltage generator 1200 may be included in an integrated circuit (IC) of a source driver.

The gamma voltage generating circuit 1210 has a plurality of voltage input terminals IN and a plurality of voltage output terminals O, and the plurality of voltage output terminals are used to output a predetermined amount of gamma voltage based on the input voltage from the plurality of voltage input terminals IN. In some embodiments where the gamma voltage generating circuit is a gamma resistor string (a plurality of resistor units connected in series in this embodiment), each voltage input terminal can be connected to a corresponding voltage output terminal, and each voltage input terminal and the corresponding voltage output terminal can be the same terminal, for example, a connection node between adjacent resistor units in the gamma resistor string.

A plurality of buffers 1220 (1220-1, 1220-2, ..., 1220-N) are electrically connected to the plurality of voltage input terminals IN, respectively. Thus, when the gamma voltage generator 1200 is not connected to other gamma voltage generators, or the gamma voltage generator 1200 needs to output a buffer voltage to other gamma voltage generators (such as when the two or more source driver circuits described later are used as a main circuit), the gamma voltage generator 1200 can output a plurality of gamma voltages at a plurality of voltage output terminals O based on the buffer voltages of the plurality of buffers. Furthermore, when the gamma voltage generator 1200 is connected to other gamma voltage generators but does not need to output buffer voltage to other gamma voltage generators (such as when more than two source driver circuits are described later as slave circuits), the multiple buffers may not be enabled or only the two buffers providing the maximum reference voltage and the minimum reference voltage may be enabled.

In order to improve the driving capability of the gamma voltage, the gamma voltage generating circuit includes a plurality of resistor units RVA connected in series, and the connection nodes of the adjacent resistor units RVA are connected to or used as a voltage output terminal, and each resistor unit is configured to have a first resistance value in the first mode and a second resistance value in the second mode, and the second resistance value is less than the first resistance value. The figure schematically shows a combination of a plurality of resistor units RVA represented by a resistor symbol RS. The number of resistor units RVA connected in series represented by each resistor symbol RS can be determined according to the number of gamma voltages to be output and is not limited to the number shown in the figure.

In this way, the first time required for the gamma voltage generating circuit to output the predetermined amount of gamma voltage when each resistor unit RVA has a first resistance value is greater than the second time required for outputting the predetermined amount of gamma voltage when each resistor unit RVA has a second resistance value.

Corresponding to the first mode and the second mode of the dynamic buffer described above, the first mode of the resistor unit in this embodiment is also the standby mode, and the second mode is the trigger mode. For example, when the gamma voltage output by the gamma voltage generator needs to be reestablished and stabilized, the resistor unit works in the trigger mode, and after the gamma voltage output by the gamma voltage generator is established and stabilized, that is, when the gamma voltage does not need to be established and stabilized, the resistor unit works in the standby mode.

In this way, in the trigger mode (second mode), each resistor unit RVA in the gamma voltage generating circuit can be configured to have a smaller resistance value, so that more current can quickly flow through the multiple resistor units in series to establish and stabilize the gamma voltage more quickly. In the standby mode (first mode), each resistor unit RVA can be configured to have a larger resistance value, so the overall power consumption can be reduced.

Optionally, FIG. 12B shows an example circuit structure of a resistor unit. Optionally, all resistor units in the gamma voltage generating circuit have the same resistance value in the first mode and the same resistance value in the second mode, for example, all resistor units may have the same circuit structure.

As shown in FIG. 12B , the resistor unit may include a bypass switch SWB and a plurality of resistors connected in series, wherein the bypass switch SWB is connected in parallel with at least one resistor (two resistors are shown in the figure) of the plurality of resistors, wherein the bypass switch is configured to be turned on in the second mode and turned off in the first mode. It can be seen that in the second mode, the resistance value (second resistance value) of the resistor connected in series in the resistor unit is less than the resistance value (first resistance value) of the resistor connected in series in the resistor unit in the first mode.

Optionally, similar to the description above with reference to Figures 4-11, switching from the first mode to the second mode can also be controlled based on the update or change of the displayed data.

For example, when the display data input to the multiple channel circuit is updated, the multiple resistor units connected in series can be switched to operate in the second mode to quickly re-establish and stabilize the gamma voltage, and after a predetermined period of time, the multiple resistor units connected in series return to operate in the first mode.

Alternatively, as described above, the display data input to the multiple channel circuits is updated periodically (for example, based on the horizontal synchronization signal Hsync or the scanning signal), so at a predetermined time point before the start point of each update cycle, the multiple resistor units connected in series can be switched to operate in the second mode to quickly re-establish and stabilize the gamma voltage, and after a predetermined period of time, the multiple resistor units connected in series return to operate in the first mode.

Alternatively, as described above, when the display data input to the multiple channel circuits changes, the multiple resistor units switch to operate in the second mode, and after a predetermined period of time, the multiple resistor units return to operate in the first mode. In this way, the total power consumption can be further reduced. In some embodiments, the processor inside the source driver can determine the change between the display data.

Therefore, in the gamma voltage generator described with reference to FIGS. 12A-12B , by making the resistance value of the resistor unit in the first mode greater than the resistance value in the second mode, more current in the gamma voltage generating circuit can quickly flow through the multiple resistor units connected in series in the second mode to establish and stabilize the gamma voltage more quickly, and after the gamma voltage is established and stabilized, it returns to the operation in the first mode, which can reduce the overall power consumption.

According to some other embodiments, multiple dynamic buffers and multiple resistor units with variable resistance values as described above can be combined into the same gamma voltage generator. For example, as shown in FIG. 13 , the gamma voltage generator 1200 includes not only multiple dynamic buffers (shown in gray) and multiple basic buffers (shown in white), but also the gamma circuit generating circuit 1210 includes multiple resistor units RVA (with variable resistance values) connected in series. The working timing and specific structure of the dynamic buffer and the resistor unit have been described in detail above, so they will not be repeated here.

Therefore, in the second mode, the multiple dynamic buffers can be connected to the gamma voltage generating circuit 1210 (including multiple resistor units connected in series) together with the basic buffer, and the multiple resistor units included in the gamma voltage generating circuit 1210 can have a smaller resistance value (for example, the bypass switch is turned on). In this way, the combination of the dynamic buffer and the resistor unit with a variable resistance value can further reduce the establishment and stabilization time of the gamma voltage and improve the driving capability of the gamma voltage output by the gamma voltage generator. This implementation method can allow the display device to operate at an ultra-high frame rate.

According to another aspect of the present application, a source driver is provided, which may include a gamma voltage generator as described above (e.g., as described with reference to FIG. 4-13), for example, the gamma voltage generator may be integrated into a source driver circuit (IC).

In addition, in some other application scenarios, such as a foldable mobile phone with a flexible display panel, the size of the display panel is getting larger and larger, so the source driver may include more than two source driver circuits (each including a gamma voltage generator) to drive the same display panel, such as shown in FIG. 3B .

When the source driver may include more than two source driver circuits, the gamma voltage generator in at least one of the source drivers may adopt the structure of the gamma voltage generator described in reference to FIG. 4, and correspondingly, the mode switching timing and switching method described in reference to FIG. 5-11 may be used. The source driver circuit that provides a buffer voltage to other source driver circuits via the wires between the power transmission terminals of the source driver circuit may be regarded as a master circuit, and the other source driver circuits may be regarded as slave circuits.

For example, in a dynamic buffer-based solution, as shown in FIG14 , the source driver 1400 may include a first source driver circuit (IC1) and a second source driver circuit (IC2). The first source driver circuit may be regarded as a master circuit, and the second source driver circuit may be regarded as a slave circuit.

At least one of the gamma voltage generator 1400-1 (first gamma voltage generator) included in the first source driver circuit (IC1) and the second gamma voltage generator 1400-2 included in the second source driver (IC2) may adopt the structure of the gamma voltage generator 400 described with reference to FIG. 4.

FIG14 exemplarily shows a case where the first gamma voltage generator 1400-1 adopts the structure of the gamma voltage generator 400 described with reference to FIG4 , and the second gamma voltage generator 1400-2 may adopt the structure of the gamma voltage generator 201 described with reference to FIG4 or adopt other structures (for example, all buffers used are basic buffer structures as in the related art). However, it should be understood that in other embodiments, the second gamma voltage generator 1400-2 may adopt the structure of the gamma voltage generator 201 described with reference to FIG4 , and the first gamma voltage generator 1400-1 may adopt the structure of the gamma voltage generator 201 described with reference to FIG4 or other structures. According to the disclosed embodiment, the two gamma voltage generators may have different structures, but the number and voltage value of the gamma voltages they output should be the same. Optionally, the source driver circuit as a slave circuit can receive the buffer voltage from the source driver circuit as a master circuit, and it may not even include a basic buffer (or only include two basic buffers that provide the maximum gamma reference voltage and the minimum gamma reference voltage to the gamma voltage generating circuit included therein). Considering that the structures of the gamma voltage generators of the two source driver circuits are different, the establishment and stabilization time of the gamma voltage output by the gamma voltage generators in the two source driver circuits may be inconsistent, which may cause color difference problems in the displayed image; in addition, considering the production cost and design complexity, the gamma voltage generators of each source driver circuit generally adopt the same structure, so the first gamma voltage generator 1400-1 and the second gamma voltage generator 1400-2 can adopt the same gamma voltage generator structure.

Therefore, as an example, when the first gamma voltage generator 1400-1 and the second gamma voltage generator 1400-2 both adopt the structure of the gamma voltage generator described with reference to FIG. 4, the multiple basic buffers included in the first gamma voltage generator 1400-1 can output a first group of buffer voltages to the corresponding multiple first voltage input terminals, and transmit them to the second gamma voltage generator 1400-2, and then the second gamma voltage generator 1400-2 can be configured to receive the first group of buffer voltages from the first gamma voltage generator 1400-1 (for example, via the electrical connection between the power transmission terminals P-P’ as described above) for outputting a second predetermined amount of gamma voltage. Since the first gamma voltage generator 1400-1 includes a plurality of basic buffers that keep outputting the first group of buffer voltages, the first group of buffer voltages can be continuously provided to the second gamma voltage generator 1400-2. It should be noted that each power transmission terminal P (as an output terminal) of the first source driver circuit (IC1) is connected to the corresponding voltage output terminal of the gamma voltage generating circuit 1411 and the corresponding first voltage input node, so that the buffer voltage can be received from the corresponding basic buffer and used as the output voltage at the power transmission terminal P.

The second gamma voltage generator 1400-2 has the same structure as the first gamma voltage generator 1400-1, including: a second gamma voltage generating circuit 1412, a plurality of basic buffers (ie, a second set of basic buffers) and a plurality of dynamic buffers (ie, a second set of dynamic buffers). Among them, the second gamma voltage generating circuit 1412 has a first voltage input terminal of a second set, a second voltage input terminal of a second set, and a voltage output terminal of a second set; the input terminals of the basic buffers of the second set respectively receive corresponding gamma reference voltages, and the output terminals are respectively connected to the first voltage input terminals of the second set; and the input terminals of the dynamic buffers of the second set respectively receive corresponding gamma reference voltages, and the output terminals are respectively connected to the second voltage input terminals of the second set, and are configured to operate in the first mode or the second mode synchronously with the multiple dynamic buffers in the first gamma voltage generator 1400-1. It should be noted that the present application uses the expression of a certain element of the "second set" to distinguish it from the expression of a plurality of corresponding elements included in the first gamma voltage generating circuit 1411 (i.e., a certain element of the "first set").

The second gamma voltage generator 1400-2 includes a second gamma voltage generating circuit 1412, the second set of first voltage input terminals receiving the first set of buffer voltages from the first gamma voltage generator 1400-1, and the second set of dynamic buffers outputs a second set of buffer voltages to the second voltage input terminals of the second set in the second mode. The second group of buffer voltages is not output when the second group of buffer voltages is in the second mode, and the second gamma voltage generating circuit 1412 outputs the second predetermined amount of gamma voltage at the voltage output terminal of the second set of the second gamma voltage generator 1400-2 based on the first group of buffer voltages and the second group of buffer voltages (in the second mode) or based on the first group of buffer voltages (in the first mode).

That is, in the case where the gamma voltage needs to be reestablished and stabilized, the dynamic buffers (all or part thereof, set according to system requirements) in the first gamma voltage generator 1400-1 and the second gamma voltage generator 1400-2 operate in the second mode to output the buffer voltage, and the first group of buffer voltages output by the basic buffer of the first gamma voltage generator 1400-1 is provided to the second gamma voltage generator 1400-2, so that the second gamma voltage generator 1400-2 can be based on the second gamma voltage generator 1400-1. The second group of buffer voltages output by the dynamic buffer and the first group of buffer voltages from the first gamma voltage generator 1400-1 are used to generate the gamma voltage, so that the second gamma voltage generator 1400-2 can accelerate the establishment and stabilization speed of the gamma voltage to a certain extent compared with the case of only based on the first group of buffer voltages from the first gamma voltage generator 1400-1, so the establishment and stabilization time of the gamma voltages in the two source driver circuits can be close, so the display color difference can be reduced, thereby improving the display effect.

As another example, in FIG15 , in a solution based on a resistor unit with a variable resistance value, at least one of a gamma voltage generator 1500-1 (first gamma voltage generator) included in the first source driver circuit (IC1) and a second gamma voltage generator 1500-2 included in the second source driver (IC2) can adopt the structure of the gamma voltage generator 201 described in reference FIGS. 12A-12B , and correspondingly can utilize the mode switching timing and switching method described in reference FIGS. 5-11 , etc. A source driver circuit that provides a buffer voltage to other source driver circuits via wires between power transmission terminals of the source driver circuit can be regarded as a master circuit, and other source driver circuits can be regarded as slave circuits.

FIG15 exemplarily shows that the first gamma voltage generator 1500-1 adopts the structure of the gamma voltage generator 1200 described with reference to FIGS. 12A-12B , while the second gamma voltage generator 1500-2 may adopt the structure of the gamma voltage generator 1200 described with reference to FIGS. 12A-12B , or adopt other structures. However, it should be understood that in other embodiments, the second gamma voltage generator 1500-2 may adopt the structure of the gamma voltage generator 1200 described with reference to FIGS. 12A-12B , while the first gamma voltage generator 1500-1 may adopt the structure of the gamma voltage generator 1200 described with reference to FIGS. 12A-12R or other structures (e.g., a resistor string structure as used in the related art). The two gamma voltage generators may have different structures, but the number and voltage value of the gamma voltages they output should be the same. Alternatively, the source driver circuit as a slave circuit can receive the buffer voltage from the source driver circuit as a master circuit, and it may not even include a buffer (or only include two buffers that provide the maximum gamma reference voltage and the minimum gamma reference voltage to the gamma voltage generating circuit included therein).

Similarly, as mentioned above, considering the display effect, production cost and design complexity, the first gamma voltage generator 1500-1 and the second gamma voltage generator 1500-2 can adopt the same gamma voltage generator structure.

Therefore, as an example, when the first gamma voltage generator 1500-1 and the second gamma voltage generator 1500-2 both adopt the structure of the gamma voltage generator described with reference to FIGS. 12A-12B, the first gamma voltage generator 1500-1 includes a plurality of buffers that can output a first set of buffer voltages to the corresponding plurality of voltage input terminals, and then the second gamma voltage generator 1500-2 can be configured to receive the first set of buffer voltages from the first gamma voltage generator 1500-1 for outputting a second predetermined amount of gamma voltage.

The second gamma voltage generator 1500-2 has the same structure as the first gamma voltage generator 1500-1, including: a second gamma voltage generating circuit, a second set of buffers, wherein the second gamma voltage generating circuit has a second set of voltage input terminals and a second set of voltage output terminals; the input terminals of the second set of buffers respectively receive corresponding gamma reference voltages, and the output terminals are respectively connected to the voltage input terminals of the second set; the second The voltage input terminal of the set receives the buffer voltage from the first gamma voltage generator 1500-1, and wherein the second gamma voltage generating circuit 1512 includes a second set of resistor units connected in series, and the connection nodes of adjacent resistor units are connected to or serve as a voltage output terminal, and each resistor unit is configured to switch between the first mode and the second mode synchronously with the resistor unit in the first gamma voltage generator 1500-1.

That is, when the gamma voltage needs to be reestablished and stabilized, the resistor unit in the second gamma voltage generator 1500-2 operates in the second mode to generate the gamma voltage based on the buffer voltage from the first gamma voltage generator 1500-1 at a smaller resistance value, so that the second gamma voltage generator 1500-2 can speed up the establishment and stabilization speed of the gamma voltage to a certain extent compared to the case where the resistor unit with a variable resistance value is not provided, so the establishment and stabilization time of the gamma voltage in the two source driver circuits can be close, so the display color difference can be reduced, the display is more uniform, and the display effect is improved.

In addition, it should be noted that although it is described in an exemplary manner in FIGS. 14-15 that when the source driver may include two source driver circuits, at least one of the source driver circuits adopts a solution based on a dynamic buffer or a solution based on a variable resistor unit, it should be understood that the source driver may include more source driver circuits, and at least one of the source driver circuits adopts a solution based on a dynamic buffer or a solution based on a variable resistor unit. In addition, the at least one source driver circuit may adopt both a solution based on a dynamic buffer and a solution based on a variable resistor unit, for example, the at least one source driver circuit may include a gamma voltage generator as shown in FIG. 13.

In addition, if the speed of the gamma voltage generator inside each source driver circuit to establish and stabilize the gamma voltage is fast enough, then the difference in the time for establishing and stabilizing the gamma voltage between the gamma voltage generators of the source driver circuit is also small and can be considered to be consistent. Therefore, when the source driver can include at least two source driver circuits, each source driver circuit can be randomly set to any one of a dynamic buffer-based solution (such as Figure 4), a variable resistor unit-based solution (such as Figure 12), and a dynamic buffer and a variable resistor unit-based solution (such as Figure 13).

It should be understood that the source driver may further include other circuits configured to cooperate with the gamma voltage generator of each source driver circuit in the source driver to generate a gamma voltage and drive the display panel. A person skilled in the art will understand the structure and operation of the other circuits as shown in Figures 2 to 15, so a detailed description of the other circuits is omitted herein.

Correspondingly, another aspect of the present application further provides a display device, which may be a display device as shown in FIG. 1, and includes a display panel and a source driver, wherein the source driver may include a gamma voltage generator as described in reference to FIG. 4-13, or include at least two gamma voltage generators, wherein at least one of the at least two gamma voltage generators is a gamma voltage generator as described in reference to FIG. 4-13, or both are gamma voltage generators as described in reference to FIG. 4-13.

Those with ordinary knowledge in the art will understand that various modifications and changes can be made to the structure of the disclosed embodiments without departing from the scope or spirit of this disclosure. In view of the foregoing, it is hoped that this disclosure will cover modifications and changes of this disclosure that fall within the scope of the attached invention application and its equivalents.

The above is only the preferred embodiment of the present invention. All equivalent changes and modifications made within the scope of the patent application of the present invention shall fall within the scope of the present invention.

1200: Gamma voltage generator

310: Gamma reference voltage circuit

1220: Buffer

1210: Gamma voltage generation circuit

O: Voltage output terminal

IN: voltage input terminal

RVA: Resistor unit

RS: Multiple resistor units

Claims (13)

A gamma voltage generator comprises: a gamma voltage generating circuit having a plurality of voltage input terminals and a plurality of voltage output terminals, the plurality of voltage output terminals outputting a predetermined amount of gamma voltage based on input voltages from the plurality of voltage input terminals; and a plurality of buffers, each buffer having an input terminal receiving a corresponding gamma reference voltage and an output terminal connected to the corresponding voltage input terminal, wherein the gamma voltage generating circuit comprises a plurality of resistor units connected in series, and adjacent resistor units are connected to each other. The connection node of the resistor unit serves as or is connected to a voltage output terminal, and each resistor unit is configured to have a second resistance value when operating in a second mode that is less than a first resistance value when operating in a first mode, wherein the first mode is a standby mode, and the second mode is a trigger mode, wherein the trigger mode is applicable to a period before the predetermined amount of gamma voltage generated is stabilized, and the standby mode is applicable to a period after the predetermined amount of gamma voltage generated is stabilized. A gamma voltage generator according to claim 1, wherein each resistor unit comprises a bypass switch and a plurality of resistors connected in series, the bypass switch being connected in parallel with at least one of the plurality of resistors, wherein the bypass switch is configured to be turned on in the second mode and turned off in the first mode. According to the gamma voltage generator described in claim 1, the gamma voltage generating circuit is connected to a plurality of channel circuits, and each channel circuit is used to select at least one of the predetermined number of gamma voltages according to the input display data to generate a corresponding data voltage. A gamma voltage generator according to claim 3, wherein the plurality of resistor units switch to operate in the second mode when the display data input to the plurality of channel circuits is updated, and switch to operate in the first mode after a predetermined period of time. According to the gamma voltage generator described in claim 3, the display data input to the multiple channel circuits is updated periodically, and the multiple resistor units are switched to operate in the second mode at a time point predetermined time before the start point of each update cycle, and are switched to operate in the first mode after a predetermined time period. A gamma voltage generator according to claim 3, wherein the plurality of resistor units switch to operate in the second mode when the display data input to the plurality of channel circuits changes, and switch to operate in the first mode after a predetermined period of time. A gamma voltage generator according to claim 1, wherein the plurality of resistor units included in the gamma voltage generating circuit are synchronously switched between the first mode and the second mode. According to the gamma voltage generator of claim 1, the gamma voltage generating circuit also has a plurality of second voltage input terminals; the gamma voltage generator further comprises: A plurality of dynamic buffers, each of which receives a corresponding gamma reference voltage at its input terminal and is connected to a corresponding second voltage input terminal at its output terminal, and each of which does not output a buffer voltage when the plurality of resistor units operate in the first mode, and outputs a buffer voltage to the connected second voltage input terminal when the plurality of resistor units operate in the second mode. A gamma voltage generator according to claim 8, wherein each dynamic buffer comprises a buffer and a switching module, and the switching module of each dynamic buffer is configured to: prohibit when the plurality of resistor units operate in the first mode and allow the buffer included in the dynamic buffer to output a buffer voltage to the second voltage input terminal to which the dynamic buffer is connected when the plurality of resistor units operate in the second mode. The gamma voltage generator according to claim 8, wherein each dynamic buffer includes a buffer, a switching module and a voltage difference detection module, the first detection end of the voltage difference detection module of each dynamic buffer is connected to the first input end of the buffer included in the dynamic buffer, the second detection end is connected to the second voltage input end connected to the dynamic buffer, and the output end outputs a switching control signal; and the switching module of each dynamic buffer is configured to be based on the dynamic buffer package The switching control signal of the voltage difference detection module or other voltage difference detection modules included in the embodiment of the present invention allows the corresponding buffer to output the buffer voltage to the second voltage input terminal connected to the dynamic buffer when the multiple resistor units operate in the second mode or prohibits the corresponding buffer from outputting the buffer voltage to the second voltage input terminal connected to the dynamic buffer when the multiple resistor units operate in the first mode, wherein the multiple resistor units switch between the second mode and the first mode in response to the switching control signal of the voltage difference detection module of each dynamic buffer. According to the gamma voltage generator described in claim 8, each dynamic buffer includes a buffer, wherein the buffer switches between an enabled and disabled state according to an enable signal to output or not output a buffer voltage to a second voltage input terminal to which the dynamic buffer is connected. A source driver, comprising: a gamma voltage generator according to claim 1; and a plurality of channel circuits connected to the gamma voltage generator, for generating data voltages corresponding to input display data using the gamma voltage output by the gamma voltage generator. A display device, comprising: a display panel; and a source driver as described in claim 12, used to drive the display panel.