TWI839235B - Server motherboard with power detectiion function - Google Patents

Abstract

A server motherboard includes a motherboard connector, a power circuit, a programmable logic circuit, and a switch circuit. The programmable logic circuit includes an analog-to-digital conversion module, a comparison module, and a judgement module. The motherboard connector is configured to transmit a supply power to an external device. The power circuit is configured to generate the supply power, a standby power and an analog detecting power. The analog-to-digital conversion module is configured to convert the analog detecting power into a digital working power. The programmable logic circuit is electrically connected to the power circuit. The comparison module is configured to compare the voltage value of the digital working power and a comparing threshold to generate a comparing signal. The judgement module is configured to generate a first control signal according to the comparing signal. The switch circuit is electrically connected to the motherboard connector, the power circuit, and the programmable logic circuit, and configured to turn-on or turn-off according to the first control signal.

Description

Server motherboard with power detection function

This case relates to power detection technology, and in particular to a server motherboard with power detection function.

EDSFF (Enterprise and Date-center SSD Form Factor) is a connector specification standard for solid-state drives. Devices that comply with the EDSFF specification standard (hereinafter referred to as EDSFF devices) are suitable for server systems or data centers to provide more diverse functions and support (such as hot-swap functions, support for PCIe Gen 4 and PCIe Gen 5 protocols, etc.).

However, the existing EDSFF device connector (including the gold finger and the corresponding slot) does not have a physical foolproof mechanism. Therefore, if the existing EDSFF device is inserted into the slot of the motherboard in the server system in the wrong insertion direction (for example, rotated 180 degrees), the high-level power pin of the motherboard (for example, 12 volts) will short-circuit with the low-level power pin of the existing EDSFF device (for example, ground) and cause the components on the motherboard (for example, capacitors, chips, etc.) to burn out.

In order to solve the above problems, this case proposes a server motherboard. The server motherboard includes a motherboard connector for transmitting a supply power to an external device; a power circuit for generating a supply power, a standby power and an analog detection power; a programmable logic circuit electrically connected to the power circuit, including: an analog-to-digital conversion module for converting the analog detection power into a digital working power; a comparison module for comparing the voltage value of the digital working power and a comparison threshold value. Generate a comparison signal; and a judgment module, used to generate a corresponding first control signal according to the comparison signal; and a switch circuit, electrically connected to the motherboard connector, the power circuit and the programmable logic circuit, used to turn on or off according to the first control signal; wherein, when the switch circuit is turned on, the motherboard connector is electrically connected to the power circuit; when the switch circuit is turned off, the circuit between the motherboard connector and the power circuit is open.

In some embodiments, the power circuit includes: a voltage divider circuit electrically connected to the programmable logic circuit for dividing the standby power into an analog detection power; and a voltage regulator electrically connected to the switch circuit for regulating the standby power into a supply power.

In some embodiments, the voltage divider circuit includes: a first resistor, one end of the first resistor is electrically connected to the standby power supply, and the other end of the first resistor is electrically connected to the programmable logic circuit; and a second resistor, one end of the second resistor is electrically connected to the power circuit and the other end of the first resistor, and the other end of the second resistor is grounded.

In some embodiments, the switch circuit includes: a pull-down resistor, one end of the pull-down resistor is electrically connected to the programmable logic circuit, and the other end of the pull-down resistor is grounded, for pulling a first control signal; and a first switch, the control end of the first switch is electrically connected to the programmable logic circuit, the output end of the first switch is electrically connected to the power circuit, and the ground end of the first switch is electrically connected to the motherboard connector, and the first switch is used to turn on or off according to the first control signal.

In some embodiments, the server motherboard further includes a capacitor, one end of the capacitor is electrically connected to the power circuit and the output end of the first switch, and the other end of the capacitor is grounded. The capacitor is used to filter noise in the supply power.

In some embodiments, the switch circuit includes: a pull-down resistor electrically connected to the programmable logic circuit for pulling the first control signal; a pull-up resistor, one end of which is electrically connected to the power circuit for pulling the standby power to generate a second control signal; a first switch, the control end of which is electrically connected to the programmable logic circuit, the output end of which is electrically connected to the other end of the pull-up resistor, and the contact end of the first switch is electrically connected to the control end of the programmable logic circuit. The ground terminal is grounded, the first switch is used to turn on or off according to the first control signal, and the second control signal is output at the output terminal of the first switch; and a second switch, the control terminal of the second switch is electrically connected to the output terminal of the first switch and the other end of the pull-up resistor, the output terminal of the second switch is electrically connected to the power circuit, the ground terminal of the second switch is electrically connected to the motherboard connector, and the second switch is used to turn on or off according to the second control signal.

In some embodiments, the server motherboard further includes a capacitor, one end of which is electrically connected to the power circuit and the output end of the second switch, and the other end of the capacitor is grounded. The capacitor is used to filter noise in the power supply.

In some embodiments, the programmable logic circuit further includes: a temporary storage module for storing a debug value corresponding to the voltage value of the first control signal; a storage module for storing the debug value; and a control module for reading the debug value from the temporary storage module and writing the debug value to the storage module.

In some embodiments, the server motherboard further includes a baseboard management control circuit electrically connected to the programmable logic circuit for reading and storing debug values.

In some embodiments, the server motherboard further includes a light-emitting circuit electrically connected to the programmable logic circuit for emitting an indicator light corresponding to the voltage value of the first control signal.

In summary, according to some embodiments, the server motherboard detects the change of the voltage value of the analog detection power supply through a programmable logic circuit to determine whether the external device is plugged into the motherboard connector of the server motherboard in the correct plugging direction. When the external device is plugged into the motherboard connector of the server motherboard in the wrong plugging direction, the server motherboard immediately turns off the switch circuit to disconnect the line between the power circuit and the motherboard connector, thereby preventing the high-level supply power generated by the power circuit from being completely short-circuited and causing the server motherboard to burn out.

Please refer to FIG. 1, which is a module block diagram of a first embodiment of a server motherboard 10 according to the present invention. The server motherboard 10 includes a motherboard connector 100, a power circuit 110, a programmable logic circuit 120 including an analog-to-digital conversion module 121, a comparison module 122, and a judgment module 123, and a switch circuit 130. The programmable logic circuit 120 is electrically connected to the power circuit 110, and the switch circuit 130 is electrically connected to the motherboard connector 100, the power circuit 110, and the programmable logic circuit 120.

Please refer to FIG. 2 and FIG. 3A. FIG. 2 is a schematic diagram of a first embodiment of the server motherboard 10 of FIG. 1 being electrically connected to an external device 20, and FIG. 3A is a schematic diagram of a second embodiment of the server motherboard 10 of FIG. 1 being electrically connected to an external device 20. The motherboard connector 100 includes a plurality of pins 101 to 10N, and the peripheral connector 200 of the external device 20 also includes a plurality of pins 201 to 20N (N is a positive integer). Therefore, the external device 20 can be plugged into the motherboard connector 100 of the server motherboard 10 through the peripheral connector 200.

In some embodiments, both the motherboard connector 100 and the peripheral connector 200 comply with the EDSFF specification standard, but the present invention is not limited thereto, as long as the peripheral connector 200 of the external device 20 can be plugged into the motherboard connector 100 of the server motherboard 10 in two directions. The two directions include a correct direction (as shown in FIG. 2 ) and an incorrect direction (as shown in FIG. 3A ).

The motherboard connector 100 is used to transmit/receive communication signals, such as signals that comply with interfaces such as I2C, UART, etc. Among them, the motherboard connector 100 is also used to transmit a supply power VSP to the external device 20. In addition, the function of each pin on the motherboard connector 100 is not exactly the same. When the motherboard connector 100 is electrically connected to the peripheral connector 200 in the correct direction, each pin on the motherboard connector 100 corresponds to each pin on the peripheral connector 200. In some embodiments, the supply power VSP includes a normal detection power VN and an abnormal detection power VAN. Among them, the pin 101 of the motherboard connector 100 is used to transmit the normal detection power VN, and the pin 10N of the motherboard connector 100 is used to transmit the abnormal detection power VAN.

In some embodiments, the voltage value of the normal detection power VN is a high level (for example, but not limited to 24 volts or 12 volts, hereinafter 12 volts is taken as an example), and the voltage value of the abnormal detection power VAN is a low level (for example, but not limited to 0.3 volts, 0.1 volts or 0 volts, etc., ground signals, hereinafter 0 volts is taken as an example). In other embodiments, the pin 101 of the motherboard connector 100 is used to transmit the abnormal detection power VAN, and the pin 10N of the motherboard connector 100 is used to transmit the normal detection power VN.

In some embodiments, pin 201 of peripheral connector 200 is also a pin for transmitting normal detection power VN, and pin 20N of peripheral connector 200 is also a pin for transmitting abnormal detection power VAN. In other embodiments, pin 201 of peripheral connector 200 is used to transmit abnormal detection power VAN, and pin 20N of peripheral connector 200 is used to transmit normal detection power VN.

In some embodiments, when the motherboard connector 100 is inserted in the correct direction, pin 101 of the motherboard connector 100 corresponds to pin 201 of the peripheral connector 200 which is also used to transmit the normal detection power VN, pin 102 of the motherboard connector 100 corresponds to pin 202 of the peripheral connector 200, ..., and pin 10N of the motherboard connector 100 corresponds to pin 20N of the peripheral connector 200 which is also used to transmit the abnormal detection power VAN. Therefore, when the external device 20 is inserted into the server motherboard 10 in the correct direction (as shown in FIG. 2 ), all pins of the motherboard connector 100 correctly correspond to all pins of the peripheral connector 200 having the same function or attribute, so that both the server motherboard 10 and the external device 20 can operate normally.

On the contrary, when the external device 20 is inserted into the server motherboard 10 in the wrong direction (as shown in FIG. 3A ), some pins of the motherboard connector 100 are mistakenly electrically connected to some pins of the peripheral connector 200. In other words, some pins of the motherboard connector 100 are electrically connected to some pins of the peripheral connector 200 with different functions or properties, so that the server motherboard 10 and the external device 20 cannot operate normally. In addition, the pin 101 of the server motherboard 10 for transmitting the high-level normal detection power VN will form a short circuit with the pin 20N of the external device 20 for transmitting the low-level abnormal detection power VAN, which may cause the server motherboard 10 to burn out.

The following will use an embodiment to illustrate the problem that occurs when the external device 20 is plugged into the server motherboard 10 in the wrong direction. Please refer to FIG. 3B , which is a schematic diagram of an exemplary state in which the server motherboard 10 of the present case in FIG. 3A is electrically connected to the external device 20. In this embodiment, the motherboard connector 100 of the server motherboard 10 includes six pins 101-106, and the peripheral connector 200 of the external device 20 also includes six pins 201-206. Among them, pins 101, 102, 105, 201-202, 205 are used to transmit a high-level normal detection power VN, and pins 103, 104, 106, 203-204, 206 are used to transmit a low-level abnormal detection power VAN.

When the external device 20 shown in FIG. 3B is inserted into the server motherboard 10 in the wrong direction, pin 101 is electrically connected to pin 206, pin 102 is electrically connected to pin 205, ..., and pin 106 is electrically connected to pin 201. Since pin 101 and pin 206 have different functions, a short circuit is formed between pin 101 and pin 206, which may cause abnormal communication between the server motherboard 10 and the external device 20, or even cause the server motherboard 10 to burn out. Similarly, since the pins 106 and 201 have different functions, a short circuit is formed between the pins 106 and 201, which may cause abnormal communication between the server motherboard 10 and the external device 20, or even cause the server motherboard 10 to burn out.

Please refer to FIG. 1 to FIG. 4 , FIG. 4 is an operation flow chart of some embodiments of the server motherboard 10 of the present case described in FIG. 1 . Before the present embodiment starts to be executed, the external device 20 is first plugged into the server motherboard 10 . Hereinafter, the operation flow of the server motherboard 10 will be described by taking the correct direction as the correct plugging direction and the incorrect direction as the incorrect plugging direction as an example. When a power supply externally connected to the server motherboard 10 is powered on to provide power to the server motherboard 10 , and regardless of whether the basic input and output system (BIOS) or operating system (OS) of the server motherboard 10 is started and operated, the power circuit 110 of the server motherboard 10 generates a supply power VSP, a standby power VSB and an analog detection power VAD (step S100 ). The supply power VSP is used to provide the basic power required by the external device 20 (such as the normal detection power VN and the abnormal detection power VAN), and the standby power VSB is used to provide the basic power required by each device in the server motherboard 10 when in standby mode. In some embodiments, since the supply power VSP, the standby power VSB and the analog detection power VAD are all generated by the power circuit 110, the voltage values of the supply power VSP, the standby power VSB and the analog detection power VAD are related to each other and affect each other (the relevant discussion will be explained later).

In some embodiments, when the system is not powered on and is in a standby state, the standby power VSB is used to provide power to the components in the server motherboard 10 that are still in operation, and the analog detection power VAD is used to provide power to the server motherboard 10 to detect the plug-in state between the server motherboard 10 and the external device 20. Since the voltage value of the analog detection power VAD is related to the voltage value of the normal detection power VN, the programmable logic circuit 120 can determine the plug-in state between the server motherboard 10 and the external device 20 through the analog detection power VAD.

In addition, when the power supply external to the server motherboard 10 is powered on to provide power to the server motherboard 10, the switch circuit 130 of the server motherboard 10 is preset to the on state. Therefore, the power circuit 110 is electrically connected to the motherboard connector 100 and transmits the supply power VSP to the external device 20 through the motherboard connector 100.

Following step S100, the analog-to-digital conversion module 121 of the programmable logic circuit 120 converts the analog detection power VAD into a digital working power VDC (step S110). Subsequently, the comparison module 122 of the programmable logic circuit 120 compares the voltage value of the digital working power VDC with a comparison threshold value to generate a comparison signal Scp (step S120). The comparison threshold value can be a preset voltage value or a preset voltage range.

In some embodiments, it is assumed that the comparison threshold is the preset voltage value, and the preset voltage value is, for example, 3 volts or 12 volts, but is not limited thereto. When the voltage value of the digital working power source VDC meets the comparison threshold value (for example, when the voltage value of the digital working power source VDC is higher than the comparison threshold value), the voltage value of the comparison signal Scp generated by the comparison module 122 is a voltage value representing a "matching" comparison result (for example, a first specific parameter value). On the contrary, when the voltage value of the digital working power source VDC does not meet the comparison threshold (for example, when the voltage value of the digital working power source VDC is lower than the comparison threshold), the voltage value of the comparison signal Scp generated by the comparison module 122 is a voltage value representing a "non-compliant" comparison result (for example, a second specific parameter value).

In some embodiments, the first specific parameter value and the second specific parameter value are different from each other to represent the comparison results of "matching" and "not matching", respectively. When the first specific parameter value is a high level, the second specific parameter value is a low level; when the first specific parameter value is a low level, the second specific parameter value is a high level.

In some embodiments, it is assumed that the comparison threshold is the preset voltage range, and the preset voltage range is, for example, 2.5 volts to 3.5 volts or 11.5 volts to 15 volts, but is not limited thereto. When the voltage value of the digital working power source VDC falls within the range of the comparison threshold, the voltage value of the comparison signal Scp generated by the comparison module 122 is a voltage value representing a "compliant" comparison result (e.g., the aforementioned first specific parameter value). On the contrary, when the voltage value of the digital working power source VDC does not fall within the range of the comparison threshold, the voltage value of the comparison signal Scp generated by the comparison module 122 is a voltage value representing a "non-compliant" comparison result (e.g., the aforementioned second specific parameter value).

For the sake of convenience, the following will use a high level to represent the voltage value of the comparison result of "matching", and a low level to represent the voltage value of the comparison result of "not matching". It should be noted that this setting is not a limitation of the present invention.

Following step S120, the determination module 123 of the programmable logic circuit 120 determines whether the voltage value of the comparison signal Scp is a voltage value representing a comparison result of "matching" (step S130), and generates a corresponding first control signal Sc1 according to the voltage value of the comparison signal Scp. When the voltage value of the comparison signal Scp is a high level representing "matching", the determination module 123 generates the first control signal Sc1 representing "pass" to control the switch circuit 130 to conduct (step S140), so that the motherboard connector 100 is electrically connected to the power circuit 110. When the voltage value of the comparison signal Scp is a low level representing "non-compliance", the determination module 123 generates a first control signal Sc1 representing "failure" to control the switch circuit 130 to turn off (step S150), so that the circuit between the motherboard connector 100 and the power circuit 110 is open.

In some embodiments, the voltage value of the first control signal Sc1 representing "pass" is different from that of the first control signal Sc1 representing "fail". When the voltage value of the first control signal Sc1 representing "pass" is high, the voltage value of the first control signal Sc1 representing "fail" is low; when the voltage value of the first control signal Sc1 representing "pass" is low, the voltage value of the first control signal Sc1 representing "fail" is high.

When the external device 20 is inserted into the server motherboard 10 in the correct insertion direction (as shown in FIG. 2 ), the pin 101 for transmitting the normal detection power VN in the mainboard connector 100 of the server motherboard 10 is electrically connected to the pin 201 for transmitting the normal detection power VN in the peripheral connector 200 of the external device 20. Among them, the pin 101 and the pin 201 transmit the supply power VSP together as the normal detection power VN, so that the server motherboard 10 and the external device 20 can operate normally. Therefore, the switch circuit 130 maintains the on state (corresponding to step S140), so that the power circuit 110 can provide the supply power VSP to the external device 20.

When the external device 20 is inserted into the server motherboard 10 in an incorrect insertion direction (as shown in FIG. 3A ), the pin 101 for transmitting the normal detection power VN in the mainboard connector 100 of the server motherboard 10 is electrically connected to the pin 20N for transmitting the abnormal detection power VAN in the peripheral connector 200 of the external device 20. At this time, the voltage value of the normal detection power VN is reduced due to the short circuit between the pin 101 and the pin 20N, thereby causing the voltage value of the analog detection power VAD related to the normal detection power VN to also decrease. Therefore, when the programmable logic circuit 120 determines that the value of the digital working power VDC (corresponding to the analog detection power VAD) does not meet the comparison threshold, the programmable logic circuit 120 generates a first control signal Sc1 representing "not pass" to turn off the switch circuit 130, thereby preventing the voltage value of the supply power VSP from continuing to drop.

Please refer to FIG. 5 , which is a circuit diagram of a first embodiment of the switch circuit 130 of the present case in FIG. 1 . In some embodiments, the switch circuit 130 includes a pull-down resistor Rp1 and a first switch Q1. One end of the pull-down resistor Rp1 is electrically connected to the programmable logic circuit 120, and the other end of the pull-down resistor Rp1 is grounded. The control end G1 of the first switch Q1 is electrically connected to the programmable logic circuit 120, the output end D1 of the first switch Q1 is electrically connected to the power circuit 110, and the ground end S1 of the first switch Q1 is electrically connected to the motherboard connector 100.

In some embodiments, the pull-down resistor Rp1 is used to pull the first control signal Sc1, and the first switch Q1 is used to turn on or off according to the first control signal Sc1. When the voltage value of the first control signal Sc1 is high, the first switch Q1 is turned on so that the motherboard connector 100 is electrically connected to the power circuit 110. When the voltage value of the first control signal Sc1 is low, the first switch Q1 is turned off so that the circuit between the motherboard connector 100 and the power circuit 110 is open.

Please refer to FIG. 6 , which is a circuit diagram of a second embodiment of the switch circuit 130 of the present case in FIG. 1 . In some embodiments, the switch circuit 130 includes a pull-down resistor Rp1, a pull-up resistor Rp2, a first switch Q1, and a second switch Q2. Among them, one end of the pull-down resistor Rp1 is electrically connected to the programmable logic circuit 120, and the other end of the pull-down resistor Rp1 is grounded. One end of the pull-up resistor Rp2 is electrically connected to the power circuit 110. The control end G1 of the first switch Q1 is electrically connected to the programmable logic circuit 120, the output end D1 of the first switch Q1 is electrically connected to the other end of the pull-up resistor Rp2, and the ground end S1 of the first switch Q1 is grounded. The control terminal G2 of the second switch Q2 is electrically connected to the output terminal D1 of the first switch Q1 and the other end of the pull-up resistor Rp2. The output terminal S2 of the second switch Q2 is electrically connected to the power circuit 110. The ground terminal D2 of the second switch Q2 is electrically connected to the motherboard connector 100.

In some embodiments, the pull-down resistor Rp1 is used to pull the first control signal Sc1, and the pull-up resistor Rp2 is used to pull the standby power VSB to generate a second control signal Sc2. The first switch Q1 is used to turn on or off according to the first control signal Sc1, and output the second control signal Sc2 at the output terminal D1 of the first switch Q1. The second switch Q2 is used to turn on or off according to the second control signal Sc2. When the voltage value of the first control signal Sc1 is high, the first switch Q1 is turned on and the output terminal D1 of the first switch Q1 is grounded, thereby causing the voltage value of the second control signal Sc2 to drop to a low level. Therefore, the second switch Q2 is turned on according to the low-level second control signal Sc2, thereby electrically connecting the motherboard connector 100 to the power circuit 110.

When the voltage value of the first control signal Sc1 is low, the first switch Q1 is turned off, so that the output terminal D1 of the first switch Q1 is electrically connected to the power circuit 110, thereby increasing the voltage value of the second control signal Sc2 to a high level. Therefore, the second switch Q2 is turned off according to the high-level second control signal Sc2, thereby opening the circuit between the motherboard connector 100 and the power circuit 110.

In some embodiments, the first switch Q1 is an N-type metal oxide semiconductor field effect transistor (NMOS), and the second switch Q2 is a P-type metal oxide semiconductor field effect transistor (PMOS). The control terminal G1 of the first switch Q1 corresponds to the gate of the NMOS, the output terminal D1 of the first switch Q1 corresponds to the drain of the NMOS, and the ground terminal S1 of the first switch Q1 corresponds to the source of the NMOS. The control terminal G2 of the second switch Q2 corresponds to the gate of the PMOS, the output terminal S2 of the second switch Q2 corresponds to the source of the PMOS, and the ground terminal D2 of the second switch Q2 corresponds to the drain of the PMOS.

In some embodiments, the server motherboard 10 further includes a capacitor C1. The capacitor C1 is used to filter noise in the supply power VSP. Taking FIG. 5 as an example, in this embodiment, one end of the capacitor C1 is electrically connected to the power circuit 110 and the output terminal D1 of the first switch Q1, and the other end of the capacitor C1 is grounded. Taking FIG. 6 as an example, in this embodiment, one end of the capacitor C1 is electrically connected to the power circuit 110 and the output terminal S2 of the second switch Q2, and the other end of the capacitor C1 is grounded.

Please refer to FIG. 7 , which is a module block diagram of the second embodiment of the server motherboard 10 of the present invention. In some embodiments, the power circuit 110 further includes a voltage divider circuit 111 and a voltage regulator 112 . The voltage divider circuit 111 is electrically connected to the programmable logic circuit 120 , and the voltage regulator 112 is electrically connected to the switch circuit 130 .

Please refer to FIG. 8, which is a circuit diagram of some embodiments of the voltage divider circuit 111 of the present invention in FIG. 7. In some embodiments, the voltage divider circuit 111 includes a first resistor R1 and a second resistor R2. One end of the first resistor R1 is electrically connected to the power circuit 110, and the other end of the first resistor R1 is electrically connected to the programmable logic circuit 120. One end of the second resistor R2 is electrically connected to the programmable logic circuit 120 and the other end of the first resistor R1, and the other end of the second resistor R2 is grounded.

Please refer to FIG. 9, which is an operation flow chart of some embodiments of the server motherboard of the present case in FIG. 7 after being processed in step S100 in FIG. 4. In some embodiments, after step S100, the voltage dividing circuit 111 divides the standby power VSB into the analog detection power VAD (step S105). The voltage value of the standby power VSB is a high level, such as but not limited to 12 volts, 24 volts or 48 volts. In addition, the first resistor R1 and the second resistor R2 of the voltage dividing circuit 111 divide the high-level standby power VSB into a medium-level (such as 3.3 volts or 5 volts) analog detection power VAD. Since the programmable logic circuit 120 cannot load the high-level standby power VSB, the server motherboard 10 needs to first divide the high-level standby power VSB into the middle-level analog detection power VAD through the voltage divider circuit 111, so that the programmable logic circuit 120 can operate normally without burning out.

In some embodiments, the voltage regulator 112 is used to adjust the standby power VSB to the supply power VSP. Since the supply power VSP directly generated by the power circuit 110 may contain noise, and this noise may cause problems and damage to the high-precision external device 20 of some embodiments. Therefore, the voltage regulator 112 is used to filter the noise in the standby power VSB to generate the supply power VSP, so that the power circuit 110 provides a stable and clean supply power VSP to the external device 20.

In some embodiments, the programmable logic circuit 120 further includes a temporary storage module 124, a storage module 125, and a control module 126, and the server motherboard 10 further includes a baseboard management controller (BMC) 140. Please refer to Figures 1 to 10, Figure 10 is an operation flow chart of some embodiments of the server motherboard 10 in Figure 1 or Figure 7 after the processing of step S150 in Figure 4. Among them, the baseboard management controller 140 is electrically connected to the programmable logic circuit 120. Continuing with step S150, when the switch circuit 130 is turned off, it means that the voltage value of the comparison signal Scp is at a low level, and the buffer module 124 of the programmable logic circuit 120 stores a debug value Vdb corresponding to the low-level comparison signal Scp (step S160). When the voltage value of the comparison signal Scp is at a low level, the debug value Vdb is 1.

Following step S160, the control module 126 of the programmable logic circuit 120 reads the debug value Vdb and writes the debug value Vdb into the storage module 125 of the programmable logic circuit 120 (step S170). Finally, following step S170, the baseboard management controller 140 of the server motherboard 10 reads and stores the debug value Vdb (step S180).

In some embodiments, when the power circuit 110 stops supplying the standby power VSB to the programmable logic circuit 120 (for example, the server motherboard 10 is shut down or powered off), the data stored in the temporary storage module 124 will disappear, while the data stored in the storage module 125 will not disappear. Therefore, the control module 126 backs up the debug value Vdb to the storage module 125 to avoid the debug value Vdb disappearing and not being able to know that the external device 20 was plugged into the server motherboard 10 with an incorrect plugging direction. In addition, in some embodiments, the baseboard management controller 140 can further store the debug value Vdb as a log file to ensure that the error record is stored, and then provide the user with debugging.

In some embodiments, the server motherboard 10 further includes a light-emitting circuit 150. The light-emitting circuit 150 is electrically connected to the programmable logic circuit 120. The light-emitting circuit 150 is used to emit an indication light corresponding to the voltage value of the first control signal Sc1. When the voltage value of the first control signal Sc1 is high, it means that the external device 20 is plugged into the server motherboard 10 in the correct plugging direction, and the light-emitting circuit 150 will not emit any light. When the voltage value of the first control signal Sc1 is low, it means that the external device 20 is plugged into the server motherboard 10 in the wrong plugging direction, and the light-emitting circuit 150 will continue to emit light at a fixed frequency to indicate that an error occurs in the server motherboard 10. At this time, the user needs to shut down or power off the server motherboard 10 and re-insert the external device 20 into the server motherboard 10 in the correct insertion direction to disable the operation of the light-emitting circuit 150. In some embodiments, the light-emitting circuit 150 is a device with a light-emitting function, such as but not limited to an LED indicator light, a fluorescent light, or an incandescent light.

In some embodiments, the programmable logic circuit 120 is a device with firmware programming function, such as but not limited to a complex programmable logic device (CPLD) or a field programmable gate array (FPGA). In other words, the functions of each device in the programmable logic circuit 120 (including the analog-to-digital conversion module 121, the comparison module 122, the judgment module 123, the temporary storage module 124, the storage module 125 and the control module 126) are implemented by the firmware burned into the programmable logic circuit 120.

In some embodiments, since each device in the programmable logic circuit 120 is implemented by firmware, the duty cycle of the programmable logic circuit 120 (e.g., 1 nanosecond) is much smaller than the duty cycle of the power circuit 110 (e.g., 1 millisecond). In other words, the operation speed of the programmable logic circuit 120 is much faster than the operation speed of the power circuit 110. Therefore, the programmable logic circuit 120 can turn off the switch circuit 130 before the supply power VSP is completely short-circuited to prevent the server motherboard 10 from burning out.

In summary, according to some embodiments, the server motherboard detects the change of the voltage value of the analog detection power supply through a programmable logic circuit to determine whether the external device is plugged into the motherboard connector of the server motherboard in the correct plugging direction. When the external device is plugged into the motherboard connector of the server motherboard in the wrong plugging direction, the server motherboard immediately turns off the switch circuit to disconnect the line between the power circuit and the motherboard connector, thereby preventing the high-level supply power generated by the power circuit from being completely short-circuited and causing the server motherboard to burn out.

Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the invention of the present invention. Anyone with ordinary knowledge in the relevant technical field may make some modifications and changes without departing from the spirit and scope of the present disclosure. However, such modifications and changes are still within the scope of the patent application of the present invention.

10: Server motherboard 100: Motherboard connector 101, 102, 10N: Pins 110: Power circuit 111: Voltage divider circuit 112: Voltage regulator 120: Programmable logic circuit 121: Analog-to-digital conversion module 122: Comparison module 123: Judgment module 124: Memory module 125: Storage module 126: Control module 130: Switching circuit 140: Baseboard management control circuit 150: Light-emitting circuit 20: External device 200: Peripheral connector 201, 202, 20(N-1), 20N: Pins C1: Capacitor D1: output terminal D2: ground terminal G1: control terminal G2: control terminal Q1: first switch Q2: second switch R1: first resistor R2: second resistor Rp1: pull-down resistor Rp2: pull-up resistor S1: ground terminal S2: output terminal S100~S180, S105: steps Sc1: first control signal Sc2: second control signal Scp: comparison signal Vdb: debugging value VAD: analog detection power supply VAN: abnormal detection power supply VDC: digital working power supply VN: normal detection power supply VSB: standby power supply VSP: supply power supply

FIG. 1 is a module block diagram of a first embodiment of a server motherboard of the present invention. FIG. 2 is a schematic diagram of a first embodiment of a server motherboard of the present invention in FIG. 1 being electrically connected to an external device. FIG. 3A is a schematic diagram of a second embodiment of a server motherboard of the present invention in FIG. 1 being electrically connected to an external device. FIG. 3B is a schematic diagram of a sample state of a server motherboard of the present invention in FIG. 3A being electrically connected to an external device. FIG. 4 is an operation flow chart of some embodiments of the server motherboard of the present invention in FIG. 1. FIG. 5 is a circuit diagram of a first embodiment of a switch circuit of the present invention in FIG. 1. FIG. 6 is a circuit diagram of a second embodiment of a switch circuit of the present invention in FIG. 1. FIG. 7 is a module block diagram of a second embodiment of a server motherboard of the present invention. FIG8 is a circuit diagram of some embodiments of the voltage divider circuit in FIG7. FIG9 is an operation flow chart of some embodiments of the server motherboard in FIG7 after being processed in step S100 in FIG4. FIG10 is an operation flow chart of some embodiments of the server motherboard in FIG1 or FIG7 after being processed in step S150 in FIG4.

10: Server motherboard

100: Motherboard connector

110: Power circuit

120: Programmable logic circuit

121: Analog-to-digital conversion module

122: Comparison module

123: Judgment module

124: Temporary module

125: Storage module

126: Control module

130: Switching circuit

140: Baseboard management control circuit

150: Luminescent circuit

Sc1: First control signal

Scp: Comparison signal

VAD: Analog Detector Power

Vdb:debug value

VDC: Digital working power supply

VSB: Standby power

VSP: Power supply

Claims (9)

A server motherboard includes: a motherboard connector for transmitting a supply power to an external device; a power circuit for generating the supply power, a standby power and an analog detection power; a programmable logic circuit electrically connected to the power circuit, including: an analog-to-digital conversion module for converting the analog detection power into a digital working power; a comparison module for comparing the voltage value of the digital working power with a comparison threshold to generate a comparison signal; and a judgment module for generating a corresponding first control signal according to the comparison signal; and a switch circuit electrically connected to the motherboard connector, the power circuit and the programmable logic circuit, for turning on or off according to the first control signal; wherein, when the switch circuit is turned on, the motherboard connector is electrically connected to the power circuit; when the switch circuit is turned off, the motherboard connector and the power circuit are open; the switch circuit is electrically connected to the motherboard connector and the power circuit. The switch circuit includes: a pull-down resistor electrically connected to the programmable logic circuit for pulling the first control signal; a pull-up resistor, one end of which is electrically connected to the power circuit for pulling the standby power to generate a second control signal; a first switch, the control end of which is electrically connected to the programmable logic circuit, the output end of which is electrically connected to the other end of the pull-up resistor, and the ground end of which is grounded. The first switch is used to turn on or off according to the first control signal, and outputs the second control signal at the output end of the first switch; and a second switch, the control end of the second switch is electrically connected to the output end of the first switch and the other end of the pull-up resistor, the output end of the second switch is electrically connected to the power circuit, the ground end of the second switch is electrically connected to the motherboard connector, and the second switch is used to turn on or off according to the second control signal. The server motherboard as described in claim 1, wherein the power circuit comprises: a voltage divider circuit electrically connected to the programmable logic circuit for dividing the standby power into the analog detection power; and a voltage regulator electrically connected to the switch circuit for regulating the standby power into the supply power. The server motherboard as described in claim 2, wherein the voltage divider circuit comprises: a first resistor, one end of which is electrically connected to the standby power supply, and the other end of which is electrically connected to the programmable logic circuit; and a second resistor, one end of which is electrically connected to the power supply circuit and the other end of the first resistor, and the other end of which is grounded. A server motherboard as described in claim 1, wherein the switch circuit comprises: a pull-down resistor, one end of which is electrically connected to the programmable logic circuit, and the other end of which is grounded, for pulling the first control signal; and a first switch, the control end of which is electrically connected to the programmable logic circuit, the output end of which is electrically connected to the power circuit, and the ground end of which is electrically connected to the motherboard connector, and the first switch is used to turn on or off according to the first control signal. The server motherboard as described in claim 4 further includes a capacitor, one end of which is electrically connected to the power circuit and the output end of the first switch, and the other end of which is grounded. The capacitor is used to filter out noise in the power supply. The server motherboard as described in claim 1 further includes a capacitor, one end of which is electrically connected to the power circuit and the output end of the second switch, and the other end of which is grounded. The capacitor is used to filter out noise in the power supply. The server motherboard as described in claim 1, wherein the programmable logic circuit further comprises: a temporary storage module for storing a debug value corresponding to the voltage value of the first control signal; a storage module for storing the debug value; and a control module for reading the debug value from the temporary storage module and writing the debug value to the storage module. The server motherboard as described in claim 7 further includes a baseboard management control circuit electrically connected to the programmable logic circuit for reading and storing the debug value. The server motherboard as described in claim 1 further includes a light-emitting circuit electrically connected to the programmable logic circuit for emitting a corresponding indicator light according to the voltage value of the first control signal.

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