TWI834041B - Semiconductor structures and preparation methods thereof - Google Patents

Abstract

The present application provides a semiconductor structure and a preparation method thereof. The preparation method of the semiconductor structure includes: forming a buffer layer on a substrate; forming a mask layer on the buffer layer; and patterning the mask layer to partially expose the buffer layer; forming a first DBR structure on the portion of the buffer layer exposed by the mask layer; forming a light-emitting structure on the first DBR structure; and forming a second DBR structure on the light-emitting structure. In the preparation method of the semiconductor structure provided in this present application, the first DBR structure is selectively grown based on the patterned mask layer, which can improve the quality of the first DBR structure and is beneficial to the subsequent preparation of the light-emitting structure.

Description

Semiconductor structures and preparation methods

The present invention relates to the field of semiconductor technology, and in particular, to a semiconductor structure and a preparation method thereof.

As a typical representative of the third generation of semiconductor materials, wide bandgap semiconductor material Group III nitride has the excellent characteristics of large forbidden frequency band, high voltage resistance, high temperature resistance, high electron saturation speed and drift speed, and easy formation of high-quality heterostructures. It is very Suitable for manufacturing high temperature, high frequency and high power electronic devices.

GaN-based resonant cavity light-emitting devices, including resonant cavity light-emitting diodes and vertical cavity surface-emitting lasers, usually use DBR structures. For the first DBR structure of Al(Ga)N/GaN, Al(Ga)N The stress caused by mismatching the GaN lattice can cause cracks and other problems.

A first aspect of the present invention provides a method for preparing a semiconductor structure, which includes: preparing a buffer layer on a substrate; preparing a mask layer on the buffer layer; patterning the mask layer to partially expose the buffer layer; A first DBR structure is prepared on the portion of the buffer layer exposed by the mask layer; a light-emitting structure is prepared on the first DBR structure; and a second DBR structure is prepared on the light-emitting structure.

Thus, based on the patterned mask layer, a high-quality first DBR structure can be grown. In addition, the presence of the mask layer also facilitates the selective preparation of subsequent light-emitting structures on the first DBR structure.

Optionally, after patterning the mask layer to partially expose the buffer layer, and before preparing the first DBR structure on the portion of the buffer layer exposed by the mask layer, the method further includes: Etch the portion of the buffer layer exposed by the mask layer to Grooves are formed in the layer.

Thus, by continuing to etch the buffer layer, a thicker first DBR structure can be prepared, thereby increasing its reflectivity.

Optionally, after forming the groove in the buffer layer and before preparing the first DBR structure on the portion of the buffer layer exposed by the mask layer, the method further includes: Prepare a mask layer on top.

Therefore, the mask layer can form a good protection for the side walls of the groove, preventing parasitic growth on the side walls of the groove when the first DBR structure is subsequently prepared.

Optionally, the substrate includes silicon, sapphire, gallium nitride, and silicon carbide.

Optionally, the mask layer includes silicon oxide and silicon nitride.

Optionally, the buffer layer, the first DBR structure, and the light-emitting structure include Group III nitride materials, and the second DBR structure includes Group III nitride materials and dielectric materials.

A second aspect of the present invention provides a semiconductor structure, including: a substrate; a buffer layer located on the substrate; a patterned mask layer located on the buffer layer; the buffer layer is located by the mask layer a first DBR structure on the exposed portion; a light-emitting structure located above the first DBR structure; and a second DBR structure located above the light-emitting structure.

Optionally, the first DBR structure extends into the buffer layer.

Optionally, the mask layer is provided between a portion of the first DBR structure extending to the buffer layer and the buffer layer.

S1, S2, S3, S4, S5, S6: steps

100:Substrate

110: Buffer layer

111: Groove

120:Mask layer

130: First DBR structure

140: Luminous structure

141: First doping layer

142:Quantum well layer

143: Second doped layer

150: Second DBR structure

1a-1f are schematic diagrams of a semiconductor structure according to a first embodiment of the present invention.

2a-2c are schematic diagrams of a semiconductor structure according to a second embodiment of the present invention.

3a-3b are schematic diagrams of a semiconductor structure according to a third embodiment of the present invention.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the present invention. Some examples, not all examples. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

It should be noted that similar symbols and letters represent similar items in the following figures, therefore, once an item is defined in one figure, it does not require further definition or explanation in subsequent figures. Meanwhile, in the description of the present invention, the terms "first", "second", etc. are only used to differentiate the description and cannot be understood as indicating or implying relative importance. In the description of embodiments of the invention, it will be understood that when a layer (or film), region, pattern or structure is referred to as being on another substrate, another layer (or film), another region, another pad or When another pattern is "on" or "under" another pattern, it can be "directly" or "indirectly" on another substrate, layer (or film), region, pad or pattern, or one or more a middle layer. This positioning of layers has been described with reference to the drawings. The thickness and size of each layer shown in the drawings may be exaggerated, omitted, or schematically drawn for convenience or clarity. Additionally, dimensions of components do not entirely reflect actual dimensions.

A first embodiment of the present invention provides a method for manufacturing a semiconductor structure, which includes steps S1 to S6, which will be described below with reference to Figures 1a to 1e.

Step S1, as shown in FIG. 1a, a buffer layer 110 is prepared on the substrate 100.

The substrate 100 includes silicon, sapphire, gallium nitride, silicon carbide, etc. The present invention does not specifically limit the type of material of the substrate 100 . The buffer layer 110 includes a Group III nitride material, such as GaN, AlGaN, etc.

In step S2, as shown in FIG. 1b, a mask layer 120 is prepared on the buffer layer 110.

The mask layer 120 includes silicon oxide, silicon nitride, etc.

Step S3, as shown in FIG. 1c, the mask layer 120 is patterned to partially expose the buffer layer 110.

Step S4, as shown in FIG. 1d, a first DBR structure 130 is prepared on the exposed buffer layer 110. Preferably, the height of the first DBR structure 130 does not exceed the height of the mask layer 120 .

The first DBR structure 130 includes a group III nitride material, such as a periodic structure formed alternately by GaN and AlGaN.

Step S5, as shown in FIG. 1e, a light-emitting structure 140 is prepared on the first DBR structure 130. The light-emitting structure 140 includes a first doped layer 141, a quantum well layer 142, and a second doped layer 143. The first doped layer 141 of the light-emitting structure 140 may be n-type doped, for example, and the second doped layer 143 may be p-type doped, for example.

Step S6, as shown in FIG. 1f, continue to grow the second DBR structure 150 on the light-emitting structure 140.

The second DBR structure 150 includes a group III nitride material, such as a periodic structure formed alternately by GaN and AlGaN, and may also include a dielectric material, such as a periodic structure formed alternately by Ta ₂ O ₅ and SiO ₂ .

Therefore, through the above technical solution, the first DBR structure 130 is selectively grown based on the patterned mask layer 120, which can release the pressure well, thereby growing a high-quality first DBR structure. In addition, the presence of the mask layer 120 also facilitates the subsequent selective preparation of the light-emitting structure 140 on the first DBR structure 130 .

In the second embodiment of the present invention, as shown in Figure 2a, after step S3, the buffer layer 110 exposed by the mask layer 120 is partially etched to form a groove 111 in the buffer layer 110; then Figure 2b and As shown in Figure 2c, a first DBR structure 130 is prepared on the groove 111 of the buffer layer 110; a light-emitting structure 140 is prepared on the first DBR structure 130; and a second DBR structure 150 is prepared on the light-emitting structure 140. Thus, by further etching the buffer layer, a thicker first DBR structure 130 can be prepared, thereby increasing its reflectivity.

In the third embodiment of the present invention, as shown in FIGS. 3a-3b , the buffer layer 110 exposed by the mask layer 120 is partially etched to form a recess in the buffer layer 110 as described in the second embodiment. After the groove 111″ is formed, the mask layer 120 is prepared again, so that the mask layer 120 further covers the sidewalls of the groove 111, but at the same time exposes the buffer layer 110 at the bottom of the groove 111. Therefore, the mask layer 120 can form a good protection for the side walls of the groove 111, thereby preventing parasitic growth on the side walls of the groove 111 when the first DBR structure 130 is subsequently prepared.

An embodiment of the present invention also discloses a semiconductor structure. As shown in Figure 1e, the semiconductor structure includes a substrate 100, a buffer layer 110 on the substrate 100, a patterned mask layer 120 on the buffer layer 110, The first DBR structure 130 located on the portion of the buffer layer 110 exposed by the mask layer 120, the light-emitting structure 140 located on the first DBR structure 130, and the light-emitting structure 140 located on the first DBR structure 130. Second DBR structure 150 on structure 140. The light-emitting structure 140 includes a first doped layer 141, a quantum well layer 142, and a second doped layer 143. Preferably, the height of the first DBR structure 130 does not exceed the height of the mask layer 120 .

The semiconductor structure proposed in this embodiment can grow a high-quality first DBR structure 130 based on the patterned mask layer 120 . In addition, the presence of the mask layer 120 also facilitates the subsequent selective preparation of the light-emitting structure 140 on the first DBR structure 130 .

The substrate 100 includes silicon, sapphire, gallium nitride, silicon carbide, etc. The present invention does not specifically limit the type of material of the substrate 100 . The buffer layer 110 includes a Group III nitride material, such as GaN, AlGaN, etc. The first DBR structure 130 includes a group III nitride material, such as a periodic structure formed alternately by GaN and AlGaN. The second DBR structure 150 includes a group III nitride material, such as a periodic structure formed alternately by GaN and AlGaN, and may also include a dielectric material, such as a periodic structure formed alternately by Ta ₂ O ₅ and SiO ₂ .

In another embodiment of the present invention, as shown in FIG. 2c , in the semiconductor structure, the first DBR structure 130 extends into the buffer layer 110 . By further etching the buffer layer, a thicker first DBR structure 130 can be prepared, thereby increasing its reflectivity.

In another embodiment of the present invention, as shown in FIG. 3b, in the semiconductor structure, a mask is provided between the part of the first DBR structure 130 extending to the buffer layer 110 and the sidewalls of the groove 111 of the buffer layer 110. Film layer 120. The mask layer 120 can form a good protection for the side walls of the groove 111 and prevent parasitic growth on the side walls of the groove 111 when the first DBR structure is subsequently prepared.

Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

100:Substrate

110:Buffer layer

120:Mask layer

130: First DBR structure

140: Luminous structure

141: First doped layer

142:Quantum well layer

143: Second doping layer

Claims (5)

A method for preparing a semiconductor structure, characterized by comprising: preparing a buffer layer on a substrate; preparing a mask layer on the buffer layer; patterning the mask layer to partially expose the buffer layer; A first DBR structure is prepared on the portion of the buffer layer exposed by the mask layer; a light-emitting structure is prepared on the first DBR structure; and a second DBR structure is prepared on the light-emitting structure; wherein, during patterning After the mask layer partially exposes the buffer layer, and before preparing the first DBR structure on the portion of the buffer layer exposed by the mask layer, the method further includes: partially etching the buffer layer by the The exposed portion of the mask layer to form a groove in the buffer layer; wherein preparing the first DBR structure on the portion of the buffer layer exposed by the mask layer includes: The first DBR structure is prepared on the groove, so that the first DBR structure extends into the buffer layer to increase the thickness of the first DBR structure, thereby increasing its reflectivity; wherein, in the buffer layer After forming the groove in the layer and before preparing the first DBR structure on the portion of the buffer layer exposed by the mask layer, the method further includes: preparing a mask layer on the sidewall of the groove so that the The mask layer is disposed between the portion of the first DBR structure extending to the buffer layer and the buffer layer. The method for preparing a semiconductor structure according to claim 1, wherein the substrate includes silicon, sapphire, gallium nitride, and silicon carbide. The method for preparing a semiconductor structure according to claim 1, wherein the mask layer includes silicon oxide and silicon nitride. The method for preparing a semiconductor structure according to claim 1, wherein the buffer layer, the first DBR structure, and the light-emitting structure include Group III nitride materials, and the second DBR structure includes Group III nitrogen. Chemical materials, dielectric materials. A semiconductor structure, characterized by including: A substrate; a buffer layer located on the substrate; a patterned mask layer located on the buffer layer; a first DBR structure located on the portion of the buffer layer exposed by the mask layer; located on the a light-emitting structure on the first DBR structure; and a second DBR structure located on the light-emitting structure; wherein the first DBR structure extends into the buffer layer to increase the thickness of the first DBR structure , thereby increasing its reflectivity, and the mask layer is provided between the portion of the first DBR structure extending to the buffer layer and the buffer layer.

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