TWI833534B - System and method for defect inspection in wafer grinding process - Google Patents

Abstract

The invention relates to a defect detection system and method for a wafer grinding process, which sequentially illuminates the wafer to be tested through different angle light sources such as central light source and peripheral light source and takes multiple original images; and through the abnormal area extraction part from Abnormal areas are extracted from each original image to generate a flawless image and an abnormal image; a flawless image integration unit and a defective image integration unit are used to integrate multiple flawless images and multiple defective images to generate flawless layers respectively. and defective layers; finally, the flawless layer and defective layer are overlaid and integrated through the final image integration department to generate an inspection image. In this way, the present invention can remove light spots and other interfering images, fill in the vacant areas caused by the removal of light spots, completely and faithfully present the actual surface condition of the wafer, and greatly improve the detection accuracy.

Description

Defect detection system and method for wafer grinding process

The present invention relates to a wafer surface defect detection system and method, especially for the wafer backside grinding process in the semiconductor process.

In the semiconductor manufacturing process, after the processing of all components and circuits on the front side (active side) of the wafer is completed, the back side of the wafer will be ground in order to make the wafer thin. However, when foreign matter invades during the grinding process of the wafer, causing irreversible scratches and bruises on the grinding surface, or defects such as unpolished areas caused by the grinding head not fully contacting the wafer surface during grinding, the process yield will decrease. .

For further explanation, please refer to Figure 1A for common defects in the wafer grinding process. The scratch D1 shown in the picture is a regular annular pattern caused by hard objects entering between the wafer and the grinding head during the grinding process; the embossing D2 This is caused by being crushed by foreign objects during the wafer transportation or grinding process; the unpolished area D3 is the area where grinding was missed because the grinding head failed to fully contact the entire wafer.

Furthermore, existing defect detection methods use general automated optical inspection (Automated Optical Inspection, referred to as AOI) system to perform defect inspection after wafer grinding. However, since periodic grinding patterns will be formed on the wafer surface during the grinding process, this will cause strong reflection (as shown in Figure 1B) or obvious light spots (as shown in Figure 1C) when the light source illuminates the wafer surface during defect inspection. As shown), defects located in the reflective area or light spot area cannot be detected, which will lead to a significant increase in the missed detection rate of defects.

In addition, since the embossing D2 is only a slight change in the surface texture (roughness), it is difficult for the existing optical inspection system to identify these texture differences, that is, it cannot distinguish between pressure damage and periodic grinding texture, which also leads to a serious rate of missed defects.

The main purpose of the present invention is to provide a defect detection system and method for the wafer grinding process, so as to eliminate interference factors such as reflection or light spots caused by the light source irradiating the wafer surface, and to clearly identify various defects, thereby greatly improving the quality of the wafer. Surface defect detection capabilities.

In order to achieve the above purpose, the present invention provides a defect detection system for a wafer grinding process, which mainly includes a central light source, a plurality of peripheral light sources, a camera unit and a control device; the central light source is arranged above the approximate centroid position of the wafer to be tested; a plurality of peripheral light sources are provided. The light source is equidistantly arranged along the approximate circumference of the wafer to be tested or above and outside the circumference; the camera unit is suitable for capturing images of the wafer to be tested along the optical axis of the central light source; the control device is electrically connected to the central light source, A plurality of peripheral light sources and a camera unit, and is adapted to control respectively starting the central light source and the plurality of peripheral light sources, and controlling the camera unit to acquire a plurality of original images.

Among them, the control device identifies and extracts multiple original images Take at least one abnormal area to generate a plurality of flawless images and a plurality of abnormal images respectively; remove at least one spot area in the plurality of abnormal images to generate a plurality of defective images respectively; and integrate the plurality of flawless images to generate a flawless image layer; and integrating multiple defect images to generate a defect layer; and integrating the flawless layer and the defect layer to generate an inspection image.

Furthermore, in order to achieve the aforementioned objectives, in the method provided by the present invention, multiple original images can be captured under the illumination of light sources at different angles, such as a central light source and a plurality of peripheral light sources, and the control device can capture the original images from each original image. The abnormal area is extracted to generate two images: a flawless image and an abnormal image; among them, the flawless image is an image of a predetermined flawless wafer surface, while the abnormal image includes images that should not exist All image areas in a flawless wafer surface image may include defects such as scratches, embossing, and unpolished areas, and may include spot areas and reflective areas. Furthermore, the control device integrates a plurality of flawless images and a plurality of defective images to generate a flawless layer and a defective layer respectively; finally, the control device superimposes and integrates the flawless layer and the defective layer to generate a detection image.

Accordingly, the present invention adopts partitioning and time-sharing lighting, so it can avoid the same spot area and the strong surface reflection caused by grinding textures. In addition, the lighting of the central light source can fill in the spots blocked by the peripheral light sources. The central area of the wafer allows the entire wafer surface to be fully displayed and photographed. In addition, the present invention uses a configuration of a central light source and a camera unit with a beam splitter, making the entire detection system more compact and thin, and making the use of space more flexible.

Furthermore, the present invention uses high-angle light source illumination to highlight The grayscale difference caused by defects overcomes the difficulty of detecting surface defects caused by grinding lines, and can capture low-interference, high-contrast defect images to improve the detection capabilities of wafer surface defects. Moreover, the detection method provided by the present invention can remove light spots and other interfering images, and can fill in the vacancies caused by the removal of light spots, completely and faithfully presenting the actual surface condition of the wafer to be tested, and greatly improving detection accuracy. .

2: Center light source

3: Peripheral light source

4:Camera unit

5:Control device

6: Beam splitter

51:Control unit

52:Memory unit

53: Processing unit

54:GUI module

55:I/O module

56:Communication module

521:Image memory department

522: Processing parameter memory department

531:Abnormal area extraction part

532: Spot processing department

533: Flawless Image Integration Department

534:Defect image integration department

535:Final Image Integration Department

D1: Scratch

D2: Embossed

D3: Unpolished area

D4: Bright lines

La: central optical axis

Ld: Defect layer

Lp: flawless layer

PC: Spot image

Pd: defective image

Pi: abnormal image

Po: original image

Pp: flawless image

Pt: detection image

Pu: standard image

W: Wafer to be tested

Za: Abnormal area

ZC: overlapping area

Zd: defective part

ZI: detection area

ZL: light spot area

θ: included angle

Figure 1A shows common wafer surface defects during the wafer grinding process.

Figure 1B shows the strong reflection caused by the light source irradiating the wafer surface during defect inspection.

Figure 1C shows the obvious light spots formed when the light source illuminates the wafer surface during defect inspection.

Figure 2 shows a system architecture diagram of a preferred embodiment of the present invention.

FIG. 3 shows a top view of the arrangement of the light source and camera unit according to a preferred embodiment of the present invention.

Figure 4 shows a system block diagram of the control device in a preferred embodiment of the present invention.

FIG. 5 shows a schematic diagram of image detection processing according to a preferred embodiment of the present invention.

FIG. 6 shows a flow chart of image detection processing according to a preferred embodiment of the present invention.

7A and 7B show schematic diagrams of the spot area and detection area formed when irradiated by a peripheral light source according to a preferred embodiment of the present invention.

FIG. 7C shows a schematic diagram of the overlapping area of the light spot area formed when irradiated by different peripheral light sources according to a preferred embodiment of the present invention.

FIG. 8A shows a schematic diagram showing scratches when illuminated by a peripheral light source according to a preferred embodiment of the present invention.

8B shows a schematic cross-sectional view of the light reflection phenomenon caused by scratches when illuminated by a peripheral light source according to a preferred embodiment of the present invention.

Before the defect detection system and method of the wafer grinding process of the present invention are described in detail in this embodiment, please note that in the following description, similar components will be represented by the same component symbols. Furthermore, the drawings of the present invention are only for schematic illustration and are not necessarily drawn to scale, and not all details may be presented in the drawings.

The following is an example of surface defect detection in the back grinding process for wafer thinning. However, the present invention is not limited to this application. It can be used to solve problems such as missed detection or misdetection of surface defects caused by surface grinding lines. , the system and method provided by the present invention can be applied to it.

Please refer to FIG. 2 and FIG. 3 at the same time. FIG. 2 shows a system architecture diagram of a preferred embodiment of the present invention, and FIG. 3 shows a top view of the configuration of the light source and camera unit of a preferred embodiment of the present invention. As shown in the figure, the hardware architecture of this embodiment mainly includes a central light source 2, eight peripheral light sources 3, a camera unit 4 and a control device 5; among them, the central light source 2 is disposed above the spectroscope 6 and corresponds to the crystal to be tested. Above the approximate centroid of the circle W, eight peripheral light sources 3 are equidistantly arranged along the approximate circumference of the wafer W to be tested, and the central optical axis La of each peripheral light source 3 is in line with the position to be tested. The angle θ between the grinding surfaces of the wafer W is between 50 degrees and 60 degrees.

In addition, the imaging unit 4 is disposed on one side of the beam splitter 6 and can capture images of the wafer W to be measured along the optical axis of the central light source 2 . Therefore, this configuration can greatly shorten the space occupied by all light sources and the camera unit 4 in the height direction, thereby achieving a thinner installation. It should be noted that all the light sources and camera units 4 in this embodiment can be arranged under the HEPA filter in the wafer transfer equipment (EFEM), without adding additional equipment or adjusting the structure of the original semiconductor processing equipment.

Please refer to Figures 2, 4 and 5 at the same time. Figure 4 shows a system block diagram of the control device in a preferred embodiment of the present invention, and Figure 5 shows a schematic diagram of detection image processing in a preferred embodiment of the present invention. The control device 5 is electrically connected to the central light source 2, the peripheral light source 3 and the camera unit 4, and the control device 5 is adapted to control the activation of the central light source 2 and the peripheral light source 3 in a time-sharing and zoned manner, and to control the camera unit 4 to obtain multiple original images respectively. Like Po.

To further explain, the control device 5 mainly includes a control unit 51, a memory unit 52 and a processing unit 53, which can be an industrial computer, a servo host or a special machine. Of course, it also includes a GUI module 54 for user operation and connection to external devices. The I/O module 55, and the communication module 56 used to connect to the internal network or the Internet, etc.

Among them, the control unit 51 includes a light source control part 511, a camera control part 512 and a loading and unloading control part 513; the light source control part 511 is used to control the activation or shutdown of the central light source 2 and the peripheral light source 3; the camera control part 512 is It is used to control whether the camera unit 4 starts shooting; the loading and unloading control unit 513 is used to control the wafer transfer equipment. A robotic arm (not shown in the figure) inside the (EFEM) is used to transfer the wafer W to be tested.

The memory unit 52 in this embodiment mainly includes an image memory part 521 and a processing parameter memory part 522. In addition to storing the image of the wafer W to be tested captured by the camera unit 4, the image memory unit 521 also stores a standard image Pu and a spot image Pc. The standard image Pu is a perfect and defect-free wafer polishing surface. image, and the spot image Pc is the spot that appears normally when the peripheral light source 3 is illuminated on a perfect and defect-free wafer; the spot image Pc is not limited to one, and can correspond to different spot images of different peripheral light sources 3 PC to increase the accuracy of identification. The processing parameter storage unit 522 stores parameters used in image shooting or processing, such as brightness parameters, exposure parameters, contrast parameters, resolution, etc.

The processing unit 53 of this embodiment includes an abnormal area extraction part 531, a spot processing part 532, a flawless image integration part 533, a defective image integration part 534 and a final image integration part 535. The operation process of this embodiment is described in detail below. Please refer to Figure 5 and Figure 6 together. Figure 5 shows a schematic diagram of the detection image processing according to a preferred embodiment of the present invention. Figure 6 shows a detection image according to a preferred embodiment of the present invention. Image processing flow chart.

First, the light source control part 511 of the control device 5 first controls one of the peripheral light sources 3 to start, and at the same time controls the camera unit 4 to shoot and obtain an original image Po; and in this way controls all the peripheral light sources 3 to start in sequence, and finally controls the center The light source 2 is started, and the camera unit 4 takes photos sequentially to obtain a total of 9 original images Po; this is step S100 in Figure 6 .

The following further explains the detection shadow under each light source. Please refer to Figures 7A and 7B together, which show a schematic diagram of the spot area and detection area formed when irradiated by different peripheral light sources according to a preferred embodiment of the present invention; as shown in Figures 7A and 7B, when different peripheral light sources 3 are used, During irradiation, the wafer W to be tested will present a light spot area ZL and a detection area ZI at different positions.

In addition, please refer to FIG. 7C again, which is a schematic diagram showing the overlapping area of the light spot area formed when irradiated by different peripheral light sources according to a preferred embodiment of the present invention. In fact, the spot area ZL formed when irradiated by different peripheral light sources 3 will have an overlapping area ZC, which is the area near the center (centroid) of the wafer, so this area may cause misjudgment or missed determination.

For this reason, the central light source 2 can make up for this defect, because the central light source 2 irradiates the central area of the wafer W to be tested, but no light spot will be formed in the central area. Therefore, a complete image of the polished surface of the wafer W to be tested can be obtained by splicing the detection area ZI formed by the three-part and time-divided irradiation of the eight peripheral light sources with the image of the central area obtained by the central light source 2.

In addition, the central light source 2 of this embodiment adopts a collimated light source, and its light-emitting angle is about plus or minus 2 degrees, so the formation of light spots can be avoided. On the other hand, the luminous opening angle of the peripheral light source 3 in this embodiment is about plus or minus 15 degrees, which depends on the number of peripheral light sources 3 configured. If the number is greater, the smaller the luminous opening angle (that is, the higher the collimation degree) can be selected. light source, and can obtain better detection results.

Please refer to FIG. 8A and FIG. 8B at the same time. FIG. 8A shows a schematic diagram showing scratches when illuminated by a peripheral light source according to a preferred embodiment of the present invention. Figure 8B shows a schematic cross-sectional view of the light reflection phenomenon caused by scratches when illuminated by a peripheral light source according to a preferred embodiment of the present invention. As shown in the figure, since the scratches D1 destroy the original grinding texture, different light reflection paths will be formed. For the camera unit 4 directly above the wafer W to be tested, the result will be as shown in Figure 8A Obvious bright lines D4.

Moreover, under the irradiation of the peripheral light source 3 at different angles, the obvious bright pattern part D4 will also appear in different directions on the surface of the wafer W to be tested. In fact, the bright pattern part D4 is approximately diagonal to the peripheral light source 3 . Furthermore, this embodiment only uses the most obvious bright pattern part D4, that is, the bright pattern part D4 with insufficient brightness is first filtered out. However, when all bright texture parts D4 in the detection area ZI of all original images Po are integrated and spliced, a clear, obvious and complete scratch D1 can be obtained (see Figure 1A).

Next, please return to Figure 5 and Figure 6, regarding step S110; after obtaining all the original images Po, the abnormal area extraction unit 531 in the processing unit 53 of the control device 5 identifies and extracts all the original images Po. The abnormal area Za may include the spot area ZL and the defective part Zd, and 9 flawless images Pp and 9 abnormal images Pi are generated respectively. Specifically, this embodiment uses an image comparison method to identify the abnormal area Za; that is, the abnormal area extraction unit 531 compares each original image Po with the standard image Pu in the memory unit 52 one by one. After matching, all image blocks that do not exist on the standard image Pu are determined as abnormal areas Za, and they are extracted into abnormal images Pi.

On the other hand, in other embodiments of the present invention, the gray-scale brightness value identification method may also be used; that is, the abnormal area extraction unit 531 The grayscale brightness value of each pixel in each original image Po is obtained and compared with a preset range value. The preset range value is equivalent to the range value formed between the highest gray-scale brightness value and the lowest gray-scale brightness value on the standard image Pu, and of course, an allowable error value is also added. However, when the grayscale brightness value of a certain pixel in the original image Po is higher or lower than the preset range value, the abnormal area extraction unit 531 determines it as the abnormal area Za. In addition, in this embodiment, although all the original images Po are obtained and processed in batches, the present invention is not limited to this. The original images Po can also be obtained one by one and the original images Po can be processed immediately. for processing.

Furthermore, regarding step S120, the spot processing unit 532 in the processing unit 53 removes the spot area ZL in each abnormal image Pi and generates nine defective images Pd respectively. Among them, the light spot processing unit 532 compares each abnormal image Pi with the light spot image Pc in the memory unit 52, and can immediately obtain the light spot area ZL in each abnormal image Pi, and then remove the light spot area. After ZL, the defect image Pd can be generated. In other words, each defect image Pd will only present the actual defective parts Zd, such as local scratches, embossing or unpolished areas.

Next, regarding step S130, the flawless image integration unit 533 in the processing unit 53 integrates all flawless images Pp, in which the blank area formed by extracting the abnormal area Za will also be filled after integration, thereby generating a flawless image Pp. Layer Lp can faithfully represent the real image of the wafer W to be tested after removing all abnormal areas Za. In addition, the defect image integration unit 534 in the processing unit 53 integrates all defect images Pd to generate a defect layer Ld. That is to say, the defective parts Zd in each defective image Pd will be compared one by one and perfectly spliced, and will appear on the transparent background. A complete defect pattern appears, which is the defect layer Ld.

Finally, regarding step S140, the final image integration unit 535 in the processing unit 53 integrates the flawless layer Lp and the defective layer Ld to generate a detection image Pt. Among them, the defective layer Ld is a layer with a transparent background, so it is superimposed on the flawless layer Lp as the background to obtain the final inspection image Pt.

Overall, this embodiment generates a flawless image Pp and an abnormal image Pi after extracting the abnormal area Za from each original image Po taken, and then removes the causes of the abnormal image Pi. The light spot formed by the light source irradiates a defect image Pd, so the defect image Pd is a transparent layer that includes all lines or areas that should not exist on the normal wafer polishing surface. Then, all the flawless images Pp and defective images Pd are superimposed and integrated respectively to obtain a flawless layer Lp and a defective layer Ld respectively. Among them, the flawless layer Lp can be used as the background image, which is the actual image of the wafer to be tested and has removed all image elements that should not exist on the wafer surface; conversely, the defective layer Ld includes the actual image that exists on the wafer surface. A transparent image of all defective elements on a circular surface. Finally, a detection image Pt can be obtained by overlaying and integrating the defective layer Ld with the flawless layer Lp.

In summary, it can be seen that due to the interference of the wafer grinding texture, the conventional AOI system is prone to missing detection or misjudgment in detecting defects on the grinding surface. However, the present invention uses multiple light sources (including multiple peripheral light sources and a central light source) to illuminate and capture images in zones, which can not only highlight the grayscale differences caused by various defects, but also make up for the imaging defects at the center of the wafer, allowing The wafer surface is fully represented and photographed. Furthermore, it is combined with the aforementioned image processing methods to accurately identify and remove various interference factors. It completely and faithfully presents the actual surface condition of the wafer to be tested, which can greatly improve the detection accuracy. In addition, the present invention uses a configuration of a central light source and a camera unit with a beam splitter, making the entire detection system more compact and thin, and making the use of space more flexible. It can be seen from this that both the hardware configuration and the software processing are extremely creative and effective, and they undoubtedly meet the patent requirements.

The above-mentioned embodiments are only examples for convenience of explanation. The scope of rights claimed by the present invention shall be subject to the scope of the patent application and shall not be limited to the above-mentioned embodiments.

2: Center light source

3: Peripheral light source

4:Camera unit

5:Control device

6: Beam splitter

51:Control unit

52:Memory unit

53: Processing unit

54:GUI module

55:I/O module

56:Communication module

La: central optical axis

W: Wafer to be tested

θ: included angle

Claims (10)

A defect detection system for wafer grinding process, which includes: A central light source, which is arranged above the approximate centroid position of a wafer to be tested; A plurality of peripheral light sources, which are equidistantly arranged along the approximate circumference of the wafer to be tested or above and outside the circumference; a camera unit adapted to capture images of the wafer under test along the optical axis of the central light source; and A control device that is electrically connected to the central light source, the plurality of peripheral light sources and the camera unit; the control device is adapted to control the activation of the center light source and the plurality of peripheral light sources respectively, and control the camera unit to acquire a plurality of original images; Wherein, the control device is adapted to identify and extract at least one abnormal area from the plurality of original images, and generate a plurality of flawless images and a plurality of abnormal images respectively; and remove at least one spot area in the plurality of abnormal images respectively. Generate a plurality of defective images respectively; integrate the flawless images to generate a flawless layer; integrate the defective images to generate a defective layer; and integrate the flawless layer and the defective layer to generate a detection image. The defect detection system of claim 1 further includes a beam splitter, the central light source is disposed above the beam splitter, and the camera unit is disposed on one side of the beam splitter. The defect detection system of claim 1, wherein the control device further includes a memory unit storing a standard image; the control device compares the plurality of original images with the standard image, and identifies out of the at least one abnormal area. The defect detection system of claim 3, wherein the memory unit further stores at least one light spot image; the control device removes the plurality of abnormal images after comparing the plurality of abnormal images with the at least one light spot image respectively. The plurality of defect images are generated respectively based on the light spot area in the image. For example, the defect detection system of claim 1, wherein the control device obtains the gray-scale brightness value of each pixel in the plurality of original images and compares it with a preset range value; when the gray-scale brightness value exceeds the preset range value, When the range value is set, the control device determines the at least one abnormal area. The defect detection system of claim 1, wherein the angle between the central optical axis of the plurality of peripheral light sources and the wafer to be tested is between 50 degrees and 60 degrees. A defect detection method in a wafer grinding process, which includes the following steps: (A) A control device controls the sequential activation of multiple peripheral light sources and a central light source, and controls a camera unit to acquire multiple original images; (B) The control device identifies and extracts at least one abnormal area from the plurality of original images, and generates a plurality of flawless images and a plurality of abnormal images respectively; (C) The control device removes one spot area of the plurality of abnormal images and generates a plurality of defective images respectively; (D) The control device integrates the plurality of flawless images to generate a flawless layer; the control device integrates the plurality of defective images to generate a defective layer; and (E) The control device integrates the flawless layer and the defective layer to generate an inspection image. The defect detection method of claim 7, wherein the control device further includes a memory unit storing a standard image; in step (B), the control device separates the plurality of original images and the standard image. After comparing the images, the at least one abnormal area is identified. The defect detection method of claim 8, wherein the memory unit further stores at least one spot image; in step (C), the control device compares the plurality of abnormal images with the spot image respectively. , remove the light spot areas in the plurality of abnormal images and generate the plurality of defect images respectively. The defect detection method of claim 7, wherein, in step (B), the control device obtains the gray-scale brightness value of each pixel in the plurality of original images; when the gray-scale brightness value exceeds a preset value When the range value is reached, the control device determines that the at least one abnormal area is.