TWI825425B - Method of correcting a lithographic process - Google Patents

Abstract

A method of correcting a lithographic process is provided in some embodiments in the present disclosure, including: providing a first wafer; performing a first pre-exposure compensation by compensating a first compensation value; performing a first exposure treatment on a first shot area by using a first photomask; performing a second pre-exposure compensation by compensating a second compensation value; and performing a second exposure treatment on a second shot area by using a second photomask.

Description

Methods for calibrating lithography processes

The present disclosure relates to methods of calibrating lithography processes. Specifically, this disclosure relates to correction between different exposure fields in the same wafer.

The lithography process involves a number of complex physical and chemical treatments. During the process, the alignment of the wafer and the photomask, the selection of photoresist, and exposure conditions may cause pattern errors. Therefore, in the conventional manufacturing process, compensation (for example, correcting the offset of the wafer position) is performed between different batches of wafers or when different wafers are converted to correct finished product errors.

However, even on the same wafer, the patterns to be formed at different locations may be different, and if the exposure area of the wafer exposed to light during each exposure is defined as an exposure area (shot area), then the wafer contains multiple The exposure area must undergo multiple exposures and displacements to complete the exposure of a single wafer. In a conventional manufacturing process, all exposure areas on the same wafer are exposed using the same compensation value.

As the requirements for semiconductor components become increasingly sophisticated and complex, how to reduce wafer pattern errors and provide methods that can reduce wafer pattern errors are urgent issues to be solved.

Some embodiments of the present disclosure provide a method for calibrating a lithography process, including the following steps: providing a first wafer, the first wafer having a plurality of exposure areas, and the exposure areas include a first exposure area and a second exposure area. , wherein the first exposure area and the second exposure area may overlap, partially overlap, or not overlap at all; provide a plurality of photomasks, these photomasks include a first photomask and a second photomask, and the first photomask includes a first photomask pattern and a first mask alignment mark located around the first mask pattern, the second mask including a second mask pattern and a second mask alignment mark located around the second mask pattern; with the first compensation amount Performing a first pre-exposure compensation; using the first mask, performing a first exposure process on the first exposure area to form a first pattern corresponding to the first mask pattern, wherein the first pattern has a pattern corresponding to the first mask pattern a first alignment mark of the alignment mark; performing a second pre-exposure compensation with a second compensation amount; and using a second mask, performing a second exposure process on the second exposure area to form a pattern corresponding to the second mask A second pattern, wherein the second pattern has second alignment marks corresponding to the second reticle alignment marks.

In some implementation methods, the first pre-exposure compensation includes adjusting the relative position of the first exposure area and the first mask, the exposure parameters in the first exposure process, or a combination thereof, and the second pre-exposure compensation includes adjusting the second exposure area. The relative position to the second mask, the exposure parameters in the second exposure process, or a combination thereof.

In some implementation methods, before performing the first pre-exposure compensation step, the method further includes: performing a first exposure preliminary test with the first mask, and obtaining the actual first exposure of the first mask on the first wafer. position; and compare the actual first exposure position of the first mask with the theoretical first exposure position to obtain the first mask exposure position error amount, wherein in the step of performing the first pre-exposure compensation with the first compensation amount, The first compensation amount includes calculation based on the first mask exposure position error amount.

In some implementation methods, the first mask exposure position error is determined by comparing the first mask alignment mark located in the actual first exposure position with the first mask alignment mark located in the theoretical first exposure position. Derived from differences in the exposure positions of the marks.

In some implementation methods, the first mask exposure position error is determined by comparing the first mask projection profile located in the actual first exposure position with the first mask projection profile located in the theoretical first exposure position. Derived from differences in exposure position.

In some implementation methods, before performing the first pre-exposure compensation step, the method further includes: performing a first initial exposure test using the first photomask; performing a first preliminary development test using the first photomask. Obtain the actual first pattern transferred by the first photomask on the circle; and compare the pattern appearance deformation or pattern deviation of the actual first pattern and the theoretical first pattern to obtain the first development error amount, wherein, with the first In the step of performing the first pre-exposure compensation, the first compensation amount is calculated based on the first development error amount.

In some implementation methods, before performing the first pre-exposure compensation step, the method further includes: performing a first preliminary development test with the first photomask, and obtaining the actual image transferred by the first photomask on the first wafer. the first pattern; and comparing the pattern appearance deformation or pattern shift of the actual first pattern and the theoretical first pattern to obtain the first development error amount, wherein in the step of performing the first pre-exposure compensation with the first compensation amount, The first compensation amount includes calculation based on the first development error amount.

In some implementation methods, before performing the second pre-exposure compensation step, the method further includes: performing a second exposure preliminary test with the second mask, and obtaining the actual second exposure of the second mask on the first wafer. position; and comparing the actual second exposure position of the second mask with the theoretical second exposure position to obtain the second mask exposure position error amount, wherein in the step of performing second pre-exposure compensation with the second compensation amount, The second compensation amount includes calculation based on the second mask exposure position error amount.

In some implementation methods, the second mask exposure position error is determined by comparing the second mask alignment marks located in the actual second exposure position and the second mask pair located in the theoretical second exposure position. It is derived from the difference in the exposure position of the accurate mark.

In some implementation methods, the second mask exposure position error is determined by comparing the second mask projection profile located in the actual second exposure position with the second mask projection profile located in the theoretical second exposure position. Derived from differences in exposure position.

In some implementation methods, before performing the second pre-exposure compensation step, the method further includes: performing a second initial exposure test using a second photomask; performing a second preliminary development test using the second photomask, and after the first crystal Obtain the actual second pattern transferred by the second photomask on the circle; and compare the pattern appearance deformation or pattern deviation of the actual second pattern and the theoretical second pattern to obtain the second development error amount, wherein, with the second In the step of performing the second pre-exposure compensation by the compensation amount, the second compensation amount further includes a calculation based on the second development error amount.

In some implementation methods, before performing the second pre-exposure compensation step, the method further includes: performing a second preliminary development test with the second photomask, and obtaining the actual image transferred by the second photomask on the first wafer. the second pattern; and comparing the pattern appearance deformation or pattern deviation of the actual second pattern and the theoretical second pattern to obtain the second development error amount, wherein in the step of performing the second pre-exposure compensation with the second compensation amount, The second compensation amount includes calculation based on the second development error amount.

In some implementation methods, the error phenomena to be corrected by the first pre-exposure compensation and the second pre-exposure compensation include: translation, rotation, orthogonal, enlargement, reduction, or a combination of the foregoing.

In some implementation methods, after performing the first exposure process, the second exposure process, or both, the method further includes performing chemical treatment or physical treatment on the first wafer.

In some implementation methods, after using the second photomask to perform the second exposure process on the second exposure area, it further includes: providing a second wafer that is the same as the first wafer; The first compensation amount performs a first pre-exposure compensation of the second wafer, wherein the first compensation amount of the second wafer is based on performing a first exposure preliminary test of the second wafer on the second wafer, Obtained from the first initial development test or a combination thereof; performing the second pre-exposure compensation of the second wafer with the second compensation amount of the second wafer, wherein the second compensation amount of the second wafer is based on the second wafer Obtained by performing a second initial exposure test of the second wafer, a second initial development test of the second wafer, or a combination thereof; providing a third wafer that is the same as the first wafer; using the first compensation of the third wafer performing the first pre-exposure compensation of the third wafer, wherein the first compensation amount of the third wafer is obtained by averaging the first compensation amount of the first wafer and the first compensation amount of the second wafer; and The second compensation amount of the third wafer performs the second pre-exposure compensation of the third wafer, wherein the second compensation amount of the third wafer is determined by the second compensation amount of the first wafer and the second compensation amount of the second wafer. The amount of compensation is averaged.

In some implementations, the first wafer, the second wafer, and the third wafer are from the same batch of wafers.

In some implementations, the first wafer, the second wafer, and the third wafer are from different batches of wafers.

It is to be understood that both the foregoing general description and the following detailed description are examples and are intended to provide further explanation of the present disclosure as claimed.

It will be appreciated that the following description provides different implementations or examples for implementing different features of the subject matter of the present disclosure. The specific examples of components and arrangements are provided to simplify the disclosure but not to limit the disclosure. Of course, these are merely examples and are not intended to be limiting. For example, the following statement that a first feature is formed on a second feature includes direct contact between the two, or other additional features between the two rather than direct contact. Furthermore, reference numerals and/or symbols may be repeated in multiple embodiments of the present disclosure. Such repetition is for simplicity and clarity and does not necessarily represent a relationship between the various embodiments and/or configurations discussed.

The terms used in this specification generally have their ordinary meanings in the art and the context in which they are used. The embodiments used in this specification, including examples of any terms discussed herein, are illustrative only and do not limit the scope and meaning of the disclosure or any illustrative terms. Likewise, this disclosure is not limited to some of the implementations provided in this specification.

It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. For example, a first element could be termed a second element, and similarly, a second element could be termed a first element, without departing from the scope of the present embodiment.

As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

As used herein, the terms "includes," "includes," "has," etc. are to be understood as open-ended, i.e., meaning including but not limited to.

In the conventional lithography process, the wafer undergoes multiple processes (such as wafer exposure, patterning, etching, other physical (such as high-temperature thermal processes) or chemical treatments (such as oxidation processes)), photomasks, and wafer transfer. steps to produce a finished wafer. Error factors in each process such as exposure error and development error often cause error phenomena in the wafer pattern (such as translation, rotation, orthogonality (that is, when the orthogonality between the layer and the previous layer) Error), amplification, reduction and other phenomena), reducing the process yield.

Some embodiments of the present disclosure provide methods for calibrating the lithography process that can reduce wafer finished product errors and improve process yield. See picture 1.

Figure 1 schematically depicts a method 100 for calibrating a lithography process in some embodiments according to the present disclosure, including operations S110 to S160, respectively: operation S110, providing a wafer, including a first exposure area and a Two exposure areas; operation S120, provide a plurality of masks; operation S130, perform first pre-exposure compensation with a first compensation amount; operation S140, perform a first exposure process on the first exposure area; operation S150, use a second compensation amount Perform a second pre-exposure compensation; and operate S160 to perform a second exposure process on the second exposure area.

Generally speaking, a wafer is usually divided into multiple exposure areas according to the area illuminated by light during exposure. After multiple exposures, the entire wafer can be exposed. Usually in a wafer, different exposure areas may have different compensation values depending on error factors such as alignment. However, in the conventional exposure method, compensation is performed when switching between different batches of wafers or wafers. Therefore, the same compensation value is applied to all exposed areas on the wafer.

Different from the conventional pre-exposure compensation that is performed on batches of wafers or between wafers, some embodiments of the present disclosure reduce the frequency unit of performing compensation correction to different exposures within a single wafer, that is, Before each exposure in the same wafer, pre-exposure compensation is performed to increase the frequency of error correction and reduce the error of the wafer pattern.

Please continue to picture 1. First, operation S110 is performed to provide a wafer. The wafer has a plurality of exposure areas respectively corresponding to a plurality of mask projections, and the exposure areas may overlap, partially overlap, or not overlap at all. In some embodiments, the wafer has full-area alignment marks that can be used for alignment between the mask and the wafer. In one embodiment, the full-area alignment mark can be one to a plurality of strip structures (such as grooves or bumps), rectangular structures, any other shapes, or combinations thereof on the wafer.

Next, operation S120 is performed to provide a plurality of photomasks. There are individual mask patterns in individual masks. In some embodiments, the peripheral position of the mask has mask alignment marks. In some embodiments, the shape of the mask alignment mark can be one to a plurality of strip structures, rectangular structures, any other shapes, or a combination thereof, and corresponding alignment marks can be formed in the subsequently formed pattern.

Next, operation S130 is performed to perform a first pre-exposure compensation with a first compensation amount for the subsequent first exposure process that will be performed on the first exposure area using the first mask to correct the first mask and the first exposure. area alignment or to pre-compensate for errors that may occur in subsequent steps. For example, the relative position of the first exposure area and the first mask can be adjusted or the exposure parameters of the exposure machine can be adjusted.

In order to improve the accuracy of pre-exposure compensation, in some embodiments, before officially using the first mask and performing the first exposure process on the first exposure area, the mask can be detected through a first exposure preliminary test. The exposure position error amount is used to calculate the first compensation amount before the first exposure, so as to eliminate exposure errors such as mask alignment and projection deformation. Specifically, see Figure 2A.

Figure 2A is a schematic diagram of a first exposure preliminary test according to some embodiments of the present disclosure. In Figure 2A, the coordinate axis in any direction on the surface of the wafer 200 is set as the Y axis, and the direction perpendicular to the Y axis on the wafer surface is set as the X axis, and Z is defined corresponding to the X axis and the Y axis. axis (ie, the Z-axis is perpendicular to the X-axis and Y-axis, and perpendicularly penetrates the wafer 200).

The wafer 200 includes a first exposure area 210 , and the first mask 300 includes a first mask pattern 310 , wherein the first mask pattern 310 is exposed in the first exposure area 210 of the wafer 200 . In some embodiments, the wafer 200 includes full-area alignment marks 212 for alignment between the first photomask 300 and the wafer 200 . In some embodiments, the peripheral position of the first mask includes the first mask alignment mark 312, such as one to a plurality of strip structures, rectangular structures, any other shapes, or combinations thereof.

In the first exposure preliminary test, according to the actual first exposure position 400 of the first mask pattern 310 exposed on the wafer 200 and the expected position of the first mask pattern 310 exposed on the first exposure area 210 of the wafer 200 The theoretical first exposure position 400(T) is used to calculate the first mask exposure position error E1. In some embodiments, the first mask exposure position error E1 can be determined by comparing the actual alignment mark 410 in the actual first exposure position 400 of the first mask 300 with the theoretical first exposure position 400(T). The difference in the exposure position of the theoretical alignment mark 410 (T) is obtained. In other embodiments, the first mask exposure position error E1 can also be directly compared with the exposure of the projection profile of the first mask 300 between the actual first exposure position 400 and the theoretical first exposure position 400 (T). Due to location differences. In one embodiment, the actual first exposure position 400 and the theoretical first exposure position 400(T) can be presented as X-axis coordinates and Y-axis coordinates, for example, point A1 in the theoretical first exposure position 400(T) (X-axis coordinate x ₁ , Y-axis coordinate y ₁ ) is described as (16,12), and the corresponding point A2 (X-axis coordinate x ₂ , Y-axis coordinate y ₂ ) in the actual first exposure position 400 is described as ( 14,10), by analyzing the changes in the X-axis coordinate and Y-axis coordinate of a single point or multiple points and through mathematical models, the error phenomenon associated with the first mask exposure position error E1 is summarized (for example, in Figure 2A translation error, that is, the error of moving in a plane direction), and based on this, the first compensation amount of the first pre-exposure compensation is obtained by backcalculation.

In addition to considering the possible errors caused by the exposure step, the first compensation amount of the first pre-exposure compensation can also be further performed after the first initial exposure test to further obtain the development step. The first development error amount is included in the first compensation amount that will be considered for the first pre-exposure compensation. This is used to correct development errors in the development step caused by factors such as physical or chemical processing conditions, pattern shape, pattern complexity, and the relative position of the pattern on the wafer. Specifically, see Figure 2B.

Figure 2B is a schematic cross-sectional view of a first initial development test in accordance with some embodiments of the present disclosure. In this embodiment, the first initial development test follows the correction of the first mask exposure error amount E1 in Figure 2A. That is, after the first exposure test (please refer to Figure 2A), the actual first exposure position 400 of the first mask 300 is corrected to the theoretical exposure through pre-exposure compensation based on the first exposure position error amount E1 Position 400 (T) is within the allowable error range; then, perform a first initial development test to further compare the actual first pattern 500 and the theoretical first pattern 500 (T) in which the first mask pattern 310 is transferred and developed on the wafer 200 ) between the first development error amount P1. However, the execution of the first initial development test is not limited to correcting the first mask exposure position error E1. In some embodiments, the first mask exposure position error E1 may not be corrected, and the first initial development test may be directly performed to obtain the first development error.

In some embodiments, the first development error amount P1 can be determined by comparing the alignment marks on the actual first pattern 500 and the theoretical first pattern 500(T) (the alignment marks on the theoretical first pattern 500(T), That is, it is derived from the coordinate position difference of the first mask alignment mark 312 developed at the same position (T) of the theoretical alignment mark 410 (T) on the first exposure area 210 in Figure 2A. In other embodiments, the first development error amount P1 can be compared with the pattern appearance deformation (such as corner rounding, sharpening or Graphic defects, etc.) or pattern offset (such as pattern translation, rotation, orthogonal, enlargement, reduction, etc.) differences.

According to the first mask exposure error amount E1 obtained from the first initial exposure test and the first development error amount P1 obtained from the first initial development test, the first compensation amount for the first pre-exposure compensation can be calculated to correct the exposure. steps and errors in the development step. Those skilled in the art can also choose to base solely on the first mask exposure error E1 obtained in the first initial exposure test based on the actual error situation, or based on the uncorrected first mask exposure in the first initial development test. The error amount E1, that is, the obtained first development error amount, calculates the first compensation amount of the first pre-exposure compensation.

It should be understood that according to some implementations of the first compensation amount of the first pre-exposure compensation in the present disclosure, those skilled in the art can also combine or change conventional technical means (such as comparing the first exposure position or the first compensation amount). (displacement or deformation of specific other positions in a pattern), the exposure error amount and the development error amount are also obtained, and the first compensation amount as the first pre-exposure compensation is used to correct the exposure and development errors in the subsequent process.

In addition, those skilled in the art can also obtain the error amount that may be caused by other processing steps in the lithography process (such as the subsequent etching process) based on some embodiments of the present disclosure, combined with other conventional technical means, and comprehensively combine the foregoing The exposure error and the development error are jointly converted into the first compensation amount in the first pre-exposure compensation in operation S130 in Figure 1. In addition to correcting the alignment of the first mask and the first exposure area, the photolithography is also pre-corrected. Errors caused by subsequent processing steps in the manufacturing process.

Please refer back to FIG. 1. After performing the first pre-exposure compensation with the first compensation amount in operation S130, operation S140 is then performed to perform the first exposure process. Using the first mask, a first exposure process is performed on the first exposure area to form a first pattern corresponding to the first mask pattern.

Through the first pre-exposure compensation in operation S120, the error probability of the first pattern formed through operation S140 (such as the first mask exposure error amount E1 in Figure 2A or the first development error amount P1 in Figure 2B ).

Next, operation S150 is performed to perform a second pre-exposure compensation with a second compensation amount for the second exposure process that will be subsequently performed on the second exposure area using the second mask. The second compensation amount of the second pre-exposure compensation is basically similar to the principle of evaluating the first compensation amount of the first pre-exposure compensation in operation S130. Specifically, see Figure 3A and Figure 3B.

Figure 3A is a schematic diagram of a second exposure preliminary test in some embodiments according to the present disclosure. Compared with Figure 2A, the area to be exposed on the wafer 200 in Figure 3A is the first exposure area 210 corresponding to the first mask 300 in Figure 2A, which is translated along the direction D and transferred to the second light. The second exposure area 220 corresponding to the mask 600.

In the second exposure preliminary test, according to the actual second exposure position 700 of the second mask 600 exposed on the wafer 200, and the theoretical second exposure position 700 (T) of the second mask 600 expected to be exposed on the wafer 200 , calculate the second mask exposure position error E2. In some embodiments, the second mask exposure position error amount E2 can be obtained by a comparison position analysis similar to the first mask exposure position error amount E1 , for example, by comparing the actual alignment mark 710 of the second mask 600 And the theoretical alignment mark 710(T), or the difference in exposure position of the projected profile between the actual second exposure position 700 and the theoretical second exposure position 700(T). In one embodiment, the actual second exposure position 700 and the theoretical second exposure position 700(T) can be presented as X-axis coordinates and Y-axis coordinates, for example, point B1 in the theoretical second exposure position 700(T) (X-axis coordinate x ₃ , Y-axis coordinate y ₃ ) is described as (16,8), and the corresponding point B2 (X-axis coordinate x ₄ , Y-axis coordinate y ₄ ) in the actual second exposure position 700 is described as ( 14, 6), the error phenomenon to which the second mask exposure position error E2 belongs is also summarized (such as the translation error in Figure 3A), and based on this, the second compensation amount for the second pre-exposure compensation is obtained by backcalculation.

In other embodiments, after the second exposure initial test is used to compensate for the second exposure position error, a second initial development test is further performed, similar to that shown in Figure 2B, to obtain the second development error amount of the development step, to be included in the second compensation amount that will be considered for the second pre-exposure compensation. This is used to correct development errors. Specifically, see Figure 3B.

Figure 3B is a schematic cross-sectional view of a second initial development test in accordance with some embodiments of the present disclosure. In this embodiment, after correcting the second mask exposure error amount E2 in Figure 3A, following the second initial development test, the second development error amount P2 is obtained and corrected. As described in Figure 2B above, in other embodiments, the execution of the second initial development test is not limited to correcting the second mask exposure position error E2, that is, the second mask exposure position does not need to be corrected. For the error amount E2, perform the second initial development test directly to obtain the second development error amount.

The second development error amount P2 can be determined by comparing the alignment marks on the actual second pattern 800 and the theoretical second pattern 800(T) (the alignment marks on the theoretical second pattern 800(T) are the alignment marks in Figure 3A The second mask alignment mark 612 is developed at the coordinate position difference of the theoretical alignment mark 710 (the same position of T) in the second exposure area 220, or through a scanning electron microscope, comparing the actual second pattern 800 with The theoretical second pattern 800(T) is derived from differences in pattern appearance deformation (such as corner rounding, sharpening, or graphic defects, etc.) or pattern offset (such as pattern translation, rotation, orthogonal, enlargement, reduction, etc.).

According to the second mask exposure error amount E2 obtained from the second initial exposure test and the second development error amount P2 obtained from the second initial development test, the second compensation amount before the second exposure can be calculated to correct the exposure step. and errors in the development step. Those skilled in the art can also choose to base solely on the second mask exposure error E2 obtained in the second initial exposure test based on the actual error situation, or the second mask exposure error is not corrected in the second initial development test. The amount E2, that is, the obtained second development error amount, is used to calculate the second compensation amount of the second pre-exposure compensation.

Please return to Figure 1. After the second pre-exposure compensation in operation S150, operation S160 is performed to use the second mask to perform a second exposure process on the second exposure area to form a pattern corresponding to the second mask. The second pattern of the pattern.

Through the second pre-exposure compensation in operation S140, the error probability of the second pattern formed through operation S160 can be reduced (for example, the second mask exposure error amount E2 in Figure 3A or the second development error P2 in Figure 3B) .

It is worth emphasizing that in some embodiments of the present disclosure, exposure compensation is performed between exposure field transfers to pre-correct possible errors in subsequent steps (such as exposure errors or development errors), which can further reduce differences in the same wafer. Positional pattern errors improve the yield of finished wafers.

In some implementations, according to the number of exposure fields in the wafer, after performing the second exposure process, refer to the calculation method and principle of the second compensation amount of the second pre-exposure compensation in operation S150, and repeat the steps for each subsequent exposure field. The corresponding compensation amount performs another pre-exposure compensation and another exposure process to reduce the error between the actual pattern formed at each exposure site in the wafer and the theoretical pattern. The subsequent compensation amount corresponding to each exposure field can be based on the exposure corresponding to each exposure field. It is obtained from the initial test, the initial test of development, the initial test of other photolithography steps, or a combination thereof.

Considering that performing pre-exposure compensation before the exposure processing of each exposure field will increase the overall execution time and reduce the process speed, in other implementations, pre-exposure compensation can only be performed for a specific exposure field, and there is no need to target the wafer. All exposure fields perform pre-exposure compensation. That is, through preliminary testing of each step, after analyzing the errors of each exposure field in the wafer after the photolithography process, specific multiple exposure fields with larger errors can be selectively selected to perform pre-exposure compensation, in order to In addition to reducing errors, the process speed is also taken into consideration.

It is worth emphasizing that the same (i.e., the same material, size and shape, and having the same exposure area and alignment) can be obtained through the same or similar preliminary tests as mentioned above (such as exposure preliminary tests, development preliminary tests or combinations thereof). Marks (such as full-area alignment marks)), by analyzing the statistical data of the compensation amount of each exposure field in these wafers, the compensation of these wafers The average quantity is applied to subsequent wafers. Through the application of statistical data, errors between wafers and batches can be reduced, and the time for subsequent wafers to be used for initial testing to obtain compensation values can be saved, and production efficiency can be improved.

For example, the average of the compensation amount of the first exposure field of the first wafer (such as the aforementioned wafer 200) and the compensation amount of the first exposure field of the second wafer can be calculated, and the average value is used for the subsequent Among the three wafers, the compensation amount is used as the first exposure field of the third wafer. In some embodiments, the first wafer, the second wafer, and the third wafer are wafers in the same batch. In some embodiments, the first wafer, the second wafer, and the third wafer are wafers in different batches, that is, the average compensation amount of each exposure field in different batches of wafers can be calculated, and the application It is the compensation amount for each exposure field in subsequent batches of wafers. In some embodiments, the average compensation amount of each exposure field in different batches of wafers can be counted, for example, 2 to n can be counted (n is a positive integer greater than 3, such as 3, 4, 5, 6, 7, 8, 9, 10 or above) The average compensation amount of each exposure field in a batch of wafers shall be applied as the compensation amount of each exposure field in the next batch of wafers. In some embodiments, the compensation amount of each exposure field in a specific batch of wafers is obtained by averaging the compensation amounts of each exposure field in 2 to n batches of wafers before the specific wafer.

In some implementations, for example, see FIG. 1 , after performing the first exposure process of operation S130 , after the second exposure process of operation S150 , or after the first or second exposure process, it is possible to flexibly depend on the needs. The wafer undergoes various chemical processes (such as developing (treating the wafer with a developer to develop a pattern), etching (using an etchant to form desired features on the wafer)) or physical processing (high-temperature baking (for example) It can remove residual solvent after chemical treatment or improve the adhesion of the pattern to the wafer due to heating and dehydration)).

Some embodiments of the present disclosure provide methods for calibrating the lithography process. Aiming at possible errors in the lithography process at different exposure fields, pre-exposure compensation is performed before exposure, optimizing the process parameters of each exposure field, and reducing wafer finished product. The errors that may occur at different positions improve the yield of wafer finished products. In addition, in some embodiments, the average compensation amount of multiple wafers can be applied to subsequent wafers, through the application of statistical data, to reduce inter-wafer and inter-batch errors, and save subsequent wafers for initial testing. In order to obtain the time of compensation value, improve production efficiency.

Although this disclosure has been described in detail with respect to certain implementations, other implementations are possible. Accordingly, the spirit and scope of the appended claims should not be limited to the embodiments described herein.

100: Method 200: Wafer 210: First exposure area 212: Full area alignment mark 220: Second exposure area 300: First mask 310: First mask pattern 312: First mask alignment mark 400: Actual first exposure position 400 (T): theoretical first exposure position 410, 710: actual alignment mark 410 (T), 710 (T): theoretical alignment mark 500: actual first pattern 500 (T): theoretical first pattern A pattern 600: a second mask 610: a second mask pattern 612: a second mask alignment mark 700: an actual second exposure position 700 (T): a theoretical second exposure position 800: an actual second pattern 800 (T ): Theoretical second pattern S110, S120, S130, S140, S150, S160: Operations A1, A2, B1, B2: Point D: Direction E1: First mask exposure error amount E2: Second mask exposure error amount P1 : First development error amount P2: Second development error amount X: X-axis _x1 , _x2 , _x3 , _x4 : X-axis coordinate Y: Y-axis _y1 , _y2 , _y3 , _y4 : Y-axis Coordinate Z: Z axis

The present disclosure may be more completely understood by reading the following detailed description of the embodiments with reference to the accompanying drawings. Figure 1 schematically depicts a flow of a method of forming a wafer pattern in some embodiments according to the present disclosure; Figure 2A illustrates a schematic diagram of a first exposure preliminary test in some embodiments according to the present disclosure; Figure 2B illustrates a schematic cross-sectional view of a first initial development test in some embodiments according to the present disclosure; Figure 3A illustrates a schematic diagram of a second exposure preliminary test in some embodiments according to the present disclosure; and Figure 3B illustrates a schematic cross-sectional view of a second initial development test in some embodiments of the present disclosure.

100:Method

S110, S120, S130, S140, S150, S160: Operation

Claims (14)

A method for calibrating a photolithography process includes the following steps: providing a first wafer, the first wafer having a plurality of exposure areas, the exposure areas including a first exposure area and a second exposure area, wherein the first exposure area The exposure area and the second exposure area may overlap, partially overlap, or not overlap at all; a plurality of photomasks are provided, and the photomasks include a first photomask and a second photomask, and the first photomask includes a first photomask. The mask pattern and a first mask alignment mark located around the first mask pattern, the second mask including a second mask pattern and a second mask alignment located around the second mask pattern Mark; perform a first initial development test with the first mask, and obtain an actual first pattern transferred by the first mask on the first wafer; compare the actual first pattern with a theoretical first pattern The pattern appearance deformation or pattern shift of a pattern is used to obtain a first development error amount; a first pre-exposure compensation is performed with a first compensation amount, wherein the first compensation amount includes an amount based on the first development error amount. Calculated; using the first mask, perform a first exposure process on the first exposure area to form a first pattern corresponding to the first mask pattern, wherein the first pattern has a pattern corresponding to the a first alignment mark of the first mask alignment mark; perform a second pre-exposure compensation with a second compensation amount; use the second mask to perform a second exposure process on the second exposure area, To form a second pattern corresponding to the second mask pattern, wherein the second pattern has a second alignment mark corresponding to the second mask alignment mark No.; provide a second wafer that is the same as the first wafer; perform a first pre-exposure compensation of the second wafer with a first compensation amount of the second wafer, wherein the first compensation of the second wafer The compensation amount is obtained based on performing a first exposure test of the second wafer, a first development test of the second wafer, or a combination thereof on the second wafer; using a second compensation of the second wafer Performing a second pre-exposure compensation amount of a second wafer, wherein the second compensation amount of the second wafer is based on performing a second pre-exposure test of the second wafer, a second wafer Obtained from the second initial development test of the wafer or a combination thereof; providing a third wafer that is the same as the first wafer; performing the first exposure of the third wafer with the first compensation amount of the third wafer Compensation, wherein the first compensation amount of the third wafer is obtained by averaging the first compensation amount of the first wafer and the first compensation amount of the second wafer; and The second compensation amount performs a second pre-exposure compensation of a third wafer, wherein the second compensation amount of the third wafer is composed of the second compensation amount of the first wafer and the second compensation amount of the second wafer. The quantity is average. The method of claim 1, wherein the first pre-exposure compensation includes adjusting the relative position of the first exposure area and the first mask, the exposure parameters in the first exposure process or a combination thereof, and the second Pre-exposure compensation includes adjusting the second exposure area and the second mask the relative position, the exposure parameters in the second exposure process, or a combination thereof. The method of claim 1, wherein before performing the first pre-exposure compensation step, the method further includes: performing a first exposure preliminary test with the first mask to obtain a first exposure test on the first wafer. the actual first exposure position; and comparing the actual first exposure position with a theoretical first exposure position to obtain a first mask exposure position error amount, wherein the first exposure pre-exposure is performed with the first compensation amount In the step of compensating, the first compensation amount includes calculation based on the exposure position error of the first mask. The method of claim 3, wherein the first mask exposure position error is determined by comparing the first mask alignment mark located in the actual first exposure position with the first mask alignment mark located in the theoretical first exposure position. It is derived from the difference in the exposure position of the first mask alignment mark. The method of claim 3, wherein the first mask exposure position error is determined by comparing a first mask projection profile located in the actual first exposure position with a first mask projection profile located in the theoretical first exposure position. It is obtained from the difference in the exposure position of the first mask projection profile. The method as described in request item 1, wherein after executing the second Before the pre-exposure compensation step, the method further includes: performing a second exposure preliminary test with the second mask, obtaining an actual second exposure position of the second mask on the first wafer; and comparing The actual second exposure position of the second mask and a theoretical second exposure position are used to obtain a second mask exposure position error amount, wherein the step of performing the second pre-exposure compensation with the second compensation amount , the second compensation amount includes calculation based on the second mask exposure position error amount. The method of claim 6, wherein the second mask exposure position error is determined by comparing the second mask alignment mark located in the actual second exposure position and the second mask alignment mark located in the theoretical second exposure position. The difference in the exposure position of the second mask alignment mark in the position is obtained. The method of claim 6, wherein the second mask exposure position error is determined by comparing a second mask projection profile located in the actual second exposure position with a second mask projection profile located in the theoretical second exposure position. It is obtained by the difference in the exposure position of the second mask projection profile. The method of claim 1, wherein before the step of performing the second pre-exposure compensation, the method further includes: performing a second exposure preliminary test with the second mask; performing a second exposure test with the second mask A second development preliminary test is performed to obtain an actual second pattern transferred by the second photomask on the first wafer; and Comparing the pattern appearance deformation or pattern deviation of the actual second pattern with a theoretical second pattern to obtain a second development error amount, wherein in the step of performing the second pre-exposure compensation with the second compensation amount , the second compensation amount further includes calculated based on the second development error amount. The method of claim 1, wherein before performing the second pre-exposure compensation step, the method further includes: performing a second preliminary development test with the second photomask, obtaining on the first wafer. An actual second pattern transferred by the second photomask; and comparing the pattern appearance deformation or pattern deviation of the actual second pattern with a theoretical second pattern to obtain a second development error amount, wherein, In the step of performing the second pre-exposure compensation, the second compensation amount includes calculation based on the second development error amount. The method of claim 1, wherein the error phenomena to be corrected by the first pre-exposure compensation and the second pre-exposure compensation include: translation, rotation, orthogonal, enlargement, reduction, or a combination of the foregoing. The method of claim 1, wherein after performing the first exposure process, the second exposure process, or both, the method further includes performing a chemical treatment or a physical treatment on the first wafer. The method of claim 1, wherein the first wafer, the second wafer, and the third wafer are from the same batch of wafers. The method of claim 1, wherein the first wafer, the second wafer, and the third wafer are wafers from different batches.

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