TWI818731B - Switched capacitor voltage converter circuit and switched capacitor converter control method - Google Patents

Abstract

The present invention provides a switched capacitor voltage converter circuit and a switched capacitor converter control method. The switched capacitor voltage converter circuit includes: a switched capacitor converter and a control circuit. The switched capacitor converter includes at least one resonant capacitor, plural switches, and at least one inductor. The control circuit generates a pulse width modulation signal according to a first voltage or a second voltage, and generates a control signal according to the pulse width modulation signal and a zero current detection signal. The control signal controls the switched capacitor converter by operating the plural corresponding switches to switch electrical connection of the inductor, so as to convert the first voltage to the second voltage or convert the second voltage to the first voltage.

Description

Switched capacitor voltage conversion circuit and switched capacitor converter control method

The present invention relates to a switched capacitor voltage conversion circuit and a switching capacitor converter control method. Specifically, it relates to a switched capacitor voltage conversion circuit and a switched capacitor controlled by a pulse width modulation signal and a zero current detection signal. Converter control method.

A paper from the Institute of Electrical and Electronics Engineers (IEEE) Applied Power Electronics Symposium in 2005: "Three-Level Buck Converter for Envelope Tracking in RF Power Amplifiers" Power Amplifiers"), proposed a three-position quasi-buck converter for packet tracking applications, such as packet tracking in RF power amplifiers; in order to achieve high efficiency and high power density, the cross-voltage of the flying capacitor must be Regulated at half the input voltage.

Figure 1A shows a conventional switched tank converter (STC) disclosed in US Patent No. 9,917,517B1. This conventional STC can achieve high-efficiency power conversion, but it is a non-regulated voltage divider; when the input voltage increases, its output voltage will also increase, and the output voltage cannot be regulated stably.

FIG. 1B shows a conventional buck converter circuit 10 . The inductor L of the conventional buck conversion circuit 10 must withstand the voltage stress of the input voltage level, so that it requires a larger size inductor and a higher inductance value. Generally speaking, a higher switching frequency enables the conversion circuit to have a smaller inductor size. However, switching power losses also increase significantly with high switching frequencies and high input voltages to the switches.

In view of this, the present invention proposes an innovative switched capacitor voltage conversion circuit and a switched capacitor converter control method to address the above-mentioned shortcomings of the prior art.

In one aspect, the present invention provides a switched capacitor voltage conversion circuit for converting a first voltage into a second voltage or converting the second voltage into the first voltage. The switched capacitor voltage conversion circuit includes : a switched capacitor converter coupled between the first voltage and the second voltage; and a control circuit for generating a pulse width modulation signal according to the first voltage or the second voltage, and the The control circuit generates a control signal according to the pulse width modulation signal and a zero current detection signal to control the switched capacitor converter to convert the first voltage to the second voltage or convert the second voltage to the a first voltage; wherein the switched capacitor converter includes: at least one resonant capacitor; a plurality of switches coupled to the at least one resonant capacitor; and at least one inductor; wherein when the first voltage is converted to the second voltage, the The control signal includes a one-way conduction operation signal, a first operation signal and a second operation signal, respectively corresponding to a one-way conduction program, a first program and a second program, and then used to operate the corresponding plurality of switches. , to switch the corresponding electrical connection relationship of the inductor; wherein, when the first voltage is converted to the second voltage, the control circuit generates the pulse width modulation signal according to the second voltage, and the one-way conduction program, the operation of the first program and the second program The method is as follows: in the one-way conduction procedure, the one-way conduction operation signal is used to control the switching of the plurality of switches to form a one-way conduction path between a first DC potential and the second voltage, so that the flow through An inductance current of the inductor flows to the second voltage through the unidirectional conduction path; in the first process, the switching of the plurality of switches is controlled by the first operation signal, so that the corresponding resonant capacitor is connected to the corresponding resonant capacitor. The inductor is connected in series between the second voltage and a second DC potential to form a first current path, so that the inductor current flowing through the inductor and toward the second voltage is a resonant current with a first resonant frequency. ; In the second process, the second operation signal is used to control the switching of the plurality of switches, so that the corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and the second voltage to form a The second current path is such that the inductor current flowing through the inductor and flowing to the second voltage is a resonant current with a second resonant frequency; wherein the one-way conduction operation signal, the first operation signal and the second The operation signals are switched to the same enable level during respective enable periods, and the enable periods do not overlap with each other, so that the one-way conduction process, the first process and the second process do not overlap with each other. Overlap; wherein the one-way conduction procedure, the first procedure and the second procedure are sequentially sequenced into a combination and then the combination is repeated, so that the inductor is in the one-way conduction procedure, the first procedure and the second procedure. Inductive power conversion switching is performed to convert the first voltage to the second voltage; wherein, the control circuit further generates the zero current detection signal according to the time point when the inductor current reaches zero current.

In another aspect, the present invention provides a switched capacitor converter control method for converting a first voltage into a second voltage or converting the second voltage into the first voltage. The switched capacitor converter control method Including: generating a pulse width modulation signal according to the first voltage or the second voltage; generating a zero current detection signal according to the time when an inductor current reaches zero current; and generating a zero current detection signal according to the pulse width modulation signal and the The zero current detection signal generates a control signal to control a switched capacitor converter to convert the first voltage to the second voltage. voltage or convert the second voltage to the first voltage; wherein, when the first voltage is converted to the second voltage, the pulse width modulation signal is generated according to the second voltage, and the control signal includes a single A directional conduction operation signal, a first operation signal and a second operation signal respectively correspond to a one-way conduction procedure, a first procedure and a second procedure, and are further used to operate the corresponding plurality of switches to switch the corresponding The electrical connection relationship of an inductor; wherein, when the first voltage is converted to the second voltage, the operation of the one-way conduction procedure, the first procedure and the second procedure is as follows: in the one-way conduction procedure, The unidirectional conduction operation signal controls the switching of the plurality of switches to form a unidirectional conduction path between a first DC potential and the second voltage, so that the inductor current flowing through the inductor passes through the unidirectional conduction path. The conduction path flows to the second voltage; in the first process, the switching of the plurality of switches is controlled by the first operation signal, so that a corresponding resonant capacitor and a corresponding inductor are connected in series with the second voltage and a second between the DC potentials to form a first current path, so that the inductor current flowing through the inductor and flowing to the second voltage is a resonant current with a first resonant frequency; in the second process, through the The second operation signal controls the switching of the plurality of switches, so that the corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and the second voltage to form a second current path to flow through the inductor. The inductor current flowing to the second voltage is a resonant current with a second resonant frequency; wherein the one-way conduction operation signal, the first operation signal and the second operation signal are respectively enabled in their respective corresponding sections. During the period, switch to the same energy level, and the plurality of enabling periods do not overlap with each other, so that the one-way communication process, the first process and the second process do not overlap with each other; wherein, the one-way communication process, the The first process and the second process are sequentially sequenced into a combination and then the combination is repeated, so that the inductor performs inductive power conversion switching between the one-way conduction process, the first process and the second process, thereby converting the The first voltage is converted into the second voltage.

In one embodiment, the control circuit includes: a pulse width modulation circuit for generating the pulse width modulation signal according to the second voltage when the first voltage is converted to the second voltage, and when the first voltage is converted to the second voltage, the pulse width modulation signal is generated. When the second voltage is converted to the first voltage, the pulse width modulation signal is generated according to the first voltage; a zero current detection circuit is used to generate the zero current detection when the inductor current reaches the zero current. signal; and a control signal generating circuit for generating the control signal according to the pulse width modulation signal and the zero current detection signal, and according to the control signal, respectively in the one-way conduction process, the first process and In the second process, a plurality of switch operation signals corresponding to the plurality of switches are generated.

In one embodiment, the one-way communication process, the first process and the second process form a switching cycle, and the order of the one-way communication process, the first process and the second process in the switching cycle is Can be combined arbitrarily, and the end time of the earliest program in the switching cycle is determined by the pulse width modulation signal, and the end time of other programs except the earliest program in the switching cycle is determined by the zero current detection signal.

In one embodiment, during the one-way conduction process, the inductor current is one of the following: the inductor current is a resonant current with a third resonant frequency; or the inductor current is a non-resonant current; wherein when the inductor current When the non-resonant current is the non-resonant current, the inductor current is a linear ramp current that gradually decreases, or another linear ramp current that gradually increases.

In one embodiment, during the unidirectional conduction process, the inductor current is a non-resonant current and is a gradually decreasing linear ramp current, and the unidirectional conduction path includes at least a portion of the non-conducting state through which the inductor current flows. - There is a body diode in the switch.

In one embodiment, in the one-way conduction procedure, the one-way conduction path includes at least one switch in a conductive state through which the inductor current flows.

In one embodiment, the first DC potential is the first voltage or a ground potential, and the second DC potential is the first voltage or the ground potential.

In one embodiment, the pulse width modulation circuit includes: a lock circuit for locking the second voltage to a reference voltage to generate a voltage lock signal; a ramp circuit for generating a ramp signal; and A comparison circuit is used to compare the voltage lock signal and the ramp signal to generate the pulse width modulation signal.

In one embodiment, the ramp circuit includes a reset circuit for resetting the ramp signal according to the control signal or a clock signal.

In one embodiment, the control signal adjusts the enabling period of the first process and/or the second process to achieve zero voltage switching or zero current switching of soft switching.

In one embodiment, the switching period is a fixed period.

In one embodiment, after the one-way conduction process, the first process and the second process of the switching cycle are completed, the plurality of switches remain non-conductive for a zero current period until the end of the fixed period.

In one embodiment, the switched capacitor voltage conversion circuit further includes a non-resonant capacitor coupled to the resonant capacitor, wherein the cross-voltage of the non-resonant capacitor is maintained at a constant value during the first process and the second process. Fixed DC voltage.

In one embodiment, when the second voltage is converted to the first voltage, the control circuit generates the pulse width modulation signal according to the first voltage to generate the control signal, and converts the second voltage to a first voltage; wherein when the second voltage is converted to the first voltage, the control signal includes an anti-unidirectional conduction operation signal, a third operation signal and a fourth operation signal to respectively correspond to an anti-unidirectional conduction program, a third program and a fourth program, and operate the corresponding plurality of switches to switch the corresponding electrical connection relationship of the inductor; wherein, when the second voltage is converted to the first voltage, the reverse The operations of the one-way communication procedure, the third procedure and the fourth procedure are as follows: in the anti-unidirectional communication procedure, through the anti-unidirectional The conduction operation signal controls the switching of the plurality of switches to form an anti-unidirectional conduction path between a third DC potential and the first voltage, so that the inductor current flowing through the inductor flows through the anti-unidirectional conduction path. The first voltage; in the third process, the switching of the plurality of switches is controlled by the third operation signal, so that the corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and a fourth DC potential. time to form a third current path, so that the inductor current flowing through the inductor and flowing to the first voltage is a resonant current with a fourth resonant frequency; in the fourth process, through the fourth operation The signal controls the switching of the plurality of switches, so that the corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and the second voltage to form a fourth current path, so that the current flows through the inductor and to the The inductor current of the first voltage is a resonant current with a fifth resonant frequency; wherein the anti-unidirectional conduction operation signal, the third operation signal and the fourth operation signal are respectively in a corresponding enabling period, Switch to the enabling level, and the plurality of enabling periods do not overlap with each other, so that the anti-unidirectional conduction process, the third process and the fourth process do not overlap with each other; wherein, the anti-unidirectional conduction process, The third process and the fourth process are sequentially sequenced into a combination and then the combination is repeated, so that the inductive power conversion switching is performed between the anti-unidirectional conduction process, the third process and the fourth process, and then the third process is The second voltage is converted into the first voltage.

In one embodiment, the switched capacitor converter includes a distributed switched capacitor converter, a series-parallel switched capacitor converter, a Dickson switched capacitor converter ( Dickson switched capacitor converter), ladder switched capacitor converter, doubler switched capacitor converter, Fibonacci switched capacitor converter, pipeline Pipelined switched capacitor converter or switched tank converter.

In one embodiment, the series-parallel switched capacitor converter includes a 2-to-1 series-parallel switched capacitor converter, a 2-to-1 series-parallel switched capacitor converter, and a 2-to-1 series-parallel switched capacitor converter. One series-parallel switched capacitor converter (3-to-1 series-parallel switched capacitor converter) or one quarter series-parallel switched capacitor converter (4-to-1 series-parallel switched capacitor converter).

In one embodiment, the third DC potential is the second voltage or a ground potential, and the fourth DC potential is the second voltage or the ground potential.

In one embodiment, the zero current detection circuit includes: a current sensing circuit for sensing the current flowing through the at least one inductor to generate a corresponding at least one current sensing signal; and a comparator, and The current sensing circuit is coupled to compare the at least one current sensing signal with a reference signal to generate the corresponding at least one zero current detection signal to indicate the time point when the at least one inductor current reaches the zero current.

In one embodiment, the combination includes two one-way communication procedures, the first procedure and the second procedure, wherein the two one-way communication procedures, the first procedure and the second procedure form a switching cycle. , and the order of the two one-way conduction programs, the first program and the second program in the switching cycle can be arbitrarily combined, and the end time point of the earliest program in the switching cycle is determined by the pulse width modulation The zero current detection signal determines the end time of other programs except the earliest program in the switching cycle.

In one embodiment, the anti-unidirectional conduction procedure, the third procedure and the fourth procedure constitute a switching cycle, and the anti-unidirectional conduction procedure, the third procedure and the fourth procedure in the switching cycle are The order of arrangement can be combined in any combination, and the end time of the earliest program in the switching cycle is determined by the pulse width modulation signal, and the end time of other programs in the switching cycle except the earliest program is determined by the zero current detection signal Decide.

In one embodiment, during the anti-unidirectional conduction process, the inductor current is one of the following: the inductor current is a resonant current with a sixth resonant frequency; or the inductor current is a non-resonant current; wherein when the inductor When the current is the non-resonant current, the inductor current is a linear ramp current that gradually decreases, or another linear ramp current that gradually increases.

In one embodiment, the third DC potential is the second voltage or a ground potential, and the fourth DC potential is the second voltage or the ground potential.

In one embodiment, the switching period is a fixed period, wherein after the anti-unidirectional conduction process, the third process and the fourth process of the switching period are completed, the plurality of switches remain non-conducting and have zero current. period to the end of the fixed period.

The advantage of the present invention is that it does not need to balance the resonant capacitor voltage to half the input voltage, can achieve zero current switching and zero voltage switching to reduce switching power loss, can use a smaller inductor to reduce the inductor size, and can achieve It has lower voltage stress on switches, resonant capacitors and inductors, can adjust the output voltage and has higher efficiency than resonant switched capacitor conversion circuits with fixed voltage conversion ratios.

It will be easier to understand the purpose, technical content, characteristics and achieved effects of the present invention through detailed description of specific embodiments below.

10: Commonly known buck conversion circuits

20,40,50,60,70,80,90,100,110,120,120b,130,140,150,160,170,180,190,200,210,220,230,240: Switched capacitive voltage conversion circuit

201,201 ', 201 ", 201' '' ', 401,501,601,701,801,1001,1101,1301,1301,1501,1601,1701,1901,2001,2301,2401: Control circuit

2011,3011:Pulse width modulation circuit

20111,30111:Lock circuit

20112,30112:Ramp circuit

20113,30113:Comparison circuit

20114,30114:Reset circuit

201141,301141:OR gate

201142,301142:Pulse generator

201143:Reverse gate

2012:Zero current detection circuit

2012’, 2012”: Zero Current Estimation Circuit

20121: Current sensing circuit

20121’: Voltage detection circuit

20121": Peak and valley detection circuit

20122,20124’: comparator

20122’: Timing circuit

20123’:Ramp circuit

2013,3013:Control signal generation circuit

20131a, 20131b, 20131c, 30131a, 30131b, 30131c, 30131d: flip-flop

20132a, 20132b, 20132c, 20132d, 30132a, 30132b, 30132c, 30132d, 30132e, 30132f: and gate

20133a, 20133b, 20133c, 30133a, 30133b, 30133c, 30133d: pulse generator

20134, 30134a, 30134b: reverse gate

20135a, 20135b, 30135a, 30135b: OR gate

20136a, 20136b, 20136c, 20136d, 30136a, 30136b, 30136c, 30136d: buffer

2014: Logic circuits

202,402,502,602,702,1602,1702,1802,1902,2002,2102,2202,2302,2402: switched capacitor converter

5021,5022,8021,8022,8031,8032,12021,12022,12031,12032,16021,16022: Resonance tank

5023,5024,8023,8024,8033,8034,12023,12024,12033,12034,16023: closed loop

7021:Transformer

802,902,1002,1102,1202,1202b,1302,1402,1502: First switched capacitor converter

803,903,1003,1103,1203,1203b,1303,1403,1503: Second switched capacitor converter

C1, C11, C12, C13, C2, C3: (non-)resonant capacitor/capacitor

C21: Upper resonance capacitor

CINT, Crp: capacitance

CLK: clock signal

CV1, CV2: non-resonant capacitor

EAO: voltage lock signal

GA: first operating signal

GB: Second operating signal

Gu, Gu1, Gu2: One-way conduction operation signal

I1: first current

I2: second current

IC1: Resonant capacitor current

IL,IL1,IL11,IL12,IL2,IL3,ILo,ILo1,ILo11,ILo12,ILo2,ILo3: inductor current

Is,Is1,Is2: current source

L,L1,L11,L12,L2,L3: inductor

Lgc-H:signal

LX: switch node

LX1, LX11: first switching node

LX2, LX12: second switching node

Q1~Q21,Q28,Srp: switch

S1~S21, S28: switch operation signal

Spwm: pulse width modulation signal

Szc: Zero current detection signal

t0~t5: time point

T1: time period

T2, T3, Td: delay time

TG1, TG2, TG3, TGA1, TGA2, TGA3, TGA4: intermediary signals

TN: Negative voltage period

TP: Positive voltage period

Tsw: switching cycle

V1: first voltage

V2: second voltage

V2’: second voltage related signal

VC1, VC2, VC3: cross voltage

VD: voltage detection signal

VL: voltage difference

VLa, VLb: voltage

Vramp, VT: ramp signal

Vref1: reference voltage

Vref2: reference signal

Vth0: zero current threshold

Vx: voltage

Figure 1A shows a conventional switching tank converter disclosed in US Patent No. 9,917,517B1.

FIG. 1B is a schematic diagram of a conventional buck conversion circuit.

FIG. 2A is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to an embodiment of the present invention.

FIG. 2B is a circuit block diagram showing a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention.

FIG. 2C is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to an embodiment of the present invention.

FIG. 2D is a circuit schematic diagram showing the logic circuit in the control signal generating circuit 2013 according to an embodiment of the present invention.

FIG. 3A is a circuit schematic diagram showing a pulse width modulation circuit in a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention.

3B is a schematic diagram showing signal waveforms of related signals of the pulse width modulation circuit in the control circuit of the switched capacitor voltage conversion circuit according to an embodiment of the present invention.

FIG. 3C is a circuit block diagram showing a zero current detection circuit in a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention.

3D to 3E are circuit block diagrams showing a zero current detection circuit in a control circuit of a switched capacitor voltage conversion circuit according to several embodiments of the present invention.

3F is a circuit schematic diagram showing a zero current detection circuit in a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention.

3G is a schematic diagram showing signal waveforms of relevant signals of the zero current detection circuit in the control circuit of the switched capacitor voltage conversion circuit according to an embodiment of the present invention.

3H is a circuit schematic diagram showing a control signal generating circuit in a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention.

3I to 3K show operating waveform diagrams of several embodiments of the switched capacitor voltage conversion circuit according to the present invention.

FIG. 3L is a schematic diagram showing signal waveforms of related signals when the switched capacitor voltage conversion circuit of FIG. 2A uses the pulse width modulation circuit of FIG. 3A according to an embodiment of the present invention.

FIG. 4A is a circuit schematic diagram showing a pulse width modulation circuit in a control circuit of a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 4B is a schematic diagram showing signal waveforms of relevant signals of the pulse width modulation circuit in the control circuit of the switched capacitor voltage conversion circuit of FIG. 4A according to an embodiment of the present invention.

FIG. 4C is a schematic circuit diagram showing a control signal generating circuit in a control circuit of a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 4D is a schematic diagram showing signal waveforms of related signals when the switched capacitor voltage conversion circuit of FIG. 2A uses the pulse width modulation circuit of FIG. 4A according to an embodiment of the present invention.

FIG. 4E is a signal showing related signals when the switched capacitor voltage conversion circuit of FIG. 2A utilizes the pulse width modulation circuit of FIG. 3A and the unidirectional conduction procedure adopts unidirectional conduction to the ground potential according to another embodiment of the present invention. Waveform diagram.

FIG. 4F is a signal showing related signals when the switched capacitor voltage conversion circuit of FIG. 2A utilizes the pulse width modulation circuit of FIG. 4A and the unidirectional conduction procedure adopts unidirectional conduction to the ground potential according to another embodiment of the present invention. Waveform diagram.

FIG. 5 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 6 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 7 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 8 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 9 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 10 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 11 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 12 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 13 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 14 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 15 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 16 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 17 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 18A is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 18B is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 19 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 20 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 21 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 22 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 23 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 24 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

FIG. 25 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention.

FIG. 26 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention.

The diagrams in the present invention are schematic and are mainly intended to represent the coupling relationship between circuits and the relationship between signal waveforms. The circuits, signal waveforms and frequencies are not drawn to scale.

FIG. 2A is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to an embodiment of the present invention. FIG. 2B is a circuit block diagram showing a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention. As shown in FIG. 2A , the switched capacitor voltage conversion circuit 20 is used to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into the first voltage V1 . The switched capacitor voltage conversion circuit 20 includes a control circuit 201 and a switched capacitor converter 202 . The switched capacitor converter 202 is coupled between the first voltage V1 and the second voltage V2. As shown in FIG. 2B , the control circuit 201 generates the pulse width modulation signal Spwm according to the first voltage V1 or the second voltage V2, and the control circuit 201 generates the control signal according to the pulse width modulation signal Spwm and the zero current detection signal Szc. The switching capacitor converter 202 is controlled to convert the first voltage V1 into the second voltage V2 or the second voltage V2 into the first voltage V1. The switched capacitor converter 202 includes at least one resonant capacitor C1, a plurality of switches Q1˜Q4, and at least one inductor L. The inductor L is coupled to the resonant capacitor C1. The complex switches Q1~Q4 are coupled to the resonant capacitor C1.

Please refer to FIG. 2A and FIG. 3B at the same time. The control circuit 201 is used to generate a control signal. The control signal includes a one-way conduction operation signal Gu, a first operation signal GA and a second operation signal GB to respectively correspond to the one-way conduction procedure and the first operation signal. The program and the second program further generate switch operation signals S1 to S4, and operate the corresponding plurality of switches Q1 to Q4 to switch the electrical connection relationship of the corresponding inductor L.

When the first voltage V1 is converted to the second voltage V2, the pulse width modulation circuit 2011 in the control circuit 201 generates the pulse width modulation signal Spwm according to the second voltage V2, and the one-way conduction program, the first program and the third The operation methods of the two procedures are described as follows:

In the one-way conduction procedure, the one-way conduction operation signal Gu controls the switching of the plurality of switches Q1 ~ Q4 to form a one-way conduction path between the first DC potential and the second voltage V2, so that the inductor L The inductor current IL flows to the second voltage V2 via a unidirectional conduction path. In this embodiment, the first DC potential is, for example but not limited to, the first voltage V1; in other cases In the embodiment, the first DC potential is, for example, ground potential. Among them, the one-way conduction operation signal Gu is used during a first enabling period Ten1 in the one-way conduction program to operate the switches Q1 and Q3 of the plurality of switches Q1 to Q4 to conduct, and the switches Q2 and Q4 do not conduct, which means that in a single In the conduction procedure, the one-way conduction operation signal Gu switches to the enable level (such as the high level shown in Figure 3B) for a first enablement period Ten1, so that the enable switch operation signals S1 and S3 switch to the conduction level and the switch The operation signals S2 and S4 are switched to a non-conducting level to electrically connect one end (voltage Vx end) of the inductor L to the first voltage V1.

In a first process, the first operation signal GA controls the switching of the plurality of switches Q1 ~ Q4, so that the corresponding resonant capacitor C1 and the corresponding inductor L are connected in series between the second voltage V2 and the second DC potential, thereby forming A first current path, so that the inductor current IL flowing through the inductor L and flowing to the second voltage V2 is a resonant current with a first resonant frequency. In this embodiment, the second DC potential is, for example, but not limited to, the ground potential; in other embodiments, the second DC potential is, for example, the first voltage V1. Among them, the first operation signal GA is used during a second enabling period Ten2 in the first program to operate the switches Q3 and Q4 of the plurality of switches Q1 to Q4 to conduct and the switches Q1 and Q2 not to conduct, which means that in the first program , the first operation signal GA is switched to the enable level for a second enable period Ten2, so that the switch operation signals S3 and S4 are switched to the conduction level and the switch operation signals S1 and S2 are switched to the non-conduction level, so as to reduce the resonance The capacitor C1 and the corresponding inductor L are connected in series between the second voltage V2 and the ground potential.

In the second process, the second operation signal GB controls the switching of the plurality of switches Q1 ~ Q4, so that the corresponding resonant capacitor C1 and the corresponding inductor L are connected in series between the first voltage V1 and the second voltage V2 to form a third Two current paths, so that the inductor current IL flowing through the inductor L and flowing to the second voltage V2 has a resonant current of the second resonant frequency. Among them, the second operation signal GB is used during a third enabling period Ten3 in the second program to operate the switches Q1 and Q2 of the plurality of switches Q1 to Q4 to conduct while the switches Q3 and Q4 do not conduct, which means that in the second program , The second operation signal GB is switched to the enable level for a third enable period Ten3, so that the switch operation signals S1 and S2 are switched to the conduction level and the switch operation signals S3 and S4 are switched to the non-conduction level, so as to switch the resonant capacitor C1 and the corresponding inductor L are connected in series between the first voltage V1 and the second voltage V2.

In this embodiment, the one-way conduction operation signal Gu, the first operation signal GA and the second operation signal GB, as shown in FIG. 3B , are respectively switched to the enable level during a corresponding enable period, and the The enabling periods of the plurality of segments do not overlap with each other, so that the one-way conduction process, the first process and the second process do not overlap with each other.

In this embodiment, as shown in FIG. 3B , the one-way conduction procedure, the first procedure and the second procedure are sequentially sequenced into a combination and then the combination is repeated, so that the inductor L is in the one-way conduction procedure, the first procedure and the second procedure. Inductive power conversion switching is performed between programs to convert the first voltage V1 into the second voltage V2. Among them, as shown in FIG. 3B , the control circuit 201 further generates a zero current detection signal Szc according to the time when the inductor current IL reaches zero current.

In the one-way conduction process, in one embodiment, the inductor current IL flowing toward the second voltage V2 is a resonant current with a third resonant frequency, where the third resonant frequency may be the same as the first resonant frequency in the first process and The second resonant frequency of the second program is different or the same as one of them. The first resonant frequency and the second resonant frequency may be the same or different, depending on the inductor and capacitor respectively coupled to the first current path and the second current path.

In the one-way conduction process, in another embodiment, the inductor current IL flowing toward the second voltage V2 is a non-resonant current. In an embodiment in which the inductor current IL is a non-resonant current, the inductor current IL flowing toward the second voltage V2 is a linear ramp current that gradually decreases. In another embodiment in which the inductor current IL is a non-resonant current, the inductor current IL flowing toward the second voltage V2 is a linear ramp current that gradually increases.

In one embodiment, the one-way conduction program, the first program and the second program form a switching period Tsw, and the order of the one-way conduction program, the first program and the second program in the switching period Tsw can be arbitrarily combined ( For example, the order of arrangement in this embodiment is the one-way communication program, the first program and the second program), and the end time of the earliest program in the switching period Tsw (the one-way communication program in this embodiment) is as shown in Figure As shown in Figure 3B, it is determined by the pulse width modulation signal Spwm; and the end time of other programs except the earliest program in the switching period Tsw, as shown in Figure 3B, is determined by the zero current detection signal Szc. It should be noted that in a switching cycle Tsw, the number of one-way conduction procedures, the first procedure and the second procedure is not limited, nor is the arrangement of them limited, as long as the end time point of the earliest procedure is consistent with the pulse. It is determined by the wide modulation signal Spwm, and the end point of the subsequent program is determined by the zero current detection signal Szc.

Please refer to FIGS. 2A, 2B and 3B simultaneously. The control circuit 201 includes a pulse width modulation circuit 2011, a zero current detection circuit 2012 and a control signal generation circuit 2013. The pulse width modulation circuit 2011 is used to generate the pulse width modulation signal Spwm according to the first voltage V1 or the second voltage V2. The zero current detection circuit 2012 is used to generate a zero current detection signal Szc when the inductor current IL reaches zero current. The control signal generation circuit 2013 is coupled to the zero current detection circuit 2012 for generating a control signal according to the pulse width modulation signal Spwm and the zero current detection signal Szc, and according to the control signal, respectively in the one-way conduction process, the first In the program and the second program, plural switch operation signals S1-S4 corresponding to the plural switches Q1-Q4 are generated.

FIG. 2C is a schematic circuit diagram showing a switched capacitor voltage conversion circuit 20 according to an embodiment of the present invention. Please refer to Figure 2C. In the one-way conduction procedure, the one-way conduction operation signal Gu controls the switching of the plurality of switches Q1~Q4 (for example, the switches Q1 and Q3 are turned on, and the switches Q2 and Q4 are not turned on). When the first voltage V1 A unidirectional conduction path is formed between the second voltage V2 and the second voltage V2, so that the inductor current IL flowing toward the second voltage V2 passes through the unidirectional conduction path (virtual line in Figure 2C (shown by the dotted arrow) and flows to the second voltage V2, in which the inductor current IL is a linear ramp current that gradually increases.

Please refer to Figures 2C and 3B again. In the first process, the first operation signal GA is used to control the switching of the plurality of switches Q1~Q4 (for example, the switches Q3 and Q4 are turned on, and the switches Q1 and Q2 are not turned on). When the ground potential and A first current path is formed between the second voltage V2, so that the inductor current IL flowing toward the second voltage V2 flows to the second voltage V2 through the first current path (as shown by the dashed arrow in Figure 2C), where the inductor The current IL is a resonant current having a first resonant frequency.

Please refer to Figures 2C and 3B again. In the second process, the second operation signal GB is used to control the switching of the plurality of switches Q1~Q4 (for example, the switches Q1 and Q2 are turned on, and the switches Q3 and Q4 are not turned on). At the first voltage A second current path is formed between V1 and the second voltage V2, so that the inductor current IL flowing toward the second voltage V2 flows to the second voltage V2 through the second current path, where the inductor current IL is a resonant current with a second resonant frequency. , in this embodiment, the first resonant frequency is equal to the second resonant frequency.

The above-mentioned one-way conduction path can be implemented in various ways. For example, please refer to Figures 2C and 4E. In the one-way conduction procedure (during the time point t1-t2 as shown in Figure 4E), the one-way conduction operation signal Gu Control the switching of multiple switches, for example, make the switches Q1, Q2, Q3 and Q4 non-conductive. The inductor current IL flowing through the corresponding inductor L passes through at least one switch, such as the internal diode (body) in the switches Q2 and Q4. diode) flows to the second voltage V2, thereby causing the inductor current IL flowing toward the second voltage V2 to be a gradually decreasing linear ramp current. Among them, the one-way conduction path includes the internal diodes (body diodes) in the switches Q2 and Q4 in the non-conducting state.

In another implementation of the one-way conduction path, for example, please refer to FIGS. 2C and 4E again. In the one-way conduction procedure, the complex number is controlled by the one-way conduction operation signal Gu. When the switches Q1~Q4 are switched (for example, the switches Q1 and Q3 are turned off and the switches Q2 and Q4 are turned on), the inductor current IL flowing through the corresponding inductor L flows to the second switch through the turned-on switches Q2 and Q4. The voltage V2 causes the inductor current IL flowing toward the second voltage V2 to be a linear ramp current that gradually decreases. Among them, the one-way conduction path includes switches Q2 and Q4 in the conductive state.

In another implementation of the one-way conduction path, for example, please refer to FIGS. 2C and 3B again. In the one-way conduction procedure, the switching of the plurality of switches Q1 to Q4 is controlled by the one-way conduction operation signal Gu (for example, using When switches Q1 and Q3 are both turned on and switches Q2 and Q4 are turned off), the inductor current IL flowing through the corresponding inductor L flows through the turned on switches Q1 and Q3 (as shown by the dashed dotted arrow in Figure 2C). The second voltage V2 causes the inductor current IL flowing toward the second voltage V2 to be a linear ramp current that gradually increases. Among them, the one-way conduction path includes switches Q1 and Q3 in the conductive state.

FIG. 2D is a circuit schematic diagram showing the logic circuit in the control signal generating circuit 2013 according to an embodiment of the present invention. As shown in FIGS. 2A-2C and referring to the embodiment shown in FIG. 3B , the control circuit 201 generates a control signal according to the pulse width modulation signal Spwm and the zero current detection signal Szc, and the control signal includes the one-way conduction operation signal Gu. , the first operation signal GA and the second operation signal GB, thereby generating switch operation signals S1~S4, and operating corresponding plural switches Q1~Q4. Among them, the logic circuit 2014 is used to convert the one-way conduction operation signal Gu, the first operation signal GA and the second operation signal GB into switch operation signals S1 to S4. As shown in Figure 2D, after the one-way conduction operation signal Gu and the second operation signal GB perform a logical OR operation, they pass through the buffer to generate the switching operation signal S1; the second operation signal GB passes through the buffer and generate the switching operation signal S2; After performing a logical OR operation on the one-way conduction operation signal Gu and the first operation signal GA, the switching operation signal S3 is generated through the buffer; the switching operation signal S4 is generated after the first operation signal GA passes through the buffer. It should be noted that the implementation of the logic circuit 2014 does not As shown in FIG. 2D , it is only necessary to convert the one-way conduction operation signal Gu, the first operation signal GA and the second operation signal GB into switch operation signals S1 ~ S4 according to the requirements, and the corresponding conversion requirements are different, and the logic The implementation of the circuit 2014 is also different, which is well known to those with ordinary knowledge in the art and will not be described in detail here.

FIG. 3A is a circuit schematic diagram showing a pulse width modulation circuit in a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention. As shown in FIG. 3A , the pulse width modulation circuit 2011 includes a lock circuit 20111, a ramp circuit 20112, a comparison circuit 20113 and a reset circuit 20114. The locking circuit 20111 is used to lock the second voltage-related signal V2′ related to the second voltage V2 to a reference voltage Vref1 to generate a voltage locking signal EAO. The ramp circuit 20112 is used to generate a ramp signal Vramp. In one embodiment, the ramp circuit 20112 includes a current source Is and a capacitor Crp. The current source Is is used to charge the capacitor Crp to generate the ramp signal Vramp. The comparison circuit 20113 is used to compare the voltage lock signal EAO and the ramp signal Vramp to generate the pulse width modulation signal Spwm. The reset circuit 20114 is used to reset the ramp signal Vramp according to a control signal such as the first operation signal GA or a clock signal CLK. In one embodiment, the reset circuit 20114 includes a switch Srp, an OR gate 201141, a pulse generator 201142 and a reverse gate 201143. When the first operation signal GA is at the disable level or the clock signal CLK is at the enable level, the switch Srp is turned on for a short period of time through the OR gate 201141 and the pulse generator 201142, so that the level of the ramp signal Vramp is pulled down to zero.

3B is a schematic diagram showing signal waveforms of related signals of the pulse width modulation circuit in the control circuit of the switched capacitor voltage conversion circuit according to an embodiment of the present invention. Clock signal CLK, ramp signal Vramp, voltage lock signal EAO, pulse width modulation signal Spwm, zero current detection signal Szc, inductor current IL, first operation signal GA, second operation signal GB, The one-way conduction operation signal Gu and the switching period Tsw are shown in Figure 3B. As shown in FIG. 3B , the first operation signal GA, the second operation signal GB and the one-way conduction operation signal Gu respectively switch to the same energy level for an enabling period, and the plurality of enabling periods do not overlap with each other, so that The first procedure, the second procedure and the one-way passage procedure do not overlap with each other.

As shown in Figure 3B, when the voltage lock signal EAO is lower than the ramp signal Vramp, the pulse width modulation signal Spwm is triggered to switch to the disable level, which in turn triggers the unidirectional conduction operation signal Gu to switch to the disable level, and prompts the third An operation signal GA is switched to the enable level. When the zero current detection signal Szc switches to the enable level, the first operation signal GA is triggered to switch to the disable level, and the second operation signal GB is triggered to switch to the enable level. When the voltage lock signal EAO is higher than the ramp signal Vramp, the pulse width modulation signal Spwm is switched to the enable level and when the zero current detection signal Szc is switched to the enable level, the second operation signal GB is switched to the disable level. On time, the one-way conduction operation signal Gu is triggered to switch to the enable level. As shown in FIG. 3B , in this embodiment, the switching cycle Tsw is composed of a one-way conduction procedure, a first procedure, and a second procedure in sequence. In another embodiment, the switching period Tsw can also be composed of the unidirectional conduction procedure, the second procedure and the first procedure in sequence.

FIG. 3C is a circuit block diagram showing a zero current detection circuit in a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention. The switched capacitor voltage conversion circuit 20 of Figure 3C includes a switched capacitor converter 202 and a control circuit 201'. The configuration of the switched capacitor converter 202 is the same as that of the switched capacitor converter 202 of Figure 2A. The control circuit 201' is used to generate a control signal ( Then switching operation signals S1~S4) are generated to control the plurality of switches (such as switches Q1~Q4) of the switched capacitor converter 202. The control circuit 201' includes a zero current detection circuit 2012, a control signal generation circuit 2013 and a pulse width modulation inverter. Road 2011. Zero current detection circuit 2012 is used to The zero current detection signal Szc is generated according to the inductor current IL flowing through the inductor L. In this embodiment, the zero current detection circuit 2012 is used to detect the inductor current IL.

Please continue to refer to FIG. 3C. In one embodiment, the zero current detection circuit 2012 includes a current sensing circuit 20121 and a comparator 20122. The current sensing circuit 20121 is used to sense the inductor current IL to generate the current sensing signal Vis. The comparator 20122 is used to compare the current sensing signal Vis with a reference signal Vref2 to generate a zero current detection signal Szc to indicate the point when the inductor current IL reaches 0 current. The control signal generation circuit 2013 and the pulse width modulation circuit 2011 of FIG. 3C are similar to the control signal generation circuit 2013 and the pulse width modulation circuit 2011 of FIG. 2B, so their detailed description is omitted.

3D to 3E are circuit block diagrams showing a zero current detection circuit in a control circuit of a switched capacitor voltage conversion circuit according to several embodiments of the present invention. The control circuit 201" shown in Figure 3D generates the zero current detection signal Szc in another implementation manner, in which the switched capacitor converter 202 of this embodiment corresponds to the switched capacitor converter 202 of Figure 2A.

The control circuit 201" includes a zero current estimation circuit 2012', which is coupled to the inductor L and used to estimate the time point when the inductor current IL becomes 0 based on the voltage difference between the two ends of the inductor L for generating the zero current detection signal Szc. Then, according to the zero current detection signal Szc, the control signal generating circuit 2013 generates a control signal (and then generates the switch operation signals S1 ~ S4 ) to control the operation of the plurality of switches. Refer to the embodiment of FIG. 3C .

Referring to FIG. 3D and FIG. 3G simultaneously, in one embodiment, the zero current estimation circuit 2012' includes a voltage detection circuit 20121' and a timing circuit 20122'. The voltage detection circuit 20121' is used to determine the voltage difference between the two ends of the inductor L according to, for example, VL generates a voltage detection signal VD to indicate a positive voltage period TP when the voltage difference VL across the inductor L exceeds zero voltage. The timing circuit 20122' is coupled to the output end of the voltage detection circuit 20121' for detecting The signal VD estimates that the voltage difference VL across the inductor L will not exceed a negative voltage period TN of zero voltage, and then generates a zero current detection signal Szc to indicate the point when the inductor current IL is zero.

It should be noted that the above-mentioned operation method of generating a voltage detection signal VD based on the voltage difference between the two ends of the inductor L and estimating the time when the inductor current IL is zero is not limited to the application of the switched capacitor converter 202 in FIG. 3D , in another embodiment, the above operation mode can also be applied to the embodiment corresponding to Figure 5, for example, in the embodiment where the resonant capacitor has its corresponding inductance (such as L1, L2) (as shown in Figure 5) , the voltage detection circuit can be used to sense the inductor currents IL1 and IL2 of the inductors L1 and L2 respectively, and estimate the time when the inductor currents IL1 and IL2 reach 0 respectively for subsequent control operations, which will not be described in detail here.

The control circuit 201''' shown in FIG. 3E generates the zero current detection signal Szc in another implementation manner, in which the switched capacitor converter 202 of this embodiment corresponds to the switched capacitor converter 202 of FIG. 2A.

In this embodiment, the control circuit 201'''' includes a zero current estimation circuit 2012", which is coupled to the resonant capacitor C1 and used to estimate the inductor current IL to be zero based on the voltage difference (cross-voltage VC1) between the two ends of the resonant capacitor C1. time point is used to generate the zero current detection signal Szc, and then the control signal generation circuit 2013 generates control signals (such as switch operation signals S1~S4) according to the zero current detection signal Szc to control the operation of the plurality of switches. Refer to Figure 3C embodiment.

Referring to Figure 3E and Figure 3G at the same time, in this embodiment, the zero current estimation circuit 2012" includes a peak and valley detection circuit 20121". The peak and valley detection circuit 20121" is used to determine the voltage difference between the two ends of the resonant capacitor C1 (cross-voltage VC1 ), generates a voltage detection signal to indicate the peak time point of the peak voltage difference between the two ends of the resonant capacitor C1 (time point t2 shown in Figure 3G), and its valley time point (time point shown in Figure 3G t4), and generates the zero current detection signal Szc accordingly, in which the peak time point and the valley time point both correspond to the time point when the inductor current IL is 0. The detection voltage difference is There are many different implementations of peak values and valley values, which are well known to those with ordinary knowledge in the art and will not be described in detail here.

3F is a circuit schematic diagram showing a zero current detection circuit in a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention. FIG. 3F shows a schematic diagram corresponding to a more specific embodiment of the zero current estimation circuit in the switched capacitive conversion circuit of FIG. 3D. The zero current estimation circuit 2012' of this embodiment includes a comparator (corresponding to the aforementioned voltage detection circuit 20121'), a ramp circuit 20123' and a comparator 20124', wherein the ramp circuit 20123' and the comparator 20124' correspond to the aforementioned Timing Circuits 20122'.

Please refer to Figures 3F and 3G at the same time. The voltage detection circuit 20121' is used to compare the voltages VLa and VLb at both ends of the inductor L to generate a voltage detection signal VD to indicate that the voltage difference between the two ends of the inductor L exceeds a positive voltage of zero voltage. Period TP.

Please refer to Figures 3F and 3G at the same time. The ramp circuit 20123' is used to generate the first slope of the ramp signal VT (the rising slope of Figure 3G) during the positive voltage period TP according to the voltage detection signal VD, and during the positive voltage period TP After the end, the final value of the first slope (that is, the peak of the slope signal VT) is continued to generate a second slope of the slope signal VT (the descending slope of Figure 3G). In this embodiment, the first slope and the second slope are The slopes are in opposite phases to each other, and the absolute values of the slopes of the first slope and the second slope are equal. In one embodiment, for example, the current sources Is1 and Is2 can be configured to charge and discharge the integrating capacitor (capacitor CINT) with equal current values. achieved.

Please refer to Figures 3F and 3G at the same time. The comparator 20124' is used to generate zero current detection when the slope signal VT (especially the second slope) reaches the zero current threshold Vth0, indicating the point when the inductor current IL is 0. Signal Szc. It should be noted that in other embodiments, the absolute values of the slopes of the first slope and the second slope can also be other ratios. In this case, the same effect can be obtained by adjusting the zero current threshold.

3H is a circuit schematic diagram showing a control signal generating circuit in a control circuit of a switched capacitor voltage conversion circuit according to an embodiment of the present invention. As shown in Figure 3H, in one embodiment, the control signal generation circuit 2013 includes but is not limited to flip-flops 20131a, 20131b and 20131c, AND gates 20132a, 20132b, 20132c and 20132d, pulse generators 20133a, 20133b and 20133c, inverters Gate 20134, or gates 20135a and 20135b and buffers 20136a, 20136b, 20136c and 20136d. In addition to what is shown in FIG. 3H , the control signal generating circuit 2013 can also be implemented in other implementation manners.

3I to 3K show operating waveform diagrams of several embodiments of the switched capacitor voltage conversion circuit according to the present invention. In Figure 3I, when the inductor current IL is 0, the switching operation signals S1, S2 and the switching operation signals S3, S4 each turn to an inverted level to control the plurality of switches Q1~Q4 to switch to their corresponding inverted states. . In one embodiment, as shown in FIG. 3I , the period between any two adjacent zero-current time points in IL corresponds to 50% of the switching period, thereby making the conduction period of the first program equal to the conduction period of the second program. To achieve zero current switching of soft switching.

In the embodiment of FIG. 3J , the aforementioned reference signal Vref2 can be adjusted so that, for example, the switching operation signals S1 and S2 turn to a low level (indicating non-conduction) earlier. For example, in FIG. 3J , the switching operation signals S1 and S2 turn to a low level. It is a low level, which is earlier than the time when the inductor current IL reaches 0 by the period T1. At this time, the inductor current IL is still a positive current, for example, thereby achieving zero-voltage switching of the switch Q4, for example.

In one embodiment, as shown in FIG. 3K , after the inductor current IL reaches 0, a delay time T2 has also passed, so that the inductor current IL continues to flow to, for example, a negative current, and then the switching operation signals S3 and S4 become non-conductive. After the delay time T3, the switching operation signals S1 and S2 are turned on, thereby achieving zero-voltage switching of the switch Q1, for example.

FIG. 3L is a schematic diagram showing signal waveforms of related signals when the switched capacitor voltage conversion circuit of FIG. 2A uses the pulse width modulation circuit of FIG. 3A according to an embodiment of the present invention. The first voltage V1, the second voltage V2, the second current I2, the cross voltage VC1, the inductor current IL, the switching operation signals S1~S4, the voltage Vx and the switching period Tsw are shown in Figure 3L. As shown in Figure 3L, between time point t0 and time point t1, the inductor current IL presents a gradually increasing linear ramp current. Between time point t1 and time point t2 and between time point t2 and time point t3, the inductor current IL presents a resonant current.

FIG. 4A is a circuit schematic diagram showing a pulse width modulation circuit in a control circuit of a switched capacitor voltage conversion circuit according to another embodiment of the present invention. The pulse width modulation circuit 3011 of this embodiment is similar to the pulse width modulation circuit 2011 of Figure 3A. The difference is that the reset circuit 30114 of this embodiment does not include a reverse gate, and its OR gate 301141 has three inputs. Real-time pulse signal CLK, intermediate signals TGA2 and TGA4. When one of the clock signal CLK, the intermediate signal TGA2 or the intermediate signal TGA4 is switched to the enable level, the switch Srp is turned on for a short period of time through the OR gate 301141 and the pulse generator 301142, so that the level of the ramp signal Vramp is pulled down to zero.

FIG. 4B is a schematic diagram showing signal waveforms of relevant signals of the pulse width modulation circuit in the control circuit of the switched capacitor voltage conversion circuit of FIG. 4A according to an embodiment of the present invention. Clock signal CLK, ramp signal Vramp, voltage lock signal EAO, pulse width modulation signal Spwm, zero current detection signal Szc, inductor current IL, first operation signal GA, second operation signal GB, one-way conduction operation signal Gu1 And the relationship between Gu2 and switching period Tsw is shown in Figure 4B.

As shown in Figure 4B, when the voltage lock signal EAO is lower than the ramp signal Vramp, the pulse width modulation signal Spwm is triggered to switch to the disabled level, thereby triggering the one-way conduction operation signal. The signal Gu1 is switched to the disabled level, and causes the first operation signal GA to be switched to the enabled level. When the voltage lock signal EAO is higher than the ramp signal Vramp, the pulse width modulation signal Spwm is switched to the enable level and when the zero current detection signal Szc is switched to the enable level, the first operation signal GA is switched to the disable level. On time, the one-way conduction operation signal Gu2 is triggered to switch to the enable level. When the voltage lock signal EAO is lower than the ramp signal Vramp, the pulse width modulation signal Spwm is triggered to switch to the disable level, which in turn triggers the unidirectional conduction operation signal Gu2 to switch to the disable level, and causes the second operation signal GB to switch to Enabling level. When the voltage lock signal EAO is higher than the ramp signal Vramp, the pulse width modulation signal Spwm is switched to the enable level and when the zero current detection signal Szc is switched to the enable level, the second operation signal GB is switched to the disable level. On time, the one-way conduction operation signal Gu1 is triggered to switch to the enable level. As shown in FIG. 4B , in this embodiment, the switching period Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, the switching period Tsw can also be composed of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure in sequence.

FIG. 4C is a schematic circuit diagram showing a control signal generating circuit in a control circuit of a switched capacitor voltage conversion circuit according to another embodiment of the present invention. The control signal generation circuit 3013 of this embodiment can cooperate with the pulse width modulation circuit 3011 of Figure 4A. As shown in Figure 4C, in one embodiment, the control signal generation circuit 3013 includes but is not limited to flip-flops 30131a, 30131b, 30131c and 30131d, AND gates 30132a, 30132b, 30132c, 30132d, 30132e and 30132f, and a pulse generator 30133a , 30133b, 30133c and 30133d, reverse gate 30134a and 30134b, OR gate 30135a and 30135b and buffer 30136a, 30136b, 30136c and 30136d. In addition to what is shown in FIG. 4C , the control signal generating circuit 3013 can also be implemented in other implementation manners.

FIG. 4D is a schematic diagram of signal waveforms showing related signals when the switched capacitor voltage conversion circuit of FIG. 2A uses the pulse width modulation circuit of FIG. 4A according to an embodiment of the present invention. Figure. The first voltage V1, the second voltage V2, the second current I2, the cross voltage VC1, the inductor current IL, the switching operation signals S1~S4, the voltage Vx and the switching period Tsw are shown in Figure 4D. As shown in Figure 4D, between time point t0 and time point t1 and between time point t3 and time point t4, the inductor current IL presents a linear ramp current that gradually increases. Between time point t1 and time point t2 and between time point t4 and time point t5, the inductor current IL presents a resonant current. The delay time Td is between time point t2 and time point t3. The non-conducting periods of the plurality of switches (such as switches Q2, Q3, Q4) can be adjusted through the above delay time Td, so that the control circuit 201 operates at a fixed switching frequency (that is, the switching period Tsw is a fixed period). It should be noted that the above delay time Td can be inserted after the first procedure and/or the second procedure and/or the one-way passage procedure, that is, in the first procedure and/or the second procedure and/or the one-way passage procedure, After the inductor current IL decreases to 0, the plurality of switches can remain non-conductive for a zero-current period (ie, the delay time Td).

FIG. 4E is a signal showing related signals when the switched capacitor voltage conversion circuit of FIG. 2A utilizes the pulse width modulation circuit of FIG. 3A and the unidirectional conduction procedure adopts unidirectional conduction to the ground potential according to another embodiment of the present invention. Waveform diagram. The signal waveform diagram of the clock signal CLK, the switching operation signals S1~S4 and the inductor current IL is shown in Figure 4E. As shown in Figure 4E, between time point t1 and time point t2, the inductor current IL presents a gradually decreasing linear slope current. Between time point t0 and time point t1 and between time point t2 and time point t3, the inductor current IL presents a resonant current with a resonant frequency. In this embodiment, time point t0 to time point t1 are the first program of the switching period Tsw, that is, the period of the first program, and its end time point t1 (or the length of the first program period) is determined based on the pulse width modulation signal Spwm. . The end time points t2 and t3 of the one-way conduction procedure and the second procedure are determined based on the zero current detection signal Szc. As shown in FIG. 4E , this embodiment adopts the sequence of the first program, the one-way conduction program, and the second program to form the switching period Tsw. In another embodiment , the switching cycle Tsw can also be combined in sequence with the second procedure, the one-way conduction procedure, and the first procedure.

Specifically, in the embodiment shown in FIG. 4E , in the first process, during the period from instant points t0 to t1, the switching of the plurality of switches Q1 to Q4 is controlled by the first operation signal GA, including turning on the switches Q3 and Q4 and The switches Q1 and Q2 are non-conductive, so that the corresponding resonant capacitor C1 and the corresponding inductor L are connected in series between the second voltage V2 and the second DC potential (such as the ground potential or the first voltage V1, in this embodiment it is the ground potential), A first current path is formed. In the first process, the inductor current IL flowing toward the second voltage V2 is a resonant current having the first resonant frequency.

Then, the one-way conduction operation signal Gu is used in the one-way conduction procedure. During the instant point t1~t2, the switches Q2 and Q4 that operate multiple switches (such as switches Q1~Q4) are turned on and the switches Q1 and Q3 are not turned on, meaning that That is, in the one-way conduction procedure, the one-way conduction operation signal Gu switches to the enable level for a first enablement period, so that the enable switch operation signals S2 and S4 switch to the conduction level and the switch operation signals S1 and S3 switch to the disable state. The conduction level is to electrically connect one end of the inductor L to the DC potential (in this embodiment, the ground potential). In the one-way conduction procedure, the one-way conduction operation signal Gu controls the switching of multiple switches (switches Q1 and Q3 are not conductive, and switches Q2 and Q4 are conductive), so that the inductor current IL flowing through the corresponding inductor L is passed through a A one-way conduction path flows to the second voltage V2.

Then, in the second process, the second operation signal GB is used to control the switching of the plurality of switches Q1 to Q4, including making the switches Q1 and Q2 conductive and the switches Q3 and Q4 not conductive, so that at least one resonant capacitor C1 and the corresponding inductor L is connected in series between the first voltage V1 and the second voltage V2 to form a second current path. In the second process, the inductor current IL flowing toward the second voltage V2 has a resonant current of the second resonant frequency. In this embodiment, the first resonant frequency and the second resonant frequency are the same.

FIG. 4F is a signal showing related signals when the switched capacitor voltage conversion circuit of FIG. 2A utilizes the pulse width modulation circuit of FIG. 4A and the unidirectional conduction procedure adopts unidirectional conduction to the ground potential according to another embodiment of the present invention. Waveform diagram. The clock signal CLK, switch operation signals S1~S4 and inductor current IL are shown in Figure 4F. As shown in Figure 4F, between time point t1 and time point t2 and between time point t3 and time point t4, the inductor current IL presents a gradually decreasing linear slope current. Between time point t0 and time point t1 and between time point t2 and time point t3, the inductor current IL presents a resonant current. In this embodiment, the length of the time period of the second program from time point t0 to time point t1 is determined according to the pulse width modulation signal Spwm. As shown in FIG. 4F , this embodiment adopts the sequence of the second program, the one-way conduction program, the first program and the one-way conduction program to form the switching period Tsw. In another embodiment, the switching period Tsw can also be composed of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure in sequence.

FIG. 5 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. The switched capacitor voltage conversion circuit 40 is used to convert the first voltage V1 to the second voltage V2, or to convert the second voltage V2 to the first voltage V1. In this embodiment, the switched capacitor voltage conversion circuit 40 includes a control circuit 401 and a switched capacitor converter 402 . The switched capacitor converter 402 includes a non-resonant capacitor C1, a resonant capacitor C2, a resonant capacitor C3 and a plurality of switches (eg, switches Q1 to Q10) coupled to each other. It should be noted that when the capacitance value of capacitor C1 is much larger than the capacitance values of capacitors C2 and C3, capacitor C1 can be regarded as a non-resonant capacitor.

In one embodiment, in the second process, a plurality of switches (such as switches Q1 to Q10) control the non-resonant capacitor C1 and the resonant capacitor C3 to be connected in series between the first voltage V1 and the second voltage V2, and control the resonant capacitor C2 and The second voltage V2 is connected in parallel, and the other end of the resonant capacitor C2 is controlled to be coupled to the ground potential. Specifically, the switches Q1, Q2 and Q3 are turned on to control the non-resonant capacitor C1 and the resonant capacitor C3 to be connected in series between the first voltage V1 and the second voltage V2. Q4 and Q5 are turned on to control the resonant capacitor C2 to be connected in parallel with the second voltage V2, and the switches Q6~Q10 are not turned on. In this embodiment, in the second process, the switch operation signals S1 to S5 are enabled, causing the switches they control to be conductive, and the switch operation signals S6 to S10 are disabled, causing the switches they control to be non-conductive.

In the first process, a plurality of switches (such as switches Q1 to Q10) control the resonant capacitor C2 and the non-resonant capacitor C1 to be connected in series between the second voltage V2 and the ground potential, and control the resonant capacitor C3 to be connected in parallel to the second voltage V2. In the first process, the resonant capacitor C2 and the non-resonant capacitor C1 are connected in reverse series between the second voltage V2 and the ground potential. Specifically, the switches Q6, Q7 and Q8 are turned on to control the resonant capacitor C2 and the non-resonant capacitor C1 to be connected in series between the second voltage V2 and the ground potential, and the switches Q9 and Q10 are turned on to control the resonant capacitor C3 to be connected in parallel with the second voltage V2. , and switches Q1~Q5 are not conducting. In this embodiment, in the first program, the switch operation signals S1 to S5 are disabled, so that the switches they control are not conductive, and the switch operation signals S6 to S10 are enabled, so that the switches they control are conductive.

The switched capacitor voltage conversion circuit 40 performs power conversion between the first voltage V1 and the second voltage V2 through the above-mentioned periodic operation. In this embodiment, the ratio of the first voltage V1 to the second voltage V2 is 4.

It should be noted that in the first procedure mentioned above, the "reverse" series connection of the resonant capacitor C2 and the non-resonant capacitor C1 means that the cross-voltage of the resonant capacitor C2 and the cross-voltage of the non-resonant capacitor C1 are in opposite phases (that is, the positive and negative terminal directions on the contrary).

In the embodiment of converting the first voltage V1 to the second voltage V2, in the second process, the first voltage V1 charges the non-resonant capacitor C1 and the resonant capacitor C3 connected in series with each other, and the resonant capacitor C2 is discharged to supply The second voltage V2, that is, the resonant capacitor C2 charges the non-resonant capacitor CV2 coupled to the second voltage V2. In the first process, the non-resonant capacitor C1 charges the resonant capacitor C2 and the second voltage V2.

In addition, in the embodiment of converting the second voltage V2 into the first voltage V1, in the second process, the second voltage V2 charges the non-resonant capacitor C1 and the resonant capacitor C3 connected in series with each other, and the second voltage V2 charges the resonant capacitor C1 in series with each other. Capacitor C2 is charged. In the first process, the second voltage V2 charges the resonant capacitor C3, and the second voltage V2 charges the non-resonant capacitor C1 through the resonant capacitor C2.

Through the above periodic operation, in this embodiment, in the steady state, the ratio of the cross-voltage VC1 of the non-resonant capacitor C1 to the second voltage V2 is 2, and the ratio of the cross-voltage VC3 of the resonant capacitor C3 to the second voltage V2 is 2. is 1, and the ratio of the cross-voltage VC2 of the resonant capacitor C2 to the second voltage V2 is 1. In the embodiment where the second voltage V2 is 12V, in the steady state, the cross-voltage VC3 of the resonant capacitor C3 and the cross-voltage VC2 of the resonant capacitor C2 are both 12V. It is worth noting that the present invention can make the voltage on the capacitor The voltage across the voltage is maintained at a lower voltage in the steady state. Therefore, the capacitor can maintain a higher effective capacitance value, so the required withstand voltage and volume of the capacitor can be effectively reduced. At the same time, its resonant frequency is relatively stable and has a relatively high Excellent transient response. It is also worth noting that the output current of the present invention (for example, corresponding to the second current I2) is provided by two channels, so ripples can be reduced.

The non-resonant capacitors CV1 and CV2 respectively coupled to the first voltage V1 and the second voltage V2 correspond to the input capacitance and the output capacitance respectively in the embodiment where the first voltage V1 is converted into the second voltage V2, or, in the embodiment of converting the first voltage V1 to the second voltage V2, In the embodiment where the two voltages V2 are converted into the first voltage V1, they respectively correspond to the output capacitance and the input capacitance.

The switched capacitor converter 402 further includes an inductor L1 and an inductor L2. The inductor L1 is coupled between the second voltage V2 and the first switching node LX1, and the inductor L2 is coupled between the second voltage V2 and the second switching node LX2. In the second process, a plurality of switches (such as switches Q1~Q10) control the non-resonant capacitor C1 and the resonant capacitor C3, which are connected in series with the inductor L1 through the first switching node LX1, and then are connected in series between the first voltage V1 and the second voltage V2. time, and control the resonant capacitance After C2 is connected in series with the inductor L2 through the second switching node LX2, it is connected in parallel with the second voltage V2. On the other hand, in the first process, a plurality of switches (such as switches Q1 ~ Q10) control the resonant capacitor C2 and the non-resonant capacitor C1, which are connected in series between the second voltage V2 and the ground potential through the second switching node LX2 and the inductor L2. And the controlled resonant capacitor C3 is connected in series with the inductor L1 through the first switching node LX1, and then is connected in parallel with the second voltage V2. In one embodiment, both the inductor L1 and the inductor L2 operate in the continuous conduction mode, thereby further reducing the surge current and ripple current.

In one embodiment, the capacitance value of the non-resonant capacitor C1 is much larger than the capacitance values of the resonant capacitor C3 and the resonant capacitor C2, so that the first resonant frequency of the resonant capacitor C3 and the inductor is the same as the second resonant frequency of the resonant capacitor C2 and the inductor. Both are much higher than the third resonant frequency of the non-resonant capacitor C1 and the inductor. In a preferred embodiment, both the first resonant frequency and the second resonant frequency are greater than or equal to 10 times the third resonant frequency.

The control circuit 401 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure may be adopted. The sequence of the program, the first program and the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In yet another embodiment, when one-way When the conduction procedure adopts one-way conduction to DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first program can be adopted to form the switching period Tsw, or the first procedure, the one-way conduction procedure, and the first procedure can be adopted. The sequence of the second program constitutes the switching period Tsw. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 6 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. The switched capacitor converter 502 in this embodiment is similar to the switched capacitor converter 402 of FIG. 5 . The difference is that the inductor L1 of the switched capacitor converter 502 is directly electrically connected in series with the resonant capacitor C3 to form a resonant tank 5021, and The inductor L2 of the switched capacitor converter 502 is directly electrically connected in series with the resonant capacitor C2 to form the resonant tank 5022. In an embodiment, in the second process, a plurality of switches (such as switches Q1 ~ Q10) control the resonant tank 5021 and the non-resonant capacitor C1 to be connected in series between the first voltage V1 and the second voltage V2, and control the resonant tank 5022 and The second voltage V2 is connected in parallel. On the other hand, in the first process, a plurality of switches (such as switches Q1 ~ Q10) control the resonant tank 5022 and the non-resonant capacitor C1 to be connected in series between the second voltage V2 and the ground potential, and control the resonant tank 5021 and the second voltage V2 In parallel, the switched capacitor converter 502 operates in a resonant manner through the above periodic operation to achieve power conversion between the first voltage V1 and the second voltage V2. The control details of the plurality of switches (for example, switches Q1 to Q10) can be referred to the embodiment of FIG. 4 .

The control circuit 501 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative.

As shown in Figure 6, in the one-way conduction procedure, when the switch operation signals S1~S10 are used to control the switching of multiple switches (for example, the switches Q1~Q10 are all non-conductive), the inductor currents flowing through the corresponding inductors L1 and L2 IL1 and IL2 are respectively conducted through the internal diode (body diode) (shown as a dotted line in Figure 6) in at least one switch (such as switches Q9 and Q3 and switches Q4 and Q6), and are respectively connected through the resonant slot 5021 And the closed loops 5023 and 5024 formed by 5022 and the internal diodes (shown as dotted lines in Figure 6) in at least one switch (such as switches Q9 and Q3 and switches Q4 and Q6) freewheel, thereby causing the second state This means that the inductor currents ILo1 and ILo2 stop flowing toward the second voltage V2. As shown in FIG. 6 , at least one resonant capacitor C3 and at least one inductor L1 form a resonant groove 5021 , and at least one resonant capacitor C2 and at least one inductor L2 form a resonant groove 5022 . In this case, there is no net current flowing into or out of the non-resonant capacitor (also called the output capacitor) CV2.

For example, the inductor current IL1 flowing through the corresponding inductor L1 is formed by the conduction of the internal diodes in the switches Q9 and Q3, and through the resonant tank 5021 and the internal diodes in the switches Q9 and Q3. The closed loop 5023 freewheels, so that the second state is that the inductor current ILo1 stops flowing toward the second voltage V2. The inductor current IL2 flowing through the corresponding inductor L2 is conducted through the internal diodes in the switches Q4 and Q6, and passes through the closed loop 5024 formed by the resonant tank 5022 and the internal diodes in the switches Q4 and Q6. flow, thereby causing the second state to stop the inductor current ILo2 from flowing toward the second voltage V2. In another embodiment, switches Q9 and Q3 can also be The switches Q4 and Q6 are in a conductive state to form a closed loop, so that in the second state, the inductor currents ILo1 and ILo2 stop flowing toward the second voltage V2.

In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, for example, the switch operation signals S1~S10 are used to control the switching of the plurality of switches (for example, the switches Q1, Q7, and Q6 are all turned on, When the switches Q2~Q5 and Q8~Q10 are all non-conducting), the inductor L2 and the resonant capacitor C2 are connected through at least one switch (such as switches Q1, Q7, Q6) (as shown by the dotted line in Figure 6). The first voltage V1 is connected in series between the first voltage V1 and the second voltage V2, so that the second state is that the inductor current ILo flowing toward the second voltage V2 is a resonant current with a third resonant frequency, where the third resonant frequency It is different from the first resonant frequency of the first process and the second resonant frequency of the second process.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In yet another embodiment, when the one-way conduction procedure is adopted to form a closed loop, the sequence of the second procedure, the one-way conduction procedure, and the first procedure may be adopted to form the switching cycle Tsw, or the first procedure, the one-way conduction procedure may be adopted. The sequence of the program and the second program constitutes the switching period Tsw. In yet another embodiment, when the one-way conduction procedure is adopted to form a closed loop, the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted. The sequence of the conduction procedures constitutes the switching period Tsw, or the sequence of the second program, the one-way conduction program, the first program and the one-way conduction program constitutes the switching cycle Tsw.

FIG. 7 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. The switched capacitor converter 602 in this embodiment is similar to the switched capacitor converter 402 in FIG. 5 . The difference is that the switched capacitor converter 602 shares an inductor L. The inductor L is coupled between the second voltage V2 and the switching node LX. During the second process, a plurality of switches (such as switches Q1~Q10) control the non-resonant capacitor C1 and the resonant capacitor C3. After the switching node LX is connected in series with the inductor L, it is connected in series between the first voltage V1 and the second voltage V2. time, and only after the control resonant capacitor C2 is connected in series with the inductor L through the switching node LX, is it connected in parallel with the second voltage V2. On the other hand, in the first process, a plurality of switches (such as switches Q1 ~ Q10) control the resonant capacitor C2 and the non-resonant capacitor C1, and are connected in series between the second voltage V2 and the ground potential through the switching node LX and the inductor L, and control The resonant capacitor C3 is connected in series with the inductor L through the switching node LX, and then is connected in parallel with the second voltage V2. In this embodiment, the non-resonant capacitor C1, the resonant capacitor C2 and the resonant capacitor C3 all resonate with the inductor L to perform conversion between the first voltage V1 and the second voltage V2. The control details of the plurality of switches (for example, switches Q1 to Q10) can be referred to the embodiment of FIG. 5 .

The control circuit 601 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program consists of Change period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

It is worth noting that the charging and discharging process of the capacitor in this embodiment is carried out in a resonance manner with the inductor. Therefore, the inrush current of the capacitor during charging and discharging can be effectively reduced, and zero inrush current can be achieved through the resonance characteristics. Current switching control or zero-voltage switching control are also the same for the embodiments operating in the resonance mode described later, and the details will be described later.

FIG. 8 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. The switched capacitor converter 702 shown in FIG. 8 is similar to the switched capacitor converter 402 shown in FIG. 5. In this embodiment, the inductors L1 and L2 of the switched capacitor converter 702 have mutual inductance with each other. Therefore, the inductors L1 and L2 of the switched capacitor converter 702 have mutual inductance. The inductor current IL1 and the inductor current IL2 can have a better current balance with each other, and at the same time, the resonant capacitors C3 and C2 can also have a better voltage balance with each other.

The control circuit 701 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

In one embodiment, the inductors L1 and L2 may be configured as coupled inductors, or as a transformer (such as transformer 7021).

FIG. 9 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. In one embodiment, switched capacitive voltage conversion circuit 80 includes It includes a first switched capacitor converter 802 and a second switched capacitor converter 803. The first switched capacitor converter 802 and the second switched capacitor converter 803 are coupled to each other in parallel between the first voltage V1 and the second voltage V2. , in this embodiment, the first switched capacitor converter 802 and the second switched capacitor converter 803 correspond to the aforementioned switched capacitor converter 502 in FIG. 6 , for example. In this embodiment, through a plurality of switched capacitor converters operating in parallel, The output power can be increased, or the ripple current and ripple current can be reduced. It should be noted that the "parallel connection" of the above-mentioned switched capacitor converters means that the input terminals of the switched capacitor converters are electrically connected to each other, for example, the first voltage V1, and the output terminals of the switched capacitor converters, for example, are electrically connected to each other, the second voltage V2. .

In one embodiment, the first switched capacitor converter 802 and the second switched capacitor converter 803 switch the corresponding plurality of switches in each switched capacitor converter in opposite phases to each other to perform power conversion in an interleaved manner. Specifically, , as shown in Figure 9, the switching operation signals S1~S10 of the switches Q1~Q10 of the first switched capacitor converter 802 are in the same phase as the switched capacitor converter 502 of Figure 6, and the switches Q11~ of the second switched capacitor converter 803 The switching operation signals S11 ~ S20 of Q20 are inverse phase with the switched capacitor converter 502 of FIG. 6 (and therefore also inverse phase with the first switched capacitor converter 802).

The first switched capacitor converter 802 and the second switched capacitor converter 803 include inductors L1, L2, L11, and L12, which are respectively connected in series with the resonant capacitors C3, C2, C13, and C12 to form resonant slots 8021, 8022, 8031, and 8032. . In this embodiment, the first switched capacitor converter 802 and the second switched capacitor converter 803 are operated in an interleaved manner to perform power conversion. The first switched capacitor converter 802 and the second switched capacitor converter 803 are each similar to the previous figure. The switched capacitor converter 502 in 6 performs power conversion in a resonant manner.

The control circuit 801 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way routing procedure is similar to Figure 6. Please refer to the detailed description of Figure 6.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 10 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. The switched capacitor voltage conversion circuit 90 of FIG. 10 is similar to the switched capacitor voltage conversion circuit 80 of FIG. 9. The switched capacitor voltage conversion circuit 90 includes a first switched capacitor converter 902 and a second switched capacitor converter 903. The difference is that , the first switching power The capacitor converter 902 shares the inductor L1, and the second switched capacitor converter 903 shares the inductor L11. In a manner similar to the embodiment of FIG. 7, the resonant capacitors C3 and C2 are connected in parallel and then connected in series with the inductor L1, in a manner similar to the embodiment of FIG. 7. For example, the resonant capacitors C13 and C12 are connected in parallel and then connected in series with the inductor L11. Like the switched capacitor voltage conversion circuit 80 of FIG. 9 , this embodiment also operates the first switched capacitor converter 902 and the second switched capacitor converter 903 in an interleaved manner to perform power conversion, and the first switched capacitor converter 902 and The second switched capacitor converters 903 are each similar to the aforementioned switched capacitor converter 602 in FIG. 7 , and perform power conversion in a resonant manner.

The control circuit 901 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), The switching cycle Tsw can be composed of the first program, the one-way communication program, the second program and the one-way communication program, or the switching cycle Tsw can be composed of the second program, the one-way communication program, the first program and the one-way communication program. Period Tsw.

FIG. 11 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. The switched capacitor voltage conversion circuit 100 of FIG. 11 is similar to the switched capacitor voltage conversion circuit 80 of FIG. 9. The switched capacitor voltage conversion circuit 100 includes a first switched capacitor converter 1002 and a second switched capacitor converter 1003. The difference is that , the inductors L1, L2, L11, and L12 of the first switched capacitor converter 1002 and the second switched capacitor converter 1003 are not directly connected in series with the resonant capacitors C3, C2, C13, and C12 respectively, but are respectively connected through the first switching nodes LX1, The second switching node LX2, the first switching node LX11, and the second switching node LX12 are connected in series with the resonant capacitors C3, C2, C13, and C12. Like the switched capacitor voltage conversion circuit 80 of FIG. 9 , this embodiment also operates the first switched capacitor converter 1002 and the second switched capacitor converter 1003 in an interleaved manner to perform power conversion, and the first switched capacitor converter 1002 and The second switched capacitor converters 1003 are each similar to the aforementioned switched capacitor converter 402 in FIG. 5 , and perform power conversion in a resonant manner.

The control circuit 1001 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program consists of Change period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 12 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. The switched capacitor voltage conversion circuit 110 of FIG. 12 is similar to the switched capacitor voltage conversion circuit 100 of FIG. 11. The inductors L1, L2, L11, and L12 in the switched capacitor voltage conversion circuit 110 have mutual inductance with each other. The inductor current IL1, the inductor current IL2, the inductor current IL11, and the inductor current IL12 of the capacitive voltage conversion circuit 110 can have a better current balance with each other. At the same time, the resonant capacitors C3, C2, C13, and C12 can also have a better current balance with each other. Has better voltage balance. In one embodiment, the switched capacitor voltage conversion circuit 110 can be configured such that the inductors L1, L2, L11, and L12 all have mutual inductance with each other, or only some of the inductors have mutual inductance with each other. In one embodiment, the inductors L1, L2, L11, and L12 may be configured as at least one transformer.

The control circuit 1101 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 13 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. The switched capacitor voltage conversion circuit 120 shown in FIG. 13 includes a first switched capacitor converter 1202 and a second switched capacitor converter 1203, as well as an upper layer resonant capacitor C21 and a plurality of upper layer switches (such as switches Q21, Q28), wherein the A switch of electricity For example, both the capacitor converter 1202 and the second switched capacitor converter 1203 may correspond to the switched capacitor converter 502 of FIG. 6 . From one point of view, the switched capacitor voltage conversion circuit 120 shown in FIG. 13 is based on, for example, the switched capacitor converter 502 of FIG. 6 and is configured as a switched capacitor voltage conversion circuit with more layers. Specifically, , the upper resonant capacitor C21, the plurality of upper switches (switches Q21, Q28), the first switched capacitor converter 1202 and the second switched capacitor converter 1203 are coupled to each other in a basic topology. Please also refer to Figure 14, which is " "Basic topology", in one embodiment, refers to the basic coupling relationship between the upper-layer resonant capacitor C21, a plurality of upper-layer switches (such as switches Q21, Q28), the first switched capacitor converter 1202 and the second switched capacitor converter 1203, More details later.

The control circuit 1201 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way routing procedure is similar to Figure 6. Please refer to the detailed description of Figure 6.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or take first The sequence of the program, the one-way routing program and the second program constitutes the switching cycle Tsw. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

In one embodiment, according to the aforementioned basic topology, the input end of the first switched capacitor converter 1202 (corresponding to the first switched capacitor converter 1202b, FIG. 14) and one end of the upper resonant capacitor C21 are electrically connected to each other, and the third The input end of the second switched capacitor converter 1203 (corresponding to the second switched capacitor converter 1203b, FIG. 14) and the other end of the upper resonant capacitor C21 are electrically connected to each other. In addition, the output end of the first switched capacitor converter 1202 and the second The output terminal of the switched capacitor converter 1203 and the second voltage V2 are electrically connected to each other.

In the second program (for example, corresponding to the switch operation signals S1~S5, S16~S20, and S28 being disabled, and the switch operation signals S6~S10, S11~S15, and S21 being enabled), a plurality of upper-layer switches (such as switch Q21, Q28) and the plurality of switches (such as switches Q11~Q20) of the first switched capacitor converter 1202 control the upper resonant capacitor C21 to be connected in series with the first switched capacitor converter 1202 and establish at least one voltage between the first voltage V1 and the second voltage V2. current path, and the plurality of upper switches (such as switches Q21, Q28) and the plurality of switches (such as switches Q1~Q10) of the second switched capacitor converter 1203 control the upper layer resonant capacitor C21 and the second switched capacitor converter 1203 to be open circuits, And the second switched capacitor converter 1203 is controlled to establish at least one current path between the second voltage V2 and the ground potential.

On the other hand, in the first program (for example, corresponding to the switch operation signals S1~S5, S16~S20, and S28 being enabled, the switch operation signals S6~S10, S11~S15, and S21 are disabled) ), a plurality of upper switches (switches Q21, Q28) and a plurality of switches (such as switches Q1~Q10) of the second switched capacitor converter 1203 control the second switched capacitor converter 1203 and the upper resonant capacitor C21 in series with the second voltage V2 and between the ground potential, and establishes at least one current path between the second voltage V2 and the ground potential, and a plurality of upper switches (switches Q21, Q28) and a plurality of switches (such as switches Q11~Q20) of the first switched capacitor converter 1202 The upper-layer resonant capacitor C21 and the first switched capacitor converter 1202 are controlled to be disconnected, and the first switched capacitor converter 1202 is controlled to establish at least one current path between the second voltage V2 and the ground potential.

The aforementioned current paths are, for example, established by the corresponding switches that are turned on when the switch operation signals S1~S5, S16~S20, and S28 are enabled, or when the switch operation signals S6~S10, S11~S15, and S21 are enabled. current path.

The first switched capacitor converter 1202 and the second switched capacitor converter 1203 are further configured with resonant slots as in the embodiment of FIG. 6, that is, resonant slots 12021, 12022, 12031, and 12032. Thus, through the resonant slots 12021, 12022, 12031 and 12032 perform conversion between the first voltage V1 and the second voltage V2 in a resonance manner.

In this embodiment, the ratio of the first voltage V1 to the second voltage V2 as shown in FIG. 13 is 8. Specifically, in the steady state, the cross-voltage of the upper resonant capacitor C21 is 4*V2, and the cross-voltage of the non-resonant capacitors C1 and C11 (both corresponding to the non-resonant capacitors in the previous embodiment) is 2*V2. The cross voltages of the resonant capacitors C3 and C13 (both correspond to the resonant capacitors in the foregoing embodiment) and the resonant capacitors C2 and C12 (both correspond to the resonant capacitors in the foregoing embodiment) are all V2.

Continuing to refer to FIG. 14 , according to the present invention, the basic topology of FIG. 14 can be used to recursively expand the number of layers of the pipelined switched capacitor voltage conversion circuit, thereby achieving the first voltage V1 and a higher conversion ratio between the second voltage V2. As shown in FIG. 14 , any pipelined switched capacitor voltage conversion circuit with the basic topology consistent with FIG. 14 can be used to replace the first switched capacitor converter 1202 and the second switched capacitor converter 1203 (such as the first switched capacitor converter in the figure). The switched capacitor converter 1202b and the second switched capacitor converter 1203b can correspond to an N-layer pipelined switched capacitor voltage conversion circuit, where N is an integer greater than or equal to 2), thereby obtaining a higher number of layers of pipelined switched capacitor voltages. The conversion circuit, that is, the pipelined switched capacitor voltage conversion circuit 120b will become an N+1 layer pipelined switched capacitor voltage conversion circuit.

For example, if the pipelined switched capacitor voltage conversion circuit 120 of FIG. 13 is substituted into the first switched capacitor converter 1202b and the second switched capacitor converter 1203b of FIG. 14, then the pipelined switched capacitor voltage converter of FIG. 14 The conversion circuit 120b will be configured as a 16:1 pipeline switched capacitor voltage conversion circuit. The same substitution configuration can be repeatedly increased in the number of layers, thereby continuously increasing the power conversion factor.

In this embodiment (16:1 switched capacitor voltage conversion circuit), the first switched capacitor converter 1202 and the second switched capacitor converter 1203 in Figure 13 can be regarded as the pipeline switched capacitors of the lowest layer (layer 1). type voltage conversion circuit, its structure corresponds to the switched capacitor converter 502 in Figure 6, and the pipeline type switched capacitor voltage conversion circuit 120 in Figure 13 can be regarded as a two-layer pipeline type switched capacitor voltage conversion circuit. Furthermore, The two-layer pipelined switched capacitor voltage conversion circuit 120 of Figure 13 is substituted into the first switched capacitor converter 1202b and the second switched capacitor converter 1203b of Figure 14, then the pipelined switched capacitor voltage conversion circuit 120b shown in Figure 14, It can be regarded as a three-layer pipeline switched capacitor voltage conversion circuit.

FIG. 15 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. The switched capacitor voltage conversion circuit 130 shown in Figure 15 is similar to The difference between the switched capacitor voltage conversion circuit 120 shown in FIG. 13 is that the first switched capacitor converter 1302 shares the inductor L11, and the second switched capacitor converter 1303 shares the inductor L1, and is similar to the one in the embodiment of FIG. 7 In a similar manner to the embodiment of FIG. 7 , the resonant capacitors C13 and C12 are connected in parallel and then connected in series with the inductor L1. Like the switched capacitor voltage conversion circuit 120 of FIG. 13 , this embodiment also operates the first switched capacitor converter 1302 and the second switched capacitor converter 1303 in an interleaved manner to perform power conversion, and the first switched capacitor converter 1302 and The second switched capacitor converters 1303 are each similar to the aforementioned switched capacitor converter 602 in FIG. 7 , and perform power conversion in a resonant manner.

The control circuit 1301 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way conduction procedure is similar to FIG. 2C and FIG. 6 , please refer to the detailed description of FIG. 2C and FIG. 6 .

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. Implemented again For example, when the one-way conduction procedure adopts one-way conduction to DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the second program, the one-way conduction program, the first program and the one-way conduction program in sequence.

FIG. 16 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. The switched capacitor voltage conversion circuit 140 shown in FIG. 16 is similar to the switched capacitor voltage conversion circuit 120 shown in FIG. 13 . The difference lies in the inductors L1 and L2 of the first switched capacitor converter 1402 and the second switched capacitor converter 1403 . , L11 and L12 are not directly connected in series with the resonant capacitors C3, C2, C13 and C12 respectively, but respectively through the first switching node LX1, the second switching node LX2, the first switching node LX11, the second switching node LX12 and the resonant capacitor C3 , C2, C13, and C12 are connected in series. In other words, the switched capacitor voltage conversion circuit 140 performs switching operations in a manner similar to the switched capacitor voltage conversion circuit 120, and then through the inductors L1, L2, L11, L12 and the corresponding resonant capacitance, The conversion between the first voltage V1 and the second voltage V2 is performed in the resonance manner in the embodiment of FIG. 5 . In this embodiment, the ratio of the first voltage V1 to the second voltage V2 is also 8.

The control circuit 1401 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way conduction procedure is similar to FIG. 2C and FIG. 6 , please refer to the detailed description of FIG. 2C and FIG. 6 .

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program consists of Change period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 17 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. The switched capacitor voltage conversion circuit 150 of Figure 17 is similar to the switched capacitor voltage conversion circuit 140 of Figure 16. The inductors L1, L2, L11, and L12 in the switched capacitor voltage conversion circuit 150 have mutual inductance with each other. Therefore, the switching The inductor current IL1, the inductor current IL2, the inductor current IL11, and the inductor current IL12 of the capacitive voltage conversion circuit 150 can have a better current balance with each other. At the same time, the resonant capacitors C3, C2, C13, and C12 can also have a better current balance with each other. Has better voltage balance. In one embodiment, the switched capacitor voltage conversion circuit 150 can be configured such that the inductors L1, L2, L11, and L12 all have mutual inductance with each other, or only some of the inductors have mutual inductance with each other. In one embodiment, the inductors L1, L2, L11, and L12 may be configured as at least one transformer.

The control circuit 1501 of this embodiment can be implemented using the control circuit architecture of Figure 2B combined with Figures 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of Figure 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way conduction procedure is similar to FIG. 2C and FIG. 6 , please refer to the detailed description of FIG. 2C and FIG. 6 .

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 18A is a circuit schematic diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. As shown in FIG. 18A , the switched capacitor voltage conversion circuit 160 includes resonant capacitors C1 and C3, at least one non-resonant capacitor C2, switches Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, and a resonant inductor. L1, L2 and control circuit 1601.

As shown in Figure 18A, the control circuit 1601 is used to generate switch operation signals S1, S3, S5, S8, S9 and switch operation signals S2, S4, S6, S7, S10 to respectively correspond to the second program and the first program. And operate corresponding plural switches (such as switches Q1 ~ Q10) to switch the electrical connection relationship of the corresponding resonant capacitors C1, C3 and non-resonant capacitor C2. The switched capacitor voltage conversion circuit 160 includes at least one resonant tank, such as resonant tanks 16021 and 16022. The resonant tank 16021 has a resonant capacitor C1 and a resonant inductor L1 connected in series with each other, and the resonant tank 16022 has a resonant capacitor C3 and a resonant inductor L2 connected in series with each other. . The switches Q1-Q10 are correspondingly coupled to at least one resonant slot 16021, 16022, and respectively switch corresponding The electrical connection relationship between the resonant slots 16021 and 16022 corresponds to the second program and the first program. In the second process, the corresponding resonant grooves 16021 and 16022 are resonantly charged, and in the first process the corresponding resonant grooves 16021 and 16022 are resonantly discharged. At least one non-resonant capacitor C2 is coupled to at least one resonant slot 16021, 16022. The switching operation signals S1, S3, S5, S8, S9 and the switching operation signals S2, S4, S6, S7, S10 switch the non-resonant capacitor C2 and at least The electrical connection relationship between resonant slots 16021 and 16022. The cross-voltage of the non-resonant capacitor C2 is maintained at a fixed ratio to the first voltage V1, for example, half of the first voltage V1 in this embodiment. The first process and the second process are sequentially sequenced into a combination and then the combination is repeated to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into the first voltage V1. The switch operation signals S1, S3, S5, S8, S9 and the switch operation signals S2, S4, S6, S7, and S10 respectively switch to the conduction level for a conduction period, and the switch operation signals S1, S3, S5, S8, and S9 The conduction period and the conduction period of the switch operation signals S2, S4, S6, S7, S10 do not overlap with each other, so that the first process and the second process do not overlap with each other.

In the second program, according to the switch operation signals S1, S3, S5, S8, S9 and the switch operation signals S2, S4, S6, S7, S10, the switches Q1, Q3, Q5, Q8, Q9 are is turned on, and the switches Q2, Q4, Q6, Q7, and Q10 are not turned on, so that the resonant capacitor C1 and the resonant inductor L1 of the resonant tank 16021 are connected in series between the first voltage V1 and the second voltage V2, and the non-resonant capacitor C2 is connected to the resonant The resonant capacitor C3 and the resonant inductor L2 of the slot 16022 are connected in series between the ground potential and the second voltage V2 to charge the resonant capacitors C1 and C3 and discharge the non-resonant capacitor C2. In the first program, according to the switch operation signals S1, S3, S5, S8, S9 and the switch operation signals S2, S4, S6, S7, S10, the switches Q2, Q4, Q6, Q7, Q10 are turned on, and the switches Q1, Q3 , Q5, Q8, and Q9 are not conductive, so that the non-resonant capacitor C2, the resonant capacitor C1 of the resonant tank 16021, and the resonant inductor L1 are connected in series between the ground potential and the second voltage V2, and the resonant capacitor C3 of the resonant tank 16022 is connected to the resonance The inductor L2 is connected in series between the ground potential and the second voltage V2 to discharge the resonant capacitors C1 and C3 and charge the non-resonant capacitor C2.

The operation mode of the switched capacitor voltage conversion circuit 160 having the resonant slots 16021 and 16022 as shown in FIGS. 18A and 18B is well known to those with ordinary knowledge in the art and will not be described in detail here.

The control circuit 1601 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. As shown in Figure 18A, in the one-way conduction procedure, when the switch operation signals S1~S10 are used to control the switching of multiple switches (for example, the switches Q1~Q10 are all non-conductive), one end of the corresponding inductor L1 passes through at least one switch ( For example, the body diodes (shown as dashed lines in Figure 18A) in switches Q8 and Q2 are electrically connected to the DC potential, so that the inductor current ILo1 flowing toward the second voltage V2 has the third resonant frequency. The resonant current, wherein the third resonant frequency is different from the first resonant frequency of the first process and the second resonant frequency of the second process. For example, inductor L1 is connected in series through the internal diodes in switches Q8, Q2, and Q5. Between the second voltage V2 and the ground potential, the inductor current IL1 can freewheel in the direction of the current shown by the dotted arrow in FIG. 18A . Please continue to refer to Figure 18A. In the one-way conduction procedure, when the switch operation signals S1~S10 are used to control the switching of multiple switches (for example, the switches Q1~Q10 are all non-conductive), the inductor current IL2 flows through the corresponding inductor L2. It is through the conduction of the internal diode (body diode) (shown as a dotted line in Figure 18A) in at least one switch (such as switches Q4 and Q9), and through the resonant tank 16022 and at least one switch (such as switches Q4 and Q9 ) in the closed loop 16023 formed by the internal diode (shown as a dotted line in Figure 18A) freewheels, thereby causing the second state where the inductor current ILo2 stops flowing toward the second voltage V2. In this case, the closed-loop current (ie, the inductor current IL2) has no net current flowing into or out of the non-resonant capacitor (also called the output capacitor) CV2.

Please refer to Figure 18B again. In the one-way conduction procedure, when the switch operation signals S1~S10 are used to control the switching of multiple switches (for example, the switches Q1~Q10 are all non-conductive), one end of the corresponding inductor L2 passes through at least one switch ( For example, the body diode (shown as a dotted line in Figure 18B) in the switch Q10 is electrically connected to the DC potential, so that the inductor current ILo2 flowing toward the second voltage V2 is resonant with the third resonant frequency. Current, wherein the third resonant frequency is different from the first resonant frequency of the first process and the second resonant frequency of the second process. For example, the inductor L2 is connected in series between the second voltage V2 and the ground potential through the internal diodes in the switches Q10, Q3 and Q7, so that the inductor current IL2 can continue according to the current direction shown by the dotted arrow in Figure 18B. flow. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the implementation of the one-way conduction procedure is similar to FIG. 6. Please refer to the detailed description of FIG. 6.

FIG. 19 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. As shown in Figure 19, the switched capacitor voltage conversion circuit of the present invention Path 170 includes resonant capacitors C1~C3, switches Q1~Q10, and inductors L1~L3. The switches Q1-Q3 are respectively connected in series with the corresponding resonant capacitors C1-C3, and the resonant capacitors C1-C3 are connected in series with the corresponding inductors L1-L3 respectively. It should be noted that the number of capacitors in the power conversion circuit of the present invention is not limited to three in this embodiment, and can also be two or more than four, and the number of inductors is not limited to three in this embodiment, and can also be For two or four or more.

The switches Q1-Q10 can switch the electrical connection relationship between the corresponding resonant capacitors C1-C3 and the inductors L1-L3 according to the corresponding operation signals. In the second process, the switches Q1 to Q4 are turned on, and the switches Q5 to Q10 are turned off, so that the resonant capacitors C1 to C3 and the inductors L1 to L3 are connected in series between the first voltage V1 and the second voltage V2, so that A second current path is formed to perform the charging process. In the first procedure, the inductors L1-L3 can be used as discharge inductors, the switches Q5-Q10 are turned on, and the switches Q1~Q4 are not turned on, so that the resonant capacitor C1 and the corresponding inductor L1 are connected in series between the second voltage V2 and the ground potential. The resonant capacitor C2 and the corresponding inductor L2 are connected in series between the second voltage V2 and the ground potential. The resonant capacitor C3 and the corresponding inductor L3 are connected in series between the second voltage V2 and the ground potential to form a plurality of first current paths for the discharge process. . It should be noted that the above-mentioned first process and the above-mentioned second process are carried out in different time periods in an interleaved manner, rather than simultaneously, to convert the first voltage V1 to the second voltage V2 or to convert the second voltage V2 to the first voltage V2. Voltage V1. Wherein, the first process and the second process are sequentially sequenced into a combination and then the combination is repeated to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into the first voltage V1. In this embodiment, the DC bias voltage of each resonant capacitor C1, C2, and C3 is the second voltage V2. Therefore, the resonant capacitor C1, C2, and C3 in this embodiment need to withstand a lower rated voltage, so it can be used Smaller size capacitor.

The control circuit 1701 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. As shown in Figure 19, in the one-way conduction procedure, by operating the switch When the signals S1~S10 control the switching of multiple switches (for example, the switches Q1~Q10 are all non-conductive), one end of the corresponding inductor L2 and L3 passes through at least one switch (such as the switches Q8 and Q2 and the switches Q9 and Q3) respectively. The internal body diode (shown as the dotted line in Figure 19) is electrically connected to the DC potential, so that the inductor currents ILo2 and ILo3 flowing toward the second voltage V2 are resonant currents with the third resonant frequency and have the third resonant frequency. Resonant currents with four resonant frequencies, wherein the third resonant frequency and the fourth resonant frequency are different from the first resonant frequency of the first process and the second resonant frequency of the second process. For example, the inductor L2 is connected in series between the second voltage V2 and the ground potential through the internal diodes in the switches Q8, Q2, Q3 and Q4, and the inductor L3 is connected in series through the internal diodes in the switches Q9, Q3 and Q4. The body is connected in series between the second voltage V2 and the ground potential, so that the inductor current IL2 and the inductor current IL3 can freewheel respectively in accordance with the current direction shown by the dotted arrow in Figure 19, for example. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the implementation of the one-way conduction procedure is similar to FIG. 6. Please refer to the detailed description of FIG. 6.

In one embodiment, the first process has a first resonant frequency, and the second process has a second resonant frequency. In a preferred embodiment, the first resonant frequency and the second resonant frequency are the same.

FIG. 20 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. The difference between this embodiment and the previous embodiment is that in this embodiment, multiple resonant capacitors share one charging inductor or one discharging inductor. Therefore, no matter how many resonant capacitors there are, only one charging inductor and one discharging inductor are needed, which can further reduce the number of resonant capacitors. The number of inductors. As shown in Figure 20, the switched capacitor voltage conversion circuit 180 of the present invention includes resonant capacitors C1~C3, switches Q1~Q10, and inductors L1~L2. The switches Q1-Q3 are connected in series with the corresponding resonant capacitors C1-C3 respectively, and the switch Q4 is connected in series with the inductor L1. It should be noted that the switching capacitor of the present invention The number of capacitors in the voltage conversion circuit is not limited to three in this embodiment, and can also be two or four or more.

The switches Q1-Q10 can switch the electrical connection relationship between the corresponding resonant capacitors C1-C3 and the inductor L1 and the inductor L2 according to the corresponding operation signal. In the second process, according to the switch operation signals S1~S4 and S5~S10, the switches Q1~Q4 are turned on, and the switches Q5-Q10 are not turned on, so that the resonant capacitors C1-C3 are connected in series with each other and then connected in series with the inductor L1. A second current path is formed between a voltage V1 and a second voltage V2 to perform the charging process. In the first process, according to the switch operation signals S1~S4 and S5~S10, the switches Q5-Q10 are turned on, and the switches Q1~Q4 are not turned on, so that the resonant capacitors C1~C3 are connected in parallel with each other and the series inductor L2 is connected to the second voltage V2 and ground potential to form a plurality of first current paths to perform the discharge process. It should be noted that the above-mentioned first process and the above-mentioned second process are carried out in different time periods in an interleaved manner, rather than simultaneously, to convert the first voltage V1 to the second voltage V2 or to convert the second voltage V2 to the first voltage V2. Voltage V1. In this embodiment, the DC bias voltage of each resonant capacitor C1, C2, and C3 is the second voltage V2. Therefore, the resonant capacitor C1, C2, and C3 in this embodiment need to withstand a lower rated voltage, so it can be used Smaller size capacitor.

The control circuit 1801 of this embodiment can be implemented using the control circuit architecture of Figure 2B combined with Figures 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of Figures 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first When the voltage is V1, the switching cycle Tsw can be composed of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure, or the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure can be adopted. The sequence constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

In one embodiment, the first process has a first resonant frequency, and the second process has a second resonant frequency. In a preferred embodiment, the first resonant frequency and the second resonant frequency are the same. In another embodiment, the first resonant frequency and the second resonant frequency are different. In one embodiment, the inductance value of the inductor L1 is equal to the inductance value of the inductor L2. In another embodiment, the inductance value of the inductor L1 is different from the inductance value of the inductor L2.

FIG. 21 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. In this embodiment, the charging inductor and the discharging inductor may be the same inductor L. Such an arrangement can further reduce the number of inductors. As shown in Figure 21, the switched capacitor voltage conversion circuit 190 of the present invention includes resonant capacitors C1~C3, switches Q1~Q10, and an inductor L. The switches Q1-Q3 are connected in series with the corresponding resonant capacitors C1-C3 respectively, and the switch Q4 is connected in series with the inductor L. It should be noted that the number of capacitors in the switched capacitor voltage conversion circuit of the present invention is not limited to three in this embodiment, and can also be two or four or more.

It should be noted that in this embodiment, the charging inductor and the discharging inductor are a single and identical inductor L. In the first procedure, by switching the switches Q1-Q10, the resonant capacitors C1-C3 are connected in parallel and then connected in series. An identical inductor L. The so-called charging inductor and discharging inductor are a single and identical inductor L, which refers to the inductance in the charging process and the discharging process in the second process (which can also be called the charging process) and the first process (which can also be called the discharging process). The current IL only flows through a single inductor L, and does not flow through other inductor components.

The switches Q1-Q10 can switch the electrical connection relationship between the corresponding resonant capacitors C1-C3 and the inductor L according to the corresponding operation signal. In the second process, according to the switch operation signals S1~S4 and S5~S10, the switches Q1~Q4 are turned on, and the switches Q5-Q10 are not turned on, so that the resonant capacitors C1-C3 are connected in series with each other and then connected in series with the inductor L. A second current path is formed between a voltage V1 and a second voltage V2 to perform the charging process. In the first procedure, according to the switch operation signals S1~S4 and S5~S10, the switches Q5-Q10 are turned on, and the switches Q1~Q4 are not turned on, so that the resonant capacitors C1~C3 are connected in parallel with each other and the series inductor L is connected to the second voltage V2 and ground potential to form a plurality of first current paths to perform the discharge process. It should be noted that the above-mentioned first process and the above-mentioned second process are repeatedly and interleavedly performed in different time periods, rather than simultaneously, in order to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into first voltage V1. In this embodiment, the DC bias voltage of each resonant capacitor C1 ~ C3 is the second voltage V2. Therefore, the resonant capacitor C1 ~ C3 in this embodiment needs to withstand a lower rated voltage, so a smaller size can be used. capacitor.

The control circuit 1901 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 22 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. As shown in Figure 22, the switched capacitor voltage conversion circuit 200 of the present invention includes resonant capacitors C1~C2, switches Q1~Q7, and an inductor L. The switches Q1-Q2 are connected in series with the corresponding resonant capacitors C1-C2 respectively, and the switch Q3 is connected in series with the inductor L.

The switches Q1-Q7 can switch the electrical connection relationship between the corresponding resonant capacitors C1-C2 and the inductor L according to the corresponding operation signal. In the second process, according to the switch operation signals S1~S3 and S4~S7, the switches Q1-Q3 are turned on, and the switches Q4-Q7 are turned off, so that the resonant capacitors C1-C2 are connected in series with each other and in series with the inductor L. Between a voltage V1 and a second voltage V2 time to form a second current path to perform the charging process. In the first procedure, according to the switch operation signals S1~S3 and S4~S7, the switches Q4-Q7 are turned on, and the switches Q1-Q3 are not turned on, so that the resonant capacitors C1~C2 are connected in parallel with each other and the series inductor L is connected to the second voltage V2 and ground potential to form a plurality of first current paths to perform the discharge process. It should be noted that the above-mentioned first process and the above-mentioned second process are repeatedly and interleavedly performed in different time periods, rather than simultaneously, in order to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into first voltage V1. In this embodiment, the DC bias voltage of each resonant capacitor C1 ~ C2 is the second voltage V2. Therefore, the resonant capacitor C1 ~ C2 in this embodiment needs to withstand a lower rated voltage, so a smaller size can be used. capacitor.

The control circuit 2001 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or take first The sequence of the program, the one-way routing program and the second program constitutes the switching cycle Tsw. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 23 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. As shown in Figure 23, the switched capacitor voltage conversion circuit 210 of the present invention includes a resonant capacitor C3, non-resonant capacitors C1~C2, switches Q1~Q8, and an inductor L.

The switches Q1-Q8 can switch the electrical connection relationship between the corresponding resonant capacitor C3, non-resonant capacitor C1~C2 and the inductor L according to the corresponding operation signal. In the second process, according to the switch operation signals S1~S8, the switches Q1, Q3, Q5, and Q7 are turned on, and the switches Q2, Q4, Q6, and Q8 are turned off, so that the non-resonant capacitor C1, the resonant capacitor C3, and the inductor are L are connected in series between the first voltage V1 and the second voltage V2, so that one end of the non-resonant capacitor C2 is coupled between the non-resonant capacitor C1 and the resonant capacitor C3, and the other end of the non-resonant capacitor C2 is coupled to the ground. potential to form a second current path to perform the charging process. In the first program, according to the switching operation signals S1~S8, the switches Q2, Q4, Q6, and Q8 are turned on, and the switches Q1, Q3, Q5, and Q7 are not turned on, so that the resonant capacitor C3 and the inductor L are connected in series with the second voltage V2 and ground potential to form a first current path to perform the discharge process. It should be noted that the above-mentioned first process and the above-mentioned second process are repeatedly and interleavedly performed in different time periods, rather than simultaneously, in order to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into first voltage V1.

The control circuit 2101 of this embodiment can be implemented using the control circuit architecture of Figure 2B combined with Figures 3A, 3C~3F, 3H, 4A or 4C. Please refer to Figures 2B, 3A, 3C~3F, Detailed description of 3H, 4A or 4C. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 24 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. As shown in Figure 24, the switched capacitor voltage conversion circuit 220 of the present invention includes a resonant capacitor C3, non-resonant capacitors C1~C2, switches Q1~Q6, and an inductor L.

The switches Q1-Q6 can switch the electrical connection relationship between the corresponding resonant capacitor C3, non-resonant capacitor C1~C2 and the inductor L according to the corresponding operation signal. In the second program, according to the switch operation signals S1~S6, the switches Q1, Q3, and Q5 are turned on, and the switches Q2, Q4, and Q6 are turned on. Non-conductive, so that the non-resonant capacitor C2 and the resonant capacitor C3 are connected in parallel with the non-resonant capacitor C1 and the inductor L in series with each other between the first voltage V1 and the second voltage V2 to form a second current path for the charging process. In the first procedure, according to the switching operation signals S1~S6, the switches Q2, Q4, and Q6 are turned on, and the switches Q1, Q3, and Q5 are not turned on, so that the resonant capacitor C3 and the inductor L are connected in series between the second voltage V2 and the ground potential. time to form a first current path to perform the discharge process. It should be noted that the above-mentioned first process and the above-mentioned second process are repeatedly and interleavedly performed in different time periods, rather than simultaneously, in order to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into first voltage V1.

The control circuit 2201 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. Implemented again For example, when the one-way conduction procedure adopts one-way conduction to DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the second program, the one-way conduction program, the first program and the one-way conduction program in sequence.

FIG. 25 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to yet another embodiment of the present invention. As shown in Figure 25, the switched capacitor voltage conversion circuit 230 of the present invention includes a resonant capacitor C3, non-resonant capacitors C1~C2, switches Q1~Q8, and an inductor L.

The switches Q1-Q8 can switch the electrical connection relationship between the corresponding resonant capacitor C3, non-resonant capacitor C1~C2 and the inductor L according to the corresponding operation signal. In the second program, according to the switch operation signals S1~S8, the switches Q1, Q2, Q5, and Q6 are turned on, and the switches Q3, Q4, Q7, and Q8 are turned off, so that the non-resonant capacitor C1, the resonant capacitor C3, and the inductor are L are connected in series between the first voltage V1 and the second voltage V2, so that one end of the non-resonant capacitor C2 is coupled between the non-resonant capacitor C1 and the resonant capacitor C3, and the other end of the non-resonant capacitor C2 is coupled to the ground. potential to form a second current path to perform the charging process. In the first program, according to the switching operation signals S1~S8, the switches Q3, Q4, Q7, and Q8 are turned on, and the switches Q1, Q2, Q5, and Q6 are not turned on, so that the resonant capacitor C3 and the inductor L are connected in series with the second voltage V2 and ground potential to form a first current path to perform the discharge process. It should be noted that the above-mentioned first process and the above-mentioned second process are repeatedly and interleavedly performed in different time periods, rather than simultaneously, in order to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into first voltage V1.

The control circuit 2301 of this embodiment can be implemented using the control circuit architecture of Figure 2B combined with Figures 3A, 3C~3F, 3H, 4A or 4C. Please refer to Figures 2B, 3A, 3C~3F, Detailed description of 3H, 4A or 4C. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or The switching cycle Tsw is composed of the first program, the one-way conduction program, and the second program in sequence. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

FIG. 26 is a schematic circuit diagram showing a switched capacitor voltage conversion circuit according to another embodiment of the present invention. As shown in Figure 26, the switched capacitor voltage conversion circuit 240 of the present invention includes resonant capacitors C1~C3, switches Q1~Q10, and an inductor L.

The switches Q1-Q10 can switch the electrical connection relationship between the corresponding resonant capacitors C1~C3 and the inductor L according to the corresponding operation signal. In the second program, according to the switch operation signals S1~S10, the switches Q1, Q3, Q5, Q8, and Q9 are turned on, and the switches Q2, Q4, Q6, Q7, Q10 is non-conductive, so that the resonant capacitor C1, the resonant capacitor C3 and the inductor L are connected in series between the first voltage V1 and the second voltage V2, and one end of the resonant capacitor C2 is coupled between the resonant capacitor C1 and the resonant capacitor C3. time, and the other end of the resonant capacitor C2 is coupled to the ground potential to form a second current path for the charging process. In the first program, according to the switch operation signals S1~S10, the switches Q2, Q4, Q6, Q7, and Q10 are turned on, and the switches Q1, Q3, Q5, Q8, and Q9 are not turned on, so that the resonant capacitor C1 and the resonant capacitor C2 are connected in series. It is then connected in parallel with the resonant capacitor C3 and then in series with the inductor L between the second voltage V2 and the ground potential to form a first current path for performing the discharge process. It should be noted that the above-mentioned first process and the above-mentioned second process are repeatedly and interleavedly performed in different time periods, rather than simultaneously, in order to convert the first voltage V1 into the second voltage V2 or convert the second voltage V2 into first voltage V1.

The control circuit 2401 of this embodiment can be implemented using the control circuit architecture of FIG. 2B combined with FIGS. 3A, 3C~3F, 3H, 4A or 4C. Please refer to the details of FIGS. 2B, 3A, 3C~3F, 3H, 4A or 4C. Narrative. The implementation of the one-way pass procedure is similar to Figure 2C. Please refer to the detailed description of Figure 2C.

In one embodiment. When the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure and the first procedure may be adopted to form the switching period Tsw, or the one-way conduction procedure, the first procedure and the first procedure may be adopted. The sequence of the second program constitutes the switching period Tsw. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the first voltage V1, the sequence of the one-way conduction procedure, the second procedure, the one-way conduction procedure and the first procedure can be adopted to form the switching period Tsw, Or the switching cycle Tsw is composed of the one-way conduction procedure, the first procedure, the one-way conduction procedure and the second procedure in sequence. In another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the second procedure, the one-way conduction procedure, and the first procedure can be adopted to form the switching period Tsw, or take first The sequence of the program, the one-way routing program and the second program constitutes the switching cycle Tsw. In yet another embodiment, when the one-way conduction procedure adopts one-way conduction to the DC potential (such as ground potential), the sequence of the first procedure, the one-way conduction procedure, the second procedure and the one-way conduction procedure can be adopted to form the switching. The cycle Tsw, or the sequence of the second procedure, the one-way conduction procedure, the first procedure and the one-way conduction procedure constitutes the switching cycle Tsw.

As mentioned above, the present invention provides a switched capacitor voltage conversion circuit, which does not need to balance the resonant capacitor voltage to half the input voltage, can achieve zero current switching and zero voltage switching to reduce switching power loss, and can use smaller The inductor can reduce the size of the inductor and can achieve lower voltage stress on the switch, resonant capacitor and inductor. Compared with the resonant switched capacitor conversion circuit with a fixed voltage conversion ratio, the output voltage can be adjusted and it can have higher efficiency. .

The present invention has been described above with reference to the preferred embodiments. However, the above description is only to make it easy for those familiar with the art to understand the content of the present invention, and is not intended to limit the broadest scope of rights of the present invention. The various embodiments described are not limited to single application, but can also be used in combination. For example, two or more embodiments can be used in combination, and part of the components in one embodiment can also be used to replace those in another embodiment. Corresponding components. In addition, under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. For example, the present invention refers to "processing or computing according to a certain signal or generating a certain output result", which is not limited to Depending on the signal itself, it also includes performing voltage-to-current conversion, current-to-voltage conversion, and/or ratio conversion on the signal when necessary, and then processing or calculating the converted signal to produce an output result. It can be seen from this that under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations, and there are many ways of combinations. I won’t list them all here. Accordingly, the scope of the present invention is intended to cover the above and all other equivalent changes.

20: Switching capacitive voltage conversion circuit

201:Control circuit

202: Switched Capacitor Converter

C1: Resonant capacitor

CV2: non-resonant capacitor

I1: first current

I2: second current

IC1: Resonant capacitor current

IL, ILo: inductor current

L: inductance

Q1~Q4: switch

S1~S4: switch operation signal

V1: first voltage

V2: second voltage

VC1: Resonant capacitor cross voltage

Vx: voltage

Claims (30)

A switched capacitor voltage conversion circuit is used to convert a first voltage into a second voltage or the second voltage into the first voltage. The switched capacitor voltage conversion circuit includes: a switched capacitor converter, a coupling connected between the first voltage and the second voltage; and a control circuit for generating a pulse width modulation signal according to the first voltage or the second voltage, and the control circuit generates a pulse width modulation signal according to the pulse width modulation The signal and a zero current detection signal generate a control signal to control the switched capacitor converter to convert the first voltage to the second voltage or convert the second voltage to the first voltage; wherein the switched capacitor The converter includes: at least one resonant capacitor; a plurality of switches coupled to the at least one resonant capacitor; and at least one inductor; wherein when the first voltage is converted to the second voltage, the control signal includes a one-way conduction operation signal, a first operation signal and a second operation signal respectively corresponding to a one-way conduction procedure, a first procedure and a second procedure, and then used to operate the corresponding plurality of switches to switch the corresponding inductor The electrical connection relationship; wherein, when the first voltage is converted to the second voltage, the control circuit generates the pulse width modulation signal according to the second voltage, and the one-way conduction program, the first program and the The operation mode of the second process is as follows: in the one-way conduction process, the one-way conduction operation signal is used to control the switching of the plurality of switches to form a one-way conduction path between a first DC potential and the second voltage. , so that an inductor current flowing through the inductor flows to the second voltage through the unidirectional conduction path; In the first process, the switching of the plurality of switches is controlled by the first operation signal, so that the corresponding resonant capacitor and the corresponding inductor are connected in series between the second voltage and a second DC potential to form a The first current path is such that the inductor current flowing through the inductor and flowing to the second voltage is a resonant current with a first resonant frequency; in the second process, the plurality of switches is controlled by the second operation signal switching, so that the corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and the second voltage to form a second current path, so that the current path flows through the inductor and to the second voltage. The inductor current is a resonant current with a second resonant frequency; wherein the one-way conduction operation signal, the first operation signal and the second operation signal are respectively switched to a consistent energy level during a corresponding enable period. , and the enabling periods of the plurality of segments do not overlap with each other, so that the one-way communication process, the first process and the second process do not overlap with each other; wherein, the one-way communication process, the first process and the second process The combination is sequentially sequenced and then repeated, so that the inductor performs inductive power conversion switching between the one-way conduction process, the first process and the second process, thereby converting the first voltage to the second voltage; wherein, the control circuit further generates the zero current detection signal according to the time point when the inductor current reaches zero current. The switched capacitor voltage conversion circuit of claim 1, wherein the control circuit includes: a pulse width modulation circuit for generating the second voltage according to the second voltage when the first voltage is converted to the second voltage. a pulse width modulation signal, and when the second voltage is converted to the first voltage, the pulse width modulation signal is generated according to the first voltage; a zero current detection circuit for when the inductor current reaches the zero current At the time point, the zero current detection signal is generated; and A control signal generating circuit for generating the control signal according to the pulse width modulation signal and the zero current detection signal, and according to the control signal, respectively in the one-way conduction procedure, the first procedure and the second In the program, a plurality of switch operation signals corresponding to the plurality of switches are generated. The switched capacitive voltage conversion circuit as claimed in claim 1, wherein the one-way conduction procedure, the first procedure and the second procedure constitute a switching cycle, and the one-way conduction procedure, the first procedure in the switching cycle The sequence of the program and the second program can be combined arbitrarily, and the end time of the earliest program in the switching cycle is determined by the pulse width modulation signal, and the end time of other programs in the switching cycle except the earliest program Determined by the zero current detection signal. The switched capacitor voltage conversion circuit of claim 1, wherein in the one-way conduction process, the inductor current is one of the following: the inductor current is a resonant current with a third resonant frequency; or the inductor current is Non-resonant current; when the inductor current is the non-resonant current, the inductor current is a linear slope current that gradually decreases, or another linear slope current that gradually increases. The switched capacitor voltage conversion circuit as described in claim 4, wherein in the unidirectional conduction procedure, when the inductor current is the non-resonant current and is the gradually decreasing linear ramp current, the unidirectional conduction path includes the At least one body diode in the switch is in the non-conducting state through which the inductor current flows. The switched capacitor voltage conversion circuit of claim 4, wherein in the unidirectional conduction procedure, the unidirectional conduction path includes at least one switch in a conductive state through which the inductor current flows. The switched capacitor voltage conversion circuit of claim 1, wherein the first DC potential is the first voltage or a ground potential, and the second DC potential is the first voltage or the ground potential. The switched capacitor voltage conversion circuit of claim 2, wherein the pulse width modulation circuit includes: a locking circuit for locking the second voltage to a reference voltage to generate a voltage locking signal; a ramp circuit , for generating a ramp signal; and a comparison circuit for comparing the voltage lock signal and the ramp signal to generate the pulse width modulation signal. The switched capacitor voltage conversion circuit of claim 8, wherein the ramp circuit includes a reset circuit for resetting the ramp signal according to the control signal or a clock signal. The switched capacitive voltage conversion circuit as described in claim 1, wherein the control signal adjusts the enabling period of the first process and/or the second process to achieve zero voltage switching or zero voltage switching of soft switching. Current switching. The switched capacitor voltage conversion circuit of claim 3, wherein the switching period is a fixed period. The switched capacitive voltage conversion circuit as claimed in claim 11, wherein after the one-way conduction procedure, the first procedure and the second procedure of the switching cycle are all completed, the plurality of switches remain non-conductive for a zero current period. until the end of the fixed period. The switched capacitor voltage conversion circuit of claim 1 further includes a non-resonant capacitor coupled to the resonant capacitor, wherein the cross-voltage of the non-resonant capacitor is maintained at A fixed DC voltage. The switched capacitor voltage conversion circuit of claim 1, wherein when the second voltage is converted to the first voltage, the control circuit generates the pulse width modulation signal according to the first voltage to generate the control signal, and converting the second voltage to the first voltage; wherein when the second voltage is converted to the first voltage, the control signal includes an anti-unidirectional conduction operation signal, a third operation signal and a fourth operation signal , respectively corresponding to an anti-unidirectional conduction procedure, a third procedure and a fourth procedure, and operating the corresponding plurality of switches to switch the corresponding electrical connection relationship of the inductor; wherein, when the second voltage is converted When the first voltage is the first voltage, the operations of the reverse one-way conduction procedure, the third procedure and the fourth procedure are as follows: in the reverse one-way conduction procedure, the plurality of switches are controlled by the reverse one-way conduction operation signal. switching to form a reverse unidirectional conduction path between a third DC potential and the first voltage, so that the inductor current flowing through the inductor flows to the first voltage through the reverse unidirectional conduction path; in the In the third process, the third operation signal is used to control the switching of the plurality of switches, so that the corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and a fourth DC potential to form a third The current path is such that the inductor current flowing through the inductor and flowing to the first voltage is a resonant current with a fourth resonant frequency; in the fourth process, the switching of the plurality of switches is controlled by the fourth operation signal. , the corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and the second voltage to form a fourth current path, so that the inductor current flows through the inductor and flows to the first voltage. is the resonant current with a fifth resonant frequency; Among them, the anti-unidirectional conduction operation signal, the third operation signal and the fourth operation signal are respectively switched to the enable level during a corresponding enable period, and the plural enable periods do not overlap with each other. , so that the anti-unidirectional communication process, the third process and the fourth process do not overlap with each other; wherein the anti-unidirectional communication process, the third process and the fourth process are sequentially sequenced into a combination and then the combination is repeated , so that the inductive power conversion switching is performed between the anti-unidirectional conduction process, the third process and the fourth process, and then the second voltage is converted into the first voltage. The switched capacitor voltage conversion circuit as described in claim 1, wherein the switched capacitor converter includes a distributed switched capacitor converter, a series-parallel switched capacitor converter, Dickson switched capacitor converter, ladder switched capacitor converter, doubler switched capacitor converter, Fibonacci switched capacitor converter Fibonacci switched capacitor converter, pipelined switched capacitor converter or switched tank converter. The switched capacitor voltage conversion circuit as claimed in claim 15, wherein the series-parallel switched capacitor converter (series-parallel switched capacitor converter) includes a half series-parallel switched capacitor converter (2-to-1 series -parallel switched capacitor converter), one-third series-parallel switched capacitor converter (3-to-1 series-parallel switched capacitor converter) or one-quarter series-parallel switched capacitor converter (4-to-1 series -parallel switched capacitor converter). The switched capacitor voltage conversion circuit of claim 14, wherein the third DC potential is the second voltage or a ground potential, and the fourth DC potential is the second voltage or the ground potential. The switched capacitor voltage conversion circuit of claim 2, wherein the zero current detection circuit includes: a current sensing circuit for sensing the current flowing through the at least one inductor to generate a corresponding at least one current sense circuit. detection signal; and a comparator coupled to the current sensing circuit for comparing the at least one current sensing signal with a reference signal to generate the corresponding at least one zero current detection signal to indicate the at least one The point at which the inductor current reaches this zero current. The switched capacitor voltage conversion circuit as claimed in claim 1, wherein the combination includes two of the one-way conduction procedures, the first procedure and the second procedure, wherein the two one-way conduction procedures, the first procedure and the second program constitute a switching cycle, and the order of the two one-way conduction programs, the first program and the second program in the switching cycle can be arbitrarily combined, and the earliest program in the switching cycle The end time point is determined by the pulse width modulation signal, and the end time points of other programs except the earliest program in the switching cycle are determined by the zero current detection signal. A switched capacitor converter control method for converting a first voltage into a second voltage or converting the second voltage into the first voltage, the switched capacitor converter control method includes: according to the first voltage or the The second voltage generates a pulse width modulation signal; and generates a zero current detection signal according to the time point when an inductor current reaches zero current; and According to the pulse width modulation signal and the zero current detection signal, a control signal is generated to control the switched capacitor converter to convert the first voltage to the second voltage or convert the second voltage to the first voltage. voltage; wherein, when the first voltage is converted to the second voltage, the pulse width modulation signal is generated according to the second voltage, and the control signal includes a one-way conduction operation signal, a first operation signal and a The second operation signal corresponds to a one-way conduction procedure, a first procedure and a second procedure respectively, and is further used to operate the corresponding plurality of switches to switch the electrical connection relationship of the corresponding inductor; wherein, when the third When a voltage is converted to the second voltage, the operation modes of the one-way conduction procedure, the first procedure and the second procedure are as follows: in the one-way conduction procedure, the plurality of switches are controlled by the one-way conduction operation signal. switching to form a unidirectional conduction path between a first DC potential and the second voltage, so that the inductor current flowing through the inductor flows to the second voltage through the unidirectional conduction path; in the first In the program, the first operation signal is used to control the switching of the plurality of switches, so that a corresponding resonant capacitor and a corresponding inductor are connected in series between the second voltage and a second DC potential to form a first current path. , so that the inductor current flowing through the inductor and flowing to the second voltage is a resonant current with a first resonant frequency; in the second process, the switching of the plurality of switches is controlled by the second operation signal, so that The corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and the second voltage to form a second current path, so that the inductor current flowing through the inductor and flowing to the second voltage has A resonant current at a second resonant frequency; wherein the one-way conduction operation signal, the first operation signal and the second operation signal are respectively switched to a consistent energy level during a corresponding enable period, and the complex segment enabling period do not overlap with each other, so that the one-way communication process, the first process and the second process do not overlap with each other; wherein the one-way communication process, the first process and the second process are sequentially sequenced into a combination and then repeated The combination enables the inductor to perform inductive power conversion switching between the one-way conduction process, the first process and the second process, thereby converting the first voltage to the second voltage. The switched capacitor converter control method of claim 20, wherein when the second voltage is converted to the first voltage, the pulse width modulation signal is generated according to the first voltage, and the control signal includes an inverter A directional conduction operation signal, a third operation signal and a fourth operation signal respectively correspond to an anti-unidirectional conduction procedure, a third procedure and a fourth procedure, and the corresponding plurality of switches are operated to switch the corresponding The electrical connection relationship of the inductor; wherein, when converting the second voltage to the first voltage, the operation modes of the reverse one-way conduction process, the third process and the fourth process are as follows: in the reverse one-way conduction process In the program, the switching of the plurality of switches is controlled by the anti-unidirectional conduction operation signal to form an anti-unidirectional conduction path between a third DC potential and the first voltage, so that the inductor current flowing through the inductor It flows to the first voltage through the anti-unidirectional conduction path; in the third process, the switching of the plurality of switches is controlled by the third operation signal, so that the corresponding resonant capacitor and the corresponding inductor are connected in series to the third A third current path is formed between a voltage and a fourth DC potential, so that the inductor current flowing through the inductor and flowing to the first voltage is a resonant current with a fourth resonant frequency; in the fourth In the program, the fourth operation signal is used to control the switching of the plurality of switches, so that the corresponding resonant capacitor and the corresponding inductor are connected in series between the first voltage and the second voltage to form a fourth current path, So that the inductor current flowing through the inductor and flowing to the first voltage is a resonant current with a fifth resonant frequency; Among them, the anti-unidirectional conduction operation signal, the third operation signal and the fourth operation signal are respectively switched to the enable level during a corresponding enable period, and the plural enable periods do not overlap with each other. , so that the anti-unidirectional communication process, the third process and the fourth process do not overlap with each other; wherein the anti-unidirectional communication process, the third process and the fourth process are sequentially sequenced into a combination and then the combination is repeated , so that the inductive power conversion switching is performed between the anti-unidirectional conduction process, the third process and the fourth process, and then the second voltage is converted into the first voltage. The switched capacitor converter control method as described in claim 20, wherein the one-way conduction program, the first program and the second program form a switching cycle, and the one-way conduction program, the first process in the switching cycle The sequence of the program and the second program can be combined arbitrarily, and the end time of the earliest program in the switching cycle is determined by the pulse width modulation signal, and the end time of other programs in the switching cycle except the earliest program Determined by the zero current detection signal. The switched capacitor converter control method as described in claim 21, wherein the anti-unidirectional conduction procedure, the third procedure and the fourth procedure constitute a switching cycle, and the anti-unidirectional conduction procedure, the anti-unidirectional conduction procedure and the fourth procedure in the switching cycle The order of the third program and the fourth program can be combined arbitrarily, and the end time of the earliest program in the switching cycle is determined by the pulse width modulation signal, and the other programs in the switching cycle except the earliest program The end point is determined by the zero current detection signal. The switched capacitor converter control method as claimed in claim 20, wherein in the one-way conduction procedure, the inductor current is one of the following: the inductor current is a resonant current with a third resonant frequency; or The inductor current is a non-resonant current; when the inductor current is the non-resonant current, the inductor current is a linear slope current that gradually decreases, or another linear slope current that gradually increases. The switched capacitor converter control method as claimed in claim 21, wherein in the anti-unidirectional conduction procedure, the inductor current is one of the following: the inductor current is a resonant current with a sixth resonant frequency; or the inductor current is a non-resonant current; when the inductor current is a non-resonant current, the inductor current is a linear slope current that gradually decreases, or another linear slope current that gradually increases. The switched capacitor converter control method of claim 20, wherein the first DC potential is the first voltage or a ground potential, and the second DC potential is the first voltage or the ground potential. The switched capacitor converter control method of claim 21, wherein the third DC potential is the second voltage or a ground potential, and the fourth DC potential is the second voltage or the ground potential. The switching capacitor converter control method as described in claim 22, wherein the switching period is a fixed period, and after the one-way conduction process, the first process and the second process of the switching period are completed, the plurality of The switches remain off for a zero current period until the end of the fixed period. The switched capacitor converter control method as described in claim 23, wherein the switching period is a fixed period, and the reverse unidirectional conduction process, the third process during the switching period After both the sequence and the fourth procedure are completed, the plurality of switches remain non-conductive for a zero current period until the end of the fixed period. The switching capacitor converter control method as claimed in claim 20, wherein the combination includes two of the one-way conduction procedures, the first program and the second program, wherein the two one-way conduction procedures, the first program and the second program constitute a switching cycle, and the order of the two one-way conduction programs, the first program and the second program in the switching cycle can be arbitrarily combined, and the earliest program in the switching cycle The end time point is determined by the pulse width modulation signal, and the end time points of other programs except the earliest program in the switching cycle are determined by the zero current detection signal.