TWI816350B - Method for patterning a coating on a surface and device including a patterned coating - Google Patents

Abstract

An opto-electronic device includes: (1) a substrate; (2) a nucleation inhibiting coating covering a first region of the substrate; and (3) a conductive coating including a first portion and a second portion. The first portion of the conductive coating covers a second region of the substrate, the second portion of the conductive coating partially overlaps the nucleation inhibiting coating, and the second portion of the conductive coating is spaced from the nucleation inhibiting coating by a gap.

Description

Methods for patterning coatings on surfaces and devices including patterned coatings

Cross-references to related applications This application claims U.S. Provisional Application No. 62/373,927 filed on August 11, 2016, U.S. Provisional Application No. 62/377,429 filed on August 19, 2016, and U.S. Provisional Application No. 62/377,429 filed on August 19, 2016. The rights and priorities of the international application PCT/IB2016/056442 dated October 26, 2016, all of which are hereby incorporated into this application for reference.

Field of invention The following generally relates to a method of depositing a conductive material on a surface. Specifically, the method relates to the selective deposition of the conductive material on a surface for forming a conductive structure of a device.

Background of the invention Organic light-emitting diodes (OLEDs) typically include several layers of organic material between conductive thin film electrodes, and at least one of the organic layers is an electroluminescent layer. When a voltage is applied to the electrodes, holes and electrons are injected from the anode and cathode respectively. Holes and electrons injected from the electrode migrate through the organic layer to the electroluminescent layer. When holes and electrons are close together, they are attracted to each other due to the Coulomb force. The holes and electrons then combine to form bound states called excitons. Excitons can decay through a process of radiative recombination, in which photons are released. Alternatively, excitons can decay through a non-radiative recombination process in which no photons are released. Note that the internal quantum efficiency (IQE) used here should be interpreted as the proportion of all electron-hole pairs generated in a device that are degraded by the radiative recombination process.

Depending on the rotational state of electron-electron pairs (ie, excitons), the radiative recombination process may occur as a fluorescent or phosphorescent process. Specifically, excitons formed from electron-hole pairs can be characterized as having singlet or triplet rotational states. In summary, the radiative decay of singlet excitons produces fluorescence, while the decay of triplet excitons produces phosphorescence.

Recently, other light-emitting mechanisms for OLEDs have been proposed and studied, including thermally active delayed fluorescence (TADF). In short, TADF luminescence occurs through an inverse inter-system crossing process, which converts triplet excitons into singlet excitons with the help of thermal energy, followed by the radiative decay of the singlet excitons.

The external quantum efficiency (EQE) of an OLED device refers to the ratio of charge carriers provided to the OLED device relative to the number of photons emitted from the device. For example, an EQE of 100% means that each electron injected into the device emits a photon. It should be understood that the EQE of a device is generally substantially lower than the IQE of the device. The difference between EQE and IQE is generally due to a number of factors, such as absorption and reflection of light caused by components of the device.

OLED devices are typically classified as "bottom emitting" or "top emitting" devices, depending on the relative direction of light emitted from the device. In the case of bottom-emitting devices, the light produced by the radiation recombination process is emitted toward the base substrate of the device, while in the case of top-emitting devices, the light is emitted in a direction away from the base substrate. Accordingly, in order to reduce light attenuation, in bottom-emitting devices, the electrodes close to the base substrate are usually made to be light-transmissive (e.g., substantially transparent or translucent), while in top-emitting devices, the electrodes located far away from the base material are usually made transparent. The electrodes of the base substrate are usually made to be light-transmissive. Depending on the specific device structure, either the anode or the cathode can be used as the transmissive electrode in top-emitting and bottom-emitting devices.

The OLED device may also be a bifacial light-emitting device configured to emit light in two directions relative to the base substrate. For example, a dual-sided light emitting device may include a transmissive anode and a transmissive cathode such that light from each pixel is emitted in two directions. In another example, a dual-sided emissive display device may include a first set of pixels configured to emit light in one direction, and a second set of pixels configured to emit light in another direction, such that a single electrode from each pixel is Transmissive.

In addition to the above device configurations, transparent or translucent OLED devices may also be implemented, wherein the device includes a transparent portion that allows external light to transmit through the device. For example, in a transparent OLED display device, a transparent portion can be provided in a non-emitting area between adjacent pixels. In another example, a transparent OLED lighting panel can be formed by providing several transparent areas between the light emitting areas of the panel. Transparent or translucent OLED devices can be bottom-emitting, top-emitting, or double-sided emitting devices.

While either the cathode or the anode can be selected as the transmissive electrode, a typical top-emitting device includes a light-transmissive cathode. Materials generally used to form the transmissive cathode include transparent conductive oxides (TCO), such as indium tin oxide (ITO) and zinc oxide (ZnO); and thin films, such as those formed by depositing silver (Ag), aluminum (Al) or various A film formed of thin layers of metal alloys (such as magnesium-silver (Mg:Ag) alloy and ytterbium-silver (Yb:Ag) alloy with a composition ranging from about 1:9 to about 9:1 by volume). Multilayer cathodes including two or more TCO and/or thin metal films may also be used.

Particularly in the case of thin films, relatively thin layers with a thickness of about tens of nanometers can help improve transparency and good optical properties (eg, reduce micro-cavity effects) for OLEDs. However, the reduction in thickness of the transmissive electrode is accompanied by an increase in its sheet resistance. Electrodes with high sheet resistance are generally not ideal for OLED applications because they produce large current resistance (IR) voltage drops when the device is in use, which is detrimental to OLED performance and efficiency. Increasing the power supply level can compensate for the IR drop to a certain extent; however, when the power supply level is increased for a pixel, in order to maintain the proper operation of the device, the voltage supplied to other components will also increase, which is detrimental. .

In order to reduce the power supply specifications of top-emitting OLED devices, solutions have been proposed to form busbar structures or auxiliary electrodes on the devices. For example, such an auxiliary electrode may be formed by depositing a conductive coating that is in electrical communication with the transmissive electrode of the OLED device. This auxiliary electrode allows current to be delivered more efficiently to various areas of the device by reducing the sheet resistance of the transmissive electrode and the associated IR voltage drop.

Because the auxiliary electrode is usually provided on the top surface of the OLED stack including the anode, one or more organic layers and the cathode, the patterning of the auxiliary electrode can traditionally be achieved using a shadow mask with mask holes, through which the auxiliary electrode can be patterned. The pores can be selectively deposited with a conductive coating by, for example, physical vapor deposition (PVD). However, because the masks are typically metal masks, they are prone to distortion during the high-temperature deposition process, causing distortion of the mask holes and the resulting deposition pattern. Additionally, masks often degrade in functionality with successive depositions because the conductive layer adheres to the mask and obscures its features. Therefore, once the mask is deemed ineffective in producing the desired pattern, the mask may need to be cleaned or disposed of in a time-consuming and expensive manner, making this method costly and complex. Accordingly, the shadow masking method cannot be used to mass-produce OLED devices on a commercial scale. Furthermore, the aspect ratio of features that can be produced using shadow masking methods is often limited by the masking effect of the metal mask and the mechanical (e.g., tensile) strength of the metal mask, since large metal masks are formed during the shadow mask deposition process. Usually stretched.

Another challenge in patterning conductive coatings on a surface through shadow masking is that some, but not all, patterns can be achieved using a single mask. Because each part of the mask is physically supported, not all patterns may be completed in a single processing stage. For example, when a pattern specifies a single feature, it is often not possible to achieve the desired pattern using a single masking stage. In addition, masks used to create repeating structures (eg, busbar structures or auxiliary electrodes) throughout the device surface include a large number of perforations or holes formed in the mask. However, forming a large number of holes in the mask may compromise the structural integrity of the mask, thereby causing significant distortion or deformation of the mask during processing, which may distort the pattern of the deposited structure.

Summary of the invention According to some embodiments, a device (eg, an optoelectronic device) includes: (1) a substrate; (2) a nucleation-inhibiting coating covering a first region of the substrate; and (3) a conductive coating The layer includes a first part and a second part. The first portion of the conductive coating covers a second area of the substrate, the second portion of the conductive coating partially overlaps the nucleation inhibiting coating, and the second portion of the conductive coating overlaps the formation The nuclear suppression coatings are separated by a gap.

According to some embodiments, a device (eg, an optoelectronic device) includes: (1) a substrate including a first region and a second region; (2) a conductive coating including a first portion and a second region. Part Two. The first portion of the conductive coating covers the second area of the substrate, the second portion of the conductive coating overlaps the first area of the substrate, and the second portion of the conductive coating overlaps the second area of the substrate. The first areas of the substrate are separated by a gap.

According to some embodiments, a device (eg, an optoelectronic device) includes: (1) a substrate; (2) a nucleation-inhibiting coating covering a first region of the substrate; and (3) a conductive coating A layer covering a laterally adjacent second region of the substrate. The conductive coating includes magnesium, and the nucleation inhibiting coating is characterized by having an initial adhesion probability to magnesium of no greater than about 0.02.

According to some embodiments, a method of fabricating a device (eg, an optoelectronic device) includes: (1) providing a substrate and a nucleation inhibiting coating covering a first region of the substrate; and (2) depositing a An electrically conductive coating covers one of the second areas of the substrate. The conductive coating includes magnesium, and the nucleation inhibiting coating is characterized by having an initial adhesion probability to magnesium of no greater than 0.02.

Detailed description of preferred embodiments It will be understood that, for simplicity and clarity of illustration, where appropriate, reference characters may be repeated between the drawings to indicate corresponding or similar components. Additionally, many details are set forth in order to provide a complete understanding of the examples described herein. However, it will be understood by those skilled in the art that the example embodiments described herein may be practiced without some of these details. In other instances, certain methods, procedures, and components have not been described in detail so as not to obscure the example embodiments described herein.

In one aspect according to some embodiments, a method for depositing a conductive coating on a surface is provided. In some embodiments, the method is performed in a method of manufacturing an optoelectronic device. In some embodiments, the method is performed within a method of manufacturing another device. In some embodiments, the method includes depositing a nucleation inhibiting coating on a first region of a substrate, producing a patterned substrate. The patterned substrate includes the first region covered by the nucleation inhibiting coating, and is exposed from the nucleation inhibiting coating, or is substantially free of the nucleation inhibiting coating or is not substantially covered by the nucleation inhibiting coating. The nuclear suppression coating covers one of the second areas. The method also includes treating the patterned substrate to deposit the conductive coating on the second region of the substrate. In some embodiments, the conductive coating material includes magnesium. In some embodiments, processing the patterned substrate includes processing both the nucleation inhibiting coating and the second region of the substrate to deposit the conductive coating on the second region of the substrate. layer while the nucleation inhibiting coating remains exposed from the conductive coating, or is substantially free of the conductive coating or is not substantially covered by the conductive coating. In some embodiments, processing the patterned substrate includes evaporating or sublimating a source material used to form the conductive coating, and removing the nucleation inhibition coating and the second region of the substrate. are exposed to the evaporation source material.

The term "nucleation inhibition" as used herein is intended to mean a coating or layer of material having a surface that exhibits a relatively low affinity for the deposition of a conductive material such that deposition of the conductive material on the surface is Inhibition, while the term "nucleation promotion" is used to mean a coating or a layer of material that has a surface that exhibits a relatively high affinity for the deposition of a conductive material such that the deposition of the conductive material on the surface is promoted . One way to measure the nucleation-inhibiting or nucleation-promoting properties of a surface is the surface's probability of initial adhesion to a conductive material, such as magnesium. For example, a nucleation-inhibiting coating relative to magnesium may mean a coating having a surface that exhibits a relatively low probability of adhesion to magnesium vapor, such that deposition of magnesium on that surface is inhibited while promoting nucleation relative to magnesium. By coating, we may mean a coating having a surface that exhibits a relatively high probability of adhesion to magnesium vapor, such that the deposition of magnesium on that surface is promoted. The terms "adhesion probability" and "adhesion coefficient" are used interchangeably herein. Another way to measure the nucleation-inhibiting or nucleation-promoting properties of a surface is to compare the rate of initiation of deposition of a conductive material (such as magnesium) on the surface with the rate of initiation of the conductive material on another surface (reference). Deposition rate where both surfaces are treated or exposed to a vapor flux of the conductive material.

The terms "evaporation" and "sublimation" are used interchangeably herein and generally refer to a deposition method that converts a source material to be deposited on a target surface in a solid state, for example, into a vapor (eg, via heating).

As used herein, "substantially free of" or "substantially uncovered" a surface (or some areas of the surface) of a material means that the surface (or some areas of the surface) is substantially devoid of the material. Specifically, in the context of conductive coatings, a measure of the amount of conductive material on a surface is light transmittance, since conductive materials, such as metals including magnesium, reduce and/or absorb light. Accordingly, a surface can be considered a substantially non-conductive material if its transmittance in the visible portion of the electromagnetic spectrum is greater than 90%, greater than 92%, greater than 95%, or greater than 98%. Another way to measure the amount of material on a surface is the percentage of the surface covered by the material, such as if the percentage covered by the material is not greater than 10%, not greater than 8%, not greater than 5%, not greater than 3%, or If not greater than 1%, the surface may be deemed to be substantially free of the material. Surface coverage can be assessed using imaging techniques such as transmission electron microscopy, atomic force microscopy, or scanning electron microscopy.

FIG. 1 is a schematic diagram illustrating a method of depositing a nucleation inhibiting coating 140 on a surface 102 of a substrate 100 according to one embodiment. In the embodiment of FIG. 1 , a source 120 including a source material is heated under vacuum to cause the source material to evaporate or sublime. The source material includes or consists essentially of the material used to form the nucleation inhibiting coating 140 . The evaporated source material then travels in the direction of arrow 122 toward the substrate 100 . A shadow mask 110 having a hole or slit 112 is disposed in the path of the evaporated source material such that a portion of the flux passing through the hole 112 is selectively incident on a region of the surface 102 of the substrate 100, The nucleation inhibiting coating 140 is thereby formed thereon.

2A-2C illustrate a microcontact transfer method for depositing a nucleation inhibiting coating on a surface of a substrate in one embodiment. Similar to shadow masking, the microcontact printing method can be used to selectively deposit the nucleation inhibiting coating on an area of a substrate surface.

Figure 2A illustrates the first stage of the micro-contact transfer method, in which a stamp 210 includes a protrusion 212 with a nucleation-inhibiting coating 240 provided on one surface. As one skilled in the art will appreciate, various suitable methods may be used to deposit the nucleation inhibiting coating 240 on the surface of the protrusion 212 .

As shown in FIG. 2B , the stamp 210 is then brought to the vicinity of a substrate 100 so that the nucleation inhibiting coating 240 deposited on the surface of the protrusion 212 is in contact with a surface 102 of the substrate 100 . When the nucleation inhibition coating 240 contacts the surface 102 , the nucleation inhibition coating 240 will adhere to the surface 102 of the substrate 100 .

Thus, when the stamp 210 is removed from the substrate 100 as shown in FIG. 2C , the nucleation inhibiting coating 240 is effectively transferred to the surface 102 of the substrate 100 .

Once a nucleation inhibiting coating has been deposited on an area of a surface of a substrate, a conductive coating can be deposited on the remaining uncovered areas of the surface that do not have the nucleation inhibiting coating. Turning to FIG. 3 , a conductive coating source 410 is depicted directing an evaporated conductive material toward a surface 102 of a substrate 100 . As shown in FIG. 3 , the conductive coating source 410 can direct the evaporated conductive material so that it is incident on a covered or treated area of the substrate 102 (i.e., the surface 102 on which the nucleation-inhibiting coating is deposited) 140 area) and uncovered or untreated areas. However, because the surface of the nucleation inhibiting coating 140 exhibits a relatively low initial adhesion coefficient compared to the uncovered surface 102 of the substrate 100 , a conductive coating 440 is selectively deposited onto the substrate 102 areas where the nucleation inhibiting coating 140 is absent. For example, the initial deposition rate of the evaporated conductive material on the uncovered area of the surface 102 may be at least or Greater than about 80 times, at least or greater than about 100 times, at least or greater than about 200 times, at least or greater than about 500 times, at least or greater than about 700 times, at least or greater than about 1000 times, at least or greater than about 1500 times, at least or greater About 1700 times or at least or more than about 2000 times. The conductive coating 440 may include, for example, pure or substantially pure magnesium.

It will be appreciated that although shadow mask patterning and microcontact transfer methods have been illustrated and described above, other methods may be used to selectively pattern a substrate by depositing a nucleation inhibiting material. Various additive and subtractive methods of patterning a surface can be used to selectively deposit a nucleation-inhibiting coating. Examples of such methods include, but are not limited to, photolithography, printing (including inkjet or vapor jet printing and reel-to-reel printing), organic vapor deposition (OVPD), and laser-induced thermography (LITI) patterning and combinations thereof.

In some applications, it may be desirable to deposit a conductive coating with specific material properties onto a substrate surface on which the conductive coating is not readily deposited. For example, pure or substantially pure magnesium is generally not easily deposited on organic surfaces due to its low adhesion coefficient on various organic surfaces. Accordingly, in some embodiments, the substrate surface is additionally treated by depositing a nucleation promoting coating thereon prior to depositing a conductive coating, such as one comprising magnesium.

Based on findings and experimental observations, it is hypothesized that fullerenes and other nucleation-promoting materials (as will be described further herein) serve as nucleation sites for the deposition of conductive coatings including magnesium. For example, where evaporation methods are used to deposit magnesium on a fullerene-treated surface, the fullerene molecules serve as nucleation sites that promote the formation of stable nuclei for magnesium deposition. In some cases, less than a monolayer of fullerenes or other nucleation-promoting materials can be provided on the treated surface to serve as nucleation sites for the deposition of magnesium. It will be appreciated that treating the surface by depositing several monolayers of nucleation promoting material can create a greater number of nucleation sites and therefore a higher probability of initial adhesion.

It will be appreciated that the amount of fullerene or other material deposited on a surface may be more or less than a single layer. For example, the surface can be treated by depositing 0.1 monolayer, 1 monolayer, 10 monolayers, or more of a nucleation promoting material or a nucleation inhibiting material. As used herein, depositing a single layer of material means the amount of material required to cover a desired area of a surface with the constituent molecules or atoms of the material in a single layer. Similarly, depositing 0.1 monolayer of material, as used herein, means the amount of material required to cover 10% of a desired area of a surface with a single layer of the material's constituent molecules or atoms. The actual thickness of the deposited material may be non-uniform due to, for example, possible stacking or aggregation of molecules or atoms. For example, depositing a single layer of material may result in some areas of a surface being uncovered by the material, while other areas of the surface may be deposited with multiple atomic or molecular layers.

The term "fullerene" as used herein means a material including carbon molecules. Examples of fullerene molecules include carbon cage molecules containing a three-dimensional skeleton of multiple carbon atoms forming a closed shell, and the shape may be spherical or hemispherical. A fullerene molecule may be designated _Cn , where n is an integer corresponding to the number of carbon atoms contained in the carbon skeleton of the fullerene molecule. Examples of fullerene molecules include _Cn , where n ranges from 50 to 250, such as _C60 , _C70 , _{C72 ,} C74, _C76 , _C78 , _C80 , _C82 , and _C84 . Other examples of fullerene molecules include carbon molecules in tubular or columnar shapes, such as single-walled carbon nanotubes and multi-walled carbon nanotubes.

Figure 4 illustrates an embodiment of an apparatus in which a nucleation promoting coating 160 is deposited prior to depositing a conductive coating 440. As shown in FIG. 4 , the nucleation promoting coating 160 is deposited on the area of the substrate 100 that is not covered by a nucleation inhibiting coating 140 . Accordingly, when the conductive coating 440 is deposited, the conductive coating 440 is preferentially formed on the nucleation promoting coating 160 . For example, the initial deposition rate of the material of the conductive coating 440 on the surface of the nucleation promoting coating 160 may be at least or greater than the initial deposition rate of the material on the surface of the nucleation inhibiting coating 140 . About 80 times, at least or greater than about 100 times, at least or greater than about 200 times, at least or greater than about 500 times, at least or greater than about 700 times, at least or greater than about 1000 times, at least or greater than about 1500 times, at least or greater than about 1700 times or at least or greater than about 2000 times. Typically, the nucleation promoting coating 160 may be deposited on the substrate 100 before or after the nucleation inhibiting coating 140 is deposited. Various methods for selectively depositing a material on a surface can be used to deposit the nucleation promoting coating 160, including, but not limited to, evaporation (including thermal evaporation and electron beam evaporation), photolithography, printing (including Inkjet or vapor jet printing, roll-to-roll printing and micro-contact transfer printing), OVPD, LITI patterning and combinations thereof.

Figures 5A-5C illustrate a method for depositing a conductive coating on a surface of a substrate in one embodiment.

In Figure 5A, a surface 102 of a substrate 100 is treated by depositing a nucleation inhibiting coating 140 thereon. Specifically, in the exemplary embodiment, deposition is accomplished by evaporating a source material within a source 120 and directing the evaporated source material toward the surface 102 on which deposition is to be performed. Arrow 122 indicates the general direction in which the evaporation flux is directed towards the surface 102 . As described, the nucleation inhibiting coating 140 may be deposited using an open mask or without a mask such that the nucleation inhibiting coating 140 covers substantially the entire surface 102 , resulting in a treated surface 142 . Optionally, the nucleation inhibiting coating 140 may be selectively deposited on a region of the surface 102 using selective deposition techniques as described above.

Although evaporation is illustrated as being used to deposit the nucleation inhibiting coating 140, it should be understood that other deposition and surface coating techniques may be used, including, but not limited to, spin coating, dip coating, printing, spray coating, OVPD, LITI patterning chemical vapor deposition (PVD) (including sputtering), chemical vapor deposition (CVD), and combinations thereof.

In Figure 5B, a nucleation promoting coating 160 is selectively deposited on the treated surface 142 using a shadow mask 110. As described, an evaporation source material is directed from the source 120 toward the substrate 100, passing through the mask 110. The mask includes a hole or slit 112 such that a portion of the evaporated source material incident on the mask 110 is blocked as it passes through the mask 110 , while another portion of the evaporated source material is directed through the mask 112 . The hole 112 of the mask 110 is selectively deposited on the treated surface 142 to form the nucleation promoting coating 160 . Accordingly, upon completion of deposition of the nucleation promoting coating 160, a patterned surface 144 is produced.

Figure 5C illustrates the stage of depositing a conductive coating 440 on the patterned surface 144. The conductive coating 440 may include, for example, pure or substantially pure magnesium. As will be further explained below, the material of the conductive coating 440 exhibits a relatively low initial adhesion coefficient to the nucleation inhibiting coating 140 and exhibits a relatively high initial adhesion coefficient to the nucleation promoting coating 160 . Accordingly, deposition may be performed using an open mask or without a mask to selectively deposit the conductive coating 440 on areas of the substrate 100 where the nucleation promoting coating 160 is present. As shown in FIG. 5C , most or substantially no evaporated material incident on the conductive coating 440 on the surface of the nucleation inhibition coating 140 is deposited on the nucleation inhibition coating 140 .

Figures 5D-5F illustrate a method for depositing a conductive coating on a surface of a substrate in another embodiment.

In FIG. 5D , a nucleation promoting coating 160 is deposited on a surface 102 of a substrate 100 . The nucleation promoting coating 160 may be deposited, for example, using thermal evaporation using an open mask or without a mask. Optionally, other deposition and surface coating techniques may be used, including, but not limited to, spin coating, dip coating, printing, spray coating, OVPD, LITI patterning, PVD (including sputtering), CVD, and combinations thereof.

In Figure 5E, a nucleation inhibiting coating 140 is selectively deposited over an area of the nucleation promoting coating 160 using a shadow mask 110. Accordingly, upon completion of deposition of the nucleation inhibiting coating 140, a patterned surface is produced. Then in FIG. 5F , a conductive coating 440 is deposited on the patterned surface using an open mask or maskless deposition method, so that the conductive coating is formed on the exposed areas of the nucleation promotion coating 160 . Layer 440.

In the foregoing embodiments, it should be understood that the conductive coating 440 formed by these methods can be used as an electrode or conductive structure of an electronic device. For example, the conductive coating 440 may be the anode or cathode of an organic optoelectronic device such as an OLED device or an organic photovoltaic (OPV) device. In addition, the conductive coating 440 can also be used as an electrode for an optoelectronic device including quantum dots as an active layer material. For example, such a device may include an active layer disposed between a pair of electrodes, the active layer including quantum dots. The device may be, for example, an electroluminescent quantum dot display device in which light is emitted from the quantum dot active layer as a result of an electrical current provided by the electrodes. The conductive coating 440 can also be a busbar or auxiliary electrode of any of the aforementioned devices.

Accordingly, it should be understood that the substrate 100 on which various coatings are deposited may include one or more additional organic and/or inorganic layers not explicitly described or illustrated in the preceding embodiments. For example, in the case of an OLED device, the substrate 100 may include one or more electrodes (eg, anode and/or cathode), charge injection and/or transport layers, and electroluminescent layers. The substrate 100 may additionally include one or more transistors and other electronic components, such as resistors and capacitors included in active matrix or passive matrix OLED devices. For example, the substrate 100 may include one or more top-gate thin film transistors (TFTs), one or more bottom-gate TFTs, and/or other TFT structures. The TFT can be an n-type TFT or a p-type TFT. Examples of TFT structures include those including amorphous silicon (a-Si), indium gallium zinc oxide (IGZO), and low temperature polycrystalline silicon (LTPS).

The substrate 100 may also include a base substrate for supporting the additional organic and/or inorganic layers identified above. For example, the base substrate can be a flexible or rigid substrate. The base substrate may include, for example, silicon, glass, metal, polymer (eg, polyimide), sapphire, or other materials suitable for use as the base substrate.

The surface 102 of the substrate 100 can be an organic surface or an inorganic surface. For example, if the conductive coating 440 is used as a cathode for an OLED device, the surface 102 may be the top surface of a stack of organic layers (eg, the surface of the electron injection layer). In another example, if the conductive coating 440 is used as an auxiliary electrode for a top-emitting OLED device, the surface 102 may be the top surface of an electrode (eg, a common cathode). Optionally, this auxiliary electrode can be formed directly under the transmissive electrode on top of a stack of organic layers.

Figure 6 illustrates an electroluminescent (EL) device 600 according to one embodiment. The EL device 600 may be, for example, an OLED device or an electroluminescent quantum dot device. In one embodiment, the device 600 is an OLED device that includes a base substrate 616, an anode 614, an organic layer 630, and a cathode 602. In the exemplary embodiment, the organic layer 630 includes a hole injection layer 612, a hole transport layer 610, an electroluminescent layer 608, an electron transport layer 606, and an electron injection layer 604.

The hole injection layer 612 may be formed of a hole injection material that is generally conducive to injecting holes into the anode 614 . The hole transport layer 610 may be formed of a hole transport material, which is typically a material that exhibits high hole mobility.

The electroluminescent layer 608 may be formed, for example, by doping a host material with an emitter material. The emitter material may be, for example, a fluorescent emitter, a phosphorescent emitter or a TADF emitter. Several emitter materials can also be doped into the host material to form the electroluminescent layer 608.

The electron transport layer 606 may be formed of an electron transport material that generally exhibits high electron mobility. The electron injection layer 604 may be formed of an electron injection material, which is typically used to facilitate the cathode 602 to inject electrons.

It will be appreciated that the structure of device 600 may be modified by omitting or incorporating one or more layers. Specifically, one or more of the hole injection layer 612, the hole transport layer 610, the electron transport layer 606, and the electron injection layer 604 may be omitted from the device structure. One or more additional layers may also be present in the device structure. Such additional layers include, for example, a hole blocking layer, an electron blocking layer, and additional charge transport and/or injection layers. Each layer may additionally include any number of sub-layers, and each layer and/or sub-layer may include various mixtures and gradients of compositions. It is also understood that the device 600 may include one or more layers containing inorganic and/or organo-metallic materials and is not limited to devices composed solely of organic materials. For example, the device 600 may include quantum dots.

The device 600 can be connected to a power source 620 for supplying current to the device 600 .

In another embodiment in which device 600 is an EL quantum dot device, the EL layer 608 typically includes quantum dots that emit light when supplied with electrical current.

Figure 7 is a flowchart outlining the stages of manufacturing an OLED device according to one embodiment. At 704, an organic layer is deposited on a target surface. For example, the target surface may be the surface of an anode that has been deposited on top of a base substrate (which may include, for example, glass, polymer, and/or metal foil). As mentioned above, the organic layer may include, for example, a hole injection layer, a hole transport layer, an electroluminescent layer, an electron transport layer, and an electron injection layer. Then in stage 706, a nucleation inhibiting coating is deposited on top of the organic layer using a selective deposition or patterning method. In stage 708, a nucleation promoting coating is selectively deposited over the nucleation inhibiting coating, creating a patterned surface. For example, the nucleation promoting coating and the nucleation inhibiting coating can be selectively deposited using mask evaporation, micro-contact transfer printing methods, photolithography, printing (including inkjet or vapor jet printing, and roll-to-roll printing), OVPD or LITI patterning. Then in stage 710, a conductive coating is deposited on the patterned surface using an open mask or maskless deposition method. The conductive coating can serve as a cathode or another conductive structure for the OLED device.

8 and 9A-9D, a method for manufacturing an OLED device according to another embodiment is provided. Figure 8 is a flowchart outlining the stages for fabricating the OLED device, and Figures 9A-9D are schematic diagrams illustrating the device at various stages of the method. In stage 804, an organic layer 920 is deposited on a target surface 912 using a source 991. In the exemplary embodiment, the target surface 912 is the surface of the anode 910 that has been deposited on top of a base substrate 900 . The organic layer 920 may include, for example, a hole injection layer, a hole transport layer, an electroluminescent layer, an electron transport layer, and an electron injection layer. Then in stage 806, a nucleation promoting coating 930 is deposited on top of the organic layer 920 using a source 993 and an opening mask or no mask. In stage 808, a nucleation inhibiting coating 940 is selectively deposited over the nucleation promoting coating 930 using a mask 980 and a source 995, thereby creating a patterned surface. Then in stage 810, a conductive coating 950 is deposited on the patterned surface using an open mask or maskless deposition method, such that the conductive coating 950 is deposited on the nucleation promoting coating 930. on the area covered by the nucleation inhibiting coating 940.

Next, with reference to FIGS. 10 and 11A-11D, yet another embodiment of a method for manufacturing an OLED device is provided. Figure 10 is a flow chart outlining the stages for fabricating the OLED device, and Figures 11A-11D are schematic diagrams illustrating the stages of this method. In stage 1004, an organic layer 1120 is deposited on a target surface 1112 using a source 1191. In the illustrated embodiment, the target surface 1112 is a surface of an anode 1110 that has been deposited on top of a base substrate 1100 . The organic layer 1120 may include, for example, a hole injection layer, a hole transport layer, an electroluminescent layer, an electron transport layer, and an electron injection layer. Then in stage 1006, a mask 1180 and a source 1193 are used to deposit a nucleation inhibiting coating 1130 on top of the organic layer 1120 so that the nucleation inhibiting coating 1130 is selectively deposited through the organic layer 1120 The hole in the mask 1180 exposes the surface area. In stage 1008, a nucleation promoting coating 1140 is selectively deposited using a mask 1182 and a source 1195. In the illustrated embodiment, the nucleation promoting coating 1140 is shown deposited on surface areas of the organic layer 1120 that are not covered by the nucleation inhibiting coating 1130, thereby creating a patterned surface. Then in stage 1010, a conductive coating 1150 is deposited on the patterned surface using an open mask or maskless deposition method, causing the conductive coating 1150 to be deposited on the surface of the nucleation promotion coating 1140 on, leaving the surface of the nucleation inhibiting coating 1130 substantially free of the conductive coating 1150 material.

12 and 13A-13D, a method for manufacturing an OLED device according to yet another embodiment is provided. Figure 12 is a flow chart outlining the stages for fabricating the OLED device, and Figures 13A-13D are schematic diagrams illustrating the stages of this method. In stage 1204, an organic layer 1320 is deposited on a target surface 1312 using a source 1391. In the illustrated embodiment, the target surface 1312 is the surface of the anode 1310 that has been deposited on top of a base substrate 1300. The organic layer 1320 may include, for example, a hole injection layer, a hole transport layer, an electroluminescent layer, an electron transport layer, and an electron injection layer. Then, in stage 1206, a mask 1380 and a source 1393 are used to deposit a nucleation-promoting coating 1330 on top of the organic layer 1320, such that the nucleation-promoting coating 1330 is selectively deposited through the organic layer 1320. The hole in the mask 1380 exposes the surface area. In stage 1208, a nucleation inhibiting coating 1340 is selectively deposited using a mask 1382 and a source 1395. In the illustrated embodiment, the nucleation inhibiting coating 1340 is shown deposited on surface areas of the organic layer 1320 that are not covered by the nucleation promoting coating 1330, thereby creating a patterned surface. Then in stage 1210, a conductive coating 1350 is deposited on the patterned surface using an open mask or maskless deposition method, causing the conductive coating 1350 to be deposited on the surface of the nucleation promotion coating 1330 on, leaving the surface of the nucleation inhibiting coating 1340 substantially free of the conductive coating 1350 material. The conductive coating 1350 formed in this method can serve as an electrode (eg, cathode).

According to the embodiments described above, using an open mask or a maskless deposition method, by using a nucleation inhibiting coating or a combination of a nucleation inhibiting and a nucleation promoting coating, it is possible to selectively deposit in target areas (e.g., non-nucleation inhibiting coatings). A conductive coating is deposited on the luminescent area). In contrast, open mask or maskless deposition methods that lack sufficient selectivity will cause the conductive material to be deposited beyond the target area and cover the light-emitting area, which is undesirable because the material on the light-emitting area is The presence usually contributes to light attenuation, thereby reducing the EQE of the OLED device. Furthermore, by providing high selectivity in depositing a conductive layer over a target area, the conductive coating can serve as an electrode that is thick enough to achieve the desired conductivity in an OLED device. For example, the high selectivity provided by the embodiments described above allows the deposition of an auxiliary electrode with a high aspect ratio that remains localized between adjacent pixels or sub-pixels. In contrast, a lack of sufficient selectivity in forming thick electrodes in open mask or maskless methods results in a thick coating of conductive material covering both emitting and non-emitting areas, thereby substantially reducing the Performance of the resulting OLED device.

For the sake of simplicity and clarity, details of the deposited material, including thickness profiles and edge profiles, are omitted from the method diagram.

The formation of thin films during vapor deposition on a surface of a substrate involves processes of nucleation and crystal growth. During the initial stages of film formation, a sufficient number of vapor monomers (eg, atoms or molecules) typically condense from the gas phase to form initiating nuclei on the surface. As vapor monomers continue to impinge on the surface, the size and density of these initial nuclei increase to form small clusters or islands. After reaching saturation island density, adjacent islands will begin to coalesce, increasing the average island size while decreasing island density. Condensation of adjacent islands continues until a substantially closed film is formed.

There are three basic growth modes used to form thin films: 1) island (Volmer-Weber), 2) layer by layer (Frank-van der Merwe), and 3) Stranski-Krastanov. Islands typically appear when stable monomer clusters nucleate on a surface and then grow to form individual islands. This growth mode occurs when the interaction between monomers is stronger than the interaction between monomers and the surface.

The nucleation rate indicates how many critical-sized nuclei are formed on a surface per unit time. During the initial stages of film formation, the cores cover a relatively small portion of the surface (e.g., there are large gaps/spaces between adjacent cores) because of the low density of the cores, so the cores are unlikely to be monomers from the surface. grow due to direct impact. Therefore, the rate of critical core growth generally depends on the rate at which adsorbed monomers (eg, adatoms) on the surface move and attach to nearby nuclei.

After adsorption of an adatom to a surface, the adatom may desorb from the surface, or may move a certain distance on the surface before desorbing, interacting with other adatoms to form small clusters, or attaching to a growth nucleus. The following equation obtains the average time that an adatom remains on the surface after initial adsorption:

In the above equation, ν is the vibration frequency of the adatom on the surface, k is the Boltzmann constant, T is the temperature, and E _des is the energy to desorb the adatom from the surface. It can be noted from this equation that the lower the value of E _des , the easier it is for the adatom to desorb from the surface, and therefore the shorter the time the adatom stays on the surface. The average distance over which adatoms can diffuse is obtained by the following equation, where a ₀ is the lattice constant and E _S is the activation energy of surface diffusion. At low E _des values and/or high E _S values, the adatom has a shorter distance to diffuse before desorbing and is therefore less likely to attach to the growth nucleus or interact with another adatom or adatom cluster.

During the initial stages of film formation, adsorbed adatoms can interact to form clusters. The following equation can obtain the critical concentration of clusters per unit area, where E _i is the energy involved in dissociating a critical cluster containing i adatoms into individual adatoms, n ₀ is the total density of adsorption sites, and N ₁ is the monomer density obtained from the following equation: here is the vapor impingement rate. Typically i depends on the crystal structure of the material to be deposited, and the critical cluster size that will determine the formation of stable nuclei.

From the vapor impingement rate and the average area over which adatoms can diffuse before desorption, the critical monomer supply rate for growing clusters can be obtained:

Therefore, the critical nucleation rate can be obtained by combining the above equations:

It can be noted from the above equation that the critical nucleation rate will be suppressed for surfaces with low desorption energy for adsorbed adatoms, high activation for adatom diffusion, at high temperatures, or treated with low vapor impingement rates. .

The location of substrate heterogeneities such as defects, ridges, or step edges may increase E _des , resulting in higher core densities observed at such locations. Furthermore, impurities or contamination on the surface may also increase E _des , resulting in higher nuclear density. For vapor deposition methods performed under high vacuum conditions, the type and density of contamination will be affected by the vacuum pressure and the composition of the residual gas that constitutes the pressure.

Under high vacuum conditions, the flux of molecules impinging on a surface (per cm ² -sec) can be obtained by the following equation: where P is pressure and M is molecular weight. Therefore, the higher the partial pressure of a reactive gas such as H ₂ O, the higher the density of contamination available on a surface during vapor deposition, resulting in an increase in E _des and therefore a higher density of cores.

A parameter that can be used to characterize film nucleation and growth is the adhesion probability obtained from the following equation: where N _ads is the number of adsorbed monomers that remain on a surface (eg, incorporated into the film) and N _total is the total number of monomers that impinge on the surface. An adhesion probability equal to 1 means that all monomers hitting the surface are adsorbed and thus incorporated into the growing film. An adhesion probability equal to 0 means that all monomers hitting the surface are desorbed, thus no film is formed on the surface. The probability of metal adhesion on various surfaces can be assessed using various techniques for measuring adhesion probability, such as double quartz as described in Walker et al., J. Phys. Chem. C 2007, 111, 765 (2006) and in the Examples section below Crystal Microbalance (QCM) technology.

As the island density increases (eg, increases in average film thickness), the adhesion probability may change. For example, the probability of low adhesion can increase as the average film thickness increases. This can be explained by the difference in adhesion probability between areas of the surface without islands (bare substrate) and areas with a high density of islands. For example, a monolith hitting a surface with islands may have a stick probability close to 1.

The initial adhesion probability S ₀ can therefore be specified as the adhesion probability of a surface before any critical mass of nuclei is formed. A measure of initial adhesion probability relates to the probability of a surface adhering to a material during its initial deposition phase when the average thickness of material deposited across the surface is at or below a threshold value. In some embodiments, the threshold for initial adhesion probability may be specified as 1 nm. Then, the average adhesion probability can be obtained by the following equation: where S _nuc is the adhesion probability of the area covered by islands, and A _nuc is the percentage of the area of the substrate surface covered by islands.

Suitable materials that may be used to form a nucleation inhibiting coating include materials that exhibit or are characterized by having an initial probability of adhesion to a conductive coating of no greater than or less than about 0.1 (or 10%), or no greater than or less than about 0.05 and more specifically no greater or less than about 0.03, no greater or less than about 0.02, no greater or less than about 0.01, no greater or less than about 0.08, no greater or less than about 0.005, no greater or less than about 0.003, no greater or less than about 0.001, not greater than or less than about 0.0008, not greater than or less than about 0.0005, or not greater than or less than about 0.0001. Suitable materials that may be used to form a nucleation promoting coating include materials that exhibit or are characterized by having an initial probability of adhesion to a conductive coating of at least about 0.6 (or 60%), at least about 0.7, at least about 0.75 , at least about 0.8, at least about 0.9, at least about 0.93, at least about 0.95, at least about 0.98 or at least about 0.99.

Suitable nucleation inhibiting materials include organic materials, such as small molecule organic materials and organic polymers. Examples of suitable organic materials include polycyclic aromatic compounds, including optionally one or more heteroatoms such as nitrogen (N), sulfur (S), oxygen (O), phosphorus (P), and aluminum (Al) of organic molecules. In some embodiments, polycyclic aromatic compounds include organic molecules each containing a core moiety and at least one terminal moiety bonded to the core moiety. The number of terminal portions may be 1 or more, 2 or more, 3 or more or 4 or more. In the case of 2 or more terminal portions, the terminal portions may be the same or different, or a subset of the terminal portions may be the same, but at least one remaining terminal portion is different. In some embodiments, at least one terminal moiety is, or includes, a biphenyl moiety represented by one of the following chemical structures (Ia), (Ib), and (Ic): (Ia) (Ib) (Ic) where the dashed line refers to the bond formed between the biphenyl moiety and the core moiety. Generally, the biphenyl moiety represented by (Ia), (Ib) and (Ic) may be unsubstituted, or may have one or more of its hydrogen atoms substituted by one or more substituent groups. In the parts represented by (Ia), (Ib) and (Ic), R _a and R _b independently represent the optional presence of one or more substituent groups, wherein R _a can represent one, two, three or four substitutions, and R _b can represent one, two, three, four or five substitutions. For example, one or more substituent groups, R _a and R _b , may be independently selected from: tritium, fluorine, alkyl including C ₁ -C ₄ alkyl, cycloalkyl, aralkyl, silyl , aryl, heteroaryl, fluoroalkyl and any combination thereof. In particular, one or more substituent groups, R _a and R _b , may be independently selected from: methyl, ethyl, tert-butyl, trifluoromethyl, phenyl, methylphenyl, di Methylphenyl, trimethylphenyl, tert-butylphenyl, biphenyl, methylbiphenyl, dimethylbiphenyl, trimethylbiphenyl, tert-butylbiphenyl, fluorine Phenyl, difluorophenyl, trifluorophenyl, polyfluorophenyl, fluorobiphenyl, difluorobiphenyl, trifluorobiphenyl and polyfluorobiphenyl. Without intending to be bound by theory, the presence of exposed biphenyl moieties on a surface can be used to adjust or modulate the surface energy (eg, desorption energy) in order to reduce the surface's affinity for deposition of conductive materials such as magnesium. Other moieties and materials that produce similar modulations of surface energy to inhibit magnesium deposition may be used to form a nucleation inhibiting coating.

In another embodiment, at least one terminal moiety is, or includes, a phenyl moiety represented by the following structure (Id): (Id) where the dashed line represents the bond formed between the phenyl moiety and the core moiety. Generally, the phenyl moiety represented by (Id) may be unsubstituted, or may have one or more of its hydrogen atoms substituted with one or more substituent groups. In the moiety represented by (Id), _Rc represents the optional presence of one or more substituent groups, wherein _Rc may represent one, two, three, four or five substitutions. One or more substituent groups, R _c , may be independently selected from: tritium, fluorine, alkyl including C ₁ -C ₄ alkyl, cycloalkyl, silyl, fluoroalkyl, and any thereof. A combination. In particular, one or more substituent groups, R _c , may be independently selected from: methyl, ethyl, tert-butyl, fluoromethyl, difluoromethyl, trifluoromethyl, fluoroethyl and polyfluoroethyl.

In yet another embodiment, at least one terminal moiety is, or includes, a polycyclic aromatic moiety containing a fused ring structure, such as a fluorene moiety or a phenylene moiety (including those containing multiple (e.g., 3, 4, or More) fused benzene ring). Examples of such moieties include spirobifluorene moieties, triphenyl moieties, diphenylfluorene moieties, dimethylfluorene moieties, difluorofluorene moieties, and any combination thereof.

In one embodiment, the polycyclic aromatic compound includes an organic moiety represented by at least one of the following chemical structures (II), (III), and (IV): (II) (III) (IV)

In (II), (III) and (IV), C represents a core part, and T ₁ , T ₂ and T ₃ represent terminal parts bonded to the core part. Although 1, 2 and 3 terminal portions are shown in (II), (III) and (IV), it should be understood that more than 3 terminal portions may be included.

In some embodiments, C is, or includes, a heterocyclic moiety, such as one including one or more nitrogen atoms, an example being a triazole moiety. In some embodiments, C is, or includes, metal atoms (including transition and post-transition atoms) such as aluminum atoms, copper atoms, iridium atoms, and/or platinum atoms. In some embodiments, C is, or includes, a nitrogen atom, an oxygen atom, and/or a phosphorus atom. In some embodiments, C is, or includes, a cyclic hydrocarbon moiety, which may be aromatic. In some embodiments, C is, or includes, a substituted or unsubstituted alkyl group, which may be a branched or unbranched cycloalkyne (including those containing between 1 and 7 carbon atoms), Alkenyl, alkynyl, aryl (including phenyl, naphthyl, thienyl and indolyl), aralkyl, heterocyclic moieties (including cyclic amines such as morpholino, piperidinyl and pyrrolidinyl), cyclic ether moieties (such as tetrahydrofuran and tetrahydropyran moieties), heteroaryls (including pyrrole, furan, thiophene, imidazole, oxazole, thiazole, triazole, pyrazole, pyridine, pyrazine, pyrimidine, polycyclic heteroaromatic moiety and dibenzylthienyl), fluorene moiety, silyl group, and any combination thereof.

In (II), (III) and (IV), T ₁ is, or includes, a moiety represented by (Ia), (Ib), (Ic) or (Id), or includes a fused ring structure as described above The polycyclic aromatic part. The portion, T ₁ , may be bonded directly to the core portion or may be bonded to the core portion through a connecting portion. Examples of linking moieties include -O- (where O represents an oxygen atom), -S- (where S represents a sulfur atom), and cyclic or acyclic hydrocarbon moieties containing 1, 2, 3, 4 or more carbon atoms. , and it may be unsubstituted or substituted, and it may optionally include one or more heteroatoms. The bond between the core moiety and one or more terminal moieties may be a covalent bond or a bond formed between a metallic element and an organic element, particularly in the case of organometallic compounds.

In (III), T ₁ and T ₂ may be the same or different, as long as at least T ₁ is, or includes, a part represented by (Ia), (Ib), (Ic) or (Id), or includes The above-mentioned polycyclic aromatic part of the fused ring structure is sufficient. For example, T ₁ and T ₂ may each be, or may include: a moiety represented by (Ia), (Ib), (Ic) or (Id), or a polycyclic aromatic moiety including the fused ring structure described above . As another example, T ₁ is, or includes, a moiety represented by (Ia), (Ib), (Ic) or (Id), or a polycyclic aromatic moiety including a fused ring structure as described above, and T ₂ does not have this part. In some embodiments, _T2 is, or includes, a cyclic hydrocarbon moiety, which may be aromatic, which may include a monocyclic structure or may be polycyclic, which may be substituted or unsubstituted, and which It can be bonded directly to the core part, or it can be bonded to the core part through a connecting part. In some embodiments, _T2 is, or includes, a heterocyclic moiety, such as a heterocyclic moiety including one or more nitrogen atoms, which may include a monocyclic structure or may be polycyclic, which may be substituted or Unsubstituted and it may be bonded directly to the core part, or may be bonded to the core part through a connecting part. In some embodiments, T _is , or includes, an acyclic hydrocarbon moiety, which may be unsubstituted or substituted, which may optionally include one or more heteroatoms, and which may be directly bonded to the core part, or may be bonded to the core part through a connecting part. In some embodiments where T ₁ and T ₂ are different, T ₂ may be selected from a portion with dimensions comparable to T ₁ . Specifically, T ₂ may be selected from those listed above having a molecular weight no greater than about 2 times, no greater than about 1.9 times, no greater than about 1.7 times, no greater than about 1.5 times, no greater than about 1.2 times the molecular weight of T ₁ Or a portion not greater than approximately 1.1 times. Without intending to be bound by a particular theory, it is speculated that a terminal portion T ₂ should be included that is different from or lacks the portion represented by (Ia), (Ib), (Ic) or (Id) or a polycyclic ring that includes a fused ring as described above. In the case of aromatic moieties, T ₂ of comparable size to T ₁ can promote exposure of T ₁ on a surface, as opposed to bulky terminal groups, which can hinder T ₁ due to molecular stacking, steric hindrance, or a combination of these effects. exposure.

In (IV), T ₁ , T ₂ and T ₃ may be the same or different, as long as at least T ₁ is, or includes, the moiety represented by (Ia), (Ib), (Ic) or (Id) , or include the polycyclic aromatic part of the above-mentioned fused ring structure. For example, each of T ₁ , T ₂ and T ₃ may be, or may include, a moiety represented by (Ia), (Ib), (Ic) or (Id), or a polycyclic ring including the fused ring structure described above Aromatic part. As another example, each of T ₁ and T ₂ may be, or may include, a moiety represented by (Ia), (Ib), (Ic) or (Id), or a polycyclic ring including the fused ring structure described above. Aromatic part, while T ₃ may lack this part. As another example, each of T ₁ and T ₃ may be, or may include, a moiety represented by (Ia), (Ib), (Ic) or (Id), or a polycyclic ring including the fused ring structure described above. Aromatic part, while _T2 may lack this part. As another example, T ₁ is, or includes, a moiety represented by (Ia), (Ib), (Ic) or (Id), or a polycyclic aromatic moiety including the fused ring structure described above, and T ₂ and T ₃ may lack this part. In some embodiments, at least one T ₂ and T ₃ is, or includes, a cyclic hydrocarbon moiety, which may be aromatic, which may include a monocyclic structure or may be polycyclic, which may be substituted or un substituted, and it may be bonded directly to the core part, or may be bonded to the core part through a connecting part. In some embodiments, at least one of _T2 and _T3 is, or includes, a heterocyclic moiety, such as a heterocyclic moiety including one or more nitrogen atoms, which may include a monocyclic structure or may be polycyclic, which may Be substituted or unsubstituted, and they may be bonded directly to the core part, or may be bonded to the core part through a connecting part. In some embodiments, at least one _T2 and _T3 is, or includes, an acyclic hydrocarbon moiety, which may be unsubstituted or substituted, which may optionally include one or more heteroatoms, and which may Bonded directly to the core part, or may be bonded to the core part through a connecting part. In some embodiments, when T ₁ , T ₂ and T ₃ are different, T ₂ and T ₃ may be selected from those having dimensions comparable to T ₁ . Specifically, T ₂ and T ₃ may be selected from those listed above having a molecular weight no greater than about 2 times, no greater than about 1.9 times, no greater than about 1.7 times, no greater than about 1.5 times, no more than about 1.5 times the molecular weight of T ₁ . The portion that is greater than about 1.2 times or not greater than about 1.1. Without intending to be bound by a particular theory, it is speculated that when polycyclic aromatic moieties include polycyclic aromatic moieties that are different from or lack moieties represented by (Ia), (Ib), (Ic) or (Id) or include fused rings as described above When terminal portions T ₂ and T ₃ are used, T ₂ and T ₃ of comparable size to T ₁ can facilitate the exposure of T ₁ on a surface, as opposed to bulky terminal groups, which may be affected by molecular stacking, steric blocking, or the like. The combination hinders the exposure of T ₁ .

Suitable nucleation inhibiting materials include polymeric materials. Examples of such polymeric materials include: fluoropolymers, including, but not limited to, perfluorinated polymers and polytetrafluoroethylene (PTFE); polyvinyl biphenyl; polyvinyl carbazole (PVK); and several of the above Polymers formed by the polymerization of the polycyclic aromatic compounds. In another example, a polymeric material includes a polymer formed from several monomers, wherein at least one of the monomers includes a terminal moiety that is or includes, consisting of (I-a), (I-b), (I-c), or ( The part represented by I-d), or the polycyclic aromatic part including the fused ring structure described above.

Figures 14 and 15 illustrate an OLED device 1500 according to one embodiment. Specifically, FIG. 14 shows a top view of the OLED device 1500, while FIG. 15 depicts a cross-sectional view of the structure of the OLED device 1500. In Figure 14, cathode 1550 is depicted as a monolithic or continuous structure having a plurality of apertures or cavities 1560 formed therein or defined corresponding to areas of device 1500 where no cathode material is deposited. This is further described in Figure 15, which shows an OLED device 1500, which includes a base substrate 1510, an anode 1520, an organic layer 1530, a nucleation promoting coating 1540, and the nucleation promoting coating is selectively deposited on the A nucleation inhibiting coating 1570 on certain areas of 1540 and a cathode 1550 deposited on other areas of the nucleation promoting coating 1540 where the nucleation inhibiting coating 1570 is not present. More specifically, during fabrication of device 1500, after selectively depositing nucleation inhibiting coating 1570 to cover certain areas of nucleation promoting coating 1540, using an open mask or maskless deposition method, selectively The cathode material is deposited on the exposed surface area of the nucleation promoting coating 1540. Changing various parameters of the imparted pattern, such as the average size of the holes 1560 formed in the cathode 1550 and the density of the holes 1560, can adjust or modify the transparency or transmittance of the OLED device 1500. Accordingly, the OLED device 1500 may be a substantially transparent OLED device that allows at least a portion of external light incident on the OLED device to pass through the device. For example, the OLED device 1500 may be a substantially transparent OLED lighting panel. The OLED lighting panel may, for example, be configured to emit light in one direction (eg, toward or away from the base substrate 1510) or in two directions (eg, toward and away from the base substrate 1510).

Figure 16 illustrates an OLED device 1600 according to another embodiment in which a cathode 1650 covers substantially the entire device area. Specifically, the OLED device 1600 includes a base substrate 1610, an anode 1620, an organic layer 1630, a nucleation promoting coating 1640, the cathode 1650, and a component selectively deposited on certain areas of the cathode 1650. A nucleation inhibiting coating 1660 and an auxiliary electrode 1670 deposited on other areas of the cathode 1650 where the nucleation inhibiting coating 1660 is not present.

The auxiliary electrode 1670 is electrically connected to the cathode 1650. Particularly in top-emitting configurations, it is necessary to deposit a relatively thin layer of cathode 1650 in order to reduce optical interference (eg, attenuation, reflection, diffusion, etc.) due to the presence of cathode 1650. However, reducing the thickness of the cathode 1650 often increases the sheet resistance of the cathode 1650, thereby reducing the performance and efficiency of the OLED device 1600. By providing the auxiliary electrode 1670 in electrical connection with the cathode 1650, the sheet resistance associated with the cathode 1650 and therefore the IR voltage drop can be reduced. Additionally, by selectively depositing the auxiliary electrode 1670 so as to cover certain areas of the device area while leaving other areas uncovered, optical interference due to the presence of the auxiliary electrode 1670 can be controlled and/or reduced.

The influence of electrode sheet resistance will now be explained with reference to an example of a circuit diagram of a top-emitting active matrix OLED (AMOLED) pixel with p-type TFTs shown in FIG. 48 . In FIG. 48, a circuit 4800 includes a power (VDD) line 4812, a control line 4814, a gate line 4816, and a data line 4818. A driving circuit including a first TFT 4831, a second TFT 4833 and a storage capacitor 4841 is provided, and the driving circuit component is connected to the data line 4818, the gate line 4816 and the VDD line in the manner shown in the figure. 4812. A compensation circuit 4843 is also provided, which is typically used to compensate for any deviations in the transistor characteristics caused by manufacturing variations or degradation over time of the TFTs 4831 and 4833.

An OLED pixel or sub-pixel 4850 and a cathode 4852, which represents a resistor in the circuit diagram, are connected in series with the second TFT 4833 (also called a "driver transistor"). The driving transistor 4833 will adjust the current through the OLED pixel 4850 according to the voltage of the charge stored in the storage capacitor 4841, so that the OLED pixel 4850 outputs the required brightness. The voltage of the storage capacitor 4841 is set by connecting the storage capacitor 4841 to the data line 4818 through the first TFT 4831 (also called a "switching transistor").

Because the current through the OLED pixel or sub-pixel 4850 and the cathode 4852 is adjusted according to the potential difference between a gate voltage and a source voltage of the driving transistor 4833, an increase in the sheet resistance of the cathode 4852 will result in a larger IR drop, which can be compensated by increasing the power supply (VDD). However, when VDD increases, to maintain proper operation, other voltages supplied to the TFT 4833 and the OLED pixel 4850 also increase, which is disadvantageous.

Referring to Figure 48, an auxiliary electrode 4854 is depicted as a resistor in parallel with the cathode 4852. Because the resistance of the auxiliary electrode 4854 is substantially lower than that of the cathode 4852, the combined effective resistance of the auxiliary electrode 4854 and the cathode 4852 is lower than the resistance of the cathode 4852 alone. Accordingly, the presence of the auxiliary electrode 4854 can reduce the increase of VDD.

Although the advantages of the auxiliary electrode are explained with reference to top emitting OLED devices, it may also be advantageous to selectively deposit the auxiliary electrode on the cathode of a bottom emitting or double side emitting OLED device. For example, although a relatively thick cathode layer can be formed in a bottom emitting OLED device without materially affecting the optical characteristics of the device, it may still be advantageous to form a relatively thin cathode. For example, in a transparent or translucent display device, layers throughout the device, including the cathode, may be formed to be substantially transparent or translucent. Accordingly, it may be beneficial to provide patterned auxiliary electrodes that are not readily detectable by the naked eye from typical viewing distances. It should also be understood that the method described may be used to form busbars or auxiliary electrodes for reducing the resistance of electrodes in devices other than OLED devices.

In some embodiments, after a conductive coating has been deposited, a nucleation inhibiting coating deposited during the fabrication process may be removed using, for example, solvent or plasma etching.

Figure 59A illustrates a device 5901 according to one embodiment, which includes a substrate 5910 and a nucleation inhibiting coating 5920 and a conductive coating 5915 (e.g., magnesium coating) deposited on respective areas of a surface of the substrate 5910 layer).

Figure 59B illustrates a device 5902 in which the nucleation inhibiting coating 5920 present in the device 5901 has been removed from the surface of the substrate 5910 such that the conductive coating 5915 remains on the substrate 5910 and the The area of substrate 5910 covered with nucleation inhibiting coating 5920 is now exposed or uncovered. For example, the device 5901 may be removed by exposing the substrate 5910 to a solvent or plasma that will preferentially react and/or etch away the nucleation-inhibiting coating 5920 but will not materially affect the conductive coating 5915 Nucleation inhibition coating 5920.

At least some of the above examples illustrate the use of evaporation methods to form various layers or coatings, including nucleation promoting coatings, nucleation inhibiting coatings, and conductive coatings. As is understood, an evaporation method is a type of PVD method in which one or more source materials are evaporated or sublimated in a low pressure (eg, vacuum) environment and then deposited in a on the target surface. There are a variety of different evaporation sources that can be used to heat a source material, ie it will be appreciated that the source material can be heated in a variety of ways. For example, the source material can be heated by electric filament, electron beam, induction heating or resistive heating. Additionally, such layers or coatings may be deposited and/or patterned using other suitable methods, including photolithography, printing, OVPD, LITI patterning, and combinations thereof. These methods can also be used in conjunction with shadow masks to achieve various patterns.

For example, magnesium deposition can be performed at source temperatures up to about 600°C to achieve faster deposition rates, such as about 10 to 30 nm/second or faster. Reference is made to Table 1 below, which provides measurements of various deposition rates of approximately 1 nm of substantially pure magnesium deposited on fullerene-treated organic surfaces using a Knudsen vessel source. It will be appreciated that other factors may also affect deposition rate, including, but not limited to, the distance between a source and a substrate, characteristics of the substrate, the presence of a nucleation-promoting coating on the substrate, the nature of the source used. Type and shaping of the flux of material evaporating from the source. Table 1: Magnesium deposition rate by temperature Sample# Temperature(̊C) Rate(Å/s) 1 510 10 2 525 40 3 575 140 4 600 160

Those skilled in the art will understand that the specific processing conditions used will vary depending on the equipment used to effect the deposition. It will also be appreciated that higher deposition rates are generally achieved at higher source temperatures; however, other deposition conditions may be selected, such as, for example, bringing the substrate closer to the deposition source.

It will also be understood that an opening mask used to deposit any of the various layers or coatings, including a conductive coating, a nucleation inhibiting coating, and a nucleation promoting coating, may "mask" or prevent a material from being Deposited on an area of the substrate. However, unlike fine metal masks (FMMs), which are used to form relatively small features with feature sizes on the order of tens of microns or less, the feature size of an aperture mask is typically equivalent to the size of the OLED device intended to be fabricated. . For example, an aperture mask can mask the edges of a display device during manufacturing, which results in an aperture mask with apertures approximately corresponding to the size of the display device (i.e., about 1 inch for microdisplays and about 4-inch for mobile displays). 6 inches, for laptop or tablet monitors about 8-17 inches, etc.). For example, the characteristic dimensions of an opening mask may be on the order of about 1 cm or greater.

Figure 16B illustrates an opening mask 1731 having or defining a hole 1734 formed therein. In the illustrative example, the hole 1734 of the mask 1731 is smaller than the size of a device 1721 such that the mask 1731 covers the edge of the device 1721 when the mask 1731 is placed over it. Specifically, in this exemplary embodiment, all or substantially all of the light emitting areas or pixels 1723 of the device 1721 are exposed through the holes 1734 , while unexposed areas 1727 are formed at the outer edges 1725 of the device 1721 between the holes 1734. It will be appreciated that electrical contacts or other device components may be located in the unexposed areas 1727 such that such components remain unaffected during the opening mask deposition process.

Figure 16C illustrates another example of an open mask 1731, where a hole 1734 in the mask 1731 is smaller than the hole in Figure 16B, so that when closed, the mask 1731 covers at least some light-emitting areas or pixels of a device 1721 1723. Specifically, the outermost pixel 1723' is shown within one of the unexposed areas 1727 of the device 1721, formed between the aperture 1734 of the mask 1731 and the outer edge 1725 of the device 1721.

16D illustrates yet another example of an open mask 1731 in which a hole 1734 of the mask 1731 defines a pattern that covers some pixels 1723' of a device 1721 while exposing other pixels 1723. Specifically, during the deposition process, the pixel 1723' located within an unexposed area 1727 of the device 1721 (formed between the aperture 1734 and the outer edge 1725) is masked such that the vapor flux is inhibited from being onto the unexposed area 1727.

Although in the examples of Figures 16B-16D, the outermost pixels are depicted as blocked, it will be understood that the apertures of the opening mask can be shaped to block other emitting and non-emitting areas of a device. Additionally, although the opening mask is illustrated with one aperture in the previous example, the aperture mask may also include additional apertures for exposing multiple areas of a substrate or device.

Figure 16E illustrates another example of an opening mask 1731, where the mask 1731 has or defines a plurality of holes 1734a-1734d. The apertures 1734a-1734d are configured such that they selectively expose certain areas of a device 1721 while masking other areas. For example, certain light emitting areas or pixels 1723 are exposed through the holes 1734a-d, while other pixels 1723' located in an unexposed area 1727 are obscured.

In the various embodiments described herein, it will be appreciated that the use of an opening mask may be omitted if desired. Specifically, the open mask deposition methods described herein may optionally be performed without the use of a mask, such that the entire surface is exposed.

Although certain evaporation-related methods are described with respect to depositing a nucleation promoting material, a nucleation inhibiting material, and magnesium, it will be appreciated that a variety of other methods may be used to deposit such materials. For example, deposition may be performed using other PVD methods including sputtering, CVD methods including plasma enhanced chemical vapor deposition (PECVD), or other methods suitable for depositing such materials. In some embodiments, a resistive heater is used to heat the magnesium source material to deposit magnesium. In other embodiments, the magnesium source material can be loaded into a heated crucible, heated boat, Knudsen vessel (eg, effusion evaporator source), or any other type of evaporation source.

The deposition source material used to deposit a conductive coating can be a mixture or a compound, and in some embodiments, at least one component of the mixture or compound does not deposit on the substrate during deposition (or compared to For example magnesium, relatively small deposits). In some embodiments, the source material may be a copper-magnesium (Cu-Mg) mixture or Cu-Mg compound. In some embodiments, the source material of the magnesium deposition source includes magnesium and a material with a lower vapor pressure than magnesium, such as Cu. In other embodiments, the source material of the magnesium deposition source is substantially pure magnesium. Specifically, substantially pure magnesium can exhibit substantially similar properties (e.g., nucleation inhibition and probability of initial adhesion promotion on coatings) compared to pure magnesium (99.99% and higher purity magnesium) . For example, the initial adhesion probability of substantially pure magnesium to a nucleation inhibiting coating may be within ±10% or ±5% of the initial adhesion probability of 99.99% pure magnesium on the nucleation inhibiting coating. The purity of magnesium can be about 95% or higher, about 98% or higher, about 99% or higher, or about 99.9% or higher. Deposition source materials used to deposit a conductive coating include other metals in place of or in combination with magnesium. For example, a source material may include a high vapor pressure material such as ytterbium (Yb), cadmium (Cd), zinc (Zn), or any combination thereof.

In addition, it should be understood that the methods of various embodiments can be used on the surfaces of various other organic or inorganic materials used as electron injection layers, electron transport layers, electroluminescent layers and/or pixel definition layers (PDL) of organic optoelectronic devices. proceed on. Examples of such materials include organic molecules and organic polymers, such as those described in PCT Publication WO 2012/016074. Those familiar with this art should also understand that organic materials doped with various elements and/or inorganic compounds can still be regarded as organic materials. Those skilled in the art will also understand that a variety of organic materials can be used, and that the methods described herein are generally applicable to the entire range of such organic materials.

It should also be understood that an inorganic substrate or surface may mean a substrate or surface that primarily includes an inorganic material. For greater clarity, an inorganic material is generally understood to be any material that is not considered an organic material. Examples of inorganic materials include metals, glasses, and minerals. Specifically, conductive materials including magnesium can be deposited on the surfaces of lithium fluoride (LiF), glass and silicon (Si) using the method of the present invention. Other surfaces upon which the methods of the present invention may be applied include silicon or polysiloxy-based polymers, inorganic semiconductor materials, electron-injecting materials, salts, metals, and metal oxides.

It will be understood that the substrate may include a semiconductor substrate, whereby the surface of a substrate may be a semiconductor surface. Semiconducting materials can be described as materials that generally exhibit a band gap. For example, the band gap may be formed between the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO). Therefore, semiconductor materials usually have less conductivity than conductive materials (eg, metals) but greater than insulating materials (eg, glass). It is understood that the semiconductor material may be an organic semiconductor material or an inorganic semiconductor material.

Figure 17 shows a patterned cathode 1710 according to one embodiment. The cathode 1710 is described as a single monolithic piece or as a continuous structure including a plurality of substantially straight conductor segments spaced apart substantially parallel to each other. Each conductor segment is connected at both ends to an end conductor segment arranged substantially perpendicular to the plurality of straight conductor segments. The cathode 1710 can be formed according to the deposition method described above.

Figure 17B shows a patterned cathode 1712 according to another embodiment, wherein the cathode 1712 includes a plurality of spaced apart elongated conductive strips. For example, the cathode 1712 may be used in a passive matrix OLED device (PMOLED) 1715. In the PMOLED device 1715, the light emitting area or pixel is usually formed in the area where the counter electrodes overlap. Accordingly, in the embodiment of FIG. 17B , the light-emitting area or pixel 1751 is formed at the overlapping area of the cathode 1712 and an anode 1741 including a plurality of spaced apart elongated conductive strips. The non-luminescent area 1755 is formed in the area where the cathode 1712 and the anode 1741 do not overlap. Generally speaking, in the PMOLED device 1715, the directions of the cathode 1712 and the anode 1741 are substantially perpendicular to each other. The cathode 1712 and the anode 1741 can be connected to a power supply and related driving circuits to provide current to the respective electrodes.

Figure 17C illustrates a cross-sectional view taken along line A-A in Figure 17B. In FIG. 17C, a base substrate 1702 is provided, which may be, for example, a transparent substrate. An anode 1741 in a strip shape as shown in FIG. 17B is provided on the base substrate 1702. One or more organic layers 1761 are deposited on the anode 1741. For example, the organic layer 1761 may be provided as a common layer throughout the device and may include any number of organic and/or inorganic material layers described herein, such as hole injection and transport layers, electroluminescent layers, and electron transport layers. with injection layer. Certain areas of the top surface of the organic layer 1761 are covered with a nucleation inhibition coating 1771, which is used to selectively pattern the cathode 1712 according to the deposition method described above. The cathode 1712 and the anode 1741 can be connected to their respective drive circuits (not shown), which can control the emission of light from the pixel 1751.

Although the thickness of the nucleation inhibition coating 1771 and the cathode 1712 may vary depending on the desired application and performance, in at least some embodiments, the thickness of the nucleation inhibition coating 1771 may be equivalent to or substantially less than that shown in Figure 17C The thickness of the cathode 1712 is shown. Patterning a cathode using a relatively thin nucleation-inhibiting coating is particularly advantageous for flexible PMOLED devices because it provides a relatively flat surface onto which a barrier coating can be applied.

Figure 17D depicts the PMOLED device 1715 of Figure 17C with a barrier coating 1775 applied to the cathode 1712 and the nucleation inhibition coating 1771. It will be appreciated that the barrier coating 1775 is generally provided to prevent various oxidation-prone device layers, including organic layers and the cathode 1712, from exposure to moisture and ambient air. For example, the barrier coating 1775 may be a thin film coating formed via printing, CVD, sputtering, atomic layer deposition (ALD), a combination of any of the foregoing, or via any other suitable method. The barrier coating 1775 may also be provided by laminating a preformed barrier film over the device 1715 using an adhesive (not shown). For example, the barrier coating 1775 may be a multilayer coating including one of organic materials, inorganic materials, or a combination of both. The barrier coating 1775 may additionally include a hygroscopic material and/or a desiccant.

For comparison purposes, a comparative PMOLED device 1719 is illustrated in Figure 17E. In the comparative example of Figure 17E, a plurality of pixel definition structures 1783 are provided in the non-emitting area of the device 1719, such that when a conductive material is deposited using an open mask or maskless deposition method, the conductive material is deposited at The cathode 1712 is formed on the light-emitting area between adjacent pixel definition structures 1783, and a conductive strip 1718 is formed on top of the pixel definition structure 1783. However, in order to ensure that each segment of the cathode 1712 is electrically separated from the conductive strip 1718, the pixel defining structure 1783 is formed to have a thickness or height greater than the cathode 1712. The pixel defining structure 1783 may also have an undercut profile to further reduce the possibility of electrical contact between the cathode 1712 and the conductive strip 1718. The barrier coating 1775 is provided to cover the PMOLED device 1719 including the cathode 1712, the pixel defining structure 1783, and the conductive strip 1718.

In the comparative PMOLED device 1719 depicted in Figure 17E, the surface upon which the barrier coating 1775 is applied is non-uniform due to the presence of the pixel defining structure 1783. This makes application of the barrier coating 1775 difficult, and even if the barrier coating 1775 is applied, the barrier coating 1775 may have relatively poor adhesion to the underlying surface. Poor adhesion increases the likelihood that the barrier coating 1775 will peel from the device 1719, especially if the device 1719 is warped or bent. Additionally, during the application process, due to the non-uniform surface, there is a relatively high likelihood that air bubbles will be trapped between the barrier coating 1775 and the underlying surface. The presence and/or spalling of bubbles in the barrier coating 1775 may cause or result in defects and partial or complete device failure and is therefore highly undesirable. These factors are reduced in the embodiment of Figure 17D.

Although the patterned cathodes 1710 and 1712 shown in Figures 17 and 17B can be used to form a cathode for an OLED device, it should be understood that similar patterns can be used to form an auxiliary electrode for an OLED device. Specifically, the OLED device can be provided with a common cathode and an auxiliary electrode disposed on or below the common cathode, so that the auxiliary electrode is electrically connected to the common cathode. For example, such an auxiliary electrode may be implemented in an OLED device (eg, an AMOLED device) that includes several light-emitting areas, such that the auxiliary electrode is formed on the non-light-emitting area without covering the light-emitting area. In another example, an auxiliary electrode may be provided to cover the non-emitting areas and at least some of the emitting areas of an OLED device.

FIG. 18A depicts a portion of an OLED device 1800 including a plurality of emitting regions 1810a-1810f and a non-emitting region 1820. For example, the OLED device 1800 may be an AMOLED device, and each of the light emitting regions 1810a - 1810f may correspond to a pixel or sub-pixel of such a device. For simplicity, Figures 18B-18D depict a portion of the OLED device 1800. Specifically, FIGS. 18B-18D show areas surrounding two adjacent areas, a first light-emitting area 1810a and a second light-emitting area 1810b. Although not explicitly described, a common cathode may be provided that substantially covers both the emitting area and the non-emitting area of the device 1800 .

FIG. 18B shows an auxiliary electrode 1830 according to an embodiment, wherein the auxiliary electrode 1830 is disposed between the two adjacent light-emitting regions 1810a and 1810b. The auxiliary electrode 1830 is electrically connected to the common cathode (not shown). Specifically, the auxiliary electrode 1830 is described as having a width (α) that is smaller than the separation distance (d) of the adjacent light-emitting regions 1810a and 1810b, thereby forming a non-light-emitting gap region on each side of the auxiliary electrode 1830 . For example, this arrangement may be advantageous in the device 1800 where the adjacent light emitting regions 1810a and 1810b are separated by a distance sufficient to accommodate the auxiliary electrode 1830 of sufficient width, since providing the non-light emitting gap region may reduce the number of auxiliary electrodes 1830. 1830 interference with the optical output of the device 1800. Furthermore, this arrangement may be particularly advantageous when the auxiliary electrode 1830 is relatively thick (eg, greater than several hundred nanometers or on the order of several microns thick). For example, the ratio of the height or thickness of the auxiliary electrode 1830 to its width (ie, aspect ratio) may be greater than about 0.05, such as about 0.1 or greater, about 0.2 or greater, about 0.5 or greater, about 0.8 or greater. Larger, about 1 or larger, about 2 or larger. For example, the height or thickness of the auxiliary electrode 1830 may be greater than about 50 nm, such as about 80 nm or greater, about 100 nm or greater, about 200 nm or greater, about 500 nm or greater, about 700 nm or greater, about 1000 nm or greater. Large, about 1500 nm or larger, about 1700 nm or larger, or about 2000 nm or larger.

An auxiliary electrode 1832 according to another embodiment is shown in Figure 18C. The auxiliary electrode 1832 is electrically connected to the common cathode (not shown). As mentioned, the auxiliary electrode 1832 has a width that is substantially the same as the separation distance between the adjacent light-emitting regions 1810a and 1810b, so that the auxiliary electrode 1832 substantially completely occupies the adjacent light-emitting regions 1810a and 1810b. The entire non-luminous area provided between. This arrangement may be advantageous in situations where the separation distance between the two adjacent light emitting areas 1810a and 1810b is relatively small, such as in the case of a high pixel density display device.

An auxiliary electrode 1834 of yet another embodiment is depicted in Figure 18D. The auxiliary electrode 1834 is electrically connected to the common cathode (not shown). The auxiliary electrode 1834 is described as having a width (α) that is greater than the separation distance (d) between the two adjacent light-emitting regions 1810a and 1810b. Accordingly, a portion of the auxiliary electrode 1834 covers a portion of the first light-emitting area 1810a and a portion of the second light-emitting area 1810b. This arrangement may be advantageous when the non-light-emitting area between the adjacent light-emitting areas 1810a and 1810b is insufficient to fully accommodate the auxiliary electrode 1834 with a required width. Although it is described in FIG. 18D that the auxiliary electrode 1834 overlaps the first light-emitting area 1810a to the same extent as the two light-emitting areas 1810b, in other embodiments, the auxiliary electrode 1834 can be adjusted to overlap with an adjacent light-emitting area. degree of overlap. For example, in other embodiments, the auxiliary electrode 1834 may overlap the first light-emitting area 1810a to a greater extent than the second light-emitting area 1810b, and vice versa. In addition, the overlapping outline between the auxiliary electrode 1834 and a light-emitting area can also be changed. For example, the overlapping portion of the auxiliary electrode 1834 may be shaped such that the auxiliary electrode 1834 overlaps a portion of a light emitting area to a greater extent than another portion of the same light emitting area to create a non-uniform overlapping area.

An OLED device 1900 according to an embodiment is depicted in FIG. 19 in which a light-emitting area 1910 and a non-light-emitting area 1920 surrounding the light-emitting area 1910 are provided. A lead 1912 is shown formed in the non-emitting area 1920 of the device 1900. The lead 1912 is electrically connected to an electrode (not shown) covering the light emitting area 1910 of the device 1900 . The lead 1912 can provide a contact point to an external power source that can power this electrode. For example, the electrode can be connected to the external power source through the lead 1912 (via a soldering pad integrated into the lead 1912) (wires can be soldered to the lead and connected to the power source). It should be understood that, although not explicitly shown, an auxiliary electrode may be present and connected to the electrode covering the light emitting area 1910 of the device 1900 . In the presence of such an auxiliary electrode, the lead 1912 may be directly connected to the auxiliary electrode, the electrode to which the auxiliary electrode is connected, or both.

It will be appreciated that the lead 1912 may be provided in the same plane as the electrode to which it is connected, or it may be provided in a different plane. For example, the leads 1912 may be connected to another layer of the OLED device 1900, such as a backplane, through one or more vertical connections (eg, vias).

Figure 20 depicts a portion of an OLED device 2000 according to another embodiment. The OLED device 2000 includes a light-emitting area 2010 and a non-light-emitting area 2020. The OLED device 2000 further includes a grid-shaped auxiliary electrode 2030, which is electrically connected to an electrode (not shown) of the device 2000. As shown in FIG. 20 , a first part of the auxiliary electrode 2030 is disposed in the light-emitting region 2010 , and a second part of the auxiliary electrode 2030 is disposed outside the light-emitting region 2010 and in the non-light-emitting region 2020 of the device 2000 . This arrangement of the auxiliary electrode 2030 allows the sheet resistance of the electrode to be reduced while keeping the auxiliary electrode 2030 from significantly interfering with the optical output of the device 2000 .

In some applications, it may be desirable to form a regularly repeating pattern of auxiliary electrodes over the entire device area or a portion thereof. Figures 21A-21D depict various embodiments of repeating units of auxiliary electrodes that may be used. Specifically, in FIG. 21A , an auxiliary electrode 2110 includes four areas 2120 that are not covered by the auxiliary electrode 2110 . The auxiliary electrode 2110 is formed so that the regions 2120 are arranged in a T shape. For example, each of the regions 2120 may substantially correspond to one of the light emitting regions of an OLED device including a plurality of light emitting regions. From this, it is understood that other layers or coatings may be present in this region 2120, such as a common cathode. In FIG. 21B , an auxiliary electrode 2112 forms an inverted T shape and includes four uncovered areas 2122 . In FIG. 21C , an auxiliary electrode 2114 is formed to include four uncovered regions 2124 , and similarly in FIG. 21D , an auxiliary electrode 2116 is formed to include four uncovered regions 2126 .

Possible advantages of using auxiliary electrodes with repeating units, such as those shown in Figures 21A-21D, include ease of patterning in the fabrication apparatus. For example, a mask used to pattern a nucleation promoting or inhibiting coating during formation of the auxiliary electrode can be reused to pattern different portions of a device surface, thus avoiding the need for more complex and/or larger Mask.

Figure 22 depicts a portion of an OLED device 2200 according to an embodiment, wherein the device 2200 includes a plurality of repeating auxiliary electrode units 2230a-d formed thereon. Specifically, each auxiliary electrode unit 2230a-d is L-shaped and covers three different light-emitting areas 2210. For example, each light-emitting area 2210 may correspond to a pixel or sub-pixel of the device 2200 . As mentioned, adjacent auxiliary electrode units may be interlocked with each other. For example, a first auxiliary electrode unit 2230a and a second auxiliary electrode unit 2230b form an interlocking relationship. Similarly, a third auxiliary electrode unit 2230c and a fourth auxiliary electrode unit 2230d are interlocked. The auxiliary electrode units 2230a-d are formed on a non-emitting area 2220. It should be understood that the auxiliary electrode units 2230a-d may be formed such that they are in direct electrical communication with each other. For example, the repeating auxiliary electrode units 2230a-d may be integrally formed during manufacturing. Optionally, the auxiliary electrode units 2230a-d may be formed such that they are electrically connected through a common electrode.

Figure 23 depicts a portion of an OLED device 2300 according to another embodiment. In the embodiment of FIG. 23, each of the auxiliary electrode units 2330a and 2330b is formed to cover five different light emitting areas 2310. The auxiliary electrode units 2330a and 2330b are formed on the non-emitting area 2320 of the device 2300. As mentioned, a first auxiliary electrode unit 2330a is positioned adjacent to a second auxiliary electrode unit 2330b, but there is no interlocking relationship.

In another embodiment illustrated in FIG. 24 , auxiliary electrode units similar to those illustrated in FIG. 23 are provided. However, in FIG. 24, the auxiliary electrode units 2430a-d are arranged in an interlocking relationship with each other. Similar to the embodiment of FIG. 23 , each auxiliary electrode unit 2430a - d covers five different light-emitting areas 2410 and is formed on the non-light-emitting area 2420 of a device 2400 .

Although various embodiments in which each auxiliary electrode unit covers 3, 4, or 5 light-emitting areas are illustrated and described, it should be understood that each auxiliary electrode unit may cover any number of light-emitting areas, including 1, 2, 3, 4, 5, 6 or more luminous areas.

FIG. 25 illustrates an embodiment in which an auxiliary electrode 2530 forms a grid on an OLED device 2500. As described, the auxiliary electrode 2530 is provided on the non-emitting area 2520 of the device 2500 such that it does not substantially cover any part of the emitting area 2510.

FIG. 26 illustrates an embodiment in which auxiliary electrode units 2630 form a series of elongated structures on an OLED device 2600. As mentioned, the auxiliary electrode unit 2630 is provided on a non-light-emitting area 2620 of the device 2600 such that it does not substantially cover any part of the light-emitting area 2610. The auxiliary electrode units 2610 are separated from each other and have no physical contact, but are electrically connected through a common electrode (not shown). It should be understood that auxiliary electrode units 2610 that are not directly interconnected with each other may still provide substantial advantages by reducing the total sheet resistance of the connected common electrodes.

FIG. 27 depicts an embodiment in which the auxiliary electrode unit 2730 forms a "stairwell" pattern on an OLED device 2700. As described, the auxiliary electrode unit 2730 is provided on a non-light-emitting area 2720 of the device 2700 such that it does not substantially cover any part of the light-emitting area 2710.

Figures 28A-28J depict various embodiments of providing auxiliary electrodes between adjacent sub-pixels.

In FIG. 28A, an elongated strip-shaped auxiliary electrode unit 2830 is provided between adjacent columns of sub-pixels 2812. Specifically, in the embodiment of FIG. 28A , a first sub-pixel 2812a, a second sub-pixel 2812b and a third sub-pixel 2812c together form a first pixel 2810a. For example, the first pixel 2810a may be an RGB pixel, in which case each sub-pixel 2812a-c corresponds to a red, green or blue sub-pixel. Pixels 2810 can be arranged such that the same sub-pixel pattern (eg, red, green, blue) is repeated across a display device. Specifically, the sub-pixel arrangements of a second pixel 2810b and a third pixel 2810c may be consistent with the first pixel 2810a. In this arrangement, the color of all sub-pixels 2812 in each column of sub-pixels 2812 (eg, sub-pixels linearly arranged along a first axis labeled Y) can be consistent and substantially parallel to the first axis. The auxiliary electrode unit 2830 extending along the axis Y may be provided between adjacent columns of sub-pixels 2812, as shown in FIG. 28A.

For the sake of simplicity, FIGS. 28B-28J use the same pixel and sub-pixel arrangement as described in FIG. 28A above for explanation.

In FIG. 28B, the auxiliary electrode unit 2830 is depicted as being provided between adjacent columns of pixels 2810. Specifically, the auxiliary electrode unit 2830 that is substantially parallel to the first axis Y is provided between the first pixel 2810a and the second pixel 2810b that are aligned with each other in the direction of a second axis X. However, no auxiliary electrode unit 2830 is provided between the first pixel 2810a and the third pixel 2810c that are aligned with each other in the direction of a first axis Y. As shown in the figure, the first axis Y and the second axis X are perpendicular to each other. It should be understood that although in FIG. 28B , the auxiliary electrode unit 2830 extends along the first axis Y, in another embodiment, the auxiliary electrode unit 2830 may extend along the second axis X.

FIG. 28C depicts an embodiment in which an auxiliary electrode 2830 is provided between adjacent sub-pixels 2812 to form a grid over the entire display device. Specifically, the auxiliary electrode 2830 is provided between each pair of adjacent sub-pixels 2812a-2812c. Accordingly, the auxiliary electrode 2830 includes a section extending substantially parallel to the first axis Y and the second axis X, forming a mesh or grid between the sub-pixels 2812a-2812c.

In another embodiment shown in FIG. 28D, an auxiliary electrode 2830 is provided between adjacent pixels 2810. Specifically, the auxiliary electrode 2830 is provided between the first pixel 2810a and the second pixel 2810b aligned with each other along the second axis X, and the first pixel 2810a aligned with each other along the first axis Y and the third pixel 2810c. Accordingly, the auxiliary electrode 2830 forms a mesh or grid between the pixels 2810a-c.

In FIG. 28E , yet another embodiment of separate auxiliary electrode units 2830 being provided between adjacent sub-pixels 2812 is illustrated. Specifically, the direction of the auxiliary electrode unit 2830 is substantially parallel to the first axis Y, and is provided between the adjacent sub-pixels 2812a-c.

In FIG. 28F, an embodiment in which separate auxiliary electrode units 2830 are provided between adjacent pixels 2810 is depicted. Specifically, the direction of the auxiliary electrode unit 2830 is substantially parallel to the first axis Y, and is provided between the first pixel 2810a and the second pixel 2810b arranged adjacent to each other along the second axis X.

In FIG. 28G, it is depicted that auxiliary electrode units 2830 are provided between adjacent sub-pixels 2812 to create a grid or mesh on a display device. As described, the elongated auxiliary electrode unit 2830 extending substantially parallel to the first axis Y is disposed between adjacent sub-pixels 2812 aligned along the second axis X. Similarly, the elongated auxiliary electrode unit 2830 extending substantially parallel to the second axis X is disposed between the adjacent sub-pixels 2812 aligned along the first axis Y.

In Figure 28H, separate auxiliary electrode units 2830 are provided between adjacent pixels 2810 to create a grid or mesh on a display device. As described, the elongated auxiliary electrode unit 2830 extending substantially parallel to the first axis Y is disposed between adjacent pixels 2810a and 2810b aligned along the second axis X. Similarly, the elongated auxiliary electrode unit 2830 extending substantially parallel to the second axis X is disposed between adjacent pixels 2810a and 2810c aligned along the first axis Y.

FIG. 28I illustrates another embodiment in which separate auxiliary electrode units 2830 are provided between adjacent sub-pixels 2812 to form a grid or mesh on a display device. Each of the auxiliary electrode units 2830 includes a first section extending substantially parallel to the first axis Y and a second section extending substantially parallel to the second axis X. The first axis Y and the second axis X are perpendicular to each other. In Figure 28I, the first section and the second section are connected end-to-end to form an inverted L shape.

Figure 28J illustrates another embodiment in which separate auxiliary electrode units 2830 are provided between adjacent sub-pixels 2812 to form a grid or mesh on a display device. Each of the auxiliary electrode units 2830 includes a first section extending substantially parallel to the first axis Y and a second section extending substantially parallel to the second axis X. The first axis Y and the second axis X are perpendicular to each other. In Figure 28J, the first section and the second section are connected near the midpoint of the first section and the second section to form a cross shape.

Although in some embodiments one auxiliary electrode unit is not physically connected to another, they may be electrically connected to each other through a common electrode. For example, providing separate auxiliary electrode units that are indirectly connected to each other through the common electrode can still substantially reduce sheet resistance, thereby increasing the efficiency of an OLED device without substantially interfering with the optical characteristics of the device.

The auxiliary electrode can also be used in display devices with other pixel or sub-pixel arrangements. For example, auxiliary electrodes may be provided on display devices in which diamond pixel arrangements are used. An example of this pixel arrangement is illustrated in Figures 29-33.

Figure 29 is a schematic diagram illustrating an OLED device 2900 with a diamond pixel arrangement according to one embodiment. The OLED device 2900 includes a plurality of pixel definition layers (PDLs) 2930 and a light-emitting area 2912 (sub-pixel) disposed between adjacent PDLs 2930. The light-emitting area 2912 includes a plurality of sub-pixels corresponding to a first sub-pixel 2912a (which may correspond to a green sub-pixel), a second sub-pixel 2912b (which may correspond to a blue sub-pixel) and a third sub-pixel 2912c (which may correspond to a blue sub-pixel). Corresponding to, for example, red sub-pixels).

FIG. 30 is a schematic diagram illustrating the OLED device 2900 shown in FIG. 29 along line A-A. As shown more clearly in FIG. 30 , the device 2900 includes a base material 2903 and a plurality of anode units 2921 formed on a surface of the base material 2903 . The substrate 2903 may additionally include several transistors and a base substrate (for the sake of brevity, the figure has been omitted). An organic layer 2915 is provided on top of each anode unit 2921 in a region between adjacent PDLs 2930, and a common cathode 2942 is provided on the organic layer 2915 and the PDL 2930 to form the first sub-pixel 2912a. The organic layer 2915 may include several organic/or inorganic layers. For example, these layers may include a hole transport layer, a hole injection layer, an electroluminescent layer, an electron injection layer, and/or an electron transport layer. A nucleation inhibiting coating 2945 is provided over the region of the common cathode 2942 corresponding to the first sub-pixel 2912a to allow selective coating of the common cathode 2942 over the substantially flat region of the common cathode 2942 corresponding to the PDL 2930. On the covered area, an auxiliary electrode 2951 is deposited. The nucleation inhibition coating 2945 can also serve as an index matching coating. A film coating 2961 may optionally be provided to cover the device 2900.

FIG. 31 shows a schematic diagram taken along line B-B of the OLED device 2900 shown in FIG. 29 . The device 2900 includes a plurality of anode units 2921 formed on the surface of the substrate 2903 and an organic layer 2916 or 2917 provided on top of each anode unit 2921 in a region between adjacent PDLs 2930. The common cathode 2942 is provided on the organic layers 2916 and 2917 and the PDL 2930 to form the second sub-pixel 2912b and the third sub-pixel 2912c respectively. The nucleation inhibiting coating 2945 is provided over the regions of the common cathode 2942 corresponding to the sub-pixels 2912b and 2912c to allow for selective coating of regions of the common cathode 2942 corresponding to the substantially planar regions of the PDL 2930. On the covered area, the auxiliary electrode 2951 is deposited. The nucleation inhibition coating 2945 can also serve as a refractive index matching coating. The film coating 2961 may optionally be provided to cover the device 2900.

32 is a schematic diagram of an OLED device 3200 having a pixel arrangement according to another embodiment. Specifically, the device 3200 includes a plurality of PDLs 3230 that separate light emitting areas 3212 (sub-pixels). For example, the first subpixel 3212a may correspond to a green subpixel, the second subpixel 3212b may correspond to a blue subpixel, and the third subpixel 3212c may correspond to a red subpixel. Figure 33 is an image of an OLED device with a pixel arrangement according to the embodiment of Figure 32. Although not shown, the device 3200 may additionally include an auxiliary electrode provided on the non-emitting area of the device 3200. For example, the auxiliary electrode may be disposed on a region of the common cathode corresponding to a substantially flat portion of the PDL 3230.

In another aspect according to some embodiments, an apparatus is provided. In some embodiments, the device is an optoelectronic device. In some embodiments, the device is another electronic device or other product. In some embodiments, the device includes a substrate, a nucleation inhibiting coating, and a conductive coating. The nucleation inhibiting coating covers a first area of the substrate. The conductive coating covers a second region of the substrate and partially overlaps the nucleation inhibiting coating, such that at least a portion of the nucleation inhibiting coating is exposed from the conductive coating, or is substantially free of the conductive coating. or not substantially covered by the conductive coating. In some embodiments, the conductive coating includes a first portion and a second portion, the first portion of the conductive coating covers the second area of the substrate, and the second portion of the conductive coating is in contact with the second portion. One of the nucleation inhibiting coatings partially overlaps. In some embodiments, the second portion of the conductive coating is separated from the nucleation inhibiting coating by a gap. In some embodiments, the nucleation inhibiting coating includes an organic material. In some embodiments, the first portion of the conductive coating and the second portion of the conductive coating are integrally formed with each other.

According to another aspect of some embodiments, an apparatus is provided. In some embodiments, the device is an optoelectronic device. In some embodiments, the device is another electronic device or other product. In some embodiments, the device includes a substrate and a conductive coating. The base material includes a first area and a second area. The conductive coating covers the second region of the substrate and partially overlaps the first region of the substrate, such that at least a portion of the first region of the substrate is exposed from the conductive coating, or is substantially free of The conductive coating may not be substantially covered by the conductive coating. In some embodiments, the conductive coating includes a first portion and a second portion, the first portion of the conductive coating covers the second area of the substrate, and the second portion of the conductive coating is in contact with the second portion. A portion of the first region of the substrate overlaps. In some embodiments, the second portion of the conductive coating is separated from the first region of the substrate by a gap. In some embodiments, the first portion of the conductive coating and the second portion of the conductive coating are integrally formed with each other.

Figure 34 illustrates a portion of an apparatus according to an embodiment. The device includes a substrate 3410 having a surface 3417. A nucleation inhibiting coating 3420 covers a first region 3415 of the surface 3417 of the substrate 3410, and a conductive coating 3430 covers a second region 3412 of the surface 3417 of the substrate 3410. As shown in FIG. 34 , the first region 3415 and the second region 3412 are different and are non-overlapping regions of the surface 3417 of the substrate 3410 . The conductive coating 3430 includes a first part 3432 and a second part 3434. As shown in this figure, the first portion 3432 of the conductive coating 3430 covers the second region 3412 of the substrate 3410, and the second portion 3434 of the conductive coating 3430 is partially connected to the nucleation inhibition coating 3420 partially overlap. More specifically, the second portion 3434 is shown to overlap the nucleation inhibiting coating 3420 in a direction perpendicular to (or orthogonal to) the underlying substrate surface 3417.

Particularly when the nucleation inhibiting coating 3420 is formed such that its surface 3422 exhibits a relatively low probability of adhesion to the material used to form the conductive coating 3430, the second portion 3434 of the conductive coating 3430 A gap 3441 is formed between the overlap with the surface 3422 of the nucleation inhibition coating 3420. Accordingly, the second portion 3434 of the conductive coating 3430 does not have direct physical contact with the nucleation inhibition coating 3420, but as indicated by arrow 3490, along the surface 3417 perpendicular to the substrate 3410 direction, the gap 3441 is separated from the nucleation inhibition coating 3420. Nonetheless, the first portion 3432 of the conductive coating 3430 may be in direct physical contact with the nucleation inhibiting coating 3420 at an interface or boundary between the first region 3415 and the second region 3412 of the substrate 3410. get in touch with.

In some embodiments, the overlap (second portion 3434 of the conductive coating 3430) may extend laterally over the nucleation inhibiting coating 3420 to an extent comparable to the thickness of the conductive coating 3430. For example, referring to Figure 34, the width w ₂ of the second portion 3434 (or the dimension along a direction parallel to the surface 3417 of the substrate 3410) can be equal to the thickness t ₁ of the first portion 3432 of the conductive coating 3430 (or along a direction perpendicular to the surface 3417 of the substrate 3410) is equivalent. For example, the ratio w ₂ :t ₁ may range from about 1:1 to about 1:3, about 1:1 to about 1:1.5, or about 1:1 to about 1:2. Although the thickness t ₁ of the conductive coating 3430 is generally relatively uniform, the extent to which the second portion 3434 overlaps the nucleation inhibiting coating 3420 (i.e., w ₂ ) will vary at different portions of the surface 3417 There is a certain degree of change.

In another embodiment illustrated in FIG. 35 , the conductive layer 3430 additionally includes a third portion 3436 disposed between the second portion 3434 and the nucleation inhibition coating 3420 . As described, the second portion 3434 of the conductive coating 3430 extends laterally over and is spaced apart from the third portion 3436 of the conductive coating 3430, and the The third portion 3436 may be in direct physical contact with the surface 3422 of the nucleation inhibition coating 3420. The thickness t ₃ of the third portion 3436 may be less than, and in some cases, substantially less than the thickness t ₁ of the first portion 3432 of the conductive coating 3430 . Additionally, in at least some embodiments, the width w ₃ of the third portion 3436 may be greater than the width w ₂ of the second portion 3434. Accordingly, the third portion 3436 may laterally extend to overlap the nucleation inhibiting coating 3420 to a greater extent than the second portion 3434 . For example, the ratio _w3 : _t1 may range from about 1:2 to about 3:1 or from about 1:1.2 to about 2.5:1. Although the entire thickness t ₁ of the conductive coating 3430 is generally relatively uniform, the extent to which the third portion 3436 overlaps the nucleation inhibiting coating 3420 (i.e., w ₃ ) will vary at different portions of the surface 3417 There is a certain degree of change. The thickness t ₃ of the third portion 3436 may be no greater than or less than about 5% of the thickness t ₁ of the first portion 3432 . For example, _t3 may be no greater or less than _about 4%, no greater or less than about 3%, no greater or less than about 2%, no greater or less than about 1%, or no greater or less than about 0.5%. Instead of, or in addition to, the third portion 3436 forming a thin film as shown in Figure 35, the material of the conductive coating 3430 can form islands or discontinuous clusters on a portion of the nucleation inhibiting coating 3420. For example, the islands or discontinuous clusters may include features that are physically separated from each other such that the islands or clusters do not form a continuous layer.

In yet another embodiment illustrated in Figure 36, a nucleation promoting coating 3451 is disposed between the substrate 3410 and the conductive coating 3430. Specifically, the nucleation promoting coating 3451 is disposed between the first portion 3432 of the conductive coating 3430 and the second region 3412 of the substrate 3410. It is described that the nucleation promoting coating 3451 is disposed on the second region 3412 of the substrate 3410, rather than on the first region 3415 where the nucleation inhibiting coating 3420 is deposited. The nucleation promotion coating 3451 may be formed such that at the interface or boundary between the nucleation promotion coating 3451 and the conductive coating 3430, one surface of the nucleation promotion coating 3451 is in contact with the conductive coating 3430. The material exhibits a relatively high probability of initial adhesion. Thus, the presence of the nucleation promoting coating 3451 can promote the formation and growth of the conductive coating 3430 during deposition. Various features of the conductive coating 3430 of Figure 36 and other coatings (including the dimensions of the first portion 3432 and the second portion 3434) may be similar to those described above in Figures 34-35, but are not shown for the sake of brevity. Repeat again.

In yet another embodiment depicted in Figure 37, the nucleation promoting coating 3451 is disposed on both the first region 3415 and the second region 3412 of the substrate 3410, and the nucleation inhibiting coating 3420 covers a portion of the nucleation promoting coating 3451 disposed on the first area 3415. Another part of the nucleation promoting coating 3451 is exposed from the nucleation inhibiting coating 3420, or is substantially free of the nucleation inhibiting coating 3420 or is not substantially covered by the nucleation inhibiting coating 3420, and the conductive coating 3430 covers the exposed portion of the nucleation promoting coating 3451. Various features of the conductive coating 3430 of Figure 37 and other coatings may be similar to those described above with respect to Figures 34-35 and will not be repeated for the sake of brevity.

38 illustrates yet another embodiment in which the conductive coating 3430 partially overlaps a portion of the nucleation inhibiting coating 3420 in the third region 3419 of the substrate 3410. Specifically, in addition to the first portion 3432 and the second portion 3434, the conductive coating 3430 additionally includes a third portion 3480. As shown in this figure, the third portion 3480 of the conductive coating 3430 is disposed between the portion 3432 and the second portion 3434 of the conductive coating 3430, and the third portion 3480 can be connected to the nucleation inhibiting coating. The surface 3422 of layer 3420 is in direct physical contact. In this regard, the formation of overlap in the third region 3419 may be the result of lateral growth of the conductive coating 3430 during an open mask or maskless deposition method. More specifically, although the surface 3422 of the nucleation inhibiting coating 3420 exhibits a relatively low probability of adhesion to the material of the conductive coating 3430, and thus the probability of nucleation of the material on the surface 3422 is low, because the conductive coating Layer 3430 is grown to a thickness such that coating 3430 may also grow laterally as shown in FIG. 38 and cover a portion of nucleation inhibiting coating 3420.

Although details about the device and certain features of the conductive coating 3430 are omitted from the above description of the embodiment of FIGS. 36-38, it should be understood that in FIGS. 34 and 35, the gap 3441 including the conductive layer 3430 is , the related descriptions of the second part 3434 and the third part 3436 can be equally applied to these embodiments.

It should be understood that, although not explicitly described, there may also be some degree of interference at the interface between the conductive coating 3430 and the underlying surface (e.g., the nucleation promoting coating 3451 or the surface of the substrate 3410). Material used to form the nucleation inhibition coating 3420. This material may be deposited due to a shadowing effect, where the deposited pattern is inconsistent with the pattern of the mask, and may result in some evaporated material being deposited on the masked portion of a target surface. For example, the material may form islands or discontinuous clusters, or become a film having a thickness that is substantially less than the average thickness of the nucleation inhibiting coating 3420.

In some embodiments, the nucleation inhibiting coating 3420 may be removed after depositing the conductive coating 3430 such that at least a portion of an underlying surface is covered by the nucleation inhibiting coating 3420 in the embodiment of FIGS. 34-38 Become exposed. For example, the nucleation inhibition coating 3420 may be selectively removed by etching or dissolving the nucleation inhibition coating 3420 without substantially affecting or eroding the conductive coating 3430, or using plasma or solvent processing techniques. Layer 3420.

The device of some embodiments may be an electronic device, and more specifically an optoelectronic device. Optoelectronic devices generally encompass any device that converts electrical signals into photons or vice versa. As such, an organic optoelectronic device may encompass any optoelectronic device in which one or more active layers of the device are formed primarily of an organic material, more specifically, an organic semiconductor material. Examples of organic optoelectronic devices include, but are not limited to, OLED devices and OPV devices.

It should also be understood that organic optoelectronic devices can be formed on various types of base substrates. For example, a base substrate can be a flexible or a rigid substrate. The base substrate may include silicon, glass, metal, polymer (eg, polyamide), sapphire, or other materials suitable for use as the base substrate.

It will also be appreciated that the various components of a device may be deposited using a wide variety of techniques, including vapor deposition, spin coating, line coating, printing, and various other deposition techniques.

In some embodiments, an organic optoelectronic device is an OLED device, wherein the organic semiconductor layer includes an electroluminescent layer. In some embodiments, the organic semiconductor layer may include additional layers, such as an electron injection layer, an electron transport layer, a hole transport layer, and/or a hole injection layer. For example, the OLED device may be an AMOLED device, a PMOLED device, or an OLED lighting panel or module. Furthermore, the optoelectronic device may be part of an electronic device. For example, the optoelectronic device may be an OLED display module of a computer device such as a smartphone, a tablet, a laptop, or other electronic devices such as a monitor or a television.

Figures 39-41 illustrate various embodiments of an active matrix OLED (AMOLED) display device. For simplicity, various details and features of the conductive coating at or near the interface between the conductive coating and a nucleation inhibiting coating described above in Figures 34-38 are omitted. However, it should be understood that the features described in Figures 34-38 may also be applied to the embodiment of Figures 39-41.

FIG. 39 is a schematic diagram illustrating the structure of an AMOLED device 3802 according to an embodiment.

The device 3802 includes a base substrate 3810 and a buffer layer 3812 deposited on a surface of the base substrate 3810. A thin film transistor (TFT) 3804 is then formed on the buffer layer 3812. More specifically, a semiconductor active region 3814 is formed on a portion of the buffer layer 3812, and a gate insulating layer 3816 is deposited to substantially cover the semiconductor active region 3814. Next, a gate 3818 is formed on top of the gate insulating layer 3816, and an interlayer insulating layer 3820 is deposited. A source electrode 3824 and a drain electrode 3822 are formed such that they extend through the opening formed by the interlayer insulating layer 3820 and the gate insulating layer 3816 and contact the semiconductor active layer 3814. An insulating layer 3842 is then formed on the TFT 3804. A first electrode 3844 is then formed on a portion of the insulating layer 3842. As shown in FIG. 39 , the first electrode 3844 extends through an opening of the insulating layer 3842 so that it is electrically connected to the drain electrode 3822 . A pixel definition layer (PDL) 3846 is then formed to cover at least a portion of the first electrode 3844, including its outer edge. For example, the PDL 3846 may include an insulating organic or inorganic material. Then, an organic layer 3848 is deposited on the first electrode 3844, especially in the area between adjacent PDLs 3846. A second electrode 3850 is deposited to substantially cover both the organic layer 3848 and the PDL 3846. Then, a surface of the second electrode 3850 is substantially covered with a nucleation promoting coating 3852. For example, the nucleation promoting coating 3852 may be deposited using an open mask or maskless deposition technique. A nucleation inhibiting coating 3854 is selectively deposited on the nucleation promoting coating 3852. For example, the nucleation inhibiting coating 3854 may be selectively deposited using a shadow mask. Accordingly, an auxiliary electrode 3856 is selectively deposited on the exposed surface of the nucleation promoting coating 3852 using an open mask or maskless deposition method. More specifically, thermal deposition of the auxiliary electrode 3856 (e.g., including magnesium) is performed using an open mask or a mask, and the auxiliary electrode 3856 is selectively deposited on the exposed surface of the nucleation-promoting coating 3852 while simultaneously A surface of the nucleation inhibiting coating 3854 is left substantially free of material of the auxiliary electrode 3856.

Figure 40 illustrates the structure of an AMOLED device 3902 in which a nucleation promoting coating has been omitted according to another embodiment. For example, the nucleation-promoting coating may be omitted when the surface on which an auxiliary electrode is deposited has a relatively high probability of initial adhesion to the material of the auxiliary electrode. In other words, for surfaces with a relatively high probability of initial adhesion, the nucleation-promoting coating can be omitted and a conductive coating can still be deposited thereon. For simplicity, certain details of the backplane including TFTs are omitted in describing the following embodiments.

In Figure 40, an organic layer 3948 is deposited between a first electrode 3944 and a second electrode 3950. The organic layer 3948 may partially overlap portions of the PDL 3946. A nucleation inhibiting coating 3954 is deposited on a portion of the second electrode 3950 (e.g., corresponding to a light-emitting region) to provide a relatively low probability of initial adhesion to the material used to form an auxiliary electrode 3956 (e.g., relatively low desorption energy) surface. Accordingly, the auxiliary electrode 3956 is selectively deposited on the portion of the second electrode 3950 exposed from the nucleation inhibition coating 3954 . It will be appreciated that the auxiliary electrode 3956 is in electrical communication with the underlying second electrode 3950 in order to reduce the sheet resistance of the second electrode 3950. For example, the second electrode 3950 and the auxiliary electrode 3956 may include substantially the same material to ensure a high initial adhesion probability to the material of the auxiliary electrode 3956. Specifically, the second electrode 3950 may include substantially pure magnesium or an alloy of magnesium and other metals such as silver (Ag). For Mg:Ag alloys, the alloy composition can range from about 1:9 to about 9:1 (by volume). The auxiliary electrode 3956 may include substantially pure magnesium.

Figure 41 illustrates the structure of an AMOLED device 4002 according to yet another embodiment. In the illustrated embodiment, an organic layer 4048 is deposited between a first electrode 4044 and a second electrode 4050 such that it partially overlaps portions of the PDL 4046. A nucleation inhibiting coating 4054 is deposited to substantially cover a surface of the second electrode 4050, and a nucleation promoting coating 4052 is selectively deposited on a portion of the nucleation inhibiting coating 4054. An auxiliary electrode 4056 is then formed on the nucleation promotion coating 4052. Optionally, a capping layer 4058 may be deposited to cover the nucleation inhibition coating 4054 and the exposed surface of the auxiliary electrode 4056.

Although the auxiliary electrode 3856 or 4056 is illustrated as not having direct physical contact with the second electrode 3850 or 4050 in the embodiments of FIGS. The two electrodes 3850 or 4050 may still be electrically connected. For example, the existence of a relatively thin film of nucleation-promoting material or nucleation-inhibiting material (eg, up to about 100 nm) between the auxiliary electrode 3856 or 4056 and the second electrode 3850 or 4050 is still sufficient to allow current to pass therethrough, so The sheet resistance of the second electrode 3850 or 4050 can be reduced.

42 illustrates the structure of an AMOLED device 4102 according to yet another embodiment, in which an interface between a nucleation inhibiting coating 4154 and an auxiliary electrode 4156 is formed on a sloped surface of PDL 4146 fabrication. The device 4102 includes an organic layer 4148 deposited between a first electrode 4144 and a second electrode 4150, and the nucleation inhibiting coating 4154 deposited on a portion of the second electrode 4150 corresponding to the light emitting region of the device 4102 superior. The auxiliary electrode 4156 is deposited on the portion of the second electrode 4150 exposed from the nucleation inhibition coating 4154 .

Although not shown, the AMOLED device 4102 of Figure 42 may additionally include a nucleation promoting coating deposited between the auxiliary electrode 4156 and the second electrode 4150. The nucleation-promoting coating may also be deposited between the nucleation-inhibiting coating 4154 and the second electrode 4150, particularly if the nucleation-promoting coating is deposited using an open mask or maskless deposition method. .

43 illustrates a portion of an AMOLED device 4300 according to yet another embodiment, wherein the AMOLED device 4300 includes a plurality of light-transmissive regions. As shown, the AMOLED device 4300 includes a plurality of pixels 4321 and an auxiliary electrode 4361 disposed between adjacent pixels 4321. Each pixel 4321 includes a sub-pixel area 4331, which additionally includes several sub-pixel numbers 4333, 4335, 4337 and a light-transmitting area 4351. For example, the subpixel 4333 may correspond to a red subpixel, the subpixel 4335 may correspond to a green subpixel, and the subpixel 4337 may correspond to a blue subpixel. As will be explained, the light-transmitting region 4351 is substantially transparent, allowing light to pass through the device 4300.

Figure 44 illustrates a cross-sectional view taken along line A-A in the device 4300 as shown in Figure 43. Briefly, the device 4300 includes a base substrate 4310, a TFT 4308, an insulating layer 4342, and an anode 4344 formed on the insulating layer 4342 and in electrical communication with the TFT 4308. A first PDL 4346a and a second PDL 4346b are formed on the insulating layer 4342 and cover the edge of the anode 4344. One or more organic layers 4348 are deposited covering the exposed areas of the anode 4344 and portions of the PDLs 4346a, 4346b. A cathode 4350 is then deposited on the one or more organic layers 4348. Next, a nucleation inhibiting coating 4354 is deposited to cover the portion of the device 4300 corresponding to the light-transmitting region 4351 and the sub-pixel region 4331. The entire device surface is thus exposed to the magnesium vapor flux, thereby causing selective deposition of magnesium on uncoated areas of the cathode 4350. In this way, the auxiliary electrode 4361 is formed in electrical contact with the underlying cathode 4350.

In the device 4300, the light-transmitting area 4351 does not contain any material that can substantially affect light transmission. In particular, the TFT 4308, the anode 4344, and the auxiliary electrode 4361 are all disposed in the sub-pixel area 4331, so that these components will not attenuate or block light from transmitting through the light-transmitting area 4351. This configuration allows an inspector to inspect the device 4300 by looking into the device 4300 from a normal inspection distance when the pixels are off or not emitting light, thereby creating a transparent AMOLED display.

Although not shown, the AMOLED device 4300 in FIG. 44 may additionally include a nucleation promoting coating disposed between the auxiliary electrode 4361 and the cathode 4350. The nucleation promoting coating may also be disposed between the nucleation inhibiting coating 4354 and the cathode 4350.

In other embodiments, if the various layers or coatings including the organic layer 4348 and the cathode 4350 are substantially transparent, such layers or coatings may cover a portion of the light-transmitting region 4351. If necessary, the PDL 4346a, 4346b may be selectively not provided in the light-transmitting area 4351.

It should be understood that arrangements of pixels and sub-pixels other than those illustrated in FIGS. 43 and 44 may also be used, and the auxiliary electrode 4361 may be provided in other areas of a pixel. For example, if necessary, the auxiliary electrode 4361 can be provided in the area between the sub-pixel area 4331 and the light-transmitting area 4351 and/or provided between adjacent sub-pixels.

In the aforementioned embodiments, a nucleation-inhibiting coating, in addition to inhibiting the nucleation and deposition of a conductive material (eg, magnesium), may also act to enhance the outcoupling of light from a device. Specifically, the nucleation-inhibiting coating may function as an index-matching coating and/or an anti-reflective coating.

A barrier coating (not shown) may be provided to coat the device described in the previous embodiments (which are depicted in relation to AMOLED display devices). It will be appreciated that such a barrier coating can inhibit various oxidation-prone device layers, including organic layers and cathodes, from exposure to moisture and ambient air. For example, the barrier coating may be a thin film coating formed via printing, CVD, sputtering, ALD, any combination of the foregoing, or via any other suitable method. The barrier coating may also be provided by laminating a preformed barrier film to the device using an adhesive. For example, the barrier coating can be a multilayer coating including organic materials, inorganic materials, or a combination of both. In some embodiments, the barrier coating may additionally include a getter material and/or a desiccant.

The sheet resistance specifications of the common electrode of an AMOLED display device may vary depending on the size of the display device (eg, panel size) and the tolerance to voltage changes. Typically, the larger the panel size and the lower the tolerance to voltage variation across the panel, the higher the chip resistance specification (eg, specifying a lower chip resistance).

Sheet resistance specifications and the associated thickness of an auxiliary electrode meeting the specifications according to one embodiment were calculated for various panel sizes and plotted in Figure 56. Calculate the sheet resistance and the thickness of the auxiliary electrode for voltage tolerances of 0.1V and 0.2V. Specifically, the voltage tolerance means the voltage difference supplied to the edge and center pixels of a panel to compensate for the combined IR voltage drop of the transparent electrode and the auxiliary electrode as mentioned above. For calculation purposes, assume an aperture ratio of 0.64 for all display panel sizes.

Specified thicknesses of auxiliary electrodes for sample panel sizes are summarized in Table 2 below. Table 2 - Specified thickness of auxiliary electrode for various panel sizes Panel size(inch) 9.7 12.9 15.4 27 65 Specify thickness (nm) @0.1 V 132 239 335 1100 6500 @0.2 V 67 117 174 516 2800

It will be appreciated that the various layers and portions of a backplane, including a thin film transistor (TFT) (eg, TFT 3804 shown in Figure 39), can be fabricated using a variety of suitable materials and methods. For example, the TFT can be made using organic or inorganic materials deposited and/or processed using techniques such as CVD, PECVD, laser annealing, and PVD (including sputtering). It will be appreciated that these layers can be patterned using photolithography, which uses a photomask to expose selected portions of the photoresist covering the underlying device layer to UV light. Depending on the type of photoresist used, exposed or unexposed portions of the mask are washed away to expose desired portions of the underlying device layer. A patterned surface is then chemically or physically etched to effectively remove the exposed portions of the device layer.

Furthermore, although top-gate TFTs are described in some of the above embodiments, it should be understood that other TFT structures may also be used. For example, the TFT may be a bottom gate TFT. The TFT may be an n-type TFT or a p-type TFT. Examples of TFT structures include those utilizing amorphous silicon (a-Si), indium gallium zinc oxide (IGZO), and low temperature polycrystalline silicon (LTPS).

The various layers and portions of a front plate, including electrodes, one or more organic layers, a pixel defining layer, and a capping layer, can be deposited using any suitable deposition method, including thermal evaporation and/or printing. It will be appreciated that, for example, when depositing such materials, shadow masks may be appropriately used to produce desired patterns, and that various etching and selective deposition methods may be used to pattern the various layers. Examples of such methods include, but are not limited to, photolithography, printing (including inkjet or vapor jet printing or roll-to-roll printing), OVPD, and LITI patterning.

Although some of the above embodiments are described with respect to selectively depositing a conductive coating to form a cathode or a common cathode auxiliary electrode, it should be understood that in other embodiments, similar materials and methods may also be used to form the auxiliary electrode. Anode or anode's auxiliary electrode. Example

Some embodiments will be illustrated and described herein with reference to the following examples, which are not intended to limit the scope of the invention in any way.

As used in this example, reference to the thickness of a layer of a material means the amount of that material deposited on a subject surface (or in the case of selective deposition, a subject area of the surface) corresponding to covering the The subject surface is the amount of material required to form a uniformly thick layer of material having the mentioned layer thickness. For example, depositing a layer with a thickness of 10 nm means that the amount of material deposited on the surface corresponds to the amount of material required to form a layer of material with a uniform thickness of 10 nm. It will be appreciated that the actual thickness of the deposited material may not be uniform, for example, due to possible overlapping or clustering of molecules or atoms. For example, depositing a layer with a thickness of 10 nm may result in some portions of the deposited material having an actual thickness greater than 10 nm, or other portions of the deposited material having an actual thickness less than 10 nm. The thickness of a layer deposited on a surface corresponds to the average thickness of the deposited material over the entire surface.

Molecular structures of certain materials used in illustrative examples are provided below.

Example 1

In order to characterize the interface between a nucleation inhibiting coating and an adjacent magnesium coating, a series of samples of the nucleation inhibiting coating and the magnesium coating with different layer thicknesses were prepared and analyzed. The samples were produced using stainless steel shadow masks in a high vacuum deposition system with a cryopump processing chamber and a turbomolecular pump load lock chamber. Materials were thermally deposited from Knudsen vessels (K vessels) and deposition rates were monitored using quartz crystal microbalances (QCMs). During deposition, the base pressure of the system is less than about 10 ^-5 Pa and the H ₂ O partial pressure is less than about 10 ^-8 Torr. Magnesium is deposited at source temperatures of 430-570°C at a deposition rate of approximately 1-5Å/second. SEM micrographs were taken using a Hitachi S-5200.

The sample was first prepared using thermal deposition to deposit approximately 30 nm of silver on a silicon substrate. A nucleation inhibiting coating is then deposited selectively on an area of the silver surface using a shadow mask. 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ) was used in all samples to form the nucleation inhibiting coating. Once the nucleation inhibiting coating is deposited, substantially pure magnesium (approximately 99.99% pure) is deposited using an open mask deposition method. More specifically, during deposition of the open mask, both the exposed silver surface and the nucleation-inhibiting coating surface are treated with a flux of evaporated magnesium. The layer thickness of the nucleation inhibiting coating and the associated deposition rate are summarized in Table 3 below. All depositions were performed under vacuum (about 10 ^-4 to about 10 ^-6 Pa), and the layer thickness and deposition rate were monitored using a calibrated quartz crystal microbalance (QCM). Table 3 - TAZ and magnesium thickness and deposition rate Sample number Thickness of TAZ (nm) Thickness of Mg (nm) TAZ deposition rate (Å/s) Mg deposition rate (Å/s) Sample 1 10 1160 0.2 2 Sample 2 100 500 0.7 2

The samples were analyzed using scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX).

Figure 45A is a top view SEM image of Sample 1. The first area 4501 of the image corresponds to the area on top of the exposed silver surface where magnesium has been deposited, while the second area 4503 corresponds to the area covered by the nucleation inhibiting coating (TAZ). Figures 45B and 45C show an enlarged top view of a portion of sample 1 shown in Figure 45A. According to EDX elemental analysis, the presence of magnesium is not detected in most of the second region 4503. However, the formation of magnesium-containing islands or clusters 4505 was observed (see Figure 45A), and the presence of magnesium in these islands 4503 was confirmed based on EDX elemental analysis.

Figures 45D and 45E are SEM cross-sectional images of Sample 1 showing the interface between the magnesium coating (region 4501) and the nucleation inhibiting coating (region 4503). The underlying substrate 4510 is also visible in these images.

Figures 45F and 45G are additional SEM cross-sectional images of Sample 1, taken from a different part of the sample than Figures 45D and 45E.

As can be seen in Figures 45D-45G, the magnesium coating (region 4501) includes a region extending laterally to the nucleation inhibiting coating (region 4501) in a partially overlapping region near the interface of the magnesium coating and the nucleation inhibiting coating. 4503) the upper part. Specifically, it is seen that the portion of the magnesium coating forms an overhang that is not in direct contact with the surface of the nucleation inhibiting coating, thus creating a gap at the interface between the magnesium coating and the nucleation inhibiting coating. gap.

Figure 45H shows the EDX spectra taken from the first region 4501 and the second region 4503 of Sample 1. It can be seen from the graph of FIG. 45H that the peak corresponding to magnesium is clearly observed in the spectrum taken from the first region 4501, but no significant peak is detected in the spectrum taken from the second region 4503. EDX measurements were taken at 5keV over a sample area of approximately ^2μm .

Figure 46A is a top view SEM image of Sample 2. A first region 4601 of the image corresponds to the area on top of the exposed silver surface where magnesium has been deposited, and a second region 4603 corresponds to the area covered by the nucleation inhibition coating (TAZ). Figure 46B shows an enlarged image of a portion of Figure 46A, and Figure 46C shows a magnified image of a portion of Figure 46B again. The images of Figures 46D, 46E, and 46F show cross-sections of the sample, which also show the substrate 4610. As can be seen in the images of Figures 46B-F, a relatively thin magnesium film or layer 4607 is deposited near the interface between the magnesium coating (region 4601) and the TAZ coating (region 4603). The presence of magnesium in the film 4607 was confirmed through EDX measurement. Furthermore, the formation of magnesium-containing islands or clusters 4605 was observed (see Figure 46A).

Figure 46G shows the EDX spectra taken from the first region 4601 and the second region 4603 of Sample 2. It can be seen from the graph of FIG. 46G that a peak corresponding to magnesium is observed in the spectrum taken from the first region 4601, but no significant peak is detected in the spectrum taken from the second region 4603. The EDX measurements were taken at 5keV over a sample area of approximately ^2μm .

Figure 46H shows a linear EDX scan of the magnesium spectrum taken along the scan line of Sample 2. The EDX spectrum is overlaid on the SEM image showing the corresponding portion of the EDX spectrum obtained from the sample. It can be seen that the intensity of the magnesium spectrum begins to decrease at about 1.7 μm from the interface between the first region 4601 and the film 4607. This observation is consistent with the observation of the cross-section of this sample (eg, 46D), which shows a large or gradual decrease in the thickness of the magnesium coating near the interface.

Example 2

In order to measure the properties of various materials used as nucleation inhibiting coatings or nucleation promoting coatings, a series of experiments were performed using quartz crystal microbalance sets (QCMs).

It will be appreciated that QCM can be used to monitor the rate of deposition during film deposition. Briefly, this monitoring is performed by measuring the change in the frequency of a quartz crystal resonator caused by adding or removing a material from the surface of the resonator.

Figure 47 is a schematic diagram illustrating the experimental setup for measuring magnesium deposition profiles on the surface of QCMs. As shown, an evaporation chamber 4701 includes a first evaporation source 4710 and a second evaporation source 4712. A pair of QCMs 4731 and 4741 are placed inside the chamber 4701 with the resonator surfaces of the QCMs 4731 and 4741 facing the sources 4710 and 4712. A sample door 4721 and a source door 4725 are disposed between the QCMs 4731 and 4741 and the evaporation sources 4710 and 4712. The sample door 4721 and the source door 4725 are movable and are used to control the flux of vapor incident on the QCMs 4731 and 4741 and the flux of vapor leaving the sources 4710 and 4712, respectively.

In this illustrative example setup, the first QCM 4731 (which may also be referred to herein as the "reference QCM" serves as a baseline) is compared to the second QCM 4741 (which may also be referred to herein as the "sample QCM"). sedimentary section. In each experiment, an optically polished quartz crystal obtained from LapTech Precision Inc. (Part No.: and this sample QCM.

Each experiment was performed as follows. First, as shown in FIG. 47 , the reference QCM 4731 and the sample QCM 4741 are placed inside the evaporation chamber 4701 . The chamber 4701 is then evacuated until the pressure in the chamber is less than about 10-5Pa. The sample shutter 4721 is then activated so that the resonator surfaces of both the reference QCM 4731 and the sample QCM 4741 are blocked. The first evaporation source 4710 is then turned on to start evaporating a nucleation promoting or inhibiting material (also referred to as "nucleation modifying material" here). Once a stable evaporation rate is achieved, the sample door 4721 is moved so that the resonator surface of the sample QCM 4741 becomes exposed to the vapor flux while leaving the surface of the reference QCM 4731 unexposed, thus allowing the nucleation of modified material deposited on the surface of the sample QCM 4741. When the required layer thickness of nucleation modification material is deposited on the surface of the sample QCM 4741, the source damper 4725 is activated to block the vapor flux leaving the first source 4710 and prevent further deposition. The first source 4710 is then turned off.

Then, the second evaporation source 4712 is turned on to start evaporation of magnesium. The QCMs 4731 and 4741 are covered using the door 4721 until a stable deposition rate is achieved. Once a stable deposition rate is reached, the shutter 4721 is activated to expose both the modified surface of the sample QCM 4741 and the surface of the reference QCM 4731, allowing magnesium vapor to be incident on the surfaces of both QCMs 4731 and 4741. Monitoring the resonant frequency of the QCMs 4731 and 4741 is determined by the magnesium deposition profile on each of the QCMs 4731 and 4741.

Various nucleation modification materials were deposited on the resonator surface of sample QCM 4741, including materials that can be used to form a nucleation inhibition coating, and a nucleation modification coating was formed thereon. Using the chamber configuration shown in Figure 47, the above experimental procedure was repeated for each nucleation modification material and the magnesium deposition rate on various surfaces was analyzed. The following materials were used to form a nucleation modified coating: 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ); aluminum ( III) Bis(2-methyl-8-quinoline)-4-phenylphenolate (BAlq); 2-(4-(9,10-bis(naphth-2-yl)anthracen-2-yl)benzene methyl)-1-phenyl-1H-benzo-[D]imidazole (LG201); lithium 8-hydroxyquinolate (Liq); and N(biphenyl-4-yl)9,9-dimethyl-N -(4(9-phenyl-9H-carbazol-3-yl)phenyl)-9H-fluorene-2-amide (HT211).

Figure 57 is a graph showing the layer thickness of magnesium deposited on the surface of the reference QCM (reference layer thickness, or "deposited thickness" as labeled in Figure 57) versus the layer thickness of magnesium deposited on the surface of the sample QCM (sample layer thickness , or a log-log plot labeled "Average Film Thickness" in Figure 57). In each case, the reference QCM surface was precoated with substantially pure silver before conducting the experiments.

From the graph of Figure 57, the thickness of the magnesium layer deposited on both QCM surfaces can be determined, and therefore the magnesium deposition rate resulting from exposing the surfaces to the same magnesium vapor flux. In particular, by comparing the deposition of magnesium on the surface of the sample QCM with that on the reference QCM during the formation of a relatively thin magnesium layer on the surface of the sample QCM (i.e., during the initial stage when the thickness of the deposited layer reaches 1 nm or 10 nm) rate, which determines the nucleation inhibition properties of the coating present on the QCM surface of the sample. For convenience of discussion, the layer thickness of magnesium deposited on the surface of the sample QCM will be referred to as the sample layer thickness, and the layer thickness of magnesium deposited on the surface of the reference QCM will be referred to as the reference layer thickness.

In certain embodiments, reference layer thicknesses corresponding to sample layer thicknesses of 1 nm and 10 nm are summarized in Table 4 below for various samples. Specifically, the reference layer thicknesses provided in Table 4 correspond to, for each sample, magnesium deposited on the surface of the reference QCM in the same time required to deposit a layer thickness of 1 nm or 10 nm on the surface of the sample QCM. layer thickness. The organic material was deposited at a deposition rate of approximately 1 Å/sec under a vacuum pressure of approximately 10 ^-5 Pa. Magnesium is deposited at a deposition rate of approximately 2Å/sec at a source temperature of approximately 520-530°C and a vacuum pressure of approximately 10 ^-5 Pa. Table 4 - Summary of results for this sample layer thickness and corresponding reference layer thickness Nucleation modification materials Thickness of Mg on sample QCM surface (nm) Reference thickness of Mg on QCM surface (nm) TAZ 1 2158 ikB 1 104 LG201 1 31 Liq 1 62 HT211 1 33

Based on the above, it can be seen that when the thickness of the sample layer reaches 1 nm, the thickness of the deposited reference layer substantially changes with the nucleation modification material covering the QCM surface of the sample. In this example, 1 nm was chosen as the threshold value for the sample layer thickness to determine the relative deposition rate during the initial stages of film formation on the surface of the sample QCM. It was observed that because the reference QCM surface was pre-coated with silver, the deposition rate of magnesium on the reference QCM surface remained relatively constant.

In terms of coating the sample QCM with TAZ, a relatively thick magnesium coating of over 2000 nm was deposited on the reference QCM before the sample layer thickness reached 1 nm. In coating the sample QCM with BAlq, a reference layer thickness of 104 nm was deposited before the sample layer thickness reached 1 nm. However, in coating the sample QCM with LG201, Liq or HT211, a relatively thin magnesium coating with a layer thickness of less than 62 nm was deposited on the reference QCM before reaching the threshold thickness.

It will be appreciated that higher selectivity is generally achieved using a nucleation-modifying coating that exhibits a relatively high reference layer thickness and thus a relatively low initial deposition rate and probability of adhesion during deposition of the conductive coating. For example, a nucleation-modifying coating exhibiting a high reference layer thickness can be an effective nucleation-inhibiting coating and can be used to cover an area of a target surface such that when the target surface is exposed to a magnesium vapor flux, the magnesium The nucleation-inhibiting coating is selectively deposited on uncovered areas of the target surface, and the surface of the nucleation-inhibiting coating remains substantially free of magnesium or substantially uncovered by magnesium. For example, a nucleation-modifying coating that exhibits a reference layer thickness of at least or greater than about 80 nm at a threshold sample layer thickness of 1 nm may serve as a nucleation-inhibiting coating. For example, the reference layer thickness exhibits a thickness of at least or greater than about 100 nm, at least or greater than about 200 nm, at least or greater than about 500 nm, at least or greater than about 700 nm, at least or greater than about 1000 nm, at least or greater than about 1500 nm, at least or A nucleation modifying coating greater than about 1700 nm, or at least or greater than about 2000 nm, can be used as a nucleation inhibiting coating. In other words, the initial deposition rate of magnesium on the reference surface can be at least or greater than about 80 times, at least or greater than about 100 times, at least or greater than the initial deposition rate of magnesium on the nucleation inhibition coating. About 200 times, at least or greater than about 500 times, at least or greater than about 700 times, at least or greater than about 1000 times, at least or greater than about 1500 times, at least or greater than about 1700 times or at least or greater than about 2000 times.

Figure 58 is a log-log plot of the probability of magnesium vapor adhesion on the surface of the sample QCM versus the thickness of the magnesium layer on the surface of the sample QCM.

The adhesion probability is derived from the following equation: where N _ads is the number of adsorbed monomers that were incorporated into the magnesium coating on the surface of the sample QCM, and N _total is the total number of monomers that hit the surface, based on monitoring the deposition of magnesium on the reference QCM. decided.

As can be seen from the graph in Figure 58, as more magnesium is deposited on the surface, the probability of adhesion generally increases. To achieve the goal of selectively depositing magnesium coatings, it is necessary to use a nucleation inhibiting coating that exhibits a relatively low probability of initial adhesion (eg, low probability of adhesion during the initial deposition phase). More specifically, the initial adhesion probability in this example means that the amount of deposited magnesium corresponds to the adhesion probability measured when forming a closely packed magnesium layer with an average thickness of 1 nm on the surface of a nucleation inhibiting coating. The adhesion probabilities measured when magnesium was deposited with a layer thickness of 1 nm on various nucleation inhibiting coating surfaces are summarized in Table 5 below. Table 5 - Summary of Adhesion Probability Results nucleation inhibiting materials Adhesion probability when depositing 1nm of Mg TAZ < 0.001 ikB 0.013 LG201 0.042 Liq 0.045 HT211 0.064

According to these embodiments, a coating that exhibits an initial probability of adhesion to magnesium vapor of no greater than or less than about 0.03 (or 3%) may serve as a nucleation inhibiting coating. It will be appreciated that in some applications, such as achieving the deposition of relatively thick magnesium coatings, a nucleation inhibiting coating with a lower probability of initial adhesion may be more desirable. For example, the initial adhesion probability is no more than or less than about 0.02, no more than or less than about 0.01, no more than or less than about 0.08, no more than or less than about 0.005, no more than or less than about 0.003, no more than or less than about 0.001, no more than Or less than about 0.0008, no more than or less than about 0.0005, or no more than or less than about 0.0001, can be used as a nucleation inhibiting coating. For example, the nucleation inhibiting coating may include those formed by depositing BAlq and/or TAZ.

Example 3

In order to characterize the correlation between the lateral growth of the magnesium coating and the vertical growth of the magnesium coating near the interface of adjacent coatings, a system of samples with various magnesium and TAZ layer thicknesses was prepared.

The sample was prepared by first depositing approximately 30 nm of silver on a silicon substrate using thermal deposition. A nucleation inhibiting coating is then deposited selectively over areas of the silver surface using shadow masking. In all samples, 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ) was used to form the nucleation-inhibiting coating. . Once the nucleation inhibiting coating is deposited, substantially pure magnesium (approximately 99.99% pure) is deposited using an open mask deposition method such that both the exposed silver surface and the nucleation inhibiting coating surface are exposed during the open mask deposition. All were subjected to an evaporating magnesium flux. All depositions were performed under vacuum (about 10 ^-4 to about 10 ^-6 Pa). Magnesium is deposited at a rate of approximately 2Å/s.

Figure 49 is a schematic diagram illustrating the prepared sample. As shown, portions 4901 and 4903 of the nucleation inhibiting coating are selectively deposited over areas of the silver surface, and the magnesium coating 4907 is deposited between portions 4901 and 4903. To facilitate discussion, the silicon substrate and the silver layer are omitted in Figure 49. The lateral distance of the exposed silver surface between the portions 4901 and 4903 of the nucleation inhibition coating is shown as d , and the width of the magnesium coating 4907 is shown as d + Δd . In this manner, the lateral growth distance of the magnesium coating 4907 can be determined by subtracting the lateral distance of the exposed silver surface from the width of the magnesium coating 4907. Analysis of the top-view SEM image of this sample yielded both d and d + Δd . During the deposition process, the layer thickness of magnesium, h , was monitored using a quartz crystal microbalance (QCM).

The measured lateral growth distances ( Δd ) for samples with various magnesium layer thicknesses ( h ) and nucleation inhibition layer thicknesses are summarized in Table 6 below. The measurement accuracy of Δd is approximately 0.5μm. Table 6 - Mg lateral growth distance for various Mg and TAZ layer thicknesses h (µm) (µm) (TAZ 10nm) (µm) (TAZ 100nm) 0.25 <0.5 <0.5 0.75 2.5 <0.5 1.5 3.5 -

It can be observed from the above results that no detectable amount of lateral growth was observed in samples prepared with relatively thick TAZ coatings. Specifically, no lateral growth was detected in samples prepared with 100 nm TAZ nucleation inhibition coating and 0.25 μm and 0.75 μm magnesium coatings.

For samples made with a relatively thin (10 nm layer thickness) TAZ coating, no lateral growth was detected in samples with a 0.25 μm thick magnesium coating. However, in samples prepared with thicker magnesium coatings, lateral growth of magnesium was observed. Specifically, samples prepared with a 10 nm thick TAZ nucleation inhibiting coating and a 0.75 μm thick magnesium coating exhibited approximately 2.5 μm of lateral magnesium growth, while a sample prepared with a 10 nm thick TAZ nucleation inhibiting coating and a 1.5 μm Samples prepared with thick magnesium coatings exhibit lateral growth of approximately 3.5 μm.

Example 4

Samples were prepared using another nucleation inhibiting coating including BAlq.

Specifically, the sample was prepared according to the following structure: silicon-based substrate/LG201 (40nm)/Mg:Ag (20nm)/BAlq (500nm)/Mg (300nm). Specifically, approximately 40 nm of 2-(4-(9,10-bis(naphth-2-yl)anthracen-2-yl)phenyl)-1-phenyl-1H-benzo was deposited on a silicon substrate. -[D]imidazole (LG201), followed by deposition of approximately 20 nm of Mg:Ag (including a Mg:Ag volume ratio of approximately 1:9). A nucleation-inhibiting coating in the form of aluminum(III) bis(2-methyl-8-quinoline)-4-phenylphenolate (BAlq) is then selectively deposited over regions of the Mg:Ag surface to a thickness of approximately 500 nm. . Once the nucleation inhibiting coating is deposited, substantially pure magnesium (approximately 99.99% pure) is deposited using an opening mask deposition method such that both an exposed Mg:Ag surface and a nucleation inhibiting coating surface are in the opening The mask is subjected to evaporative magnesium flux during deposition. All depositions were performed under vacuum (about 10 _-4 to about 10 ^-6 Pa). The magnesium coating is deposited at a rate of approximately 3.5Å/s.

Figure 50A is a top view SEM image of a sample made using a BAlq nucleation inhibition coating. A first region 5003 corresponds to the region where the BAlq coating is present and therefore no significant amount of magnesium is deposited, while a second region 5001 corresponds to the region where magnesium is deposited. Figures 50C and 50D show enlarged views of areas 5007 and 5005, respectively. Figure 50B shows an enlarged view of the interface between the first area 5003 and the second area 5001.

As can be seen in Figure 50B, some islands 5011 are formed near the interface. Specifically, the islands 5011 are typically unconnected magnesium-containing clusters formed on the surface of the nucleation-inhibiting coating. For example, it is hypothesized that the islands may include magnesium and/or magnesium oxide.

Figure 50C shows an enlarged view of this area 5007 in Figure 50A, which represents the area where "substantial" magnesium coating is formed during the process. Figure 50D shows an enlarged view of the area 5005 near the interface between the first area 5003 and the second area 5001. It can be seen that the morphology of the magnesium coating near this interface is different from that of the bulk magnesium coating.

Figure 50E additionally shows a cross-sectional SEM image of the sample in which the islands 5011 are shown on the surface of the nucleation inhibiting coating.

Example 5 (Comparative Example A)

Comparative examples were prepared to characterize structures formed using materials that exhibit relatively poor nucleation inhibition properties (eg, a nucleation inhibition coating exhibits a relatively high initial adhesion coefficient to magnesium vapor).

This comparison sample was fabricated according to the following structure: Silicon base substrate/LG201 (40nm)/Mg:Ag (20nm)/HT211 (500nm)/Mg (300nm). Specifically, approximately 40 nm of 2-(4-(9,10-bis(naphth-2-yl)anthracen-2-yl)phenyl)-1-phenyl-1H-benzo was deposited on a silicon substrate. -[D]imidazole (LG201), followed by deposition of approximately 20 nm of Mg:Ag (approximately 1:9 by volume). N(biphenyl-4-yl)9,9-dimethyl-N-(4(9-phenyl-9H-carbazole- This nucleation inhibiting coating is in the form of 3-yl)phenyl)-9H-fluorene-2-amide (HT211). Once the nucleation inhibiting coating is deposited, substantially pure magnesium (approximately 99.99% pure) is deposited using an open mask deposition method such that both an exposed Mg:Ag surface and a nucleation inhibiting coating surface are masked in the opening. The mask is subjected to an evaporating magnesium flux during deposition. All depositions were performed under vacuum (about 10 ^-4 to about 10 ^-6 Pa). The magnesium coating is deposited at a rate of approximately 3.5Å/s.

Figure 51A shows a top view SEM image of the comparative sample, where a first region 5103 corresponds to the region on which the nucleation inhibiting coating in the form of HT211 was deposited, and a second region 5101 corresponds to the region where the magnesium coating was formed. As can be seen, a significant amount of magnesium is clearly observable in this first region 5103.

Figure 51B shows a cross-sectional SEM image of the comparative sample. A dotted line is used to indicate the approximate interface between the first area 5103 and the second area 5101.

Example 6 (Comparative Example B)

Another comparison sample was prepared to determine the profile of a magnesium coating deposited on a surface using a shadow masking technique.

The comparison sample was fabricated by depositing a layer of silver to a thickness of about 30 nm on top of a silicon wafer, followed by depositing a layer of magnesium to a thickness of about 800 nm by shadow masking. Specifically, the shadow mask deposition method is configured to allow certain areas of the silver surface to be exposed to magnesium flux through a shadow mask hole, while masking other areas of the silver surface. Magnesium is deposited at a rate of approximately 2Å/s.

Figure 52A is a top view SEM image of the comparison sample. In Figure 52A, a dotted line is used to indicate the approximate interface. A first area 5203 corresponds to the masked area, and a second area 5201 corresponds to the exposed area on which the magnesium coating is deposited.

Figure 52B is a cross-sectional SEM image of the comparison sample. As can be seen in Figure 52B, the magnesium coating deposited on the second region 5201 includes a relatively long (approximately 6 μm) tapered or tail portion 5214 where the thickness of the portion 5214 is significantly reduced.

Example 7 (Comparative Example C)

To characterize the effect of deposition rate on the nucleation inhibition properties of nucleation inhibition coatings including HT211, a series of comparative samples with various HT211 layer thicknesses were produced.

Specifically, the sample was produced by depositing a layer of HT211 with a thickness of about 10 nm over the entire surface of a glass substrate, followed by depositing magnesium through an opening mask. Various evaporation rates were used to deposit the magnesium coating; however, in preparing each sample, the deposition time was adjusted based on a reference layer thickness to obtain a magnesium layer thickness of about 100 nm or about 1000 nm.

A reference layer thickness used in this example means the layer thickness of magnesium deposited on a reference surface that exhibits a high initial adhesion coefficient (eg, a surface with an initial adhesion coefficient of about or close to 1.0). For example, the reference surface may be the surface of a QCM placed inside a deposition chamber for the purpose of monitoring the deposition rate as well as the thickness of the reference layer. In other words, the reference layer thickness does not refer to the actual thickness deposited on a target surface (eg, a surface of the nucleation inhibiting coating), but rather refers to the layer thickness of magnesium deposited on the reference surface.

Figure 53 shows a graph of transmittance versus wavelength for various samples using various deposition rate regimes and associated reference layer thicknesses. Based on the transmittance data, it can be seen that the sample with a relatively low magnesium reference layer thickness of approximately 100 nm (which was deposited at a deposition rate of approximately 0.2 Å/s) exhibits the highest transmittance. However, when samples with essentially the same reference layer thickness were deposited at a higher deposition rate of 2 Å/s, the transmittance of the entire measured spectrum was lower. The lowest transmission was detected in samples with a relatively high magnesium reference layer thickness of about 1000 nm deposited using a relatively high rate of about 2 Å/s.

It is speculated that the decrease in transmittance observed in the blue region of the spectrum (approximately 400-475 nm) for all three samples may be due to absorption of magnesium oxide, which can occur in samples due to deposited magnesium oxide. .

Example 8

In order to characterize the impact of using various materials to form a nucleation inhibiting coating, a series of samples using different materials to form the nucleation inhibiting coating were prepared.

The sample was prepared by depositing a layer of the nucleation-inhibiting coating with a thickness of approximately 10 nm on top of a glass substrate surface. The sample was then subjected to open mask deposition of magnesium. For each sample, magnesium was deposited at a rate of approximately 2 Å/s until the reference layer thickness reached approximately 1000 nm.

Figure 54 is a graph of transmittance versus wavelength for samples made from various materials. It can be seen that the sample made with TAZ exhibits the highest transmittance, followed by BAlq. It was found that the samples made with HT211 and Liq both exhibited substantially lower transmittances compared to the samples made with TAZ and BAlq due to the greater amounts of magnesium deposited on the surfaces of HT211 and Liq.

Example 9

A series of samples were prepared to evaluate the impact of providing an auxiliary electrode in accordance with an example embodiment.

A first reference sample was produced by depositing a layer of Mg:Ag on a substrate surface, replicating a typical common cathode used in top-emission AMOLED display devices.

A second reference sample is prepared by selectively depositing an auxiliary electrode in the form of a repeating grid atop a non-conductive substrate surface. The pattern of the auxiliary electrode is shown in Figure 55. Specifically, the auxiliary electrode 5501 includes a plurality of holes 5505 formed thereon, so that if the auxiliary electrode 5501 is manufactured on an AMOLED device, each hole 5505 will substantially correspond to a light-emitting area of the device (such as , pixel or sub-pixel), the auxiliary electrode 5501 is deposited on a non-emitting area (eg, an area between pixels or sub-pixels). The average width or size of each hole 5505 is about 70 μm, and the width of each strip or segment of the auxiliary electrode 5501 is about 15-18 μm. The auxiliary electrode 5501 is formed using substantially pure magnesium (approximately 99.99% purity).

An evaluation sample is prepared by depositing an auxiliary electrode (under conditions used for the second reference sample) on top of the Mg:Ag layer of the first reference sample. Specifically, a nucleation-inhibiting coating is selectively deposited on top of the Mg:Ag layer using a shadow mask, and the resulting patterned surface is then exposed to magnesium vapor to selectively deposit the magnesium-assisted electrodes, producing a pattern similar to that shown in Figure 55.

The sheet resistance of this sample was measured, and the results of the measurements are summarized in Table 7 below. Table 7 - Measured values of chip resistance first reference sample Second reference sample Evaluation sample Chip resistance (ohm/sq) 22.3 0.13 0.1

As shown in the table above, the first reference sample (Mg:Ag layer) was found to exhibit a relatively high sheet resistance of approximately 22.3Ω/sq. The second reference sample and the evaluation sample were found to have substantially lower sheet resistances of approximately 0.13Ω/sq and approximately 0.1Ω/sq, respectively. Accordingly, by providing an auxiliary electrode in electrical communication with a thin film conductor (eg, a common cathode) as in this example embodiment, it has been demonstrated that the sheet resistance of the thin film conductor can be substantially reduced.

The terms "substantially," "substantially," "approximately" and "approximately" are used herein to express and describe small variations. When used in conjunction with an event or circumstance, the term may refer to the exact occurrence of that event or circumstance, as well as to the approximation of that event or circumstance. For example, when used in conjunction with a numerical value, the term may mean a range of variation less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, Less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%.

In the description of some embodiments, a component is provided "on" or "above" another component, or "covers" or "covers" another component, which may include that the front component is directly on the rear component (e.g., physical contact), and one or more intermediate components located between the front component and the rear component.

In addition, quantities, ratios, and other numerical values are sometimes presented as ranges herein. It should be understood that this range format is used for convenience and brevity, and should be understood to flexibly include not only the values specifically specifying the limits of the range, but also all individual values or subranges included within the range. , as if each value and subrange were explicitly pointed out.

From the above discussion, it will be understood that the present invention can be embodied in the form of various specific examples, including but not limited to the following:

Specific Example 1: An optoelectronic device including: a base material; a nucleation inhibiting coating covering a first region of the substrate; and A conductive coating including a first part and a second part, the first part of the conductive coating covering a second area of the substrate, the second part of the conductive coating and the nucleation inhibition coating partially overlapped, The second portion of the conductive coating and the nucleation inhibition coating are separated by a gap.

Specific Example 2: The optoelectronic device of Specific Example 1, wherein the second portion of the conductive coating extends above an overlapping portion of the nucleation inhibiting coating and is connected to the overlapping portion of the nucleation inhibiting coating. separated by a gap.

Specific Example 3: The optoelectronic device of Specific Example 2, wherein another part of the nucleation inhibiting coating is exposed from the conductive coating.

Specific Example 4: The optoelectronic device of Specific Example 1, wherein the conductive coating additionally includes a third portion in contact with the nucleation inhibition coating, and the thickness of the third portion of the conductive coating is no greater than that of the conductive coating. 5% of the thickness of the first part of the layer.

Specific Example 5: The optoelectronic device of Specific Example 4, wherein the second portion of the conductive coating extends above the third portion of the conductive coating and is spaced apart from the third portion of the conductive coating.

Specific Example 6: The optoelectronic device of Specific Example 1, wherein the conductive coating additionally includes a third portion disposed between the first portion of the conductive coating and the second portion of the conductive coating, and the conductive coating The third portion of the coating is in contact with the nucleation inhibiting coating.

Specific Example 7: The optoelectronic device of Specific Example 1, wherein the conductive coating additionally includes a third portion in contact with the nucleation inhibition coating, and the third portion of the conductive coating is included in the nucleation inhibition coating. Discontinuous clusters on the surface of a layer.

Specific Example 8: The optoelectronic device of Specific Example 1, wherein the conductive coating includes magnesium.

Specific Example 9: The optoelectronic device of Specific Example 1, wherein the nucleation inhibiting coating is characterized by having an initial adhesion probability of no more than 0.02 to the material of the conductive coating.

Specific Example 10: The optoelectronic device of Specific Example 1, wherein the nucleation inhibiting coating includes organic molecules, each including a core portion and a terminal portion bonded to the core portion, and the terminal portion includes a biphenyl moiety, phenyl moiety, fluorene moiety or phenyl moiety.

Specific Example 11: The optoelectronic device of Specific Example 10, wherein the core part includes a heterocyclic part.

Specific Example 12: The optoelectronic device of Specific Example 1, wherein the nucleation inhibiting coating includes organic molecules, each of the organic molecules includes a core portion and a plurality of terminal portions bonded to the core portion, and the plurality of terminal portions A first terminal moiety includes a biphenyl moiety, a phenyl moiety, a fluorene moiety or a phenylene moiety, and each remaining terminal moiety of the plurality of terminal moieties has a molecular weight not greater than 2 times the first terminal moiety. molecular weight.

Specific Example 13: The optoelectronic device of Specific Example 1, further comprising a nucleation promoting coating disposed between the first portion of the conductive coating and the second region of the substrate.

Specific Example 14: The optoelectronic device of Specific Example 13, wherein the nucleation promoting coating includes fullerene.

Specific Example 15: The optoelectronic device of Specific Example 1, wherein the substrate includes a back plate and a front plate disposed on the back plate.

Specific Example 16: The optoelectronic device of Specific Example 15, wherein the back plate includes a transistor, and the front plate includes an electrode electrically connected to the transistor, and at least one organic layer disposed on the electrode.

Specific Example 17: The optoelectronic device of Specific Example 16, wherein the electrode is a first electrode, and the front plate further includes a second electrode disposed on the organic layer.

Specific Example 18: An optoelectronic device including: a substrate including a first region and a second region; and A conductive coating, which includes a first part and a second part, the first part of the conductive coating covers the second area of the substrate, and the second part of the conductive coating is in contact with the second area of the substrate One of the first regions partially overlaps, The second portion of the conductive coating and the first region of the substrate are separated by a gap.

Specific Example 19: The optoelectronic device of Specific Example 18, wherein the second portion of the conductive coating extends above the first region of the substrate and is separated from the first region of the substrate by a gap. open.

Specific Example 20: The optoelectronic device of Specific Example 18, wherein another part of the first region of the substrate is exposed from the conductive coating.

Specific Example 21: The optoelectronic device of Specific Example 18, wherein the ratio of the width of the second part of the conductive coating to the thickness of the first part of the conductive coating is in the range of 1:1 to 1:3.

Specific Example 22: The optoelectronic device of Specific Example 18, wherein the thickness of the first portion of the conductive coating is 500 nm or thicker.

Specific Example 23: The optoelectronic device of Specific Example 18, wherein the conductive coating includes magnesium.

Specific Example 24: The optoelectronic device of Specific Example 18, further comprising a nucleation promoting coating between the first portion of the conductive coating and the second region of the substrate.

Specific Example 25: The optoelectronic device of Specific Example 24, wherein the nucleation promoting coating includes fullerene.

Specific Example 26: An optoelectronic device including: a base material; a nucleation inhibiting coating covering a first region of the substrate; and an electrically conductive coating covering a laterally adjacent second region of one of the substrates, The conductive coating includes a conductive material, and the nucleation inhibiting coating is characterized by having an initial adhesion probability to the conductive material of no greater than about 0.02.

Specific Example 27: The optoelectronic device of Specific Example 26, wherein the initial adhesion probability to the conductive material is not greater than 0.01.

Specific Example 28: The optoelectronic device of Specific Example 26, wherein the nucleation inhibiting coating includes a polycyclic aromatic compound.

Specific Example 29: The optoelectronic device of Specific Example 26, wherein the nucleation inhibiting coating includes an organic compound, the organic compound includes a core part and a terminal part bonded to the core part, and the terminal part includes biphenyl base moiety, phenyl moiety, fluorene moiety or phenyl moiety.

Specific Example 30: The optoelectronic device of Specific Example 29, wherein the core part includes a heterocyclic part.

Specific Example 31: The optoelectronic device of Specific Example 26, wherein the nucleation inhibition coating includes an organic compound, the organic compound includes a core part and a plurality of terminal parts bonded to the core part, and one of the terminal parts is A first terminal moiety includes a biphenyl moiety, a phenyl moiety, a fluorene moiety or a phenylene moiety, and each remaining terminal moiety of the plurality of terminal moieties has a molecular weight no greater than 2 times the molecular weight of the first terminal moiety. .

Specific Example 32: The optoelectronic device of Specific Example 26, wherein the conductive coating includes a first part and a second part, the first part of the conductive coating covers the second area of the substrate, and the conductive coating The second portion partially overlaps the nucleation inhibition coating and is separated from the nucleation inhibition coating by a gap.

Specific Example 33: The optoelectronic device of Specific Example 26, wherein the conductive material includes magnesium.

Specific Example 34: The optoelectronic device of Specific Examples 1, 18 or 26, wherein the optoelectronic device is an organic light emitting diode (OLED) device.

Specific Example 35: The optoelectronic device of Specific Example 34, wherein the OLED device is an active matrix OLED device, a passive matrix OLED device or an OLED lighting panel.

Specific Example 36: The optoelectronic device of Specific Example 34, wherein the OLED device is a top-emitting OLED device, a bottom-emitting OLED device, or a dual-side emitting OLED device.

Specific Example 37: The optoelectronic device of Specific Example 34, wherein the OLED device includes a light-transmitting portion configured to transmit light.

Specific Example 38: The optoelectronic device of Specific Example 34, wherein the conductive coating is an electrode of the OLED device.

Specific Example 39: The optoelectronic device of Specific Example 38, wherein the conductive coating is a cathode of the OLED device.

Specific Example 40: The optoelectronic device of Specific Example 39, wherein the substrate includes an anode, and one or more organic layers disposed between the anode and the cathode.

Specific Example 41: The optoelectronic device of Specific Example 40, wherein the one or more organic layers include an electroluminescent layer and one or more layers selected from the group consisting of: a hole injection layer, an electron A hole transport layer, a hole blocking layer, an electron injection layer, an electron transport layer and an electron blocking layer.

Specific Example 42: The optoelectronic device of Specific Example 40, wherein the substrate further includes a thin film transistor electrically connected to the anode.

Specific Example 43: The optoelectronic device of Specific Example 34, wherein the conductive coating is an auxiliary electrode of the OLED device.

Specific Example 44: The photoelectric device of Specific Example 43, wherein the substrate includes an anode, a cathode, and one or more organic layers disposed between the anode and the cathode, and wherein the cathode and the auxiliary electrode are electrically connection.

Specific Example 45: The optoelectronic device of Specific Example 44, wherein the one or more organic layers include an electroluminescent layer and one or more layers selected from the group consisting of: a hole injection layer, an electron A hole transport layer, a hole blocking layer, an electron injection layer, an electron transport layer and an electron blocking layer.

Specific Example 46: The optoelectronic device of Specific Example 45, wherein the substrate further includes a thin film transistor electrically connected to the anode.

Specific Example 47: The optoelectronic device of Specific Example 10 or 29, wherein the terminal moiety includes a biphenyl moiety, and the biphenyl moiety is independently selected from one or more substituents of the group consisting of Group substitution: tritium, fluorine, alkyl, cycloalkyl, aralkyl, silyl, aryl, heteroaryl and fluoroalkyl.

Specific Example 48: The optoelectronic device of Specific Example 10 or 29, wherein the terminal moiety includes a phenyl moiety, and the phenyl moiety is independently selected from one or more substituent groups selected from the group consisting of Substitution: tritium, fluorine, alkyl, cycloalkyl, silyl and fluoroalkyl.

Specific Example 49: The optoelectronic device of Specific Example 10 or 29, wherein the terminal portion includes a fluorene portion or a phenylene portion.

Specific Example 50: The optoelectronic device of Specific Example 1 or 26, wherein the nucleation inhibiting coating includes a polymer.

Specific Example 51: The optoelectronic device of Specific Example 50, wherein the polymer is selected from the group consisting of: fluoropolymers, polyvinyl biphenyl, and polyvinyl carbazole.

Specific Example 52: A method of manufacturing an optoelectronic device, the method includes: (1) Provide a substrate and a nucleation-inhibiting coating, the nucleation-inhibiting coating covering a first region of the substrate; and (2) depositing a conductive coating covering a second area of the substrate, The conductive coating includes magnesium, and the nucleation inhibition coating is characterized by having an initial adhesion probability to magnesium not greater than 0.02.

Specific Example 53: The manufacturing method of Specific Example 52, wherein depositing the conductive coating includes processing both the nucleation inhibiting coating and the second region of the substrate to deposit on the second region of the substrate the conductive coating, while at least a portion of the nucleation inhibiting coating remains exposed from the conductive coating.

Specific Example 54: The manufacturing method of Specific Example 52, wherein depositing the conductive coating includes exposing both the nucleation inhibiting coating and the second region of the substrate to evaporated magnesium, so that the conductive coating is deposited on the substrate. The conductive coating is deposited on the second area while at least a portion of the nucleation inhibiting coating remains exposed from the conductive coating.

Specific Example 55: The manufacturing method of Specific Example 52, wherein depositing the conductive coating is performed using an opening mask or without using a mask.

Specific Example 56: The manufacturing method of Specific Example 52, wherein the deposition rate of magnesium on the second region of the substrate is at least 80 times greater than the deposition rate of magnesium on the nucleation inhibition coating.

Specific Example 57: The manufacturing method of Specific Example 52, wherein the initial adhesion probability of the pair of magnesium is not greater than 0.01.

Specific Example 58: The manufacturing method of Specific Example 52, wherein the nucleation inhibiting coating includes polycyclic aromatic compounds.

Specific Example 59: The manufacturing method of Specific Example 52, wherein the nucleation inhibition coating includes an organic molecule, each of the organic molecules includes a core part and a plurality of terminal parts bonded to the core part, and the plurality of terminal parts A first terminal portion of one of the moieties includes a biphenyl moiety, a phenyl moiety, a fluorene moiety or a phenylene moiety, and each remaining terminal portion of the plurality of terminal moieties has a molecular weight no greater than 2 times the first terminal moiety. the molecular weight.

Specific Example 60: The manufacturing method of Specific Example 52, wherein providing the substrate includes depositing a nucleation promoting coating to cover the second region of the substrate before depositing the conductive coating.

Specific Example 61: The manufacturing method of Specific Example 60, wherein the nucleation promoting coating layer includes fullerene.

Although the invention has been described with reference to certain specific embodiments, various modifications thereto will be apparent to those skilled in the art. Any examples provided herein are for the purpose of illustrating certain aspects of the invention only and are not intended to limit the invention in any way. Any drawings provided herein are for the purpose of illustrating certain aspects of the invention only, are not drawn to scale, and are not intended to limit the invention in any way. The scope of the appended claims should not be limited to the specific embodiments described in the above description, but is to be accorded the full scope consistent with the invention as a whole. The disclosures of all documents cited herein are hereby incorporated by reference in their entirety.

100, 5910, 2903, 3410, 4510, 4610: Substrate 102, 3417, 3422: Surface 110": Shadow mask 112, 1560, 1734, 1734a-1734d, 5505: Holes, holes, slits 120, 991, 993, 995, 1191, 1193 ,1195,1391,1393,1395: Source 122: Arrow 140,240,940,1130,1340,1570,1660,5920,1771,2945,3420,3854,3954,4054,4154,4354: Nucleation inhibition coating 210: Stamp 212: Protrusion 410: Conductive coating source 440, 950, 1150, 1350, 5915, 3430: Conductive coating 160, 930, 1140, 1330, 1540, 1640, 3451, 4052: Nucleation promoting coating 142: Treated surface 144: Treated surface Patterned surface 600: Electroluminescence (EL) device 616, 900, 1100, 1300, 1510, 1610, 1702, 3810, 4310: Base Substrate 614, 910, 1110, 1310, 1520, 1620, 1741, 2921, 4344: Anode, Anode unit 630,920,1120,1320,1530,1630,1761,2915,2916,2917,3848,3948,4048,4148,4348: organic layer 602,1550,1650,4852,1710,1712,4350: cathode 612: electricity Hole injection layer 610: Hole transport layer 608: Electroluminescence layer 606: Electron transport layer 604: Electron injection layer 620: Power supply 704, 706, 708, 710: Stage 804, 806, 808, 810: Stage 912, 1112, 1312: Target surface 980, 1180, 1182, 1380, 1382,1731: mask, opening mask 1004,1006,1008,1010: stage 1204,1206,1208,1210: stage 1500,1600,1800,5901,5902,1721,1900,2000,2200,2300,2400, 2500, 2600, 2700, 2900, 3200: OLED device, device 1670, 4854, 1830, 1832, 1834, 2030, 2110, 2112, 2114, 2116, 2530, 2230a, 2230b, 2230c, 2230d, 2330a, 2330b, 2430a- d, 2630, 2730, 2830, 2951, 3856, 3956, 4056, 4156, 4361, 5501: auxiliary electrode, auxiliary electrode unit 4800: circuit 4812: power supply (VDD) line 4814: control line 4816: gate line 4818: data line 4831: First TFT 4833: Second TFT 4841: Storage capacitor 4843: Compensation circuit 4850: OLED pixel or sub-pixel 2812, 4333, 4335, 4337: Sub-pixel 1723, 1723', 1751, 1810a-1810f, 1910, 2010, 2210, 2310, 2410, 2510, 2610, 2710, 2810, 2912, 3212, 4321: pixel, light emitting area 1727: unexposed area 1725: outer edge 1715: passive matrix OLED device (PMOLED) 1755, 1820, 1920, 2020,2220,2320,2420,2520,2620,2720: Non-emitting area 1775: Barrier coating 1719: Comparative PMOLED device 1783: Pixel definition structure 1718: Conductive strip α, w _2, w _3: Width d: Separation distance 1912: Lead 2120, 2122, 2124, 2126: Region 2812a, 2912a, 3212a: First sub-pixel 2812b, 2912b, 3212b: Second sub-pixel 2812c, 2912c, 3212c: Third sub-pixel 2810a: First pixel 2810b: Two pixels 2810c: Third pixel Y: First axis ,4501,4601,5003,5103,5203: first area 3412,4503,4603,5001,5101,5201: second area 3432: first part 3434: second part 3441: gap 3490: arrow t ₁ , t ₃ : Thickness 3436, 3480: The third part 3802, 3902, 4002, 4102, 4300: Active matrix OLED, AMOLED device 3812: Buffer layer 3804, 4308: Thin film transistor, TFT 3814: Semiconductor active area 3816: Gate insulating layer 3820: Interlayer insulating layer 3824: Source electrode 3822: Drain electrode 3842, 4342: Insulating layer 3844, 3944, 4044, 4144: First electrode 3850, 3950, 4050, 4150: Second electrode 4058: Cover layer 4331: Sub-pixel region 4351: Transparent area 4346a: first PDL 4346b: second PDL 4505: magnesium-containing islands or clusters 4607: magnesium film or layer 4605: magnesium-containing islands or clusters 4701: evaporation chamber 4710: first evaporation source, first Source 4712: Second evaporation source 4731, 4741: QCMs 4721: Sample barrier 4725: Source barrier 4901, 4903: Part 4907: Magnesium coating d : lateral distance d + Δd : width h : layer thickness of magnesium 5007, 5005: Area 5011: Island 5214: Relatively long tapering or tail part, part

Some embodiments will now be illustrated with reference to the accompanying drawings, in which:

Figure 1 is a schematic diagram illustrating the deposition of a nucleation inhibiting coating using a shadow mask according to one embodiment;

2A, 2B and 2C are schematic diagrams illustrating a micro-contact transfer process of a nucleation inhibition coating according to an embodiment;

Figure 3 is a schematic diagram illustrating the deposition of a conductive coating on a patterned surface according to one embodiment;

Figure 4 is a diagram illustrating a device produced according to an embodiment of a method;

5A-5C are schematic diagrams illustrating a method for selectively depositing a conductive coating according to one embodiment;

5D-5F are schematic diagrams illustrating a method for selectively depositing a conductive coating according to another embodiment;

Figure 6 is a diagram illustrating an electroluminescent device according to an embodiment;

Figure 7 is a flowchart showing method stages according to an embodiment;

Figure 8 is a flowchart showing the stages of a method according to another embodiment;

Figures 9A-9D are schematic diagrams illustrating these stages in the embodiment of Figure 8;

Figure 10 is a flowchart showing method stages according to yet another embodiment;

Figures 11A-11D are schematic diagrams illustrating these stages in the embodiment of Figure 10;

Figure 12 is a flowchart showing method stages according to yet another embodiment;

Figures 13A-13D are schematic diagrams illustrating these stages in the embodiment of Figure 12;

Figure 14 is a top view of an OLED device according to an embodiment;

Figure 15 is a cross-sectional view of the OLED device of Figure 14;

Figure 16 is a cross-sectional view of an OLED device according to another embodiment;

Figure 16B is a top view illustrating an opening mask according to an example;

Figure 16C is a top view illustrating an opening mask according to another example;

Figure 16D is a top view illustrating an opening mask according to yet another example;

Figure 16E is a top view illustrating an opening mask according to yet another example;

Figure 17 is a top view illustrating a patterned electrode according to one embodiment;

Figure 17B is a top view illustrating a passive matrix OLED device according to one embodiment;

Figure 17C is a schematic cross-sectional view of the passive matrix OLED device of Figure 17B;

Figure 17D is a schematic cross-sectional view of the passive matrix OLED device of Figure 17B after coating;

Figure 17E is a schematic cross-sectional view of a comparative passive matrix OLED device;

Figures 18A-18D illustrate portions of auxiliary electrodes according to various embodiments;

Figure 19 illustrates a top view of a lead connected to an electrode of an OLED device according to one embodiment;

Figure 20 illustrates a top view of a patterned electrode according to one embodiment;

Figures 21A-21D illustrate patterned electrodes according to various embodiments;

Figure 22 illustrates repeating electrode units formed on an OLED device according to one embodiment;

Figure 23 illustrates a repeating electrode unit formed on an OLED device according to another embodiment;

Figure 24 illustrates a repeating electrode unit formed on an OLED device according to yet another embodiment;

Figures 25-28J illustrate auxiliary electrode patterns formed on an OLED device according to various embodiments;

Figure 29 illustrates a portion of a device with a pixel arrangement according to one embodiment;

Figure 30 is a cross-sectional view taken along line A-A of the device of Figure 29;

Figure 31 is a cross-sectional view taken along line B-B of the device of Figure 29;

Figure 32 is a partial view illustrating a device with a pixel arrangement according to another embodiment;

Figure 33 is a photomicrograph of a device having the pixel arrangement described in Figure 32;

34 is a cross-sectional view illustrating an interface near an interface between a conductive coating and a nucleation inhibiting coating according to one embodiment;

35 is a cross-sectional view illustrating near an interface between a conductive coating and a nucleation inhibiting coating according to another embodiment;

36 is a cross-sectional view illustrating an interface near a conductive coating, a nucleation-inhibiting coating, and a nucleation-promoting coating according to one embodiment;

37 is a cross-sectional view illustrating an interface near a conductive coating, a nucleation inhibiting coating, and a nucleation promoting coating according to another embodiment;

38 is a cross-sectional view illustrating an interface near an interface between a conductive coating and a nucleation inhibiting coating according to yet another embodiment;

Figure 39 is a cross-sectional view illustrating an active matrix OLED device according to one embodiment;

40 is a cross-sectional view illustrating an active matrix OLED device according to another embodiment;

41 is a cross-sectional view illustrating an active matrix OLED device according to yet another embodiment;

42 is a cross-sectional view illustrating an active matrix OLED device according to yet another embodiment;

Figure 43 is a diagram illustrating a transparent active matrix OLED device according to an embodiment;

Figure 44 is a cross-sectional cross-sectional view illustrating the device according to Figure 43;

Figure 45A is a top-view SEM image of sample 1;

Figures 45B and 45C are enlarged SEM images showing a portion of the sample of Figure 45A;

Figure 45D is a cross-sectional SEM image showing the sample of Figure 45A;

Figure 45E is a cross-sectional SEM image showing the sample of Figure 45A;

Figure 45F is a cross-sectional SEM image showing another portion of the sample of Figure 45A;

Figure 45G is an oblique SEM image showing part of the sample of Figure 45F;

Figure 45H is a graph showing the EDX spectrum of the sample taken from Figure 45A;

Figure 46A is a top-view SEM image of sample 2;

Figure 46B is an enlarged SEM image showing a portion of the sample of Figure 46A;

Figure 46C is a further enlarged SEM image showing the sample portion of Figure 46B;

Figure 46D is a cross-sectional SEM image showing the sample of Figure 46A;

Figures 46E and 46F are oblique SEM images showing the surface of sample 46A;

Figure 46G is a graph showing the EDX spectrum of the sample taken from Figure 46A;

Figure 46H shows a magnesium EDX spectrum overlaid on an SEM image showing the corresponding portion of the spectrum obtained from the sample;

Figure 47 is a schematic diagram illustrating a chamber set up for deposition experiments using quartz crystal microbalances (QCMs);

Figure 48 is a circuit diagram showing an example driving circuit of an active matrix OLED display device;

Figure 49 is a schematic diagram of a magnesium coating deposited between portions of a nucleation inhibiting coating;

Figure 50A is a top view SEM image showing a sample prepared using a BAlq nucleation inhibition coating;

Figure 50B is an SEM image showing a magnified portion of sample 50A;

Figures 50C and 50D are SEM images showing enlarged portions of the sample of Figure 50A;

Figure 50E is an oblique SEM image showing one surface of the sample of Figure 50A;

Figure 51A is a top view SEM image showing a comparative sample made using a HT211 nucleation inhibiting coating;

Figure 51B is a cross-sectional SEM image of the comparative sample of Figure 51A;

Figure 52A is a top view SEM image showing a comparative sample produced using a shadow mask deposition method;

Figure 52B is a cross-sectional SEM image of the comparative sample of Figure 52A;

Figure 53 is a graph of transmittance versus wavelength for comparative samples prepared with HT211 nucleation inhibition coating at various deposition rates;

Figure 54 is a graph of transmittance versus wavelength for samples made with various nucleation inhibiting coatings;

Figure 55 is a top view showing a pattern of an auxiliary electrode according to an example embodiment;

Figure 56 is a chart showing sheet resistance specifications and related auxiliary electrode thicknesses for various display panel sizes;

Figure 57 is a graph showing the layer thickness of magnesium deposited on a reference QCM surface versus the layer thickness of magnesium deposited on the surface of sample QCMs covered with various nucleation modification coatings;

Figure 58 is a graph showing the adhesion probability of magnesium vapor on a sample QCM surface versus the layer thickness deposited on a sample QCM surface covered with various nucleation modification coatings; and

Figures 59A and 59B illustrate a method of removing a nucleation inhibiting coating after depositing a conductive coating, according to one embodiment.

100:Substrate

102:Surface

110:Shadow mask

112: Hole, slit

120: source

122:arrow

140: Nucleation inhibition coating

Claims (80)

An optoelectronic device having a plurality of layers, including: a nucleation-inhibiting coating disposed on a surface of an underlying layer on one side of the device; and at least one island disposed on the nucleation-inhibiting coating on one surface of the layer; wherein the at least one island is formed of a conductive coating material. An optoelectronic device having a plurality of layers extending substantially transversely to a side of the device, the side including a first region and a second region, wherein the layers include: a substrate spanning the first region and the second region extending; and a conductive coating supported by the substrate and disposed only along the second region; wherein the conductive coating is formed by actions including: depositing a nucleation inhibiting coating on the substrate; and subjecting the substrate and the nucleation inhibiting coating to a vapor flux of a conductive coating material, the nucleation inhibiting coating being adapted to affect the conductive coating material A tendency of the vapor flux to be deposited thereon causes the conductive coating to form primarily in areas of the substrate that are substantially free of the nucleation inhibiting coating. An optoelectronic device comprising a plurality of layers deposited on the substrate and extending along a side defined by at least one lateral axis thereof, including at least one island comprising a conductive coating material and disposed on the side on a first layer surface in a first region, wherein: the device includes a nucleation inhibiting coating disposed between the substrate and the at least one island; the first region is substantially free of the conductive coating material A sealing coating is provided, and the first region corresponds to at least a portion of at least one of: an emissive region and a transmissive region. An optoelectronic device comprising a plurality of layers deposited on a substrate, the plurality of layers further comprising: At least one island formed from a conductive coating material and disposed on a first layer surface; a nucleation inhibiting coating disposed between the substrate and the at least one island; and at least one overlying layer Cover at least one island. The apparatus of claim 2, wherein the depositing action includes an action of exposing the first region of the substrate to a vapor flux of a nucleation inhibiting coating material. The device of claim 2, wherein the depositing action includes an action of positioning a mask to limit deposition of one side of the nucleation inhibiting coating to the first region. The device of claim 2, wherein the subjecting action is performed in at least one of an open mask and an unmasked deposition. The device of claim 2, wherein the layers further comprise the nucleation inhibiting coating supported by the substrate and disposed only along the first region. The device of claim 8, wherein the layers further comprise at least one island disposed on a surface of the nucleation inhibiting coating. The device of claim 9, wherein the at least one island is formed during the subjecting action. The device of claim 9, wherein the at least one island is disposed in a portion of the first area. The device of claim 9, wherein the at least one island is formed of the conductive coating material. The device of claim 9, wherein the conductive coating includes a first portion covering the second region and a second portion partially overlapping the nucleation inhibiting coating, wherein the second portion is connected to the component by a gap. Separated by nuclear inhibitory coating. The device of claim 13, wherein the layers further include disposed on the substrate a nucleation promoting coating between the first portion and the second region. The device of claim 14, wherein the nucleation promoting coating extends along the first region. The device of claim 14, wherein the nucleation promoting coating is formed by an action of adding the nucleation promoting coating. The device of claim 16, wherein the adding action occurs before or after the depositing action. The device of claim 16, wherein the adding action includes an action of inserting a mask to limit a lateral range of adding the nucleation promoting coating. The device of claim 2, further comprising an action of removing the nucleation inhibiting coating after the subjecting action. The device of claim 1, wherein the nucleation inhibiting coating covers a first region of the surface. The device of claim 4, wherein: one side of the device includes a first region and a second region, the at least one island is disposed in the first region, and the first region substantially does not contain the conductive coating Material one seal coat. The device of claim 1, 3, 4 or 10, wherein the at least one island forms a discontinuous cluster. The device of claim 22, wherein the discontinuous cluster is physically separated from other discontinuous clusters. The device of claim 1 or 9, wherein the at least one island does not include a continuous layer. The device of claim 20, wherein the at least one island is configured in the first area part of it. The device of claim 3, further comprising a conductive coating, the conductive coating comprising the conductive coating material deposited on a second layer surface in a second region of the side. The device of claim 21, further comprising a conductive coating comprising the conductive coating material and deposited on a second layer surface in the second region. The device of claim 26, further comprising a nucleation inhibiting coating deposited in the first region of the device, wherein: an exposed layer surface of the nucleation inhibiting coating forms the first layer surface; and the The nucleation inhibiting coating is adapted to affect a tendency of the vapor flux of the conductive coating material to be deposited thereon such that the nucleation inhibiting coating is substantially free of a sealing coat of the conductive coating material. The device of claim 27, further comprising a nucleation inhibiting coating deposited in the first region of the device, wherein: an exposed layer surface of the nucleation inhibiting coating forms the first layer surface; and the The nucleation inhibiting coating is adapted to affect a tendency of the vapor flux of the conductive coating material to be deposited thereon such that the nucleation inhibiting coating is substantially free of a sealing coat of the conductive coating material. The device of claim 20, further comprising a conductive coating covering a second region of the surface. The device of claim 30, wherein the conductive coating is formed from the conductive coating material. The device of claim 26, wherein the at least one island is formed in the first region during deposition of the conductive coating material to form the conductive coating in the second region. The device of claim 30, wherein the conductive coating includes a first portion covering the second area and a second portion partially overlapping the nucleation inhibiting coating. The device of claim 28, wherein the conductive coating includes a first portion covering the second area and a second portion overlapping a portion of the nucleation inhibiting coating, and wherein the second portion of the conductive coating separated from the nucleation inhibiting coating by a gap. The device of claim 29, wherein the conductive coating includes a first portion covering the second area and a second portion overlapping a portion of the nucleation inhibiting coating, and wherein the second portion of the conductive coating separated from the nucleation inhibiting coating by a gap. The device of claim 13, 34 or 35, wherein the second portion extends over and is spaced apart from the at least one island. The device of claim 33, wherein the second portion is separated from the at least one island. The device of claim 13 or 33, wherein another portion of the nucleation inhibiting coating is exposed from the conductive coating. The device of claim 33, further comprising a nucleation promoting coating disposed between the first portion and the second region of the surface. The device of claim 14 or 39, wherein the nucleation promoting coating contains a fullerene. The device of claim 9, 26, 27 or 30, wherein the at least one island is disposed in a discontinuous layer having no more than about 5% of a thickness of the conductive coating in the second region an average layer thickness. The device of any one of claims 1 to 4, wherein the conductive coating material includes magnesium. The device of claim 1 or 2, wherein the conductive coating material includes a high vapor pressure material. The device of claim 43, wherein the high vapor pressure material is selected from the following: At least one of: ytterbium, cadmium and zinc. The device of claim 1, 2, 28, or 29, wherein the nucleation inhibiting coating is characterized by having an initial adhesion probability of the conductive coating material of no more than about 0.02. The device of claim 1, 2, 28 or 29, wherein the nucleation inhibiting coating contains a polycyclic aromatic compound. The device of claim 1, 2, 28 or 29, wherein the nucleation inhibiting coating includes a polymer. The device of claim 47, wherein the polymer is at least one of the following: a fluoropolymer, polyvinyl biphenyl and polyvinyl carbazole. The device of claim 48, wherein the fluoropolymer is selected from the group consisting of perfluoropolymers and polytetrafluoroethylene. The device of claim 1, 2, 28 or 29, wherein the nucleation inhibiting coating includes an organic compound including a core portion and a terminal portion bonded to the core portion. The device of claim 50, wherein the terminal portion includes at least one of the following: a biphenyl moiety, a phenyl moiety, a fluorene moiety and a phenyl moiety. The device of claim 51, wherein the biphenyl moiety is substituted with at least one substituent independently selected from at least one of the following: tritium, fluorine, alkyl, cycloalkyl, aralkyl, silyl, aromatic radical, heteroaryl and fluoroalkyl. The device of claim 51, wherein the phenyl moiety is substituted with at least one substituent independently selected from at least one of the following: tritium, fluorine, alkyl, cycloalkyl, silyl and fluoroalkyl. The device of claim 50, wherein the terminal moiety includes at least one substituent independently selected from at least one of the following: tritium, fluorine, alkyl, cycloalkyl, aralkyl, silyl, Aryl, heteroaryl, fluoroalkyl and any combination thereof. The device of claim 50, wherein the organic compound further comprises at least one additional terminal moiety having a molecular weight no more than about 2 times the molecular weight of the terminal moiety. The device of claim 50, wherein the core part includes at least one of the following: a substituted alkyl group, an unsubstituted alkyl group, a cycloalkynyl group, an alkenyl group, an alkynyl group, an aryl group, an Aralkyl group, a cyclic hydrocarbon moiety, a heterocyclic moiety, a cyclic ether moiety, a heteroaryl group, a fluorene moiety and a silanyl group. The device of claim 1, wherein the bottom layer includes: a backplane including a transistor; and a front panel disposed on the backplane, wherein the front panel includes a first layer electrically coupled to the transistor. an electrode and a second electrode; and at least one organic layer disposed on the first electrode and the second electrode. The device of claim 2, wherein the substrate includes a backplane layer and a frontplane layer, wherein the frontplane layer extends between the backplane layer and the conductive coating. The device of claim 58, wherein the backplane layer includes a transistor, and the frontplane layer includes an electrode electrically coupled thereto and at least one organic layer, wherein the electrode is between the backplane layer and the at least one organic layer. extends between layers. The device of claim 59, wherein the electrode is a first electrode, and the front plate layer further includes a second electrode, wherein the at least one organic layer extends between the first electrode and the second electrode. The device of claim 60, wherein the first electrode is disposed in the second region. The device of claim 60 or 61, wherein the second electrode includes the conductive coating. The device of claim 60 or 61, wherein the first electrode is disposed in the first region. The device of claim 63, wherein the conductive coating includes an auxiliary electrode electrically coupled to the second electrode. The device of claim 3, wherein the emission region includes: a first electrode; at least one organic layer; and a second electrode; wherein: the first electrode is located between the substrate and the at least one organic layer; and the at least An organic layer is located between the first electrode and the second electrode. The device of claim 65, wherein the first region corresponds to at least a portion of the emission region, and wherein the conductive coating is electrically coupled to the second electrode. The device of claim 65, wherein the first region corresponds to at least part of the transmissive region, and wherein the conductive coating forms at least part of the second electrode in the second region. The device of claim 67, wherein the conductive coating is a continuous structure defining a plurality of apertures corresponding to the first region. The device of claim 65, wherein the first region corresponds to at least a portion of the transmissive region, and wherein the conductive coating is electrically coupled to the second electrode. The device of claim 1, 2 or 4, wherein the device is an optoelectronic device comprising at least one emission region, the at least one emission region comprising: a first electrode; at least one organic layer; and a second electrode; wherein the An electrode is located between the substrate and the at least one organic layer; and The at least one organic layer is located between the first electrode and the second electrode. The device of claim 70, wherein the conductive coating is electrically coupled to the second electrode. The apparatus of claim 70, wherein the first area corresponds to at least a portion of the at least one emission area. The device of claim 70, further comprising at least one transmissive region configured to transmit light therethrough, wherein the first region corresponds to at least a portion of the at least one transmissive region. The device of claim 73, wherein the conductive coating forms at least part of the second electrode in the second region. The device of claim 28, further comprising at least one overlying layer covering the at least one island. The device of claim 1, further comprising at least one overlying layer covering the at least one island. The device of claim 9, further comprising at least one overlying layer covering the at least one island. The device of any one of claims 4 and 75 to 77, wherein the overcoating layer includes at least one of the following: a capping layer, a barrier coating, and a thin film cladding (TFE) layer. The device of claim 78, wherein the barrier coating is a multi-layer coating that includes at least one of the following: an organic material, an inorganic material, and combinations thereof. The device of any one of claims 29 and 75 to 77, wherein the at least one island is disposed between the nucleation inhibiting coating and the overlying layer.