TW202231841A - Method for patterning a coating on a surface and device including a patterned coating - Google Patents

Abstract

An opto-electronic device includes: (1) a substrate; (2) a nucleation inhibiting coating covering a first region of the substrate; and (3) a conductive coating including a first portion and a second portion. The first portion of the conductive coating covers a second region of the substrate, the second portion of the conductive coating partially overlaps the nucleation inhibiting coating, and the second portion of the conductive coating is spaced from the nucleation inhibiting coating by a gap.

Description

Method for patterning a coating on a surface and device including the patterned coating

Cross-references to related applications This application claims US Provisional Application No. 62/373,927, filed August 11, 2016, US Provisional Application No. 62/377,429, filed August 19, 2016, and The interest and priority of the international application PCT/IB2016/056442 of October 26, 2016, the entire contents of which are incorporated herein by reference.

Field of Invention The following generally relates to a method of depositing a conductive material on a surface. Specifically, the method relates to selectively depositing the conductive material on a surface for forming a conductive structure of a device.

Background of the Invention Organic light emitting diodes (OLEDs) typically include several layers of organic material between conductive thin film electrodes, and at least one of the organic layers is an electroluminescent layer. When a voltage is applied to the electrodes, holes and electrons are injected from the anode and cathode, respectively. Holes injected from the electrodes and electrons migrate through the organic layer to the electroluminescent layer. When holes and electrons are in close proximity, they are attracted to each other by the Coulomb force. The holes and electrons then combine to form bound states called excitons. Excitons can decay through a process of radiative recombination, in which photons are released. Alternatively, excitons can decay through a non-radiative recombination process in which no photons are released. Note that Internal Quantum Efficiency (IQE) as used herein should be interpreted as the proportion of all electron-hole pairs produced in a device that will decay through the process of radiative recombination.

Depending on the rotational state of the electron-electron pairs (ie, excitons), the radiative recombination process can occur as a fluorescent or phosphorescent process. Specifically, excitons formed from electron-hole pairs can be characterized as having singlet or triplet spin states. In summary, the radiative decay of singlet excitons produces fluorescence, while the decay of triplet excitons produces phosphorescence.

More recently, other emission mechanisms for OLEDs have been proposed and investigated, including thermally active delayed fluorescence (TADF). Briefly, TADF luminescence occurs through an inverse intersystem spanning process in which triplet excitons are converted into singlet excitons with the help of thermal energy, followed by radiative decay of the singlet excitons.

The external quantum efficiency (EQE) of an OLED device means the ratio of charge carriers provided to the OLED device relative to the number of photons emitted from the device. For example, an EQE of 100% means that for every electron injected into the device, one photon is emitted. It should be understood that the EQE of a device is generally substantially lower than the IQE of the device. The difference between EQE and IQE is generally attributable to a number of factors, such as absorption and reflection of light caused by components of the device.

OLED devices are typically classified as "bottom emitting" or "top emitting" devices, depending on the relative direction of light emitted from the device. In the case of bottom-emitting devices, the light generated by the radiation recombination process is emitted in a direction towards the base substrate of the device, while in the case of top-emitting devices, light is emitted in a direction away from the base substrate. Accordingly, in order to reduce light attenuation, in bottom-emitting devices, electrodes close to the base substrate are usually made light-transmitting (eg, substantially transparent or translucent), while in top-emitting devices, electrodes farther from the base The electrodes of the base substrate are usually made to be transparent. Depending on the specific device configuration, either the anode or the cathode can serve as the transmissive electrode in top-emitting and bottom-emitting devices.

OLED devices can also be double-sided light-emitting devices configured to emit light in two directions relative to the base substrate. For example, a double-sided light emitting device may include a transmissive anode and a transmissive cathode, so that light from each pixel is emitted in two directions. In another example, a double-sided light-emitting display device may include a first set of pixels configured to emit light in one direction, and a second set of pixels configured to emit light in the other direction, such that a single electrode from each pixel is transmissive.

In addition to the above device configurations, transparent or semi-transparent OLED devices can also be implemented in which the device includes a transparent portion that allows external light to be transmitted through the device. For example, in a transparent OLED display device, a transparent portion may be provided in a non-light emitting area between adjacent pixels. In another example, a transparent OLED lighting panel can be formed by providing several transparent areas between the light emitting areas of the panel. Transparent or translucent OLED devices can be bottom emitting, top emitting or double emitting devices.

While either the cathode or the anode can be selected as the transmissive electrode, a typical top-emitting device includes a light transmissive cathode. Materials generally useful for forming transmissive cathodes include transparent conductive oxides (TCOs), such as indium tin oxide (ITO) and zinc oxide (ZnO); and thin films, such as these via deposition of silver (Ag), aluminum (Al), or various A film formed of thin layers of metal alloys such as magnesium-silver (Mg:Ag) alloys and ytterbium-silver (Yb:Ag) alloys with compositions ranging from about 1:9 to about 9:1 by volume. Multilayer cathodes comprising two or more TCOs and/or thin metal films can also be used.

Especially in the case of thin films, relatively thin layers up to about tens of nanometers in thickness help to improve transparency and good optical properties for OLEDs (eg, reduce micro-resonant cavity effects). However, the reduction in thickness of the transmissive electrode is accompanied by an increase in its sheet resistance. Electrodes with high sheet resistance are generally not ideal for OLED applications because they generate large current resistance (IR) voltage drops when the device is in use, which is detrimental to OLED performance and efficiency. Increasing the power supply level can compensate for the IR voltage drop to a certain extent; however, when increasing the power supply level for a pixel, in order to maintain the proper operation of the device, the voltage supplied to other components will also increase, which is disadvantageous .

In order to reduce the power supply specifications of top-emitting OLED devices, solutions have been proposed to form busbar structures or auxiliary electrodes on the devices. For example, such an auxiliary electrode can be formed by depositing a conductive coating that can be in electrical communication with the transmissive electrode of the OLED device. Such an auxiliary electrode may allow current to be delivered to various areas of the device more efficiently by reducing the sheet resistance of the transmissive electrode and the associated IR voltage drop.

Because the auxiliary electrode is typically provided on the top surface of an OLED stack comprising an anode, one or more organic layers, and a cathode, patterning of the auxiliary electrode has traditionally been accomplished using a shadow mask with mask holes through which Pores, conductive coatings can be selectively deposited by, for example, physical vapor deposition (PVD) methods. However, because the masks are typically metal masks, they are susceptible to distortion during the high temperature deposition process, resulting in distortion of the mask holes and the resulting deposition pattern. In addition, the mask typically loses functionality due to successive depositions because the conductive layer can adhere to the mask and obscure the mask's features. Therefore, once such a mask is deemed ineffective in producing the desired pattern, it may be necessary to use time-consuming and expensive methods to clean the mask, or to dispose of it, thus making the method expensive and complicated. Accordingly, the shadow mask method cannot be used on a commercial scale for mass production of OLED devices. Furthermore, the aspect ratio of features that can be produced using shadow masking methods is often limited by the masking effects of metal masks and the mechanical (eg, tensile) strength of large metal masks during the shadow mask deposition process. Usually stretched.

Another challenge with patterning conductive coatings on a surface through shadow masks is that some, but not all, patterns can be achieved using a single mask. Because the various parts of the mask are physically supported, not all patterns may be completed in a single processing stage. For example, when the pattern specifies an isolated feature, it is often not possible to achieve the desired pattern using a single masking stage. In addition, masks used to create repeating structures (eg, busbar structures or auxiliary electrodes) throughout the entire device surface include numerous perforations or holes formed in the mask. However, forming a large number of holes in the mask may compromise the structural integrity of the mask, thereby causing significant distortion or deformation of the mask during processing, which may distort the pattern of the deposited structures.

Summary of Invention According to some embodiments, a device (eg, an optoelectronic device) includes: (1) a substrate; (2) a nucleation-inhibiting coating covering a first region of the substrate; and (3) a conductive coating The layer includes a first part and a second part. The first portion of the conductive coating covers a second region of the substrate, the second portion of the conductive coating partially overlaps the nucleation-inhibiting coating, and the second portion of the conductive coating overlaps the nucleation-inhibiting coating The nucleus-inhibiting coatings are separated by a gap.

According to some embodiments, a device (eg, an optoelectronic device) includes: (1) a substrate including a first region and a second region; (2) a conductive coating including a first portion and a first region part two. The first portion of the conductive coating covers the second region of the substrate, the second portion of the conductive coating overlaps the first region of the substrate, and the second portion of the conductive coating overlaps the The first region of the substrate is separated by a gap.

According to some embodiments, a device (eg, an optoelectronic device) includes: (1) a substrate; (2) a nucleation-inhibiting coating covering a first region of the substrate; and (3) a conductive coating a layer covering the laterally adjacent second region of the substrate. The conductive coating includes magnesium, and the nucleation-inhibiting coating is characterized as having an initial adhesion probability to magnesium of no greater than about 0.02.

According to some embodiments, a method of fabricating a device (eg, an optoelectronic device) includes: (1) providing a substrate and a nucleation-inhibiting coating covering a first region of the substrate; and (2) depositing a A conductive coating covering a second region of the substrate. The conductive coating includes magnesium, and the nucleation-inhibiting coating is characterized by having an initial adhesion probability to magnesium of no greater than 0.02.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference signs may be repeated among the figures to indicate corresponding or analogous components. Furthermore, numerous details are set forth in order to provide a thorough understanding of the examples described herein. However, it will be understood by those skilled in the art that the example embodiments described herein may be practiced without some of these details. In other instances, certain methods, procedures, and components have not been described in detail so as not to obscure the example embodiments described herein.

In one aspect according to some embodiments, a method for depositing a conductive coating on a surface is provided. In some embodiments, the method is performed in a method of fabricating an optoelectronic device. In some embodiments, the method is performed in a method of manufacture of another device. In some embodiments, the method includes depositing a nucleation inhibiting coating on a first region of a substrate, resulting in a patterned substrate. The patterned substrate includes the first region covered by the nucleation-inhibiting coating, and either exposed from the nucleation-inhibiting coating, or is substantially free of the nucleation-inhibiting coating or substantially unencumbered by the nucleation-inhibiting coating A nucleus-inhibiting coating covers one of the second regions. The method also includes treating the patterned substrate to deposit the conductive coating on the second region of the substrate. In some embodiments, the material of the conductive coating includes magnesium. In some embodiments, treating the patterned substrate includes treating both the nucleation-inhibiting coating and the second region of the substrate to deposit the conductive coating on the second region of the substrate layer, while the nucleation inhibiting coating remains exposed from, or is substantially free of, or substantially uncovered by, the conductive coating. In some embodiments, processing the patterned substrate includes performing evaporation or sublimation of a source material for forming the conductive coating, and the nucleation inhibiting coating of the substrate and the second region two All are exposed to the evaporation source material.

The term "nucleation inhibition" as used herein is used to mean a coating or layer of material having a surface that exhibits relatively low affinity for deposition of a conductive material such that deposition of the conductive material on the surface is prevented by Inhibit, while the term "nucleation promotion" is used to mean a coating or a layer of material having a surface that exhibits a relatively high affinity for the deposition of a conductive material, such that the deposition of the conductive material on the surface is promoted . One way to measure the nucleation-inhibiting or nucleation-promoting properties of a surface is the initial adhesion probability of the surface to a conductive material, such as magnesium. For example, a nucleation-inhibiting coating relative to magnesium may mean a coating having a surface that exhibits a relatively low probability of adhesion to magnesium vapor, such that magnesium deposition on the surface is inhibited, while nucleation relative to magnesium is promoted By coating, it can be meant a coating having a surface that exhibits a relatively high probability of adhesion to magnesium vapor, such that the deposition of magnesium on the surface is promoted. The terms "adhesion probability" and "adhesion coefficient" are used interchangeably herein. Another way to measure the nucleation-inhibiting or nucleation-promoting properties of a surface is to compare the onset deposition rate of a conductive material (such as magnesium) on the surface to the onset of the conductive material on another surface (reference) The deposition rate, where both surfaces are treated or exposed to the vapor flux of the conductive material.

As used herein, the terms "evaporation" and "sublimation" are used interchangeably and generally refer to a deposition method that converts a source material to be deposited on a target surface in a solid state, eg, into a vapor (eg, via heating).

As used herein, "substantially free" or "substantially uncovering" a surface (or regions of the surface) of a material means that the surface (or regions of the surface) is substantially devoid of the material. Specifically, in the context of conductive coatings, a measure of the amount of conductive material on a surface is light transmittance, since conductive materials, such as metals including magnesium, reduce and/or absorb light. Accordingly, a surface can be considered substantially free of conductive material if its transmittance in the visible portion of the electromagnetic spectrum is greater than 90%, greater than 92%, greater than 95%, or greater than 98%. Another way to measure the amount of material on a surface is the percentage of the surface covered by the material, such as if the percentage covered by the material is not greater than 10%, not greater than 8%, not greater than 5%, not greater than 3%, or No more than 1%, the surface can be considered to be substantially free of the material. Surface coverage can be assessed using imaging techniques, such as using transmission electron microscopy, atomic force microscopy or scanning electron microscopy.

FIG. 1 is a schematic diagram illustrating a method of depositing a nucleation inhibiting coating 140 on a surface 102 of a substrate 100 according to one embodiment. In the embodiment of FIG. 1, a source 120 comprising a source material is heated under vacuum to evaporate or sublime the source material. The source material includes or consists essentially of the material used to form the nucleation-inhibiting coating 140 . The evaporated source material will then travel in the direction indicated by arrow 122 towards the substrate 100 . A shadow mask 110 having an aperture or slit 112 is disposed in the path of the evaporated source material such that a portion of the flux passing through the aperture 112 is selectively incident on an area of the surface 102 of the substrate 100, Thus, the nucleation inhibiting coating 140 is formed thereon.

2A-2C illustrate, in one embodiment, a microcontact transfer method for depositing a nucleation-inhibiting coating on a surface of a substrate. Similar to shadow masking, the microcontact printing method can be used to selectively deposit the nucleation-inhibiting coating on an area of a substrate surface.

2A illustrates the first stage of the microcontact transfer method, wherein a stamp 210 includes a protrusion 212 provided with a nucleation-inhibiting coating 240 on a surface of the protrusion 212 . Various suitable methods may be used to deposit the nucleation inhibiting coating 240 on the surface of the protrusions 212, as can be appreciated by those skilled in the art.

As shown in FIG. 2B , the stamp 210 is then brought near a substrate 100 so that the nucleation-inhibiting coating 240 deposited on the surface of the protrusions 212 is in contact with a surface 102 of the substrate 100 . The nucleation-inhibiting coating 240 adheres to the surface 102 of the substrate 100 when the nucleation-inhibiting coating 240 contacts the surface 102 .

Thus, when the stamp 210 is removed from the substrate 100 as shown in FIG. 2C , the nucleation-inhibiting coating 240 is effectively transferred to the surface 102 of the substrate 100 .

Once a nucleation-inhibiting coating has been deposited on an area of a surface of a substrate, a conductive coating can be deposited on the remaining uncovered areas of the surface that do not have the nucleation-inhibiting coating. Turning to FIG. 3 , a conductive coating source 410 is depicted directing an evaporated conductive material toward a surface 102 of a substrate 100 . As shown in FIG. 3, the conductive coating source 410 can direct the evaporated conductive material such that it is incident on a covered or treated area of the substrate 102 (ie, the surface 102 with the nucleation-inhibiting coating deposited on it) 140) and both uncovered or untreated areas. However, because the surface of the nucleation-inhibiting coating 140 exhibits a relatively low initial adhesion coefficient compared to the uncovered surface 102 of the substrate 100, a conductive coating 440 is selectively deposited on the substrate 102 On areas without the nucleation-inhibiting coating 140 . For example, the initial deposition rate of the evaporated conductive material on the uncovered areas of the surface 102 may be at least the initial deposition rate of the evaporated conductive material on the surface of the nucleation inhibiting coating 140 or greater than about 80 times, at least or greater than about 100 times, at least or greater than about 200 times, at least or greater than about 500 times, at least or greater than about 700 times, at least or greater than about 1000 times, at least or greater than about 1500 times, at least or greater than About 1700 times or at least or greater than about 2000 times. The conductive coating 440 may include, for example, pure or substantially pure magnesium.

It should be understood that while shadow mask patterning and microcontact transfer methods are illustrated and described above, other methods may be used to selectively pattern a substrate by depositing a nucleation inhibiting material. Various additive and subtractive methods of patterning a surface can be used to selectively deposit a nucleation-inhibiting coating. Examples of such methods include, but are not limited to, photolithography, printing (including ink jet or vapor jet printing and reel-to-reel printing), organic vapor deposition (OVPD), and laser-induced thermal imaging (LITI) patterning and combinations thereof.

In some applications, it may be desirable to deposit a conductive coating with specific material properties on the surface of the substrate on which the conductive coating is not easily deposited. For example, pure or substantially pure magnesium is generally not easily deposited on organic surfaces due to its low coefficient of adhesion on various organic surfaces. Accordingly, in some embodiments, the substrate surface is additionally treated by depositing a nucleation promoting coating thereon prior to depositing a conductive coating such as comprising magnesium.

Based on findings and experimental observations, it is speculated that fullerenes and other nucleation promoting materials (described further herein) act as nucleation sites for the deposition of conductive coatings including magnesium. For example, in the case of deposition of magnesium on a fullerene-treated surface using evaporation methods, the fullerene molecules serve as nucleation sites that can promote the formation of stable nuclei for magnesium deposition. In some cases, less than a monolayer of fullerenes or other nucleation promoting materials may be provided on the treated surface as nucleation sites for magnesium deposition. It will be appreciated that by treating the surface by depositing several monolayers of nucleation promoting material, a greater number of nucleation sites can be created and thus a higher probability of initial adhesion can be obtained.

It should be understood that the amount of fullerene or other material deposited on a surface may be more or less than a monolayer. For example, the surface can be treated by depositing 0.1 monolayer, 1 monolayer, 10 monolayers, or more of a nucleation promoting or nucleation inhibiting material. Depositing a monolayer of material, as used herein, means the amount of the material required to cover a single layer of the constituent molecules or atoms of the material on a desired area of a surface. Similarly, depositing 0.1 monolayer of material as used herein means the amount of material required to cover 10% of a desired area of a surface with a single layer of the constituent molecules or atoms of the material. The actual thickness of the deposited material may be non-uniform due to, for example, possible stacking or aggregation of molecules or atoms. For example, depositing a single layer of material may result in some areas of a surface not being covered by the material, while other areas of the surface may be deposited with multiple layers of atoms or molecules.

The term "fullerene" as used herein means a material comprising carbon molecules. Examples of fullerene molecules include carbon cage molecules containing a three-dimensional skeleton of a plurality of carbon atoms, which form a closed shell, and which may be spherical or hemispherical in shape. A fullerene molecule may be designated as _Cn , where n is an integer corresponding to the number of carbon atoms contained in the carbon backbone of the fullerene molecule. Examples of fullerene molecules include _Cn , where n is in the range of ₅₀ to 250, such as _C60 , C70, _C72 , _C74 , _C76 , _C78 , _C80 , _C82 , and _C84 . Other examples of fullerene molecules include tubular or columnar carbon molecules, such as single-wall carbon nanotubes and multi-wall carbon nanotubes.

FIG. 4 illustrates an embodiment of an apparatus in which a nucleation promoting coating 160 is deposited before a conductive coating 440 is deposited. As shown in FIG. 4 , the nucleation-promoting coating 160 is deposited on areas of the substrate 100 that are not covered by a nucleation-inhibiting coating 140 . Accordingly, the conductive coating 440 is preferentially formed on the nucleation promoting coating 160 when the conductive coating 440 is deposited. For example, the initial deposition rate of the material of the conductive coating 440 on the surface of the nucleation-promoting coating 160 may be at least or greater than the initial deposition rate of the material on the surface of the nucleation-inhibiting coating 140 about 80 times, at least or greater than about 100 times, at least or greater than about 200 times, at least or greater than about 500 times, at least or greater than about 700 times, at least or greater than about 1000 times, at least or greater than about 1500 times, at least or greater than about 1700 times or at least or greater than about 2000 times. Typically, the nucleation-promoting coating 160 may be deposited on the substrate 100 before or after the nucleation-inhibiting coating 140 is deposited. Various methods for selectively depositing a material on a surface can be used to deposit the nucleation promoting coating 160, including, but not limited to, evaporation (including thermal evaporation and e-beam evaporation), photolithography, printing (including inkjet or vapor jet printing, roll-to-roll printing, and microcontact transfer), OVPD, LITI patterning, and combinations thereof.

5A-5C illustrate a method for depositing a conductive coating on a surface of a substrate in one embodiment.

In Figure 5A, a surface 102 of a substrate 100 is treated with a nucleation inhibiting coating 140 deposited thereon. Specifically, in the exemplary embodiment, deposition is accomplished by evaporating a source material within a source 120 and directing the evaporated source material toward the surface 102 on which deposition is to be performed. Arrow 122 indicates the general direction in which the evaporative flux is directed towards the surface 102 . As described, the deposition of the nucleation-inhibiting coating 140 can be performed with or without an open mask such that the nucleation-inhibiting coating 140 covers substantially the entire surface 102 , resulting in a treated surface 142 . Alternatively, the nucleation inhibiting coating 140 may be selectively deposited on an area of the surface 102 using selective deposition techniques as described above.

Although evaporation is illustrated to deposit the nucleation inhibiting coating 140, it should be understood that other deposition and surface coating techniques may be used, including, but not limited to, spin coating, dip coating, printing, spray coating, OVPD, LITI patterning Chemical vapor deposition (PVD) (including sputtering), chemical vapor deposition (CVD), and combinations thereof.

In FIG. 5B , a nucleation promoting coating 160 is selectively deposited on the treated surface 142 using shadow mask 110 . As described, an evaporation source material is directed from the source 120 toward the substrate 100 , past the mask 110 . The mask includes an aperture or slit 112 such that a portion of the evaporated source material incident on the mask 110 is blocked as it travels through the mask 110, while another portion of the evaporated source material is directed through the mask The apertures 112 of the cover 110 are selectively deposited on the treated surface 142 to form the nucleation promoting coating 160 . Accordingly, when the deposition of the nucleation promoting coating 160 is complete, a patterned surface 144 is produced.

FIG. 5C illustrates the stage of depositing a conductive coating 440 on the patterned surface 144 . The conductive coating 440 may include, for example, pure or substantially pure magnesium. As will be explained further below, the material of the conductive coating 440 exhibits a relatively low initial adhesion coefficient for the nucleation inhibiting coating 140 and a relatively high initial adhesion coefficient for the nucleation promoting coating 160 . Accordingly, deposition can be performed with or without an open mask to selectively deposit the conductive coating 440 on the regions of the substrate 100 where the nucleation-promoting coating 160 is present. As shown in FIG. 5C , the evaporated material of the conductive coating 440 incident on the surface of the nucleation-inhibiting coating 140 is largely or substantially unable to deposit on the nucleation-inhibiting coating 140 .

5D-5F illustrate a method for depositing a conductive coating on a surface of a substrate in another embodiment.

In FIG. 5D , a nucleation promoting coating 160 is deposited on a surface 102 of a substrate 100 . The nucleation promoting coating 160 may be deposited, for example, using thermal evaporation with or without an open mask. Alternatively, other deposition and surface coating techniques may be used, including, but not limited to, spin coating, dip coating, printing, spray coating, OVPD, LITI patterning, PVD (including sputtering), CVD, and combinations thereof.

In FIG. 5E, a nucleation inhibiting coating 140 is selectively deposited on an area of the nucleation promoting coating 160 using a shadow mask 110. Accordingly, upon completion of the deposition of the nucleation inhibiting coating 140, a patterned surface results. Then in FIG. 5F, a conductive coating 440 is deposited on the patterned surface using an open mask or maskless deposition method such that the conductive coating is formed on the exposed areas of the nucleation promoting coating 160. Layer 440.

It should be understood from the foregoing embodiments that the conductive coating 440 formed by these methods can be used as an electrode or conductive structure of an electronic device. For example, the conductive coating 440 may be the anode or cathode of an organic optoelectronic device such as an OLED device or an organic photovoltaic (OPV) device. In addition, the conductive coating 440 can also be used as an electrode of an optoelectronic device including quantum dots as an active layer material. For example, such a device may include an active layer disposed between a pair of electrodes, the active layer including quantum dots. The device may be, for example, an electroluminescent quantum dot display device in which light is emitted from the quantum dot active layer due to current provided by the electrodes. The conductive coating 440 can also be a busbar or auxiliary electrode of any of the aforementioned devices.

Accordingly, it should be understood that the substrate 100 upon which various coatings are deposited may include one or more additional organic and/or inorganic layers not expressly described or illustrated in the foregoing embodiments. For example, in the case of an OLED device, the substrate 100 may include one or more electrodes (eg, anodes and/or cathodes), charge injection and/or transport layers, and electroluminescent layers. The substrate 100 may additionally include one or more transistors and other electronic components, such as resistors and capacitors included in active-matrix or passive-matrix OLED devices. For example, the substrate 100 may include one or more top-gate thin film transistors (TFTs), one or more bottom-gate TFTs, and/or other TFT structures. The TFT may be an n-type TFT or a p-type TFT. Examples of TFT structures include those including amorphous silicon (a-Si), indium gallium zinc oxide (IGZO), and low temperature polysilicon (LTPS).

The substrate 100 may also include a base substrate for supporting the additional organic and/or inorganic layers identified above. For example, the base substrate can be a flexible or rigid substrate. The base substrate may include, for example, silicon, glass, metal, polymers (eg, polyimide), sapphire, or other materials suitable for use as the base substrate.

The surface 102 of the substrate 100 can be an organic surface or an inorganic surface. For example, if the conductive coating 440 is used as the cathode of an OLED device, the surface 102 may be the top surface of a stack of organic layers (eg, the surface of an electron injection layer). In another example, if the conductive coating 440 is used as an auxiliary electrode for a top-emitting OLED device, the surface 102 may be the top surface of an electrode (eg, a common cathode). Alternatively, such an auxiliary electrode may be formed directly below the transmissive electrode on top of a stack of organic layers.

FIG. 6 illustrates an electroluminescent (EL) device 600 according to an embodiment. The EL device 600 can be, for example, an OLED device or an electroluminescent quantum dot device. In one embodiment, the device 600 is an OLED device including a base substrate 616 , an anode 614 , an organic layer 630 and a cathode 602 . In the illustrative embodiment, the organic layer 630 includes a hole injection layer 612 , a hole transport layer 610 , an electroluminescent layer 608 , an electron transport layer 606 and an electron injection layer 604 .

The hole injection layer 612 may be formed of a hole injection material that is generally favorable for the injection of holes by the anode 614 . The hole transport layer 610 may be formed of a hole transport material, which is typically a material that exhibits high hole mobility.

The electroluminescent layer 608 may be formed, for example, by doping a host material with an emitter material. The emitter material may be, for example, a fluorescent emitter, a phosphorescent emitter or a TADF emitter. The host material can also be doped with several emitter materials to form the electroluminescent layer 608 .

The electron transport layer 606 may be formed of an electron transport material that generally exhibits high electron mobility. The electron injection layer 604 may be formed of an electron injection material, which is typically used to facilitate the injection of electrons into the cathode 602 .

It should be understood that the structure of the device 600 may vary by omitting or incorporating one or more layers. Specifically, one or more of the hole injection layer 612, the hole transport layer 610, the electron transport layer 606, and the electron injection layer 604 may be omitted from the device structure. One or more additional layers may also be present in the device structure. Such additional layers include, for example, a hole blocking layer, an electron blocking layer, and additional charge transport and/or injection layers. Each layer may additionally include any number of sublayers, and each layer and/or sublayer may include various mixtures and composition gradients. It is also understood that the device 600 may include one or more layers containing inorganic and/or organo-metallic materials, and is not limited to devices consisting solely of organic materials. For example, the device 600 may include quantum dots.

The device 600 can be connected to a power source 620 for supplying current to the device 600 .

In another embodiment where the device 600 is an EL quantum dot device, the EL layer 608 typically includes quantum dots that emit light when an electrical current is supplied.

7 is a flowchart outlining the stages of fabricating an OLED device according to one embodiment. At 704, an organic layer is deposited on a target surface. For example, the target surface may be the surface of an anode that has been deposited atop a base substrate (which may include, for example, glass, polymer, and/or metal foil). As described above, the organic layer may include, for example, a hole injection layer, a hole transport layer, an electroluminescent layer, an electron transport layer, and an electron injection layer. Then in stage 706, a nucleation inhibiting coating is deposited on top of the organic layer using a selective deposition or patterning method. In stage 708, a nucleation promoting coating is selectively deposited on the nucleation inhibiting coating, resulting in a patterned surface. For example, selective deposition of the nucleation-promoting coating and the nucleation-inhibiting coating may use masked evaporation, microcontact transfer methods, photolithography, printing (including ink jet or vapor jet printing, and roll-to-roll printing), OVPD or LITI patterning. Then in stage 710, a conductive coating is deposited on the patterned surface using an open mask or maskless deposition method. The conductive coating can be used as the cathode or another conductive structure of the OLED device.

8 and 9A-9D, a method for fabricating an OLED device according to another embodiment is provided. Figure 8 is a flow chart outlining the stages used to fabricate the OLED device, and Figures 9A-9D are schematic diagrams illustrating the device at various stages of the method. In stage 804, an organic layer 920 is deposited on a target surface 912 using a source 991. In the exemplary embodiment, the target surface 912 is the surface of the anode 910 that has been deposited on top of a base substrate 900 . The organic layer 920 may include, for example, a hole injection layer, a hole transport layer, an electroluminescence layer, an electron transport layer, and an electron injection layer. Then in stage 806, a nucleation promoting coating 930 is deposited on top of the organic layer 920 using a source 993 and an open mask or no mask. In stage 808, a nucleation inhibiting coating 940 is selectively deposited on the nucleation promoting coating 930 using a mask 980 and a source 995, resulting in a patterned surface. Then in stage 810, a conductive coating 950 is deposited on the patterned surface using an open mask or maskless deposition method such that the conductive coating 950 is deposited on the nucleation promoting coating 930 without being deposited. on the area covered by the nucleation inhibiting coating 940 .

10 and 11A-11D, yet another embodiment of a method for fabricating an OLED device is provided. Figure 10 is a flow chart outlining the stages used to fabricate the OLED device, and Figures 11A-11D are schematic diagrams illustrating the stages of such a method. In stage 1004, an organic layer 1120 is deposited on a target surface 1112 using a source 1191. In the described embodiment, the target surface 1112 is a surface of the anode 1110 that has been deposited on top of a base substrate 1100. The organic layer 1120 may include, for example, a hole injection layer, a hole transport layer, an electroluminescence layer, an electron transport layer, and an electron injection layer. Then in stage 1006, using a mask 1180 and a source 1193, a nucleation-inhibiting coating 1130 is deposited on top of the organic layer 1120 such that the nucleation-inhibiting coating 1130 is selectively deposited through the organic layer 1120 On the surface area exposed by the holes of the mask 1180. In stage 1008, a nucleation promoting coating 1140 is selectively deposited using a mask 1182 and a source 1195. In the described embodiment, the nucleation promoting coating 1140 is shown to be deposited on the surface area of the organic layer 1120 not covered by the nucleation inhibiting coating 1130, resulting in a patterned surface. Then in stage 1010, a conductive coating 1150 is deposited on the patterned surface using an open mask or maskless deposition method, resulting in deposition of the conductive coating 1150 on the surface of the nucleation promoting coating 1140 , leaving the surface of the nucleation inhibiting coating 1130 substantially free of the conductive coating 1150 material.

12 and 13A-13D, a method for fabricating an OLED device according to yet another embodiment is provided. Figure 12 is a flow diagram outlining the stages used to fabricate the OLED device, and Figures 13A-13D are schematic diagrams illustrating the stages of such a method. In stage 1204, an organic layer 1320 is deposited on a target surface 1312 using a source 1391. In the described embodiment, the target surface 1312 is the surface of the anode 1310 that has been deposited on top of a base substrate 1300. The organic layer 1320 may include, for example, a hole injection layer, a hole transport layer, an electroluminescence layer, an electron transport layer, and an electron injection layer. Then in stage 1206, a mask 1380 and a source 1393 are used to deposit a nucleation promoting coating 1330 on top of the organic layer 1320 such that the nucleation promoting coating 1330 is selectively deposited through the organic layer 1320 On the surface area exposed by the holes of the mask 1380. In stage 1208, a nucleation inhibiting coating 1340 is selectively deposited using a mask 1382 and a source 1395. In the described embodiment, the nucleation inhibiting coating 1340 is shown to be deposited on the surface area of the organic layer 1320 not covered by the nucleation promoting coating 1330, resulting in a patterned surface. Then in stage 1210, a conductive coating 1350 is deposited on the patterned surface using an open mask or maskless deposition method, resulting in deposition of the conductive coating 1350 on the surface of the nucleation promoting coating 1330 , leaving the surface of the nucleation inhibiting coating 1340 substantially free of the conductive coating 1350 material. The conductive coating 1350 formed in this method can serve as an electrode (eg, a cathode).

According to the embodiments described above, using open-mask or mask-less deposition methods, selectively in target areas (eg, non- A conductive coating is deposited on the light-emitting area). In contrast, open-mask or mask-less deposition methods lacking sufficient selectivity can result in the deposition of conductive material beyond the target area and over the light-emitting area, which is not ideal because the material is deposited on the light-emitting area. Presence generally contributes to the attenuation of light, thus reducing the EQE of the OLED device. Furthermore, by providing high selectivity in depositing a conductive layer on a targeted area, the conductive coating can act as an electrode with sufficient thickness to achieve the desired conductivity in an OLED device. For example, the high selectivity provided by the embodiments described above allows the deposition of an auxiliary electrode with a high aspect ratio that remains confined between adjacent pixels or sub-pixels. In contrast, the lack of sufficient selectivity in forming thick electrodes in open-mask or mask-less methods can result in a thick coating of conductive material covering both light-emitting and non-light-emitting regions, thereby substantially reducing Properties of the resulting OLED devices.

For the sake of brevity and clarity, details of the deposited material, including thickness profiles and edge profiles, are omitted from the method diagrams.

The formation of thin films during vapor deposition on a surface of a substrate involves the processes of nucleation and crystal growth. During the initial stages of film formation, a sufficient number of vapor monomers (eg, atoms or molecules) typically condense from the gas phase to form starting nuclei on the surface. As the vapor monomer continues to impinge on the surface, the size and density of these starting nuclei increase to form small clusters or islands. After reaching the saturated island density, adjacent islands begin to agglomerate, increasing the average island size while decreasing the island density. Agglomeration of adjacent islands continues until a substantially closed film is formed.

There are three basic growth modes used to form thin films: 1) island (Volmer-Weber), 2) layer by layer (Frank-van der Merwe) and 3) Stranski-Krastanov. Islands typically appear when stable clusters of monomers nucleate on a surface and then grow to form individual islands. This growth mode occurs when the interaction between the monomers is stronger than the interaction between the monomer and the surface.

The nucleation rate indicates how many critical-size nuclei are formed on a surface per unit time. During the initial stages of film formation, the cores are less likely to be monomers from the surface due to the low density of the cores covering a relatively small portion of the surface (eg, large gaps/spaces between adjacent cores) growth by direct impact. Thus, the rate of critical nuclear growth generally depends on the rate at which adsorbed monomers (eg, adatoms) move on the surface and attach to nearby nuclei.

After an adatom is adsorbed to a surface, the adatom may desorb from the surface, or may travel some distance on the surface before desorbing, interacting with other adatoms to form small clusters, or attaching to a growing nucleus. The following equation yields the average time that adatoms stay on the surface after initial adsorption:

其中 a ₀ 是晶格常數，而 E _S 是表面擴散之活化能。在低 E _des 值和/或高 E _S 值之情況下，吸附原子在解吸之前擴散的距離較短，因此較不可能附著於生長核或與另一吸附原子或吸附原子團簇交互反應。 In the above equation, ν is the vibrational frequency of the adatom on the surface, k is the Boltzmann constant, T is the temperature, and E _des is the energy to desorb the adatom from the surface. It can be noted from this equation that the lower the value of _Edes , the easier it is for adatoms to desorb from the surface and therefore the shorter the time the adatoms stay on the surface. The average distance over which adatoms can diffuse can be obtained by the following equation,

where a ₀ is the lattice constant and _ES is the activation energy of surface diffusion. At low E _des values and/or high E _S values, the adatoms diffuse a shorter distance before desorption and are therefore less likely to attach to the growth nucleus or to interact with another adatom or adatom cluster.

其中 E _i 是將含 i吸附原子之臨界團簇解離成單獨的吸附原子所涉及之能量， n ₀ 是吸附位置之總密度， N ₁ 是以下方程式獲得之單體密度：

在此

是蒸氣撞擊率。通常 i取決於欲沈積之材料之晶體結構，以及將決定形成穩定的核之臨界團簇尺寸。 During the initial stage of film formation, the adsorbed adatoms can interact with each other to form clusters, and the critical concentration of clusters per unit area can be obtained by the following equation,

where E _i is the energy involved in dissociating a critical cluster containing i adatoms into individual adatoms, n ₀ is the total density of adsorption sites, and N ₁ is the monomer density obtained from the equation:

here

is the vapor impingement rate. Usually i depends on the crystal structure of the material to be deposited, and on the critical cluster size that will determine the formation of stable nuclei.

From the vapor impingement rate and the average area over which adatoms can diffuse before desorption, the critical monomer supply rate for growing clusters can be obtained:

Therefore, the critical nucleation rate can be obtained by a combination of the above equations:

It can be noted from the above equation that the critical nucleation rate will be suppressed for surfaces with low desorption energy for adsorbed adatoms, high activation for adatom diffusion, at high temperatures, or treated with low vapor impingement rates .

The location of substrate heterogeneity such as defects, flanges, or step edges may increase _Edes , resulting in the observed higher core density at these locations. Also, impurities or contamination on the surface may also increase _Edes , resulting in higher core density. For vapor deposition methods performed under high vacuum conditions, the type and density of contamination is affected by the vacuum pressure and the composition of the residual gas that constitutes that pressure.

其中 P是壓力， M是分子量。因此，反應氣體如H ₂O分壓愈高，氣相沈積期間在一表面上可得到的污染密度愈高，導致 E _des 增加，因而核之密度愈高。 Under high vacuum conditions, the molecular flux impinging on a surface (per cm ² -sec) can be obtained by the following equation:

where P is the pressure and M is the molecular weight. Therefore, the higher the partial pressure of reactive gases such as _H2O , the higher the density of contamination available on a surface during vapor deposition, resulting in an increase in _Edes and thus a higher density of nuclei.

其中 N _ads 是停留在一表面上(如，併入薄膜內)之吸附單體的數目， N _total 是撞擊在該表面上之單體的總數目。黏附機率等於1代表撞擊該表面之全部的單體均被吸附，既而併入生長薄膜。黏附機率等於0代表撞擊該表面之全部的單體均被解吸，既而在該表面上沒有形成薄膜。金屬在各種表面上之黏附機率，可使用各種測量黏附機率之技術評估，諸如Walker et al., J. Phys. Chem.C 2007, 111, 765 (2006)以及以下範例部分中所述之雙石英晶體微量天平(QCM)技術。 A parameter that can be used to characterize the nucleation and growth of thin films is the adhesion probability obtained from the equation:

where Nas is the number of adsorbed monomers residing on a surface (eg, incorporated into the film) and _Ntotal is the _total number of monomers impinging on the surface. An adhesion probability equal to 1 means that all monomers impinging on the surface are adsorbed and thus incorporated into the growing film. An adhesion probability equal to 0 means that all monomers impinging on the surface are desorbed and thus no film is formed on the surface. The adhesion probability of metals on various surfaces can be assessed using various techniques for measuring adhesion probability, such as the double quartz described in Walker et al., J. Phys. Chem. C 2007, 111, 765 (2006) and in the Examples section below Crystalline Microbalance (QCM) technology.

As the density of the islands increases (eg, increases the average film thickness), the adhesion probability may change. For example, the probability of low adhesion may increase with increasing average film thickness. This can be explained by the difference in adhesion probability between regions without island (bare substrate) surfaces and regions with high density of islands. For example, hitting a monomer with a surface with islands may have an adhesion probability close to 1.

其中 S _nuc 是被島覆蓋之區的黏附機率， A _nuc 是被島覆蓋之基材表面之區的百分比。 Thus the initial adhesion probability S ₀ can be specified as the adhesion probability of a surface before any large number of critical nuclei are formed. A measure of initial adhesion probability involves the adhesion probability of a surface to the material during the initial deposition phase of a material when the average thickness of the material deposited across the surface is at or below a threshold. In the illustration of some embodiments, the threshold for onset adhesion probability may be specified as 1 nm. Then, the following equation gives the average sticking probability:

where _Snuc is the adhesion probability of the area covered by the islands and A _nuc is the percentage of the area of the substrate surface covered by the islands.

Suitable materials that can be used to form a nucleation-inhibiting coating, including materials that exhibit or are characterized as having an initial adhesion probability to a conductive coating of no greater than or less than about 0.1 (or 10%), or no greater or less than about 0.05 and more specifically no greater than or less than about 0.03, no greater than or less than about 0.02, no greater than or less than about 0.01, no greater than or less than about 0.08, no greater than or less than about 0.005, no greater than or less than about 0.003, no greater than or less than about 0.001, no greater than or less than about 0.0008, no greater than or less than about 0.0005, or no greater than or less than about 0.0001 of the material. Suitable materials that can be used to form a nucleation-promoting coating include materials that exhibit or are characterized as having an initial adhesion probability to a conductive coating of at least about 0.6 (or 60%), at least about 0.7, at least about 0.75 , at least about 0.8, at least about 0.9, at least about 0.93, at least about 0.95, at least about 0.98, or at least about 0.99.

(I-a)

(I-b)

(I-c) 其中虛線指的是該聯苯基部分與該核心部分之間形成的鍵。通常，(I-a)、(I-b)以及(I-c)代表之聯苯基部分可以是未經取代的，或可為其氫原子中之一或多個經一或多個取代基團取代的。在(I-a)、(I-b)以及(I-c)代表之部分中，R _a以及R _b獨立地代表任擇的存在一或多個取代基基團，其中R _a可代表一、二、三或四個取代，而R _b可代表一、二、三、四或五個取代。例如，一或多個取代基基團，R _a以及R _b，可獨立地擇自於：氚、氟、包括C ₁-C ₄烷基之烷基、環烷基、芳烷基、矽烷基、芳基、雜芳基、氟烷基以及其等之任一組合。特別是，一或多個取代基基團，R _a以及R _b，可獨立地擇自於：甲基、乙基、叔-丁基、三氟甲基、苯基、甲基苯基、二甲基苯基、三甲基苯基、叔-丁苯基、聯苯基、甲基聯苯基、二甲基聯苯基、三甲基聯苯基、叔-丁基聯苯基、氟苯基、二氟苯基、三氟苯基、聚氟苯基、氟聯苯基、二氟聯苯基、三氟聯苯基以及聚氟聯苯基。無意受理論之約束，但在一表面上存在露出的聯苯基部分可用於調整或調節表面能(如，解吸能)，以便降低該表面對諸如鎂之導電材料之沈積的親和力。可使用其它會產生相似的調節表面能以便抑制鎂的沈積之部分以及材料，形成一成核抑制塗層。 Suitable nucleation inhibiting materials include organic materials such as small molecule organic materials and organic polymers. Examples of suitable organic materials include polycyclic aromatic compounds, including optionally one or more heteroatoms such as nitrogen (N), sulfur (S), oxygen (O), phosphorus (P), and aluminum (Al) of organic molecules. In some embodiments, polycyclic aromatic compounds include organic molecules each containing a core moiety and at least one terminal moiety bonded to the core moiety. The number of terminal sections may be 1 or more, 2 or more, 3 or more, or 4 or more. In the case of 2 or more terminal parts, the terminal parts can be the same or different, or a subset of the terminal parts can be the same, but at least one remaining terminal part is different. In some embodiments, at least one terminal moiety is, or includes, a biphenyl moiety represented by one of the following chemical structures (Ia), (Ib), and (Ic):

(Ia)

(Ib)

(Ic) wherein the dashed line refers to the bond formed between the biphenyl moiety and the core moiety. In general, the biphenyl moieties represented by (Ia), (Ib) and (Ic) may be unsubstituted, or one or more of their hydrogen atoms may be substituted with one or more substituent groups. In the moieties represented by (Ia), (Ib) and (Ic), R _a and R _b independently represent the optional presence of one or more substituent groups, wherein R _a may represent one, two, three or four substitution, and R _b can represent one, two, three, four or five substitutions. For example, one or more substituent groups, _Ra and _Rb , can be independently selected from: tritium, fluoro, alkyl including _C1 - _C4 alkyl, cycloalkyl, aralkyl, silyl , aryl, heteroaryl, fluoroalkyl, and any combination thereof. In particular, one or more substituent groups, _Ra and _Rb , may be independently selected from: methyl, ethyl, tert-butyl, trifluoromethyl, phenyl, methylphenyl, difluoromethyl Methylphenyl, trimethylphenyl, tert-butylphenyl, biphenyl, methyl biphenyl, dimethyl biphenyl, trimethyl biphenyl, tert-butyl biphenyl, fluorine Phenyl, difluorophenyl, trifluorophenyl, polyfluorophenyl, fluorobiphenyl, difluorobiphenyl, trifluorobiphenyl, and polyfluorobiphenyl. Without intending to be bound by theory, the presence of exposed biphenyl moieties on a surface can be used to tune or modulate surface energy (eg, desorption energy) in order to reduce the surface's affinity for deposition of conductive materials such as magnesium. A nucleation-inhibiting coating can be formed using other moieties and materials that produce similarly tuned surface energy to inhibit the deposition of magnesium.

(I-d) 其中虛線表示該苯基部分與該核心部分之間所形成之鍵。通常，(I-d)代表之苯基部分可為未經取代的，或可為其氫原子中之一或多個經一或多個取代基基團取代的。在(I-d)代表之部分中，R _c代表任擇存在一或多個取代基基團，其中R _c可代表一、二、三、四或五個取代。一或多個取代基基團，R _c，可獨立地擇自於：氚、氟、包括C ₁-C ₄烷基之烷基、環烷基、矽烷基、氟烷基以及其等之任一組合。特別是，一或多個取代基基團，R _c，可獨立地擇自於：甲基、乙基、叔-丁基、氟甲基、二氟甲基、三氟甲基、氟乙基以及聚氟乙基。 In another embodiment, at least one terminal moiety is, or includes, a phenyl moiety represented by the following structure (Id):

(Id) wherein the dashed line represents the bond formed between the phenyl moiety and the core moiety. Typically, the phenyl moiety represented by (Id) may be unsubstituted, or one or more of its hydrogen atoms may be substituted with one or more substituent groups. In the moiety represented by (Id), R _c represents the optional presence of one or more substituent groups, wherein R _c may represent one, two, three, four or five substitutions. One or more substituent groups, R _c , may be independently selected from: tritium, fluorine, alkyl including _C1 - _C4 alkyl, cycloalkyl, silyl, fluoroalkyl, and any of the like a combination. In particular, one or more substituent groups, R _c , may be independently selected from: methyl, ethyl, tert-butyl, fluoromethyl, difluoromethyl, trifluoromethyl, fluoroethyl and polyfluoroethyl.

In yet another embodiment, at least one terminal moiety is, or includes, a polycyclic aromatic moiety containing a fused ring structure, such as a fluorene moiety or a phenylene moiety (including those containing multiple (eg, 3, 4 or more) fused benzene rings). Examples of such moieties include spirobifluorene moieties, triphenylene moieties, diphenylfluorene moieties, dimethylfluorene moieties, difluorofluorene moieties, and any combination thereof.

（II）

（III）

（IV） In one embodiment, the polycyclic aromatic compound includes an organic moiety represented by at least one of the following chemical structures (II), (III), and (IV):

(II)

(III)

(IV)

In (II), (III) and (IV), C represents a core moiety, and T ₁ , T ₂ and T ₃ represent terminal moieties bonded to the core moiety. Although 1, 2 and 3 terminal sections are shown in (II), (III) and (IV), it should be understood that more than 3 terminal sections may also be included.

In some embodiments, C is, or includes, a heterocyclic moiety, such as a heterocyclic moiety that includes one or more nitrogen atoms, an example being a triazole moiety. In some embodiments, C is, or includes, a metal atom (including transition and post-transition atoms) such as an aluminum atom, a copper atom, an iridium atom, and/or a platinum atom. In some embodiments, C is, or includes, a nitrogen atom, an oxygen atom and/or a phosphorus atom. In some embodiments, C is, or includes, a cyclic hydrocarbon moiety, which may be aromatic. In some embodiments, C is, or includes, substituted or unsubstituted alkyl, which may be branched or unbranched cycloalkynes (including those containing between 1 and 7 carbon atoms), alkenyl, alkynyl, aryl (including phenyl, naphthyl, thienyl, and indolyl), aralkyl, heterocyclic moieties (including cyclic amines such as morpholino, piperidinyl, and pyrrolidinyl), Cyclic ether moieties (such as tetrahydrofuran and tetrahydropyran moieties), heteroaryls (including pyrrole, furan, thiophene, imidazole, oxazole, thiazole, triazole, pyrazole, pyridine, pyrazine, pyrimidine, polycyclic heteroaromatics) moiety and dibenzylthienyl), fluorene moiety, silyl group, and any combination thereof.

In (II), (III) and (IV), T ₁ is, or includes, a moiety represented by (Ia), (Ib), (Ic) or (Id), or includes a fusion ring structure as described above the polycyclic aromatic moiety. The moiety, T ₁ , can be bonded directly to the core moiety, or can be bonded to the core moiety through a linker moiety. Examples of linking moieties include -O- (wherein O represents an oxygen atom), -S- (wherein S represents a sulfur atom), and cyclic or acyclic hydrocarbon moieties comprising 1, 2, 3, 4 or more carbon atoms , and which may be unsubstituted or substituted, and which may optionally include one or more heteroatoms. The bond between the core moiety and one or more terminal moieties can be a covalent bond or a bond formed between a metal element and an organic element, especially in the case of organometallic compounds.

_In (III ₎ , T1 and T2 may be the same or different, as long as at least T1 is, or includes, the moiety represented by ₍ Ia), (Ib), (Ic) or (Id), or includes The polycyclic aromatic portion of the fused ring structure described above is sufficient. For example, each of T ₁ and T ₂ can be, or can include, a moiety represented by (Ia), (Ib), (Ic), or (Id), or a polycyclic aromatic moiety including a fused ring structure as described above . As another example, T1 is, or includes, _a moiety represented by (Ia), (Ib), (Ic), or (Id), or a polycyclic aromatic moiety including a fused ring structure as described above, and T ₂ may not have this part. _In some embodiments, T is, or includes, a cyclic hydrocarbon moiety, which may be aromatic, which may include a monocyclic structure or may be polycyclic, which may be substituted or unsubstituted, and It can be directly bonded to the core portion, or it can be bonded to the core portion through a linker portion. _In some embodiments, T is, or includes, a heterocyclic moiety, such as a heterocyclic moiety that includes one or more nitrogen atoms, which may include a monocyclic structure or may be polycyclic, which may be substituted or Unsubstituted and it can be directly bonded to the core moiety, or can be bonded to the core moiety through a linking moiety. _In some embodiments, T is, or includes, an acyclic hydrocarbon moiety, which may be unsubstituted or substituted, which may optionally include one or more heteroatoms and which may be directly bonded to the core moiety, or may be bonded to the core moiety through a linker moiety. In some embodiments where T ₁ and T ₂ are different, T ₂ may be selected from a portion having a size comparable to T ₁ . Specifically, T2 can be selected from those listed above having _a molecular weight not greater than about ₂ times, not greater than about 1.9 times, not greater than about 1.7 times, not greater than about 1.5 times, not greater than about 1.2 times the molecular weight listed above or a portion not greater than about 1.1 times. Without intending to be bound by a particular theory, it is speculated that when the terminal moiety T2 included is different from or lacking the moiety represented by ₍ Ia), (Ib), (Ic) or (Id) or a polycyclic ring including a fusion ring as described above In the case of aromatic moieties, T2 _of comparable size to T1 can facilitate the exposure of T1 _{on a} surface, as opposed to bulky terminal groups, which hinder T1 due to molecular stacking, steric hindrance, or _a combination of these effects. exposure.

In (IV), T ₁ , T ₂ and T ₃ may be the same or different as long as at least T ₁ is, or includes, the moiety represented by (Ia), (Ib), (Ic) or (Id) , or including the polycyclic aromatic moiety of the fused ring structure described above. For example, each of T ₁ , T ₂ , and T ₃ can be, or can include, a moiety represented by (Ia), (Ib), (Ic), or (Id), or a polycyclic ring including the fused ring structure described above Aromatic part. As another example, each _of T1 and _T2 can be, or can include, a moiety represented by (Ia), (Ib), (Ic), or (Id), or a polycyclic ring including the fusion ring structure described above Aromatic moiety, which _T3 may lack. As another example, each _of T1 and _T3 can be, or can include, a moiety represented by (Ia), (Ib), (Ic), or (Id), or a polycyclic ring including the fusion ring structure described above Aromatic moiety, which _T2 may lack. As another example, T1 is, or includes, _a moiety represented by (Ia), (Ib), (Ic), or (Id), or a polycyclic aromatic moiety including a fused ring structure as described above, and T Both ₂ and _T3 may lack this part. _In some embodiments, at least one _of T and T is, or includes, a cyclic hydrocarbon moiety, which may be aromatic, which may include a monocyclic structure or may be polycyclic, which may be substituted or unsubstituted substituted, and it may be directly bonded to the core moiety, or may be bonded to the core moiety through a linking moiety. _In some embodiments, at least one _of T and T is, or includes, a heterocyclic moiety, such as a heterocyclic moiety that includes one or more nitrogen atoms, which may include a monocyclic structure or may be polycyclic, which may is substituted or unsubstituted, and it may be directly bonded to the core moiety, or may be bonded to the core moiety through a linking moiety. _In some embodiments, at least one _of T and T is, or includes, an acyclic hydrocarbon moiety, which may be unsubstituted or substituted, which may optionally include one or more heteroatoms, and which may Bonded directly to the core moiety, or may be bonded to the core moiety through a linker moiety. In some embodiments, when T ₁ , T ₂ , and T ₃ are different, T ₂ and T ₃ may be selected from portions having dimensions comparable to T ₁ . Specifically, T2 and T3 can be selected from those listed above having _a molecular weight not greater _than about ₂ times, not greater than about 1.9 times, not greater than about 1.7 times, not greater than about 1.5 times, not greater than A portion greater than about 1.2 times or not greater than about 1.1. Without intending to be bound by a particular theory, it is speculated that when a moiety other than or absent represented by (Ia), (Ib), (Ic) or (Id) or a polycyclic aromatic moiety comprising a fused ring as described above is included Terminating moieties T2 and T3, T2 and T3 that are comparable in size to _T1 can _facilitate exposure _of T1 _{on a} surface, as opposed to bulky terminal groups, which can be _affected by molecular stacking, steric barriers, or the like _The combination hinders the exposure of T1.

Suitable nucleation inhibiting materials include polymeric materials. Examples of such polymeric materials include: fluoropolymers, including, but not limited to, perfluorinated polymers and polytetrafluoroethylene (PTFE); polyethylene biphenyl; polyvinyl carbazole (PVK); The polymer formed by the polymerization of the polycyclic aromatic compounds mentioned above. In another example, the polymeric material includes a polymer formed from several monomers, wherein at least one of the monomers includes a terminal moiety that is or includes, from (I-a), (I-b), (I-c) or ( A moiety represented by I-d), or a polycyclic aromatic moiety comprising a fused ring structure as described above.

14 and 15 illustrate an OLED device 1500 according to an embodiment. Specifically, FIG. 14 shows a top view of the OLED device 1500 and FIG. 15 depicts a cross-sectional view of the structure of the OLED device 1500 . In FIG. 14, cathode 1550 is depicted as a monolithic or continuous structure having formed or defined therein a plurality of holes or holes 1560 corresponding to areas of device 1500 where no cathode material is deposited. Further depicted in Figure 15, which shows an OLED device 1500 comprising a base substrate 1510, an anode 1520, an organic layer 1530, a nucleation-promoting coating 1540 selectively deposited on the nucleation-promoting coating A nucleation inhibiting coating 1570 on certain areas of 1540 and cathode 1550 deposited on other areas of the nucleation promoting coating 1540 where the nucleation inhibiting coating 1570 is not present. More specifically, during fabrication of device 1500, after selectively depositing the nucleation inhibiting coating 1570 to cover certain areas of the nucleation promoting coating 1540, using an open mask or maskless deposition method, selective The cathode material is deposited on the exposed surface area of the nucleation promoting coating 1540 . Varying various parameters of the imparted pattern, such as the average size of the holes 1560 formed in the cathode 1550 and the density of the holes 1560, can adjust or modify the transparency or transmittance of the OLED device 1500. Accordingly, the OLED device 1500 can be a substantially transparent OLED device that allows at least a portion of external light incident on the OLED device to pass through the device. For example, the OLED device 1500 may be a substantially transparent OLED lighting panel. The OLED lighting panel can, for example, be configured to emit light in one direction (eg, toward or away from the base substrate 1510 ) or in two directions (eg, toward and away from the base substrate 1510 ).

16 illustrates an OLED device 1600 in which a cathode 1650 covers substantially the entire device area, according to another embodiment. Specifically, the OLED device 1600 includes a base substrate 1610, an anode 1620, an organic layer 1630, a nucleation promoting coating 1640, the cathode 1650, a component selectively deposited on certain areas of the cathode 1650 Nucleation inhibiting coating 1660 and an auxiliary electrode 1670 deposited on other areas of the cathode 1650 where the nucleation inhibiting coating 1660 is not present.

The auxiliary electrode 1670 is electrically connected to the cathode 1650 . Especially in top emission configurations, which require deposition of a relatively thin layer of cathode 1650 in order to reduce optical interference (eg, attenuation, reflection, diffusion, etc.) due to the presence of cathode 1650. However, reducing the thickness of the cathode 1650 often increases the sheet resistance of the cathode 1650, thus reducing the performance and efficiency of the OLED device 1600. By providing the auxiliary electrode 1670 in electrical connection with the cathode 1650, the sheet resistance and thus the IR voltage drop associated with the cathode 1650 can be reduced. Additionally, by selectively depositing the auxiliary electrode 1670 so as to cover certain areas of the device area, while other areas remain uncovered, optical interference due to the presence of the auxiliary electrode 1670 can be controlled and/or reduced.

The effect of electrode sheet resistance will now be explained with reference to an example of a circuit diagram of a top-emitting active matrix OLED (AMOLED) pixel with p-type TFTs shown in FIG. 48 . In FIG. 48 , a circuit 4800 includes a power supply (VDD) line 4812 , a control line 4814 , a gate line 4816 and a data line 4818 . A driver circuit including a first TFT 4831, a second TFT 4833 and a storage capacitor 4841 is provided, and the driver circuit components are connected to the data line 4818, the gate line 4816 and the VDD line in the manner shown in the figure 4812. A compensation circuit 4843 is also provided, which is typically used to compensate for any deviations in transistor characteristics due to manufacturing variation or degradation of the TFTs 4831 and 4833 over time.

An OLED pixel or sub-pixel 4850 and a cathode 4852, which represents the resistor in the circuit diagram, are connected in series with the second TFT 4833 (also referred to as a "drive transistor"). The driving transistor 4833 adjusts the current through the OLED pixel 4850 according to the voltage of the charge stored in the storage capacitor 4841, so that the OLED pixel 4850 outputs the desired brightness. The voltage of the storage capacitor 4841 is set by connecting the storage capacitor 4841 to the data line 4818 through the first TFT 4831 (also referred to as "transistor").

Since the current through the OLED pixel or sub-pixel 4850 and the cathode 4852 is regulated according to the potential difference between a gate voltage and a source voltage of the drive transistor 4833, the increase in sheet resistance of the cathode 4852 results in a larger IR drop, which can be compensated by increasing the power supply (VDD). However, as VDD increases, other voltages supplied to the TFT 4833 and the OLED pixel 4850 also increase, which is disadvantageous, in order to maintain proper operation.

48, an auxiliary electrode 4854 is depicted as a resistor in parallel with the cathode 4852. Because the resistance of the auxiliary electrode 4854 is substantially lower than that of the cathode 4852, the combined effective resistance of the auxiliary electrode 4854 and the cathode 4852 is lower than the resistance of the cathode 4852 alone. Accordingly, the presence of the auxiliary electrode 4854 can reduce the increase in VDD.

Although the advantages of the auxiliary electrode are explained with reference to a top-emitting OLED device, it is also advantageous to selectively deposit the auxiliary electrode on the cathode of a bottom-emitting or double-emitting OLED device. For example, while a relatively thick cathode layer can be formed in a bottom-emitting OLED device without substantially affecting the optical characteristics of the device, it is still advantageous to form a relatively thin cathode. For example, in a transparent or translucent display device, the layers of the entire device, including the cathode, can be formed to be substantially transparent or translucent. Accordingly, it may be beneficial to provide patterned auxiliary electrodes that are not easily detectable by the naked eye from typical viewing distances. It should also be understood that the described method can be used to form bus bars or auxiliary electrodes for reducing the resistance of electrodes of devices other than OLED devices.

In some embodiments, after a conductive coating has been deposited, a nucleation-inhibiting coating deposited during the fabrication process may be removed using, for example, solvent or plasma etching.

59A illustrates a device 5901 including a substrate 5910 and a nucleation inhibiting coating 5920 and a conductive coating 5915 (eg, magnesium coating) deposited on respective regions of a surface of the substrate 5910, according to one embodiment Floor).

59B illustrates a device 5902 in which the nucleation-inhibiting coating 5920 present in the device 5901 has been removed from the surface of the substrate 5910, such that the conductive coating 5915 remains on the substrate 5910, and the The areas of substrate 5910 that cover the nucleation-inhibiting coating 5920 are now exposed or uncovered. For example, the device 5901 can be removed by exposing the substrate 5910 to a solvent or plasma that will preferentially react and/or etch away the nucleation-inhibiting coating 5920, but not substantially affect the conductive coating 5915 The nucleation inhibiting coating 5920.

At least some of the above embodiments illustrate the use of evaporation methods to form various layers or coatings, including nucleation promoting coatings, nucleation inhibiting coatings, and conductive coatings. As understood, the evaporation method is a type of PVD method in which one or more source materials are evaporated or sublimated in a low pressure (eg, vacuum) environment and then deposited on a on the target surface. There are a variety of different evaporation sources that can be used to heat a source material, ie, it is understood that the source material can be heated in a variety of ways. For example, the source material can be heated by means of electric filament, electron beam, induction heating, or resistance heating. In addition, such layers or coatings can be deposited and/or patterned using other suitable methods, including photolithography, printing, OVPD, LITI patterning, and combinations thereof. These methods can also be used in conjunction with shadow masks to achieve various patterns.

For example, deposition of magnesium can be performed at source temperatures up to about 600°C in order to achieve faster deposition rates, such as about 10 to 30 nm/sec or faster. Reference is made to Table 1 below, which provides measurements of various deposition rates for approximately 1 nm of substantially pure magnesium on fullerene-treated organic surfaces using a Knudsen vessel source. It should be understood that other factors can also affect the deposition rate, including, but not limited to, the distance between a source and a substrate, the characteristics of the substrate, the presence of a nucleation-promoting coating on the substrate, the size of the source used. type and shaping of the flux of material evaporated from the source. Table 1: Magnesium deposition rate by temperature sample# Temperature (̊C) Rate (Å/s) 1 510 10 2 525 40 3 575 140 4 600 160

It will be understood by those skilled in the art that the particular processing conditions used will vary with the equipment used to perform the deposition. It should also be understood that higher deposition rates are generally obtained at higher source temperatures; however, other deposition conditions may be selected, such as, for example, placing the substrate closer to the deposition source.

It should also be understood that an opening mask for depositing any of a variety of layers or coatings, including a conductive coating, a nucleation inhibiting coating, and a nucleation promoting coating, can "mask" or prevent a material. deposited on an area of the substrate. However, unlike fine metal masks (FMMs), which are used to form relatively small features with feature sizes on the order of tens of microns or less, the feature size of an open mask typically corresponds to the size of the OLED device that is intended to be fabricated . For example, an opening mask can mask the edges of a display device during manufacture, which results in an opening mask with holes approximately corresponding to the size of the display device (ie, about 1 inch for a microdisplay, about 4-inch for a mobile display). 6 inches, about 8-17 inches for laptop or tablet monitors, etc.). For example, the feature size of an open mask can be on the order of about 1 cm or more.

16B illustrates an opening mask 1731 having or defining an aperture 1734 formed thereon. In this illustrative example, the hole 1734 of the mask 1731 is smaller than the size of a device 1721 such that the mask 1731 covers the edge of the device 1721 when the mask 1731 is placed over it. Specifically, in the exemplary embodiment, all or substantially all light emitting areas or pixels 1723 of the device 1721 are exposed through the aperture 1734, while the unexposed areas 1727 are formed at the outer edge 1725 of the device 1721 and the hole 1734. It should be appreciated that electrical contacts or other device components may be located in the unexposed area 1727 such that these components remain unaffected during the opening mask deposition process.

16C illustrates another example of an opening mask 1731 where a hole 1734 of the mask 1731 is smaller than the hole in FIG. 16B such that when closed, the mask 1731 covers at least some light-emitting areas or pixels of a device 1721 1723. Specifically, the outermost pixel 1723 ′ is located within an unexposed area 1727 of the device 1721 as shown, formed between the hole 1734 of the mask 1731 and the outer edge 1725 of the device 1721 .

16D illustrates yet another example of an opening mask 1731 in which a hole 1734 of the mask 1731 defines a pattern that covers some pixels 1723' of a device 1721 while exposing other pixels 1723. Specifically, during the deposition process, the pixel 1723' (formed between the hole 1734 and the outer edge 1725) within an unexposed region 1727 of the device 1721 is masked so that vapor flux is inhibited from being onto the unexposed area 1727.

Although in the example of FIGS. 16B-16D the outermost pixels are depicted as being shaded, it should be understood that the apertures of the open mask may be shaped to shade other light-emitting and non-light-emitting areas of a device. Furthermore, although the opening mask with one hole is illustrated in the previous example, the opening mask may also include additional holes for exposing regions of a substrate or device.

16E illustrates another example of an opening mask 1731, where the mask 1731 has or defines a plurality of holes 1734a-1734d. The apertures 1734a-1734d are configured such that they selectively expose certain areas of a device 1721, while masking other areas. For example, some light emitting areas or pixels 1723 are exposed through the holes 1734a-d, while other pixels 1723' in an unexposed area 1727 are hidden.

In the various embodiments described herein, it should be understood that the use of an opening mask may be omitted if desired. Specifically, the open-mask deposition methods described herein can optionally be performed without the use of a mask, leaving the entire surface exposed.

Although certain methods of evaporation are described in terms of depositing a nucleation promoting material, a nucleation inhibiting material, and magnesium, it should be understood that various other methods may be used to deposit these materials. For example, deposition may be performed using other PVD methods (including sputtering), CVD methods (including plasma enhanced chemical vapor deposition (PECVD)), or other methods suitable for depositing this material. In some embodiments, the magnesium is deposited using a resistive heater to heat the magnesium source material. In other embodiments, the magnesium source material may be carried in a heated crucible, heated boat, Knudsen vessel (eg, an efflux evaporator source), or any other type of evaporation source.

The deposition source material used to deposit a conductive coating can be a mixture or a compound, and in some embodiments, at least one component of the mixture or compound does not deposit on the substrate during deposition (or For example magnesium, relatively small amount of deposition). In some embodiments, the source material may be a copper-magnesium (Cu-Mg) mixture or a Cu-Mg compound. In some embodiments, the source material of the magnesium deposition source includes magnesium and a material having a lower vapor pressure than magnesium, such as Cu. In other embodiments, the source material of the magnesium deposition source is substantially pure magnesium. Specifically, substantially pure magnesium may exhibit substantially similar properties (eg, inhibition of nucleation and promotion of onset adhesion on coatings) compared to pure magnesium (99.99% and higher purity magnesium) . For example, the initial adhesion probability of substantially pure magnesium on a nucleation inhibiting coating may be within ±10% or within ±5% of the initial adhesion probability of 99.99% pure magnesium on the nucleation inhibiting coating. The purity of the magnesium can be about 95% or higher, about 98% or higher, about 99% or higher, or about 99.9% or higher. Deposition source materials used to deposit a conductive coating include other metals that replace or incorporate magnesium. For example, a source material may include a high vapor pressure material such as ytterbium (Yb), cadmium (Cd), zinc (Zn), or any combination thereof.

In addition, it should be understood that the methods of the various embodiments can be used on the surface of various other organic or inorganic materials used as electron injection layers, electron transport layers, electroluminescence layers and/or pixel definition layers (PDL) in organic optoelectronic devices. Carried on. Examples of such materials include organic molecules and organic polymers, such as those described in PCT Publication WO 2012/016074. Those skilled in the art should also understand that organic materials doped with various elements and/or inorganic compounds can still be regarded as organic materials. Those skilled in the art will also understand that a variety of organic materials can be used and that the methods described herein are generally applicable to the entire range of such organic materials.

It should also be understood that an inorganic substrate or surface may mean a substrate or surface that primarily includes an inorganic material. For clarity, an inorganic material is generally understood to mean any material that is not considered an organic material. Examples of inorganic materials include metals, glasses, and minerals. Specifically, conductive materials including magnesium can be deposited on surfaces of lithium fluoride (LiF), glass, and silicon (Si) using the methods of the present invention. Other surfaces on which the methods of the present invention may be applied include silicon or polysiloxanes, inorganic semiconductor materials, electron injection materials, salts, metals, and metal oxides.

It should be understood that the substrate may comprise a semiconductor substrate, whereby a surface of a substrate may be a semiconductor surface. Semiconductor materials can be described as materials that generally exhibit a band gap. For example, such a band gap may be formed between the highest occupied molecular orbital (HOMO) and the lowest unoccupied molecular orbital (LUMO). Therefore, semiconductor materials generally possess less conductivity than conductive materials (eg, metals), but greater conductivity than insulating materials (eg, glass). It is understood that the semiconducting material may be an organic semiconducting material or an inorganic semiconducting material.

FIG. 17 shows a patterned cathode 1710 according to an embodiment. The cathode 1710 is depicted as a single monolithic piece or a continuous structure comprising a number of substantially straight conductor segments spaced substantially parallel to each other. Each conductor segment is connected at its two ends to an end conductor segment arranged substantially perpendicular to the plurality of straight conductor segments. The cathode 1710 can be formed according to the deposition method described above.

17B shows a patterned cathode 1712 according to another embodiment, wherein the cathode 1712 includes a plurality of spaced apart elongated conductive strips. For example, the cathode 1712 can be used in a passive matrix OLED device (PMOLED) 1715. In the PMOLED device 1715, light emitting regions or pixels are typically formed in the regions where the counter electrodes overlap. Accordingly, in the embodiment of FIG. 17B, a light emitting area or pixel 1751 is formed at the overlapping area of the cathode 1712 and an anode 1741 comprising a plurality of spaced apart elongated conductive strips. A non-light emitting region 1755 is formed in a region where the cathode 1712 and the anode 1741 do not overlap. Generally, in the described PMOLED device 1715, the cathode 1712 strips and the anode 1741 strips are oriented substantially perpendicular to each other. The cathode 1712 and the anode 1741 can be connected to a power source and related driving circuits for supplying current to the respective electrodes.

Figure 17C illustrates a cross-sectional view taken along line A-A in Figure 17B. In Figure 17C, a base substrate 1702 is provided, which may be, for example, a transparent substrate. The base substrate 1702 is provided with a strip-shaped anode 1741 as shown in FIG. 17B . One or more organic layers 1761 are deposited on the anode 1741 . For example, the organic layer 1761 may be provided as a common layer throughout the device, and may include any number of layers of organic and/or inorganic materials described herein, such as hole injection and transport layers, electroluminescent layers, and electron transport layers with the injection layer. Certain areas of the top surface of the organic layer 1761 are covered with a nucleation inhibiting coating 1771 which is used to selectively pattern the cathode 1712 according to the deposition method described above. The cathode 1712 and the anode 1741 can be connected to their respective driver circuits (not shown), which can control the emission of light from the pixel 1751 .

Although the thickness of the nucleation-inhibiting coating 1771 and the cathode 1712 can vary depending on the desired application and performance, in at least some embodiments, the thickness of the nucleation-inhibiting coating 1771 can be equal to or substantially less than that of FIG. 17C The thickness of the cathode 1712 is shown. The use of relatively thin nucleation-inhibiting coatings to achieve patterning of a cathode is particularly advantageous for flexible PMOLED devices because it provides a relatively flat surface on which a barrier coating can be applied.

Figure 17D depicts the PMOLED device 1715 of Figure 17C with a barrier coating 1775 applied to the cathode 1712 and the nucleation inhibiting coating 1771. It will be appreciated that the barrier coating 1775 is generally provided to prevent various device layers susceptible to oxidation, including organic layers and the cathode 1712, from exposure to moisture and ambient air. For example, the barrier coating 1775 may be a thin film coating formed via printing, CVD, sputtering, atomic layer deposition (ALD), a combination of any of the foregoing, or via any other suitable method. The barrier coating 1775 can also be provided by laminating a pre-formed barrier film on the device 1715 using an adhesive (not shown). For example, the barrier coating 1775 can be a multi-layer coating comprising organic materials, inorganic materials, or a combination of the two. The barrier coating 1775 may additionally contain a hygroscopic material and/or a desiccant.

For comparison purposes, a comparative PMOLED device 1719 is illustrated in Figure 17E. In the comparative example of FIG. 17E, several pixel-defining structures 1783 are provided in the non-emissive regions of the device 1719 so that when a conductive material is deposited using an open mask or maskless deposition method, the conductive material is deposited in the The cathode 1712 is formed on the light emitting region between adjacent pixel definition structures 1783 , and the conductive strips 1718 are formed on top of the pixel definition structures 1783 . However, in order to ensure that each section of the cathode 1712 is electrically separated from the conductive strip 1718 , the pixel defining structure 1783 is formed with a thickness or height greater than that of the cathode 1712 . The pixel definition structure 1783 may also have an undercut profile to further reduce the likelihood of the cathode 1712 being in electrical contact with the conductive strip 1718 . The barrier coating 1775 is provided to cover the PMOLED device 1719 including the cathode 1712 , the pixel defining structure 1783 and the conductive strips 1718 .

In the comparative PMOLED device 1719 depicted in FIG. 17E, the surface on which the barrier coating 1775 is applied is non-uniform due to the presence of the pixel-defining structures 1783. This makes the application of the barrier coating 1775 difficult, and even if the barrier coating 1775 is applied, the adhesion of the barrier coating 1775 to the underlying surface may be relatively poor. Poor adhesion can increase the likelihood of the barrier coating 1775 peeling off the device 1719, especially when the device 1719 is warped or bent. Furthermore, due to the non-uniform surface, there is a relatively high probability that air bubbles will become trapped between the barrier coating 1775 and the underlying surface during the application process. The presence and/or exfoliation of air bubbles in the barrier coating 1775 may cause or cause defects and partial or complete device failure and is therefore highly undesirable. These factors are reduced in the embodiment of Figure 17D.

Although the patterned cathodes 1710 and 1712 shown in Figures 17 and 17B can be used to form a cathode of an OLED device, it should be understood that similar patterns can be used to form an auxiliary electrode for an OLED device. Specifically, such an OLED device can be provided with a common cathode and an auxiliary electrode disposed above or below the common cathode, so that the auxiliary electrode is in electrical communication with the common cathode. For example, such an auxiliary electrode can be implemented in an OLED device (eg, an AMOLED device) that includes several light-emitting regions, such that the auxiliary electrode is formed on a non-light-emitting region without covering the light-emitting region. In another example, an auxiliary electrode may be provided to cover the non-emitting regions and at least some of the light-emitting regions of an OLED device.

18A depicts a portion of an OLED device 1800 that includes several light-emitting regions 1810a-1810f and a non-light-emitting region 1820. For example, the OLED device 1800 may be an AMOLED device, and each of the light emitting regions 1810a-1810f may correspond to a pixel or sub-pixel of such a device. 18B-18D depict a portion of the OLED device 1800 for brevity. Specifically, Figures 18B-18D show two adjacent regions, a first light emitting region 1810a and a second light emitting region 1810b, surrounding regions. Although not explicitly described, a common cathode may be provided that substantially covers both the light emitting area and the non-light emitting area of the device 1800 .

An auxiliary electrode 1830 according to an embodiment is shown in FIG. 18B, wherein the auxiliary electrode 1830 is disposed between the two adjacent light-emitting regions 1810a and 1810b. The auxiliary electrode 1830 is electrically connected to the common cathode (not shown). Specifically, the auxiliary electrode 1830 is described as having a width (α) that is smaller than the separation distance (d) of the adjacent light-emitting regions 1810a and 1810b, thus forming a non-light-emitting gap region on each side of the auxiliary electrode 1830 . For example, such an arrangement may be advantageous in the device 1800 where the adjacent light emitting regions 1810a and 1810b are separated by a distance sufficient to accommodate the auxiliary electrode 1830 of sufficient width, because providing the non-light emitting gap region reduces the auxiliary electrode 1830 interferes with the optical output of the device 1800. Furthermore, this arrangement may be particularly advantageous where the auxiliary electrode 1830 is relatively thick (eg, greater than several hundred nanometers or on the order of a few micrometers thick). For example, the ratio of the height or thickness of the auxiliary electrode 1830 to its width (ie, aspect ratio) may be greater than about 0.05, such as about 0.1 or more, about 0.2 or more, about 0.5 or more, about 0.8 or more greater, about 1 or more, about 2 or more. For example, the height or thickness of the auxiliary electrode 1830 can be greater than about 50 nm, such as about 80 nm or more, about 100 nm or more, about 200 nm or more, about 500 nm or more, about 700 nm or more, about 1000 nm or more Large, about 1500 nm or more, about 1700 nm or more, or about 2000 nm or more.

An auxiliary electrode 1832 is shown in FIG. 18C according to another embodiment. The auxiliary electrode 1832 is electrically connected to the common cathode (not shown). As mentioned, the auxiliary electrode 1832 has substantially the same width as the separation distance between the adjacent light-emitting regions 1810a and 1810b, so that the auxiliary electrode 1832 substantially completely occupies the adjacent light-emitting regions 1810a and 1810b the entire non-luminous area provided in between. This arrangement may be advantageous in situations where the separation distance between the two adjacent light emitting regions 1810a and 1810b is relatively small, such as in high pixel density display devices.

Yet another embodiment of an auxiliary electrode 1834 is depicted in Figure 18D. The auxiliary electrode 1834 is electrically connected to the common cathode (not shown). The auxiliary electrode 1834 is depicted as having a width (α) that is greater than the separation distance (d) between the two adjacent light-emitting regions 1810a and 1810b. Accordingly, a portion of the auxiliary electrode 1834 covers a portion of the first light emitting region 1810a and a portion of the second light emitting region 1810b. This arrangement may be advantageous in situations where the non-light emitting region between the adjacent light emitting regions 1810a and 1810b does not fully accommodate the auxiliary electrode 1834 of the desired width. Although it is described in FIG. 18D that the auxiliary electrode 1834 overlaps with the first light-emitting region 1810a to the same extent as the two light-emitting regions 1810b, in other embodiments, the auxiliary electrode 1834 and an adjacent light-emitting region can be adjusted degree of overlap. For example, in other embodiments, the auxiliary electrode 1834 may overlap the first light emitting region 1810a more than the second light emitting region 1810b, and vice versa. In addition, the outline of the overlap between the auxiliary electrode 1834 and a light-emitting region can also be changed. For example, the overlapping portion of the auxiliary electrode 1834 can be shaped such that the auxiliary electrode 1834 overlaps one portion of a light-emitting region more than another portion of the same light-emitting region to create a non-uniform overlapping region.

An OLED device 1900 according to an embodiment is depicted in FIG. 19 in which a light emitting area 1910 and a non-light emitting area 1920 surrounding the light emitting area 1910 are provided. A lead 1912 is shown formed in the non-emissive region 1920 of the device 1900. The lead 1912 is electrically connected to an electrode (not shown) covering the light emitting region 1910 of the device 1900. The lead 1912 can provide a contact point to connect to an external power source that can power this one electrode. For example, the electrode can be connected to the external power source (a wire can be soldered to the lead and connected to the power source) through the lead 1912 (by bonding pads integrated into the lead 1912). It should be understood that, although not explicitly shown, an auxiliary electrode may be present and connected to the electrode covering the light emitting region 1910 of the device 1900. In the presence of such an auxiliary electrode, the lead 1912 can be directly connected to the auxiliary electrode, the electrode to which the auxiliary electrode is connected, or both.

It should be understood that the lead 1912 may be provided on the same plane as the electrode to which it is connected, or it may be provided on a different plane. For example, the leads 1912 can be connected to another layer of the OLED device 1900, such as a backplane, through one or more vertical connections (eg, holes).

FIG. 20 depicts a portion of an OLED device 2000 according to another embodiment. The OLED device 2000 includes a light-emitting region 2010 and a non-light-emitting region 2020 . The OLED device 2000 additionally includes a grid-like auxiliary electrode 2030 in electrical communication with an electrode (not shown) of the device 2000. As shown in FIG. 20 , a first portion of the auxiliary electrode 2030 is disposed in the light-emitting region 2010 , and a second portion of the auxiliary electrode 2030 is disposed outside the light-emitting region 2010 and in the non-light-emitting region 2020 of the device 2000 . This arrangement of the auxiliary electrode 2030 may allow the sheet resistance of the electrode to be reduced while keeping the auxiliary electrode 2030 from significantly interfering with the optical output of the device 2000.

In some applications, it may be desirable to form a regularly repeating pattern of auxiliary electrodes over the entire device area or a portion thereof. 21A-21D depict various embodiments of repeating units of auxiliary electrodes that may be used. Specifically, in FIG. 21A , an auxiliary electrode 2110 includes four regions 2120 that are not covered by the auxiliary electrode 2110 . The auxiliary electrode 2110 is formed such that the regions 2120 are arranged in a T shape. For example, each of the regions 2120 may substantially correspond to one of the light emitting regions of an OLED device that includes several light emitting regions. Accordingly, it is understood that other layers or coatings may be present in this region 2120, such as a common cathode. In FIG. 21B , an auxiliary electrode 2112 is formed in an inverted T shape and includes four uncovered regions 2122 . In Figure 21C, an auxiliary electrode 2114 is formed to include four uncovered regions 2124, and similarly in Figure 21D, an auxiliary electrode 2116 is formed to include four uncovered regions 2126.

Possible advantages of using auxiliary electrodes with repeating units, such as those shown in Figures 21A-21D, include ease of patterning in fabrication devices. For example, the mask used to pattern a nucleation promoting or inhibiting coating during formation of the auxiliary electrode can be reused to pattern different portions of a device surface, thus avoiding the need for more complex and/or larger mask.

22 depicts a portion of an OLED device 2200 that includes a number of repeating auxiliary electrode units 2230a-d formed thereon, according to an embodiment. Specifically, each auxiliary electrode unit 2230a-d is L-shaped and covers three different light emitting regions 2210. For example, each light-emitting region 2210 may correspond to a pixel or sub-pixel of the device 2200. As mentioned, adjacent auxiliary electrode units may be interlocked with each other. For example, a first auxiliary electrode unit 2230a and a second auxiliary electrode unit 2230b form an interlocking relationship, and similarly, a third auxiliary electrode unit 2230c and a fourth auxiliary electrode unit 2230d are interlocking. The auxiliary electrode units 2230a-d are formed on a non-light emitting area 2220. It should be appreciated that the auxiliary electrode units 2230a-d may be formed such that they etc. are in direct electrical communication with each other. For example, the repeating auxiliary electrode units 2230a-d may be integrally formed during manufacture. Alternatively, the auxiliary electrode units 2230a-d may be formed such that they are electrically connected through a common electrode.

23 depicts a portion of an OLED device 2300 according to another embodiment. In the embodiment of FIG. 23, each auxiliary electrode unit 2330a, 2330b is formed to cover five different light-emitting regions 2310. The auxiliary electrode units 2330a and 2330b are formed on the non-light-emitting area 2320 of the device 2300 . As described, a first auxiliary electrode unit 2330a is located adjacent to a second auxiliary electrode unit 2330b, but has no interlocking relationship.

In another embodiment described in Figure 24, auxiliary electrode units similar to those described in Figure 23 are provided. However, in Figure 24, the auxiliary electrode units 2430a-d are arranged in an interlocking relationship with each other. Similar to the embodiment of FIG. 23, each auxiliary electrode unit 2430a-d covers five different light-emitting regions 2410 and is formed on a non-light-emitting region 2420 of a device 2400.

While various embodiments are illustrated and described in which each auxiliary electrode unit encompasses 3, 4, or 5 light emitting areas, it should be understood that each auxiliary electrode unit may encompass any number of light emitting areas, including 1, 2, 3, 4, 5, 6 or more light emitting areas.

25 illustrates an embodiment in which an auxiliary electrode 2530 forms a grid on an OLED device 2500. As mentioned, the auxiliary electrode 2530 is provided on the non-light emitting area 2520 of the device 2500 such that it does not substantially cover any part of the light emitting area 2510.

26 illustrates an embodiment in which auxiliary electrode units 2630 form a series of elongated structures on an OLED device 2600. As mentioned, the auxiliary electrode unit 2630 is provided on a non-light-emitting area 2620 of the device 2600 such that it does not substantially cover any part of the light-emitting area 2610. The auxiliary electrode units 2610 are separated from each other and not in physical contact, but are electrically connected through a common electrode (not shown). It should be appreciated that auxiliary electrode units 2610 that are not directly interconnected with each other may still provide substantial advantages by reducing the overall sheet resistance of the connected common electrodes.

27 depicts an embodiment in which auxiliary electrode units 2730 form a "stairwell" pattern on an OLED device 2700. As mentioned, the auxiliary electrode unit 2730 is provided on a non-light-emitting area 2720 of the device 2700 such that it does not substantially cover any part of the light-emitting area 2710.

28A-28J depict various embodiments of auxiliary electrodes provided between adjacent sub-pixels.

In FIG. 28A, an auxiliary electrode unit 2830 in the shape of an elongated strip is provided between adjacent sub-pixels 2812 columns. Specifically, in the embodiment of FIG. 28A, a first subpixel 2812a, a second subpixel 2812b, and a third subpixel 2812c together form a first pixel 2810a. For example, the first pixel 2810a may be an RGB pixel, in which case each sub-pixel 2812a-c corresponds to a red, green or blue sub-pixel. Pixels 2810 can be arranged such that the same sub-pixel pattern (eg, red, green, blue) is repeated on a display device. Specifically, the sub-pixel arrangement of a second pixel 2810b and a third pixel 2810c can be consistent with the first pixel 2810a. In such an arrangement, all sub-pixels 2812 in each column of sub-pixels 2812 (eg, sub-pixels arranged linearly along a first axis labeled Y) may be uniform in color and substantially parallel to the first axis The auxiliary electrode unit 2830, extending along the axis Y, may be provided between adjacent columns of sub-pixels 2812, as shown in FIG. 28A.

For brevity, Figures 28B-28J are illustrated using pixel and sub-pixel arrangements consistent with those described above in Figure 28A.

In FIG. 28B , auxiliary electrode units 2830 are depicted as being provided between adjacent columns of pixels 2810 . Specifically, the auxiliary electrode unit 2830 substantially parallel to the first axis Y is provided between the first pixel 2810a and the second pixel 2810b aligned with each other in the direction of a second axis X. However, no auxiliary electrode unit 2830 is provided between the first pixel 2810a and the third pixel 2810c, which are aligned with each other in the direction of a first axis Y. As shown in the figure, the first axis Y and the second axis X are perpendicular to each other. It should be understood that although in FIG. 28B , the auxiliary electrode unit 2830 extends along the first axis Y, in another embodiment, the auxiliary electrode unit 2830 may extend along the second axis X.

FIG. 28C depicts an embodiment in which an auxiliary electrode 2830 is provided between adjacent sub-pixels 2812 to form a grid over the entire display device. Specifically, the auxiliary electrode 2830 is provided between each adjacent pair of sub-pixels 2812a-2812c. Accordingly, the auxiliary electrode 2830 includes a segment extending substantially parallel to the first axis Y and the second axis X, forming a mesh or grid between the sub-pixels 2812a-2812c.

In another embodiment shown in FIG. 28D , an auxiliary electrode 2830 is provided between adjacent pixels 2810 . Specifically, the auxiliary electrode 2830 is provided between the first pixel 2810a and the second pixel 2810b aligned with each other along the second axis X, and the first pixel 2810a aligned with each other along the first axis Y and the third pixel 2810c. Accordingly, the auxiliary electrode 2830 forms a mesh or grid between the pixels 2810a-c.

In FIG. 28E, yet another embodiment in which separate auxiliary electrode units 2830 are provided between adjacent sub-pixels 2812 is illustrated. Specifically, the direction of the auxiliary electrode unit 2830 is substantially parallel to the first axis Y, and is provided between the adjacent sub-pixels 2812a-c.

In FIG. 28F, an embodiment in which separate auxiliary electrode units 2830 are provided between adjacent pixels 2810 is described. Specifically, the direction of the auxiliary electrode unit 2830 is substantially parallel to the first axis Y, and is provided between the first pixel 2810a and the second pixel 2810b arranged adjacent to each other along the second axis X.

In FIG. 28G, auxiliary electrode units 2830 are depicted to be provided between adjacent sub-pixels 2812 to create a grid or mesh on a display device. As described, elongated auxiliary electrode units 2830 extending substantially parallel to the first axis Y are disposed between adjacent sub-pixels 2812 aligned along the second axis X. Similarly, the elongated auxiliary electrode unit 2830 extending substantially parallel to the second axis X is disposed between the adjacent sub-pixels 2812 aligned along the first axis Y.

In Figure 28H, separate auxiliary electrode units 2830 are provided between adjacent pixels 2810 to create a grid or mesh on a display device. As mentioned, the elongated auxiliary electrode unit 2830 extending substantially parallel to the first axis Y is disposed between adjacent pixels 2810a and 2810b aligned along the second axis X. Similarly, the elongated auxiliary electrode unit 2830 extending substantially parallel to the second axis X is disposed between adjacent pixels 2810a and 2810c aligned along the first axis Y.

28I illustrates another embodiment in which separate auxiliary electrode units 2830 are provided between adjacent sub-pixels 2812, forming a grid or mesh on a display device. The auxiliary electrode units 2830 each include a first segment extending substantially parallel to the first axis Y and a second segment extending substantially parallel to the second axis X. The first axis Y and the second axis X are perpendicular to each other. In Figure 28I, the first segment is joined end-to-end with the second segment to form an inverted L shape.

28J illustrates another embodiment in which separate auxiliary electrode units 2830 are provided between adjacent sub-pixels 2812 to form a grid or mesh on a display device. The auxiliary electrode units 2830 each include a first segment extending substantially parallel to the first axis Y and a second segment extending substantially parallel to the second axis X. The first axis Y and the second axis X are perpendicular to each other. In FIG. 28J , the first segment and the second segment are connected to form a cross near the midpoint of the first segment and the second segment.

Although in some embodiments it is described that one auxiliary electrode unit is not physically connected to another, they may be in electrical communication with each other through a common electrode. For example, providing separate auxiliary electrode units that are indirectly connected to each other through the common electrode can still substantially reduce sheet resistance, thus increasing the efficiency of an OLED device without substantially interfering with the optical characteristics of the device.

Auxiliary electrodes can also be used in display devices with other pixel or sub-pixel arrangements. For example, auxiliary electrodes may be provided on display devices in which diamond pixel arrangements are used. Examples of such pixel arrangements are illustrated in Figures 29-33.

29 is a schematic diagram illustrating an OLED device 2900 having a diamond pixel arrangement according to one embodiment. The OLED device 2900 includes a plurality of pixel definition layers (PDLs) 2930 and a light emitting region 2912 (subpixel) disposed between adjacent PDLs 2930. The light emitting area 2912 includes those corresponding to a first sub-pixel 2912a (which may correspond to, for example, a green sub-pixel), a second sub-pixel 2912b (which may correspond to, for example, a blue sub-pixel), and a third sub-pixel 2912c (which may correspond to, for example, a blue sub-pixel). Corresponding to such as the red sub-pixel).

FIG. 30 is a diagram illustrating a schematic diagram taken along lines A-A of the OLED device 2900 shown in FIG. 29 . 30, the device 2900 includes a substrate 2903 and a plurality of anode units 2921 formed on a surface of the base substrate 2903. The substrate 2903 may additionally include a plurality of transistors and a base substrate (for brevity, the figure is omitted). An organic layer 2915 is provided on top of each anode unit 2921 in an area between adjacent PDLs 2930, and a common cathode 2942 is provided on the organic layer 2915 and the PDL 2930 to form the first subpixel 2912a. The organic layer 2915 may include several organic/or inorganic layers. For example, the layers may include a hole transport layer, a hole injection layer, an electroluminescent layer, an electron injection layer, and/or an electron transport layer. A nucleation-inhibiting coating 2945 is provided on areas of the common cathode 2942 corresponding to the first sub-pixel 2912a to allow for selective nucleation in areas of the common cathode 2942 corresponding to substantially flat areas of the PDL 2930 On the covered area, an auxiliary electrode 2951 is deposited. The nucleation inhibiting coating 2945 can also act as an index matching coating. A thin film cover 2961 can optionally be provided to cover the device 2900.

FIG. 31 shows a schematic view taken along lines B-B of the OLED device 2900 shown in FIG. 29 . The device 2900 includes a number of anode cells 2921 formed on the surface of the substrate 2903 and an organic layer 2916 or 2917 provided on top of each anode cell 2921 in a region between adjacent PDLs 2930. The common cathode 2942 is provided on the organic layers 2916 and 2917 and the PDL 2930 to form the second sub-pixel 2912b and the third sub-pixel 2912c, respectively. The nucleation-inhibiting coating 2945 is provided on areas of the common cathode 2942 corresponding to the sub-pixels 2912b and 2912c to allow selective coverage of substantially flat areas of the common cathode 2942 corresponding to the PDL 2930 On the coverage area, the auxiliary electrode 2951 is deposited. The nucleation inhibiting coating 2945 can also act as an index matching coating. The thin film cover 2961 can optionally be provided to cover the device 2900.

32 is a schematic diagram of an OLED device 3200 having a pixel arrangement according to another embodiment. Specifically, the device 3200 includes a number of PDLs 3230 that separate light-emitting regions 3212 (sub-pixels). For example, the first subpixel 3212a may correspond to a green subpixel, the second subpixel 3212b may correspond to a blue subpixel, and the third subpixel 3212c may correspond to a red subpixel. FIG. 33 is an image of an OLED device with a pixel arrangement according to the embodiment of FIG. 32 . Although not shown, the device 3200 may additionally include an auxiliary electrode provided on the non-light emitting area of the device 3200 . For example, the auxiliary electrode may be disposed on an area of a common cathode that corresponds to a substantially flat portion of the PDL 3230.

In another aspect according to some embodiments, an apparatus is provided. In some embodiments, the device is an optoelectronic device. In some embodiments, the device is another electronic device or other product. In some embodiments, the device includes a substrate, a nucleation inhibiting coating, and a conductive coating. The nucleation inhibiting coating covers a first region of the substrate. The conductive coating covers a second region of the substrate and partially overlaps the nucleation-inhibiting coating such that at least a portion of the nucleation-inhibiting coating is exposed from, or is substantially free of, the conductive coating or substantially not covered by the conductive coating. In some embodiments, the conductive coating includes a first portion and a second portion, the first portion of the conductive coating covers the second region of the substrate, and the second portion of the conductive coating and the One of the nucleation inhibiting coatings partially overlaps. In some embodiments, the second portion of the conductive coating is separated from the nucleation inhibiting coating by a gap. In some embodiments, the nucleation inhibiting coating includes an organic material. In some embodiments, the first portion of the conductive coating and the second portion of the conductive coating are integrally formed with each other.

According to another aspect of some embodiments, an apparatus is provided. In some embodiments, the device is an optoelectronic device. In some embodiments, the device is another electronic device or other product. In some embodiments, the device includes a substrate and a conductive coating. The substrate includes a first area and a second area. The conductive coating covers the second region of the substrate and partially overlaps the first region of the substrate such that at least a portion of the first region of the substrate is exposed, or substantially free, from the conductive coating The conductive coating is or is not substantially covered by the conductive coating. In some embodiments, the conductive coating includes a first portion and a second portion, the first portion of the conductive coating covers the second region of the substrate, and the second portion of the conductive coating and the A portion of the first region of the substrate overlaps. In some embodiments, the second portion of the conductive coating is separated from the first region of the substrate by a gap. In some embodiments, the first portion of the conductive coating and the second portion of the conductive coating are integral with each other.

34 illustrates a portion of an apparatus according to an embodiment. The device includes a substrate 3410 having a surface 3417. A nucleation-inhibiting coating 3420 covers a first region 3415 of the surface 3417 of the substrate 3410 , and a conductive coating 3430 covers a second region 3412 of the surface 3417 of the substrate 3410 . As shown in FIG. 34 , the first region 3415 and the second region 3412 are different and are non-overlapping regions of the surface 3417 of the substrate 3410 . The conductive coating 3430 includes a first portion 3432 and a second portion 3434 . As shown in the figure, the first portion 3432 of the conductive coating 3430 covers the second region 3412 of the substrate 3410, and the second portion 3434 of the conductive coating 3430 is partially associated with the nucleation-inhibiting coating 3420 One part overlaps. More specifically, the second portion 3434 is shown overlapping the nucleation inhibiting coating 3420 in a direction perpendicular (or orthogonal) to the underlying substrate surface 3417.

The second portion 3434 of the conductive coating 3430 is particularly where the nucleation-inhibiting coating 3420 is formed such that its surface 3422 exhibits a relatively low probability of adhesion to the material used to form the conductive coating 3430. Between the overlap with the surface 3422 of the nucleation inhibiting coating 3420, a gap 3441 is formed. Accordingly, the second portion 3434 of the conductive coating 3430 is not in direct physical contact with the nucleation-inhibiting coating 3420, but, as indicated by arrows 3490, along the surface 3417 perpendicular to the substrate 3410 The gap 3441 is separated from the nucleation inhibiting coating 3420 in the direction of the nucleation inhibiting coating 3420 . Nonetheless, the first portion 3432 of the conductive coating 3430 may be physically directly connected to the nucleation inhibiting coating 3420 at an interface or boundary between the first region 3415 and the second region 3412 of the substrate 3410 touch.

In some embodiments, the overlap (second portion 3434 of the conductive coating 3430 ) may extend laterally above the nucleation-inhibiting coating 3420 to a degree commensurate with the thickness of the conductive coating 3430 . For example, referring to FIG. 34 , the width w ₂ of the second portion 3434 (or the dimension along a direction parallel to the surface 3417 of the substrate 3410 ) can be related to the thickness t ₁ of the first portion 3432 of the conductive coating 3430 (or dimension along a direction perpendicular to the surface 3417 of the substrate 3410). For example, the w2: _t1 ratio can be in the range of about ₁ :1 to about 1:3, about 1:1 to about 1:1.5, or about 1:1 to about 1:2. Although the entire thickness _t1 of the conductive coating 3430 is generally relatively uniform, the extent to which the _second portion 3434 overlaps the nucleation inhibiting coating 3420 (ie, w2) at different portions of the surface 3417 There is some degree of variation.

In another embodiment depicted in FIG. 35 , the conductive layer 3430 additionally includes a third portion 3436 disposed between the second portion 3434 and the nucleation-inhibiting coating 3420 . As noted, the second portion 3434 of the conductive coating 3430 extends laterally above the third portion 3436 of the conductive coating 3430 and is spaced from the third portion 3436 of the conductive coating 3430, and the The third portion 3436 can be in direct physical contact with the surface 3422 of the nucleation inhibiting coating 3420. The thickness t ₃ of the third portion 3436 may be less than, and in some cases, substantially less than the thickness t ₁ of the first portion 3432 of the conductive coating 3430 . Furthermore, in at least some embodiments, the width w ₃ of the third portion 3436 may be greater than the width w ₂ of the second portion 3434 . Accordingly, the third portion 3436 may extend laterally to overlap the nucleation-inhibiting coating 3420 to a greater extent than the second portion 3434 . For example, the w3: _t1 ratio can range from about 1:2 to about ₃ :1 or from about 1:1.2 to about 2.5:1. Although the entire thickness t ₁ of the conductive coating 3430 is generally relatively uniform, the degree to which the third portion 3436 overlaps the nucleation inhibiting coating 3420 (ie, w ₃ ) at different portions of the surface 3417 will There is some degree of variation. The thickness t ₃ of the third portion 3436 may be no greater or less than about 5% of the thickness t ₁ of the first portion 3432 . For example, _t3 can be no greater than or less _than about 4%, no greater than or less than about 3%, no greater than or less than about 2%, no greater than or less than about 1%, or no greater than or less than about 0.5% of t1. Instead of, or in addition to, the third portion 3436 forming a thin film as shown in FIG. 35, the material of the conductive coating 3430 may form islands or discrete clusters on a portion of the nucleation inhibiting coating 3420. For example, the islands or discrete clusters may include features that are physically separated from each other such that the islands or clusters do not form a continuous layer.

In yet another embodiment described in FIG. 36, a nucleation promoting coating 3451 is disposed between the substrate 3410 and the conductive coating 3430. Specifically, the nucleation promoting coating 3451 is disposed between the first portion 3432 of the conductive coating 3430 and the second region 3412 of the substrate 3410. It describes that the nucleation-promoting coating 3451 is disposed on the second region 3412 of the substrate 3410, rather than on the first region 3415 where the nucleation-inhibiting coating 3420 is deposited. The nucleation-promoting coating 3451 can be formed such that at an interface or boundary between the nucleation-promoting coating 3451 and the conductive coating 3430, one surface of the nucleation-promoting coating 3451 is in contact with the conductive coating 3430 The material exhibits a relatively high initial adhesion probability. As such, the presence of the nucleation promoting coating 3451 can promote the formation and growth of the conductive coating 3430 during deposition. Various features of the conductive coating 3430 and other coatings of Figure 36, including the dimensions of the first portion 3432 and the second portion 3434, may be similar to those described above in Figures 34-35, and are not for the sake of brevity Repeat again.

In yet another embodiment described in Figure 37, the nucleation promoting coating 3451 is disposed on both the first region 3415 and the second region 3412 of the substrate 3410, and the nucleation inhibiting coating 3420 covers a portion of the nucleation promoting coating 3451 disposed on the first region 3415. Another portion of the nucleation-promoting coating 3451 is exposed from the nucleation-inhibiting coating 3420, or is substantially free of the nucleation-inhibiting coating 3420 or is substantially not covered by the nucleation-inhibiting coating 3420, and the conductive coating 3430 covers the exposed portion of the nucleation promoting coating 3451. Various features of the conductive coating 3430 and other coatings of Figure 37 may be similar to those described above for Figures 34-35 and are not repeated for brevity.

38 illustrates yet another embodiment in which the conductive coating 3430 partially overlaps a portion of the nucleation inhibiting coating 3420 in the third region 3419 of the substrate 3410. Specifically, in addition to the first portion 3432 and the second portion 3434 , the conductive coating 3430 additionally includes a third portion 3480 . As shown in the figure, the third portion 3480 of the conductive coating 3430 is disposed between the portion 3432 and the second portion 3434 of the conductive coating 3430, and the third portion 3480 may be associated with the nucleation-inhibiting coating The surface 3422 of layer 3420 is in direct physical contact. In this regard, the formation of the overlap in the third region 3419 may be the result of lateral growth of the conductive coating 3430 during an open mask or maskless deposition method. More specifically, although the surface 3422 of the nucleation-inhibiting coating 3420 exhibits a relatively low probability of adhesion to the material of the conductive coating 3430, and thus the probability of the material nucleating on the surface 3422 is low, because the conductive coating The layer 3430 grows to a thickness, so the coating 3430 can also grow laterally as described in FIG. 38 and cover a portion of the nucleation inhibiting coating 3420.

Although details regarding the device and certain features of the conductive coating 3430 are omitted in the above description of the embodiments of FIGS. 36-38, it should be understood that in FIGS. , the second part 3434 and the related description of the third part 3436 can be applied to these embodiments in the same way.

It should be understood that, although not explicitly described, there may also be some degree of The material used to form the nucleation inhibiting coating 3420. This material may be deposited due to shadowing effects, where the deposited pattern does not match the pattern of the mask, and may result in some of the evaporated material being deposited on the masked portion of a target surface. For example, the material can form islands or discrete clusters, or a thin film having a thickness that is substantially less than the average thickness of the nucleation-inhibiting coating 3420.

In some embodiments, the nucleation-inhibiting coating 3420 may be removed after the conductive coating 3430 is deposited, such that at least a portion of an underlying surface is covered by the nucleation-inhibiting coating 3420 in the embodiments of FIGS. 34-38 become exposed. For example, the nucleation-inhibiting coating can be selectively removed by etching or dissolving the nucleation-inhibiting coating 3420, or using plasma or solvent processing techniques, without substantially affecting or attacking the conductive coating 3430. Layer 3420.

The device of some embodiments may be an electronic device, and more specifically an optoelectronic device. Optoelectronic devices generally encompass any device capable of converting electrical signals into photons or vice versa. As such, an organic optoelectronic device may encompass any optoelectronic device in which one or more of the active layers of the device are formed primarily of an organic material, more specifically, an organic semiconductor material. Examples of organic optoelectronic devices include, but are not limited to, OLED devices and OPV devices.

It should also be understood that organic optoelectronic devices can be formed on various types of base substrates. For example, a base substrate can be a flexible or a rigid substrate. The base substrate may include, for example, silicon, glass, metal, polymer (eg, polyamide), sapphire, or other materials suitable for use as the base substrate.

It should also be understood that the various components of a device may be deposited using a wide variety of techniques, including vapor deposition, spin coating, wire coating, printing, and various other deposition techniques.

In some embodiments, an organic optoelectronic device is an OLED device, wherein the organic semiconductor layer includes an electroluminescent layer. In some embodiments, the organic semiconductor layer may include additional layers, such as an electron injection layer, an electron transport layer, a hole transport layer, and/or a hole injection layer. For example, the OLED device may be an AMOLED device, a PMOLED device, or an OLED lighting panel or module. Furthermore, the optoelectronic device may be part of an electronic device. For example, the optoelectronic device may be a computer device such as a smart phone, a tablet computer, a notebook computer, or an OLED display module of other electronic devices such as a monitor or a television.

39-41 illustrate various embodiments of an active matrix OLED (AMOLED) display device. For simplicity, various details and features of the conductive coating at or near the interface between the conductive coating and a nucleation inhibiting coating described above in FIGS. 34-38 are omitted. However, it should be understood that the features described in Figures 34-38 may also be applied to the embodiment of Figures 39-41.

FIG. 39 is a schematic diagram illustrating the structure of an AMOLED device 3802 according to an embodiment.

The device 3802 includes a base substrate 3810 and a buffer layer 3812 deposited on a surface of the base substrate 3810 . A thin film transistor (TFT) 3804 is then formed on the buffer layer 3812. More specifically, a semiconductor active region 3814 is formed on a portion of the buffer layer 3812, and a gate insulating layer 3816 is deposited so as to substantially cover the semiconductor active region 3814. Next, a gate 3818 is formed on top of the gate insulating layer 3816, and an interlayer insulating layer 3820 is deposited. A source electrode 3824 and a drain electrode 3822 are formed such that they extend through the opening formed by the interlayer insulating layer 3820 and the gate insulating layer 3816 to contact the semiconductor active layer 3814 . An insulating layer 3842 is then formed on the TFT 3804. A first electrode 3844 is then formed on a portion of the insulating layer 3842. As shown in FIG. 39 , the first electrode 3844 extends through an opening of the insulating layer 3842 such that it is in electrical communication with the drain 3822 . A pixel definition layer (PDL) 3846 is then formed to cover at least a portion of the first electrode 3844, including its outer edges. For example, the PDL 3846 may comprise an insulating organic or inorganic material. An organic layer 3848 is then deposited on the first electrode 3844, especially in the region between adjacent PDLs 3846. A second electrode 3850 is deposited to substantially cover both the organic layer 3848 and the PDL 3846. A nucleation promoting coating 3852 is then substantially covered on a surface of the second electrode 3850 . For example, the nucleation promoting coating 3852 can be deposited using an open mask or maskless deposition technique. A nucleation inhibiting coating 3854 is selectively deposited over the nucleation promoting coating 3852. For example, the nucleation inhibiting coating 3854 can be selectively deposited using a shadow mask. Accordingly, an auxiliary electrode 3856 is selectively deposited on the exposed surface of the nucleation promoting coating 3852 using an open mask or maskless deposition method. More specifically, thermal deposition of the auxiliary electrode 3856 (eg, comprising magnesium) is performed using an open mask or a mask to selectively deposit the auxiliary electrode 3856 on the exposed surface of the nucleation promoting coating 3852 while simultaneously A surface of the nucleation inhibiting coating 3854 is left substantially free of the material of the auxiliary electrode 3856.

40 illustrates the structure of an AMOLED device 3902 in which a nucleation-promoting coating has been omitted, according to another embodiment. For example, the nucleation-promoting coating may be omitted when a surface on which an auxiliary electrode is deposited has a relatively high probability of initial adhesion to the auxiliary electrode material. In other words, for surfaces with a relatively high probability of initial adhesion, the nucleation promoting coating can be omitted and a conductive coating can still be deposited thereon. For simplicity, some details of the backplane including the TFTs are omitted when describing the following embodiments.

In FIG. 40, an organic layer 3948 is deposited between a first electrode 3944 and a second electrode 3950. The organic layer 3948 may partially overlap with a portion of the PDL 3946 . A nucleation inhibiting coating 3954 is deposited on a portion of the second electrode 3950 (eg, corresponding to a light-emitting region), thereby providing a relatively low probability of initial adhesion to the material used to form an auxiliary electrode 3956 (eg, relatively low desorption energy) one of the surfaces. Accordingly, the auxiliary electrode 3956 is selectively deposited on the portion of the second electrode 3950 exposed from the nucleation inhibiting coating 3954. It will be appreciated that the auxiliary electrode 3956 is brought into electrical communication with the underlying second electrode 3950 in order to reduce the sheet resistance of the second electrode 3950. For example, the second electrode 3950 and the auxiliary electrode 3956 may comprise substantially the same material to ensure a high probability of initial adhesion to the material of the auxiliary electrode 3956 . Specifically, the second electrode 3950 may comprise substantially pure magnesium or an alloy of magnesium and other metals such as silver (Ag). For Mg:Ag alloys, the alloy composition can range from about 1:9 to about 9:1 (by volume). The auxiliary electrode 3956 may comprise substantially pure magnesium.

41 illustrates the structure of an AMOLED device 4002 according to yet another embodiment. In the illustrated embodiment, an organic layer 4048 is deposited between a first electrode 4044 and a second electrode 4050 such that it partially overlaps with a portion of the PDL 4046 . A nucleation-inhibiting coating 4054 is deposited to substantially cover a surface of the second electrode 4050, and a nucleation-promoting coating 4052 is selectively deposited on a portion of the nucleation-inhibiting coating 4054. An auxiliary electrode 4056 is then formed on the nucleation promoting coating 4052. Optionally, a capping layer 4058 can be deposited to cover the nucleation inhibiting coating 4054 and the exposed surface of the auxiliary electrode 4056.

Although the auxiliary electrode 3856 or 4056 is described as not in direct physical contact with the second electrode 3850 or 4050 in the embodiments of FIGS. 39 and 41, it should be understood that the auxiliary electrode 3856 or 4056 is in contact with the second electrode 3856 or 4056. The two electrodes 3850 or 4050 may still be in electrical communication. For example, the presence of a relatively thin film of nucleation promoting material or nucleation inhibiting material (eg, up to about 100 nm) between the auxiliary electrode 3856 or 4056 and the second electrode 3850 or 4050 is still sufficient to allow current to pass therethrough, and thus The sheet resistance of the second electrode 3850 or 4050 can be reduced.

42 illustrates the structure of an AMOLED device 4102 according to yet another embodiment, wherein an interface between a nucleation inhibiting coating 4154 and an auxiliary electrode 4156 is formed on a sloped surface of PDL 4146 fabrication. The device 4102 includes an organic layer 4148 deposited between a first electrode 4144 and a second electrode 4150, and the nucleation inhibiting coating 4154 deposited on a portion of the second electrode 4150 corresponding to the light emitting region of the device 4102 superior. The auxiliary electrode 4156 is deposited on the portion of the second electrode 4150 exposed from the nucleation inhibiting coating 4154.

Although not shown, the AMOLED device 4102 of FIG. 42 may additionally include a nucleation promoting coating deposited between the auxiliary electrode 4156 and the second electrode 4150. The nucleation-promoting coating can also be deposited between the nucleation-inhibiting coating 4154 and the second electrode 4150, especially if the nucleation-promoting coating is deposited using an open mask or maskless deposition method .

43 illustrates a portion of an AMOLED device 4300 according to yet another embodiment, wherein the AMOLED device 4300 includes a number of light-transmitting regions. As shown, the AMOLED device 4300 includes a plurality of pixels 4321 and an auxiliary electrode 4361 disposed between adjacent pixels 4321. Each pixel 4321 includes a sub-pixel area 4331 , which additionally includes several sub-pixels 4333 , 4335 , 4337 and a light-transmitting area 4351 . For example, the subpixel 4333 may correspond to a red subpixel, the subpixel 4335 may correspond to a green subpixel, and the subpixel 4337 may correspond to a blue subpixel. As will be explained, the light transmissive region 4351 is substantially transparent, allowing light to pass through the device 4300.

FIG. 44 illustrates a cross-sectional view taken along line A-A in the device 4300 as shown in FIG. 43 . Briefly, the device 4300 includes a base substrate 4310, a TFT 4308, an insulating layer 4342, and an anode 4344 formed on the insulating layer 4342 and in electrical communication with the TFT 4308. A first PDL 4346a and a second PDL 4346b are formed on the insulating layer 4342 and cover the edge of the anode 4344 . The deposition of one or more organic layers 4348 covers the exposed areas of the anode 4344 and portions of the PDLs 4346a, 4346b. A cathode 4350 is then deposited on the one or more organic layers 4348. Next, a nucleation-inhibiting coating 4354 is deposited to cover the portion of the device 4300 corresponding to the light-transmitting area 4351 and the sub-pixel area 4331 . The entire device surface is thus exposed to the flux of magnesium vapor, thus resulting in selective deposition of magnesium on uncoated areas of the cathode 4350. In this way, the auxiliary electrode 4361 is formed in electrical contact with the underlying cathode 4350.

In the device 4300, the light-transmitting region 4351 does not substantially contain any material that can substantially affect light transmission. In particular, the TFT 4308 , the anode 4344 and the auxiliary electrode 4361 are all disposed in the sub-pixel area 4331 so that these components do not attenuate or obstruct the transmission of light through the light-transmitting area 4351 . This configuration enables an inspector to inspect the device 4300 by looking into the device 4300 from a typical inspection distance when the pixels are off or not emitting light, thereby producing a transparent AMOLED display.

Although not shown, the AMOLED device 4300 in FIG. 44 may additionally include a nucleation promoting coating disposed between the auxiliary electrode 4361 and the cathode 4350. The nucleation-promoting coating can also be disposed between the nucleation-inhibiting coating 4354 and the cathode 4350.

In other embodiments, the various layers or coatings including the organic layer 4348 and the cathode 4350 may cover a portion of the light transmissive region 4351 provided that these layers or coatings are substantially transparent. If necessary, the PDLs 4346a, 4346b may be selectively not provided in the light-transmitting region 4351 .

It should be understood that pixel and sub-pixel arrangements other than those described in Figures 43 and 44 may also be used, and the auxiliary electrode 4361 may be provided in other regions of a pixel. For example, if necessary, the auxiliary electrode 4361 may be provided in the area between the sub-pixel area 4331 and the light-transmitting area 4351 and/or between adjacent sub-pixels.

In the aforementioned embodiments, a nucleation-inhibiting coating, in addition to inhibiting the nucleation and deposition of a conductive material (eg, magnesium) thereon, may also function to enhance the outcoupling of light from a device. Specifically, the nucleation inhibiting coating can function as an index matching coating and/or an antireflection coating.

A barrier coating (not shown) may be provided in order to encapsulate the device described in the previous embodiment, which depicts an AMOLED display device. It will be appreciated that such a barrier coating inhibits various oxidation-prone device layers, including organic layers and cathodes, from exposure to moisture and ambient air. For example, the barrier coating may be a thin film coating formed via printing, CVD, sputtering, ALD, a combination of any of the foregoing, or via any other suitable method. The barrier coating can also be provided by laminating a pre-formed barrier film to the device using an adhesive. For example, the barrier coating can be a multi-layer coating comprising organic materials, inorganic materials, or a combination of the two. In some embodiments, the barrier coating may additionally include a getter material and/or a desiccant.

The sheet resistance specification of the common electrode of an AMOLED display device can vary with the size of the display device (eg, panel size) and tolerance to voltage variations. In general, the larger the panel size and the lower the tolerance for voltage variation across the panel, the higher the sheet resistance specification (eg, a lower sheet resistance is specified).

Sheet resistance specifications and associated thicknesses of an auxiliary electrode that meet specifications in accordance with one embodiment are calculated for various panel sizes and plotted in FIG. 56 . The sheet resistance and the auxiliary electrode thickness were calculated for a voltage tolerance of 0.1V and 0.2V. Specifically, voltage tolerance means the difference in voltage supplied to pixels at the edge and center of a panel to compensate for the combined IR voltage drop of the transparent and auxiliary electrodes as described above. For calculation purposes, all display panel sizes are assumed to have a hole ratio of 0.64.

Specified thicknesses of auxiliary electrodes for sample panel sizes are summarized in Table 2 below. Table 2 - Specified Thickness of Auxiliary Electrodes for Various Panel Sizes Panel size (inch) 9.7 12.9 15.4 27 65 Specify Thickness (nm) @0.1 V 132 239 335 1100 6500 @0.2 V 67 117 174 516 2800

It will be appreciated that various layers and portions of a backplane, including a thin film transistor (TFT) (eg, TFT 3804 shown in Figure 39), can be fabricated using a wide variety of suitable materials and methods. For example, the TFT can be fabricated using organic or inorganic materials, deposited and/or processed by techniques such as CVD, PECVD, laser annealing, and PVD (including sputtering). It will be appreciated that these layers can be patterned using photolithography, which uses a photomask to expose selected portions of the photoresist covering underlying device layers to UV light. Depending on the type of photoresist used, exposed or unexposed portions of the photomask are washed away to expose the desired portions of the underlying device layers. A patterned surface is then chemically or physically etched to effectively remove exposed portions of the device layers.

Furthermore, although top-gate TFTs are described in some of the above embodiments, it should be understood that other TFT structures may also be used. For example, the TFT may be a bottom gate TFT. The TFT may be an n-type TFT or a p-type TFT. Examples of TFT structures include those utilizing amorphous silicon (a-Si), indium gallium zinc oxide (IGZO), and low temperature polysilicon (LTPS).

Various layers and portions of a front plate, including electrodes, one or more organic layers, a pixel definition layer, and a capping layer, may be deposited using any suitable deposition method, including thermal evaporation and/or printing. It will be appreciated that, for example, when depositing these materials, shadow masks may be used as appropriate to create the desired patterns, and that various etching and selective deposition methods may also be used to pattern the various layers. Examples of such methods include, but are not limited to, photolithography, printing (including ink jet or vapor jet printing or roll-to-roll printing), OVPD, and LITI patterning.

Although some of the above embodiments have been described with respect to selectively depositing a conductive coating to form a cathode or auxiliary electrode of a common cathode, it should be understood that in other embodiments, similar materials and methods may be used to form the auxiliary electrode. Anode or auxiliary electrode of anode. example

Aspects of some embodiments will be illustrated and described herein with reference to the following examples, which are not intended to limit the scope of the invention in any way.

As used in this example, reference to the layer thickness of a material means the amount of the material deposited on a target surface (or target area of the surface in the case of selective deposition), corresponding to covering the The target surface is the amount of the material required to form a layer of material of uniform thickness with the mentioned layer thickness. For example, depositing a layer of thickness 10 nm means that the amount of material deposited on the surface corresponds to the amount of material required to form a layer of material of uniform thickness of 10 nm. It will be appreciated that the actual thickness of the deposited material may be non-uniform, eg, due to possible stacking or clustering of molecules or atoms. For example, depositing a layer with a thickness of 10 nm may result in some portions of the deposited material having an actual thickness of greater than 10 nm, or other portions of the deposited material having an actual thickness of less than 10 nm. The thickness of a layer deposited on a surface corresponds to the average thickness of the deposited material over the entire surface.

Molecular structures of some of the materials used in the illustrative examples are provided below.

Example 1

To characterize the interface between a nucleation-inhibiting coating and an adjacent magnesium coating, a series of samples of the nucleation-inhibiting coating and the magnesium coating with different layer thicknesses were prepared and analyzed. Samples were fabricated using stainless steel shadow masks in a high vacuum deposition system with a cryopump processing chamber and a turbomolecular pump load lock chamber. Materials were thermally deposited from Knudsen vessels (K vessels) and deposition rates were monitored using quartz crystal microbalances (QCMs). During deposition, the base pressure of the system is less than about ^10-5 Pa and the _H2O partial pressure is less than about ^10-8 Torr. Magnesium was deposited at a source temperature of 430-570°C at a deposition rate of about 1-5Å/sec. SEM micrographs were taken using a Hitachi S-5200.

The samples were first prepared by depositing about 30 nm of silver on a silicon substrate using thermal deposition. A nucleation inhibiting coating is then deposited selectively on an area of the silver surface using a shadow mask. 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ) was used in all samples to form the nucleation-inhibiting coating. Once the nucleation inhibiting coating was deposited, substantially pure magnesium (about 99.99% pure) was deposited using open mask deposition. More specifically, during the open-mask deposition, both the exposed silver surface and the nucleation-inhibiting coating surface were treated with evaporating magnesium flux. The layer thicknesses and associated deposition rates of the nucleation inhibiting coatings are summarized in Table 3 below. All depositions were performed under vacuum (about 10" ⁴ to about 10" ⁶ Pa) and the layer thickness and deposition rate were monitored using a calibrated quartz crystal microbalance (QCM). Table 3-TAZ and magnesium thickness and deposition rate sample number Thickness of TAZ (nm) Thickness of Mg (nm) TAZ deposition rate (Å/s) Mg deposition rate (Å/s) Sample 1 10 1160 0.2 2 Sample 2 100 500 0.7 2

The samples were analyzed using Scanning Electron Microscopy (SEM) and Energy Dispersive X-ray Spectroscopy (EDX).

FIG. 45A is a top view SEM image of sample 1. FIG. The first area 4501 of the image corresponds to the area on top of the exposed silver surface where magnesium has been deposited, and the second area 4503 corresponds to the area covered by the nucleation inhibiting coating (TAZ). Figures 45B and 45C show enlarged top views of a portion of Sample 1 shown in Figure 45A. According to EDX elemental analysis, the presence of magnesium was largely undetectable on this second region 4503. However, the formation of magnesium-containing islands or clusters 4505 was observed (see Figure 45A), and the presence of magnesium in these islands 4503 was confirmed according to EDX elemental analysis.

Figures 45D and 45E are SEM cross-sectional images of sample 1 showing the interface between the magnesium coating (region 4501) and the nucleation inhibiting coating (region 4503). The underlying substrate 4510 can also be seen in these images.

Figures 45F and 45G are additional SEM cross-sectional images of Sample 1, taken from a different portion of the sample than Figures 45D and 45E.

As can be seen in Figures 45D-45G, the magnesium coating (region 4501 ) includes extending laterally to the nucleation-inhibiting coating (region 4501) in the region of partial overlap near the interface of the magnesium coating and the nucleation-inhibiting coating 4503) above. Specifically, it can be seen that the portion of the magnesium coating forms an overhang that is not in direct contact with the surface of the nucleation-inhibiting coating, thus creating an overhang at the interface between the magnesium coating and the nucleation-inhibiting coating gap.

FIG. 45H shows EDX spectra of the first region 4501 and the second region 4503 taken from sample 1 . As can be seen from the graph of Figure 45H, a peak corresponding to magnesium is clearly observed in the spectrum taken from the first region 4501, whereas no significant peak is detected in the spectrum taken from the second region 4503. EDX measurements were taken at 5 keV over a sample area of about 2 μm ² .

FIG. 46A is a top-view SEM image of sample 2. FIG. A first region 4601 of the image corresponds to the region on top of the exposed silver surface where magnesium has been deposited, and a second region 4603 corresponds to the region covered by the nucleation inhibiting coating (TAZ). Fig. 46B shows a magnified image of a portion of Fig. 46A, and Fig. 46C shows a magnified image of a portion of Fig. 46B again. The images of Figures 46D, 46E, and 46F show a cross-section of the sample, which also shows the substrate 4610. As can be seen in the images of Figures 46B-F, a relatively thin film or layer 4607 of magnesium is deposited near the interface between the magnesium coating (region 4601) and the TAZ coating (region 4603). The presence of magnesium in the film 4607 was confirmed by EDX measurement. Also, the formation of magnesium-containing islands or clusters 4605 was observed (see Figure 46A).

46G shows EDX spectra taken from the first region 4601 and the second region 4603 of sample 2. As can be seen from the graph of FIG. 46G, a peak corresponding to magnesium was observed in the spectrum taken from the first region 4601, while no significant peak was detected in the spectrum taken from the second region 4603. The EDX measurements were taken at 5 keV over a sample area of about 2 μm ² .

Figure 46H shows a linear EDX scan of the magnesium spectrum taken along the scan line of sample 2. The EDX spectrum is overlaid on the SEM image showing the corresponding portion of the EDX spectrum obtained from the sample. It can be seen that the intensity of the magnesium spectrum begins to decrease at about 1.7 μm from the interface between the first region 4601 and the thin film 4607 . This observation is consistent with that of a cross-section of the sample (eg, 46D), which shows a large or gradual decrease in the thickness of the magnesium coating near the interface.

Example 2

To measure the properties of various materials used as nucleation inhibiting or nucleation promoting coatings, a series of experiments were performed using quartz crystal microbalances (QCMs).

It will be appreciated that QCM can be used to monitor the rate of deposition during thin film deposition. Briefly, this monitoring is performed by measuring the change in the frequency of the quartz crystal resonator caused by the addition or removal of a material on the surface of the resonator.

Figure 47 is a schematic diagram illustrating the experimental setup used to measure the deposition profile of magnesium on the surface of QCMs. As shown, an evaporation chamber 4701 includes a first evaporation source 4710 and a second evaporation source 4712. A pair of QCMs 4731 and 4741 are placed inside the chamber 4701 with each resonator surface of the QCMs 4731 and 4741 facing the sources 4710 and 4712. A sample shutter 4721 and a source shutter 4725 are disposed between the QCMs 4731 and 4741 and the evaporation sources 4710 and 4712. The sample shutter 4721 and the source shutter 4725 are movable and are used to control the flux of vapor incident on QCMs 4731 and 4741 and the flux of vapor leaving the sources 4710 and 4712, respectively.

In this illustrative example setup, magnesium on the first QCM 4731 (which may also be referred to herein as a "reference QCM", as a baseline) and the second QCM 4741 (which may also be referred to herein as a "sample QCM") are compared depositional profile. In each experiment, an optically polished quartz crystal obtained from LapTech Precision Inc. (part number: XL1252; frequency: 6.000MHz; AT1; center: 5.985MHz; diameter: 13.97mm±3mm; optically polished) was used as the reference QCM and this sample QCM.

Each experiment was performed as follows. First, as shown in FIG. 47, the reference QCM 4731 and the sample QCM 4741 are placed inside the evaporation chamber 4701. The chamber 4701 is then evacuated until the pressure of the chamber is below about 10-5Pa. The sample shutter 4721 is then activated so that the resonator surfaces of both the reference QCM 4731 and the sample QCM 4741 are masked. The first evaporation source 4710 is then turned on to begin evaporating a nucleation promoting or inhibiting material (also referred to herein as "nucleation modifying material"). Once a steady evaporation rate is reached, the sample shutter 4721 is moved so that the resonator surface of the sample QCM 4741 becomes exposed to the vapor flux, while leaving the surface of the reference QCM 4731 unexposed, thus allowing the nucleating modifier material deposited on the surface of the sample QCM 4741. When the desired layer thickness of nucleating modifier material is deposited on the surface of the sample QCM 4741, the source shutter 4725 is activated, blocking the vapor flux exiting the first source 4710, preventing further deposition. The first source 4710 is then turned off.

Next, the second evaporation source 4712 is turned on to start the evaporation of magnesium. The QCMs 4731 and 4741 were covered with the shutter 4721 until a stable deposition rate was reached. Once a steady deposition rate was reached, the shutter 4721 was activated to expose both the modified surface of the sample QCM 4741 and the surface of the reference QCM 4731, allowing magnesium vapor to be incident on the surfaces of both QCMs 4731 and 4741. The resonant frequencies of the QCMs 4731 and 4741 were monitored and determined from the magnesium deposition profile on each of the QCMs 4731 and 4741.

Various nucleation-modifying materials, including those that can be used to form a nucleation-suppressing coating, were deposited on the resonator surface of the sample QCM 4741, upon which a nucleation-modifying coating was formed. Using the chamber configuration shown in FIG. 47, the above experimental procedure was repeated for each nucleation modification material to analyze the deposition rate of magnesium on various surfaces. The following materials were used to form a nucleating modified coating: 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ); aluminum ( III) Bis(2-methyl-8-quinoline)-4-phenylphenate (BAlq); 2-(4-(9,10-bis(naphthalen-2-yl)anthracene-2-yl)benzene yl)-1-phenyl-1H-benzo-[D]imidazole (LG201); lithium 8-hydroxyquinolate (Liq); and N(biphenyl-4-yl)9,9-dimethyl-N -(4(9-phenyl-9H-carbazol-3-yl)phenyl)-9H-fluorene-2-amide (HT211).

Figure 57 is a graph showing the layer thickness of magnesium deposited on the surface of the reference QCM (reference layer thickness, or "deposited thickness" as labeled in Figure 57) versus the layer thickness of magnesium deposited on the surface of the sample QCM (sample layer thickness , or the log-log graph of "Average Film Thickness" as labeled in Figure 57). In each case, the reference QCM surface was pre-coated with substantially pure silver prior to conducting the experiments.

From the graph of Figure 57, the layer thickness of magnesium deposited on both the QCM surfaces can be determined, and therefore the rate of magnesium deposition resulting from exposing the surface to the same flux of magnesium vapor. In particular, during the formation of a relatively thin Mg layer on the surface of the sample QCM (ie, during the initial phase of the deposition layer thickness of 1 nm or 10 nm), by comparing the deposition of Mg on the surface of the sample QCM with that of the reference QCM rate, which determines the nucleation-inhibiting properties of the coating present on the surface of the sample QCM. For ease of discussion, the layer thickness of magnesium deposited on the surface of the sample QCM will be referred to as the sample layer thickness, and the layer thickness of magnesium deposited on the surface of the reference QCM will be referred to as the reference layer thickness.

In certain embodiment aspects, reference layer thicknesses corresponding to sample layer thicknesses of 1 nm and 10 nm are summarized in Table 4 below for various samples. Specifically, the reference layer thicknesses provided in Table 4 correspond to the magnesium deposited on the surface of the reference QCM in the same time required to deposit a layer thickness of 1 nm or 10 nm on the surface of the sample QCM for each sample layer thickness. The organic material was deposited at a deposition rate of about 1 Å/sec at a vacuum pressure of about ^10-5 Pa. Magnesium was deposited at a deposition rate of about 2 Å/sec at a source temperature of about 520-530°C and a vacuum pressure of about 10 ^-5 Pa. Table 4 - Summary of the results for this sample layer thickness and the corresponding reference layer thickness Nucleation and modification materials Thickness of Mg on the surface of the sample QCM (nm) Thickness (nm) of Mg on the surface of the reference QCM TAZ 1 2158 BAlq 1 104 LG201 1 31 Liq 1 62 HT211 1 33

From the above, it can be seen that when the thickness of the sample layer reaches 1 nm, the thickness of the deposited reference layer varies substantially with the nucleation and modification material covering the surface of the sample QCM. In this example, 1 nm was chosen as the sample layer thickness threshold for determining the relative deposition rate during the initial phase of thin film formation on the surface of the sample QCM. It was observed that since the reference QCM surface was pre-coated with silver, the deposition rate of magnesium on the reference QCM surface remained relatively constant.

In coating the sample QCM with TAZ, a relatively thick magnesium coating of over 2000 nm was deposited on the reference QCM before the sample layer thickness reached 1 nm. In coating the sample QCM with BAlq, a reference layer thickness of 104 nm was deposited before the sample layer thickness reached 1 nm. However, in coating the sample QCM with LG201, Liq or HT211, a relatively thin magnesium coating with a layer thickness of less than 62 nm was deposited on the reference QCM before the threshold thickness was reached.

It will be appreciated that higher selectivities are generally achievable using nucleating modified coatings that exhibit relatively high reference layer thicknesses and thus relatively low initial deposition rates and adhesion probability during deposition of conductive coatings. For example, a nucleation-modifying coating exhibiting a high reference layer thickness can be an effective nucleation-inhibiting coating, and can be used to cover an area of a target surface such that when the target surface is exposed to a flux of magnesium vapor, magnesium Selectively deposited on uncovered areas of the target surface while the surface of the nucleation-inhibiting coating remains substantially free or substantially uncovered by magnesium. For example, a nucleation-modifying coating that exhibits a reference layer thickness of at least or greater than about 80 nm at a threshold sample layer thickness of 1 nm can be used as a nucleation-inhibiting coating. For example, exhibit a reference layer thickness of at least or greater than about 100 nm, at least or greater than about 200 nm, at least or greater than about 500 nm, at least or greater than about 700 nm, at least or greater than about 1000 nm, at least or greater than about 1500 nm, at least or greater than about 1500 nm, at least or greater than about 1000 nm, at a threshold thickness of 1 nm A nucleation modifying coating greater than about 1700 nm, or at least or greater than about 2000 nm, can be used as a nucleation inhibiting coating. In other words, the initial deposition rate of magnesium on the reference surface may be at least or greater than about 80 times, at least or greater than about 100 times, at least or greater than the initial deposition rate of magnesium on the nucleation inhibiting coating About 200 times, at least or more than about 500 times, at least or more than about 700 times, at least or more than about 1000 times, at least or more than about 1500 times, at least or more than about 1700 times, or at least or more than about 2000 times.

Figure 58 is a log-log graph of the adhesion probability of magnesium vapor on the surface of the sample QCM versus the layer thickness of magnesium on the surface of the sample QCM.

其中 N _ads 是被併入該樣本QCM表面上之鎂塗層之吸附單體的數目，而 N _total 是撞擊該表面之單體的總數目，其是依據監控在該參考QCM上鎂的沈積所決定的。 The sticking probability is derived according to the following equation:

where Nas is the number of adsorbed monomers incorporated into the magnesium coating on the surface of the sample QCM, and _Ntotal is the _total number of monomers impinging on the surface, based on monitoring the deposition of magnesium on the reference QCM. decided.

As can be seen from the graph of Figure 58, as more magnesium is deposited on the surface, the probability of sticking generally increases. For the purpose of selectively depositing magnesium coatings, it is desirable to use nucleation inhibiting coatings that exhibit a relatively low probability of initial adhesion (eg, low probability of adhesion during the initial deposition phase). More specifically, the initial adhesion probability for this example means that the amount of deposited magnesium corresponds to the adhesion probability measured when a close-packed magnesium layer with an average thickness of 1 nm is formed on the surface of a nucleation-inhibiting coating. The adhesion probabilities measured when depositing 1 nm layer thickness of magnesium on various nucleation inhibiting coating surfaces are summarized in Table 5 below. Table 5 - Summary of Adhesion Probability Results Nucleation inhibiting material Adhesion probability when depositing 1 nm of Mg TAZ < 0.001 BAlq 0.013 LG201 0.042 Liq 0.045 HT211 0.064

According to these embodiments, a coating that exhibits an initial adhesion probability to magnesium vapor of no greater or less than about 0.03 (or 3%) can serve as a nucleation inhibiting coating. It will be appreciated that in some applications, such as achieving deposition of relatively thick magnesium coatings, a nucleation inhibiting coating with a lower probability of initial adhesion may be more desirable. For example, the initial adhesion probability is no greater than or less than about 0.02, no greater than or less than about 0.01, no greater than or less than about 0.08, no greater than or less than about 0.005, no greater than or less than about 0.003, no greater than or less than about 0.001, no greater than Or a coating of less than about 0.0008, no greater than or less than about 0.0005, or no greater than or less than about 0.0001 can be used as a nucleation inhibiting coating. For example, the nucleation inhibiting coating may include those formed by depositing BAlq and/or TAZ.

Example 3

To characterize the correlation between the lateral growth of the magnesium coating near the interface of adjacent coatings and the vertical growth of the magnesium coating, a system was prepared with samples of various magnesium and TAZ layer thicknesses.

The sample was prepared by first depositing about 30 nm of silver on a silicon substrate using thermal deposition. A shadow mask is then used to selectively deposit a nucleation inhibiting coating on areas of the silver surface. In all samples, 3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole (TAZ) was used to form the nucleation-inhibiting coating . Once the nucleation-inhibiting coating is deposited, substantially pure magnesium (about 99.99% purity) is deposited using an open-mask deposition method such that both the exposed silver surface and the nucleation-inhibiting coating surface during the open-mask deposition, Both were subjected to a flux of evaporating magnesium. All depositions were performed under vacuum (about 10" ⁴ to about 10" ⁶ Pa). Magnesium was deposited at a rate of about 2 Å/s.

Figure 49 is a schematic diagram illustrating the prepared sample. As shown, portions 4901 and 4903 of the nucleation inhibiting coating are selectively deposited on areas of the silver surface, while the magnesium coating 4907 is deposited between portions 4901 and 4903. For ease of discussion, the silicon substrate and the silver layer are omitted from FIG. 49 . The lateral distance of the exposed silver surface between the portions 4901 and 4903 of the nucleation inhibiting coating is shown as d , and the width of the magnesium coating 4907 is shown as d + Δd . In this way, the width of the magnesium coating 4907 minus the lateral distance of the exposed silver surface can determine the lateral growth distance of the magnesium coating 4907. A top-view SEM image analysis of this sample was performed to measure both d and d + Δd . During the deposition process, the magnesium layer thickness, h , was monitored using a quartz crystal microbalance (QCM).

 (µm)  (TAZ 10nm)

 (µm)  (TAZ 100nm) 0.25 ＜ 0.5 ＜ 0.5 0.75 2.5 ＜ 0.5 1.5 3.5 - The measured lateral growth distances ( Δd ) for samples with various magnesium layer thicknesses ( h ) and nucleation inhibitor layer thicknesses are summarized in Table 6 below. The measurement accuracy of Δd is about 0.5 μm. Table 6 - Lateral growth distance of Mg for various Mg and TAZ layer thicknesses h (µm)

(µm) (TAZ 10nm)

(µm) (TAZ 100nm) 0.25 < 0.5 < 0.5 0.75 2.5 < 0.5 1.5 3.5 -

From the above results it can be observed that no detectable amount of lateral growth was observed in samples made with relatively thick TAZ coatings. Specifically, no lateral growth was detected in the samples prepared with the 100 nm TAZ nucleation inhibiting coating and the 0.25 μm and 0.75 μm magnesium coatings.

For the samples made with the relatively thin (10 nm layer thickness) TAZ coating, no lateral growth was detected in the samples with the 0.25 μm thick magnesium coating. However, in samples made with thicker magnesium coatings, lateral growth of magnesium was observed. Specifically, samples prepared with a 10 nm thick TAZ nucleation inhibitor coating and a 0.75 μm thick magnesium coating exhibited about 2.5 μm lateral magnesium growth, while the 10 nm thick TAZ nucleation inhibitor coating and 1.5 μm thick Samples made with thick magnesium coatings exhibited lateral growth of about 3.5 μm.

Example 4

Samples were prepared using another nucleation inhibiting coating comprising BAlq.

Specifically, the sample was prepared according to the following structure: Si-based substrate/LG201 (40nm)/Mg:Ag (20nm)/BAlq (500nm)/Mg (300nm). Specifically, about 40 nm of 2-(4-(9,10-bis(naphthalen-2-yl)anthracene-2-yl)phenyl)-1-phenyl-1H-benzo - [D]imidazole (LG201) followed by deposition of about 20 nm of Mg:Ag (including Mg:Ag volume ratio of about 1:9). A nucleation-inhibiting coating in the form of aluminum(III) bis(2-methyl-8-quinoline)-4-phenylphenate (BAlq) is then selectively deposited on the area of the Mg:Ag surface at about 500 nm . Once the nucleation-inhibiting coating was deposited, substantially pure magnesium (about 99.99% pure) was deposited using open-mask deposition such that both an exposed Mg:Ag surface and a nucleation-inhibiting coating surface were in the opening Both were subjected to evaporative magnesium flux during mask deposition. All depositions were performed under vacuum (about 10" ₄ to about 10" ⁶ Pa). The magnesium coating was deposited at a rate of about 3.5 Å/s.

Figure 50A is a top view SEM image of a sample made with a BAlq nucleation inhibiting coating. A first region 5003 corresponds to the region where the BAlq coating is present, so no significant amount of magnesium is deposited, and a second region 5001 corresponds to the region where magnesium is deposited. Figures 50C and 50D show enlarged views of regions 5007 and 5005, respectively. FIG. 50B shows an enlarged view of the interface between the first area 5003 and the second area 5001 .

As can be seen in Figure 50B, some islands 5011 are formed near the interface. Specifically, the islands 5011 are typically discrete magnesium-containing clusters formed on the surface of the nucleation-inhibiting coating. For example, it is speculated that the islands may include magnesium and/or magnesium oxide.

FIG. 50C shows an enlarged view of the region 5007 in FIG. 50A, which represents the area where a "substantial" magnesium coating is formed during the process. FIG. 50D shows an enlarged view of the area 5005 near the interface between the first area 5003 and the second area 5001 . It can be seen that the morphology of the magnesium coating near the interface is different from that of the bulk magnesium coating.

Figure 50E additionally shows a cross-sectional SEM image of the sample with the islands 5011 shown on the surface of the nucleation inhibiting coating.

Example 5 (Comparative Example A)

Comparative examples were prepared to characterize structures formed using materials that exhibited relatively poor nucleation-inhibiting properties (eg, a nucleation-inhibiting coating exhibited a relatively high initial adhesion coefficient to magnesium vapor).

The comparative sample was fabricated according to the following structure: Silicon base substrate/LG201 (40nm)/Mg:Ag (20nm)/HT211 (500nm)/Mg (300nm). Specifically, about 40 nm of 2-(4-(9,10-bis(naphthalen-2-yl)anthracene-2-yl)phenyl)-1-phenyl-1H-benzo - [D]imidazole (LG201) followed by deposition of about 20 nm of Mg:Ag (about 1:9 by volume). N(biphenyl-4-yl)9,9-dimethyl-N-(4(9-phenyl-9H-carbazole- The nucleation inhibiting coating in the form of 3-yl)phenyl)-9H-fluorene-2-amide (HT211). Once the nucleation-inhibiting coating has been deposited, substantially pure magnesium (about 99.99% pure) is deposited using open-mask deposition such that both an exposed Mg:Ag surface and a nucleation-inhibiting coating surface are obscured by the opening. Both were subjected to evaporative magnesium flux during deposition of the mask. All depositions were performed under vacuum (about 10" ⁴ to about 10" ⁶ Pa). The magnesium coating was deposited at a rate of about 3.5 Å/s.

Figure 51A shows a top-view SEM image of the comparative sample, where a first region 5103 corresponds to the region on which a nucleation-inhibiting coating in the form of HT211 is deposited, and a second region 5101 corresponds to the region where the magnesium coating is formed. As can be seen, a significant amount of magnesium can be clearly observed in this first region 5103.

Figure 51B shows a cross-sectional SEM image of the comparative sample. An approximate interface between the first area 5103 and the second area 5101 is indicated by a dotted line.

Example 6 (Comparative Example B)

Another comparative sample was prepared to determine the profile of a magnesium coating deposited on a surface using shadow masking techniques.

The comparative sample was fabricated by depositing a layer of about 30 nm of silver on top of a silicon wafer, followed by a shadow mask of about 800 nm of magnesium. Specifically, the shadow mask deposition method is configured to allow certain areas of the silver surface to be exposed to magnesium flux through a shadow mask aperture, while masking other areas of the silver surface. Magnesium was deposited at a rate of about 2 Å/s.

Figure 52A is a top view SEM image of the comparative sample. In Figure 52A, a dashed line is used to indicate the approximate interface. A first area 5203 corresponds to the masked area, and a second area 5201 corresponds to the exposed area on which the magnesium coating is deposited.

Figure 52B is a cross-sectional SEM image of the comparative sample. As can be seen in Figure 52B, the magnesium coating deposited on the second region 5201 includes a relatively long (about 6 [mu]m) tapered or tail portion 5214, where the thickness of the portion 5214 is greatly reduced.

Range 7 (Comparative Example C)

To characterize the effect of deposition rate on the nucleation inhibiting properties of nucleation inhibiting coatings including HT211, a series of comparative samples with various HT211 layer thicknesses were produced.

Specifically, the samples were fabricated by depositing HT211 with a thickness of about 10 nm on the entire surface of a glass substrate, followed by the deposition of magnesium through an open mask. Various evaporation rates were used to deposit the magnesium coating; however, in preparing each sample, the deposition time was adjusted to obtain a reference layer thickness of magnesium of about 100 nm or about 1000 nm.

A reference layer thickness is used in this example to mean the layer thickness of magnesium deposited on a reference surface exhibiting a high initial adhesion coefficient (eg, a surface with an initial adhesion coefficient of about or close to 1.0). For example, the reference surface may be the surface of a QCM placed inside the deposition chamber for the purpose of monitoring deposition rate and thickness of the reference layer. In other words, the reference layer thickness does not refer to the actual thickness deposited on a target surface (eg, a surface of the nucleation inhibiting coating), but refers to the layer thickness of magnesium deposited on the reference surface.

Figure 53 shows a graph of transmittance versus wavelength for various samples using various deposition rate regimes and associated reference layer thicknesses. From the transmittance data, it can be seen that samples with a relatively low magnesium reference layer thickness of about 100 nm, which are deposited at a deposition rate of about 0.2 Å/s, exhibit the highest transmittance. However, when samples with substantially the same reference layer thickness were deposited at a higher deposition rate of 2 Å/s, the transmittance of the entire measured spectrum was lower. The lowest transmittance was detected in samples that deposited a relatively high magnesium reference layer thickness of about 1000 nm using a relatively high rate of about 2 Å/s.

It is speculated that the reduction in transmittance observed in the blue region of the spectrum (approximately 400-475 nm) for all three samples may be due to absorption by magnesium oxide, which can occur in samples oxidized by deposited magnesium .

Example 8

To characterize the effect of using various materials to form a nucleation-inhibiting coating, a series of samples were prepared using different materials to form the nucleation-inhibiting coating.

The samples were prepared by depositing the nucleation-inhibiting coating in a layer thickness of about 10 nm on top of a glass substrate surface. The sample was then subjected to open mask deposition of magnesium. Magnesium was deposited at a rate of about 2 Å/s for each sample until the reference layer thickness reached about 1000 nm.

Figure 54 is a graph of transmittance versus wavelength for samples made with various materials. It can be seen that the samples made with TAZ exhibited the highest transmission, followed by BAlq. It was found that both samples made with HT211 and Liq exhibited substantially lower transmittance compared to the samples made with TAZ and BAlq due to the deposition of higher amounts of magnesium on the surfaces of HT211 and Liq.

Example 9

A series of samples were prepared to evaluate the effect of providing an auxiliary electrode according to an exemplary embodiment.

A first reference sample was fabricated by depositing a layer of Mg:Ag on the surface of a substrate, replicating a typical common cathode used in a top-emitting AMOLED display device.

A second reference sample is prepared by selectively depositing an auxiliary electrode in the form of a repeating grid on top of a non-conductive substrate surface. The pattern of the auxiliary electrode is shown in FIG. 55 . Specifically, the auxiliary electrode 5501 includes a plurality of holes 5505 formed thereon, such that if the auxiliary electrode 5501 were fabricated on an AMOLED device, each hole 5505 would substantially correspond to a light-emitting region of the device (eg, , pixel or sub-pixel), the auxiliary electrode 5501 is deposited on a non-light-emitting area (eg, the area between pixels or between sub-pixels). The average width or size of each hole 5505 is about 70 μm, and the width of each strip or segment of the auxiliary electrode 5501 is about 15-18 μm. The auxiliary electrode 5501 is formed using substantially pure magnesium (about 99.99% purity).

An evaluation sample was prepared by depositing an auxiliary electrode on top of the Mg:Ag layer of the first reference sample (under the conditions used for the second reference sample). Specifically, a shadow mask was used to selectively deposit a nucleation-inhibiting coating on top of the Mg:Ag layer, and the resulting patterned surface was then exposed to magnesium vapor for selective deposition of the magnesium assist electrodes, resulting in a pattern similar to that shown in Figure 55.

The sheet resistance of this sample was measured, and the results of the measurements are summarized in Table 7 below. Table 7 - Sheet Resistance Measurements first reference sample second reference sample Evaluation sample Chip resistance (ohm/sq) 22.3 0.13 0.1

As shown in the table above, the first reference sample (Mg:Ag layer) was found to exhibit a relatively high sheet resistance of about 22.3Ω/sq. The second reference sample and the evaluation sample were found to have substantially lower sheet resistances of about 0.13 Ω/sq and about 0.1 Ω/sq, respectively. Accordingly, by providing an auxiliary electrode as in this example embodiment in electrical communication with a thin film conductor (eg, a common cathode), it has been demonstrated that the sheet resistance of the thin film conductor can be substantially reduced.

The terms "substantially," "substantially," "approximately," and "about" are used herein to denote and account for small variations. When used in conjunction with an event or circumstance, the term can refer to both the exact occurrence of the event or circumstance and the approximation of the occurrence of the event or circumstance. For example, when used in conjunction with a numerical value, the term can mean that the range of variation is less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, Less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%.

In descriptions of some embodiments, an element provided "on" or "over" another element, or "overlying" or "overlying" another element, may encompass the front element directly over the rear element (eg, physical contact), and one or more intervening components are located between the front component and the rear component.

Furthermore, amounts, ratios, and other values are sometimes presented herein in a range format. It should be understood that this range format is used for convenience and brevity, and is understood to be flexible to include not only the numerical values of the explicitly specified range limits, but also all individual values or subranges subsumed within that range. , as if the values and subranges were specified explicitly.

From the above discussion, it will be appreciated that the present invention may be embodied in a variety of specific examples, including but not limited to the following:

Specific Example 1: An optoelectronic device comprising: a base material; a nucleation inhibiting coating covering a first region of the substrate; and a conductive coating comprising a first portion and a second portion, the first portion of the conductive coating covering a second region of the substrate, the second portion of the conductive coating and the nucleation inhibiting coating partially overlapping, Wherein the second portion of the conductive coating and the nucleation inhibiting coating are separated by a gap.

Embodiment 2: The optoelectronic device of Embodiment 1, wherein the second portion of the conductive coating extends over an overlapping portion of the nucleation-inhibiting coating, and the overlapping portion of the nucleation-inhibiting coating is separated by a gap.

Embodiment 3: The optoelectronic device of Embodiment 2, wherein another portion of the nucleation-inhibiting coating is exposed from the conductive coating.

Embodiment 4: The optoelectronic device of Embodiment 1, wherein the conductive coating additionally includes a third portion in contact with the nucleation-inhibiting coating, and the thickness of the third portion of the conductive coating is not greater than that of the conductive coating 5% of the thickness of this first portion of the layer.

Embodiment 5: The optoelectronic device of Embodiment 4, wherein the second portion of the conductive coating extends over the third portion of the conductive coating and is spaced apart from the third portion of the conductive coating.

Embodiment 6: The optoelectronic device of Embodiment 1, wherein the conductive coating further includes a third portion disposed between the first portion of the conductive coating and the second portion of the conductive coating, and the conductive coating The third portion of the coating is in contact with the nucleation inhibiting coating.

Embodiment 7: The optoelectronic device of Embodiment 1, wherein the conductive coating additionally includes a third portion in contact with the nucleation-inhibiting coating, and the third portion of the conductive coating is included in the nucleation-inhibiting coating Discontinuous clusters on the surface of one of the layers.

Embodiment 8: The optoelectronic device of Embodiment 1, wherein the conductive coating comprises magnesium.

Specific Example 9: The optoelectronic device of Specific Example 1, wherein the nucleation-inhibiting coating is characterized in that the material of the conductive coating has an initial adhesion probability not greater than 0.02.

Embodiment 10: The optoelectronic device of Embodiment 1, wherein the nucleation-inhibiting coating includes organic molecules, each including a core moiety and a terminal moiety bonded to the core moiety, and the terminal moiety includes a biphenyl moiety, Phenyl moiety, fluorene moiety or phenylene moiety.

Embodiment 11: The optoelectronic device of Embodiment 10, wherein the core moiety includes a heterocyclic moiety.

Embodiment 12: The optoelectronic device of Embodiment 1, wherein the nucleation-inhibiting coating includes organic molecules, each of the organic molecules includes a core moiety and a plurality of terminal moieties bonded to the core moiety, the plurality of terminal moieties One of the first terminal moieties includes a biphenyl moiety, a phenyl moiety, a fluorene moiety or a phenylene moiety, and each of the remaining terminal moieties of the plurality of terminal moieties has a molecular weight not greater than twice the molecular weight of the first terminal moiety molecular weight.

Embodiment 13: The optoelectronic device of Embodiment 1, further comprising a nucleation promoting coating disposed between the first portion of the conductive coating and the second region of the substrate.

Embodiment 14: The optoelectronic device of Embodiment 13, wherein the nucleation-promoting coating comprises fullerene.

Example 15: The optoelectronic device of Example 1, wherein the substrate comprises a backplane and a frontplane disposed on the backplane.

Embodiment 16: The optoelectronic device of Embodiment 15, wherein the back plate includes a transistor, and the front plate includes an electrode electrically connected to the transistor, and at least one organic layer disposed on the electrode.

Embodiment 17: The optoelectronic device of Embodiment 16, wherein the electrode is a first electrode, and the front plate further includes a second electrode disposed on the organic layer.

Specific Example 18: An optoelectronic device comprising: a substrate including a first region and a second region; and a conductive coating comprising a first part and a second part, the first part of the conductive coating covers the second region of the substrate, and the second part of the conductive coating and the one of the first regions partially overlaps, Wherein the second portion of the conductive coating and the first region of the substrate are separated by a gap.

Embodiment 19: The optoelectronic device of Embodiment 18, wherein the second portion of the conductive coating extends above the first region of the substrate and is separated from the first region of the substrate by a gap open.

Embodiment 20: The optoelectronic device of Embodiment 18, wherein another portion of the first region of the substrate is exposed from the conductive coating.

Embodiment 21: The optoelectronic device of Embodiment 18, wherein the ratio of the width of the second portion of the conductive coating to the thickness of the first portion of the conductive coating is in the range of 1:1 to 1:3.

Embodiment 22: The optoelectronic device of Embodiment 18, wherein the thickness of the first portion of the conductive coating is 500 nm or more.

Embodiment 23: The optoelectronic device of Embodiment 18, wherein the conductive coating comprises magnesium.

Example 24: The optoelectronic device of Example 18, further comprising a nucleation promoting coating between the first portion of the conductive coating and the second region of the substrate.

Embodiment 25: The optoelectronic device of Embodiment 24, wherein the nucleation-promoting coating comprises fullerenes.

Specific example 26: An optoelectronic device comprising: a base material; a nucleation inhibiting coating covering a first region of the substrate; and a conductive coating covering a laterally adjacent second region of the substrate, Wherein the conductive coating includes a conductive material, and the nucleation inhibiting coating is characterized by having an initial adhesion probability to the conductive material not greater than about 0.02.

Specific example 27: The optoelectronic device of specific example 26, wherein the initial adhesion probability to the conductive material is not greater than 0.01.

Embodiment 28: The optoelectronic device of Embodiment 26, wherein the nucleation-inhibiting coating comprises a polycyclic aromatic compound.

Embodiment 29: The optoelectronic device of Embodiment 26, wherein the nucleation inhibiting coating includes an organic compound, the organic compound includes a core moiety and a terminal moiety bonded to the core moiety, and the terminal moiety includes biphenyl base moiety, phenyl moiety, fluorene moiety or phenylene moiety.

Embodiment 30: The optoelectronic device of Embodiment 29, wherein the core moiety includes a heterocyclic moiety.

Embodiment 31: The optoelectronic device of Embodiment 26, wherein the nucleation-inhibiting coating includes an organic compound, the organic compound includes a core moiety and a plurality of terminal moieties bonded to the core moiety, and among the plurality of terminal moieties A first terminal moiety includes a biphenyl moiety, a phenyl moiety, a fluorene moiety or a phenylene moiety, and each remaining terminal moiety of the plurality of terminal moieties has a molecular weight not greater than twice the molecular weight of the first terminal moiety .

Embodiment 32: The optoelectronic device of Embodiment 26, wherein the conductive coating includes a first portion and a second portion, the first portion of the conductive coating covers the second region of the substrate, and the conductive coating The second portion partially overlaps the nucleation-inhibiting coating and is separated from the nucleation-inhibiting coating by a gap.

Embodiment 33: The optoelectronic device of Embodiment 26, wherein the conductive material includes magnesium.

Example 34: The optoelectronic device of Example 1, 18 or 26, wherein the optoelectronic device is an organic light emitting diode (OLED) device.

Example 35: The optoelectronic device of Example 34, wherein the OLED device is an active matrix OLED device, a passive matrix OLED device or an OLED lighting panel.

Example 36: The optoelectronic device of Example 34, wherein the OLED device is a top emitting OLED device, a bottom emitting OLED device or a double side emitting OLED device.

Embodiment 37: The optoelectronic device of Embodiment 34, wherein the OLED device includes a light-transmitting portion configured to transmit light.

Embodiment 38: The optoelectronic device of Embodiment 34, wherein the conductive coating is an electrode of the OLED device.

Embodiment 39: The optoelectronic device of Embodiment 38, wherein the conductive coating is a cathode of the OLED device.

Embodiment 40: The optoelectronic device of Embodiment 39, wherein the substrate includes an anode, and one or more organic layers disposed between the anode and the cathode.

Embodiment 41: The optoelectronic device of Embodiment 40, wherein the one or more organic layers include an electroluminescent layer and one or more layers selected from the group consisting of: a hole injection layer, an electroluminescent layer A hole transport layer, a hole blocking layer, an electron injection layer, an electron transport layer and an electron blocking layer.

Embodiment 42: The optoelectronic device of Embodiment 40, wherein the substrate further comprises a thin film transistor electrically connected to the anode.

Embodiment 43: The optoelectronic device of Embodiment 34, wherein the conductive coating is an auxiliary electrode of the OLED device.

Example 44: The optoelectronic device of Example 43, wherein the substrate comprises an anode, a cathode, and one or more organic layers disposed between the anode and the cathode, and wherein the cathode and the auxiliary electrode are electrically connected to each other connect.

Embodiment 45: The optoelectronic device of Embodiment 44, wherein the one or more organic layers include an electroluminescent layer and one or more layers selected from the group consisting of: a hole injection layer, an electroluminescent layer A hole transport layer, a hole blocking layer, an electron injection layer, an electron transport layer and an electron blocking layer.

Embodiment 46: The optoelectronic device of Embodiment 45, wherein the substrate further comprises a thin film transistor electrically connected to the anode.

Embodiment 47: The optoelectronic device of Embodiment 10 or 29, wherein the terminal moiety comprises a biphenyl moiety, and the biphenyl moiety is independently selected from one or more substituents selected from the group consisting of Group substitution: tritium, fluorine, alkyl, cycloalkyl, aralkyl, silyl, aryl, heteroaryl, and fluoroalkyl.

Embodiment 48: The optoelectronic device of Embodiment 10 or 29, wherein the terminal moiety comprises a phenyl moiety, and the phenyl moiety is independently selected from one or more substituent groups of the group consisting of Substitution: tritium, fluorine, alkyl, cycloalkyl, silyl and fluoroalkyl.

Specific Example 49: The optoelectronic device of Specific Example 10 or 29, wherein the terminal moiety includes a fluorene moiety or a phenylene moiety.

Embodiment 50: The optoelectronic device of Embodiment 1 or 26, wherein the nucleation inhibiting coating comprises a polymer.

Embodiment 51: The optoelectronic device of Embodiment 50, wherein the polymer is selected from the group consisting of fluoropolymer, polyvinylbiphenyl, and polyvinylcarbazole.

Specific example 52: A method for manufacturing an optoelectronic device, the method comprising: (1) providing a substrate and a nucleation-inhibiting coating covering a first region of the substrate; and (2) depositing a conductive coating covering a second region of the substrate, Wherein the conductive coating comprises magnesium, and the nucleation inhibiting coating is characterized by having an initial adhesion probability to magnesium not greater than 0.02.

Example 53: The method of manufacture of Example 52, wherein depositing the conductive coating comprises treating both the nucleation-inhibiting coating and the second region of the substrate for deposition on the second region of the substrate The conductive coating while at least a portion of the nucleation inhibiting coating remains exposed from the conductive coating.

Example 54: The method of manufacture of Example 52, wherein depositing the conductive coating comprises exposing both the nucleation-inhibiting coating and the second region of the substrate to evaporated magnesium so that the substrate is The conductive coating is deposited on the second region, while at least a portion of the nucleation-inhibiting coating remains exposed from the conductive coating.

Embodiment 55: The manufacturing method of Embodiment 52, wherein depositing the conductive coating is performed with an open mask or without a mask.

Embodiment 56: The manufacturing method of Embodiment 52, wherein the deposition rate of magnesium on the second region of the substrate is at least 80 times greater than the deposition rate of magnesium on the nucleation-inhibiting coating.

Specific example 57: the manufacturing method of specific example 52, wherein the initial adhesion probability to magnesium is not greater than 0.01.

Embodiment 58: The manufacturing method of Embodiment 52, wherein the nucleation-inhibiting coating comprises a polycyclic aromatic compound.

Embodiment 59: The manufacturing method of Embodiment 52, wherein the nucleation-inhibiting coating includes an organic molecule, each of the organic molecules includes a core moiety and a plurality of terminal moieties bonded to the core moiety, the plurality of terminal moieties A first terminal moiety of one of the moieties includes a biphenyl moiety, a phenyl moiety, a fluorene moiety or a phenylene moiety, and each of the remaining terminal moieties of the plurality of terminal moieties has a molecular weight not greater than 2 times the molecular weight of the first terminal moiety molecular weight.

Embodiment 60: The manufacturing method of Embodiment 52, wherein providing the substrate comprises depositing a nucleation promoting coating to cover the second region of the substrate before depositing the conductive coating.

Embodiment 61: The manufacturing method of Embodiment 60, wherein the nucleation-promoting coating comprises fullerenes.

Although the present invention has been described with reference to certain specific embodiments, various modifications thereof will be apparent to those skilled in the art. Any examples provided herein are provided for the purpose of illustrating certain aspects of the invention and are not intended to limit the invention in any way. Any drawings provided herein are for the purpose of illustrating certain aspects of the invention only, are not drawn to scale, and are not intended to limit the invention in any way. The scope of the appended claims should not be limited by the specific embodiments described in the above description, but should be accorded the full scope consistent with the present invention as a whole. The disclosures of all documents cited herein are hereby incorporated by reference in their entirety.

100, 5910, 2903, 3410, 4510, 4610: Substrate 102, 3417, 3422: Surface 110": Shadow Mask 112, 1560, 1734, 1734a-1734d, 5505: Hole, Hole, Slit 120, 991, 993, 995, 1191, 1193 , 1195, 1391, 1393, 1395: Source 122: Arrow 140, 240, 940, 1130, 1340, 1570, 1660, 5920, 1771, 2945, 3420, 3854, 3954, 4054, 4154, 4354: Nucleation Inhibitory Coating 210: Poke 212: protrusions 410: conductive coating source 440, 950, 1150, 1350, 5915, 3430: conductive coating 160, 930, 1140, 1330, 1540, 1640, 3451, 4052: nucleation promoting coating 142: treated surface 144: treated Patterned Surface 600: Electroluminescent (EL) Devices 616, 900, 1100, 1300, 1510, 1610, 1702, 3810, 4310: Base Substrates 614, 910, 1110, 1310, 1520, 1620, 1741, 2921, 4344: Anodes, Anode units 630, 920, 1120, 1320, 1530, 1630, 1761, 2915, 2916, 2917, 3848, 3948, 4048, 4148, 4348: organic layer 602, 1550, 1650, 4852, 1710, 1712, 4350: cathode 612: electrical hole injection layer 610: hole transport layer 608: electroluminescent layer 606: electron transport layer 604: electron injection layer 620: power source 704, 706, 708, 710: stage 804, 806, 808, 810: stage 912, 1112, 1312: target surface 1382, 1731: Mask, Opening Mask 1004, 1006, 1008, 1010: Stage 1204, 1206, 1208, 1210: Stage 1500, 1600, 1800, 5901, 5902, 1721, 1900, 2000, 2200, 2300, 2400, 2500, 2600, 2700, 2900, 3200: OLED devices, devices 1670, 4854, 1830, 1832, 1834, 2030, 2110, 2112, 2114, 2116, 2530, 2230a, 2230b, 2230c, 2230d, 2330a, 2330b, 2430a- d, 2630, 2730, 2830, 2951, 3856, 3956, 4056, 4156, 4361, 5501: auxiliary electrode, auxiliary Electrode unit 4800: Circuit 4812: Power supply (VDD) line 4814: Control line 4816: Gate line 4818: Data line 4831: First TFT 4833: Second TFT 4841: Storage capacitor 4843: Compensation circuit 4850: OLED pixel or sub-pixel 2812 ,4333,4335,4337: Subpixels 1723, 1723', 1751, 1810a-1810f, 1910, 2010, 2210, 2310, 2410, 2510, 2610, 2710, 2810, 2912, 3212, 4321: Pixels, light-emitting area 1727: Unexposed area 1725: Outer edge 1715: Passive matrix OLED device (PMOLED) 1755, 1820, 1920, 2020, 2220, 2320, 2420, 2520, 2620, 2720: Non-emissive area 1775: Barrier coating 1719: Comparison PMOLED device 1783: pixel definition structure 1718: strips α, w _2, w _3: width d: separation distance 1912: leads 2120, 2122, 2124, 2126: regions 2812a, 2912a, 3212a: first sub-pixels 2812b, 2912b, 3212b: second subpixel 2812c, 2912c, 3212c: third subpixel 2810a: first pixel 2810b: second pixel 2810c: third pixel Y: first axis X: second axis A, B: line 2930, 3230, 3846, 3946, 4046, 4146: Pixel Definition Layer, PDL 2942: Common Cathode 2961: Thin Film Cladding Layer 3415, 4501, 4601, 5003, 5103, 5203: First Region 3412, 4503, 4603, 5001, 5101, 5201: Second region 3432: First part 3434: Second part 3441: Gap 3490: Arrows _t1 , _t3 : Thickness 3436, 3480: Third part 3802, 3902, 4002, 4102, 4300: Active matrix OLED, AMOLED device 3812: Buffer layer 3804, 4308: thin film transistor, TFT 3814: semiconductor active region 3816: gate insulating layer 3820: interlayer insulating layer 3824: source electrode 3822: drain electrode 3842, 4342: insulating layer 3844, 3944, 4044, 4144: first One electrode 3850, 3950, 4050, 4150: second electrode 4058: cap layer 4331: sub-pixel area 4351: light-transmitting area 4346a: first PDL 4346b: second PDL 4505: magnesium-containing island or cluster 4607: magnesium thin film OR Layer 4605: Magnesium Containing Islands or Clusters 4701: Evaporation Chamber 4710: First Evaporation Source, First Source 4712: Second Evaporation source 4731, 4741: QCMs 4721: sample gate 4725: source gate 4901, 4903: part 4907: magnesium coating d : lateral distance d + ∆d : width h : layer thickness of magnesium 5007, 5005: area 5011: island 5214: Relatively long tapered or tail part, part

Some embodiments will now be illustrated with reference to the accompanying drawings, in which:

1 is a schematic diagram illustrating the deposition of a nucleation inhibiting coating using a shadow mask, according to one embodiment;

2A, 2B, and 2C are schematic diagrams illustrating a microcontact transfer process of a nucleation-inhibiting coating according to an embodiment;

3 is a schematic diagram illustrating deposition of a conductive coating on a patterned surface according to an embodiment;

4 is a diagram illustrating a device produced according to one embodiment of a method;

5A-5C are schematic diagrams illustrating a method for selectively depositing a conductive coating according to one embodiment;

5D-5F are schematic diagrams illustrating a method for selectively depositing a conductive coating according to another embodiment;

6 is a diagram illustrating an electroluminescent device according to an embodiment;

Figure 7 is a flow chart showing stages of a method according to an embodiment;

Figure 8 is a flow chart showing method stages according to another embodiment;

9A-9D are schematic diagrams illustrating the stages in the embodiment of FIG. 8;

Figure 10 is a flow chart showing method stages according to yet another embodiment;

11A-11D are schematic diagrams illustrating the stages in the embodiment of FIG. 10;

Figure 12 is a flow chart showing method stages according to yet another embodiment;

13A-13D are schematic diagrams illustrating the stages in the embodiment of FIG. 12;

14 is a top view of an OLED device according to an embodiment;

Figure 15 is a cross-sectional view of the OLED device of Figure 14;

16 is a cross-sectional view of an OLED device according to another embodiment;

16B is a top view illustrating an opening mask according to an example;

16C is a top view illustrating an opening mask according to another example;

16D is a top view illustrating an opening mask according to yet another example;

16E is a top view illustrating an opening mask according to yet another example;

17 is a top view illustrating a patterned electrode according to an embodiment;

17B is a top view illustrating a passive matrix OLED device according to an embodiment;

Figure 17C is a schematic cross-sectional view of the passive matrix OLED device of Figure 17B;

17D is a schematic cross-sectional view of the passive matrix OLED device of FIG. 17B after cladding;

17E is a schematic cross-sectional view of a comparative passive matrix OLED device;

18A-18D illustrate portions of auxiliary electrodes according to various embodiments;

19 illustrates a top view of a lead connected to an electrode of an OLED device according to an embodiment;

20 illustrates a top view of a patterned electrode according to an embodiment;

21A-21D illustrate patterned electrodes according to various embodiments;

22 illustrates repeating electrode units formed on an OLED device according to an embodiment;

23 illustrates repeating electrode units formed on an OLED device according to another embodiment;

24 illustrates repeating electrode units formed on an OLED device according to yet another embodiment;

25-28J illustrate auxiliary electrode patterns formed on an OLED device according to various embodiments;

29 illustrates a portion of a device with a pixel arrangement according to an embodiment;

Figure 30 is a cross-sectional view taken along line A-A of the device of Figure 29;

Figure 31 is a cross-sectional view taken along line B-B of the device of Figure 29;

32 is a partial diagram illustrating a device with a pixel arrangement according to another embodiment;

Figure 33 is a photomicrograph of a device having the pixel arrangement described in Figure 32;

34 is a cross-sectional view illustrating the vicinity of an interface of a conductive coating and a nucleation-inhibiting coating according to an embodiment;

35 is a cross-sectional view illustrating the vicinity of an interface of a conductive coating and a nucleation-inhibiting coating according to another embodiment;

36 is a cross-sectional cross-sectional view illustrating the vicinity of an interface of a conductive coating, a nucleation-inhibiting coating, and a nucleation-promoting coating according to an embodiment;

37 is a cross-sectional cross-sectional view illustrating the vicinity of an interface of a conductive coating, a nucleation-inhibiting coating, and a nucleation-promoting coating according to another embodiment;

38 is a cross-sectional view illustrating the vicinity of an interface of a conductive coating and a nucleation-inhibiting coating according to yet another embodiment;

39 is a cross-sectional view illustrating an active matrix OLED device according to an embodiment;

40 is a cross-sectional cross-sectional view illustrating an active matrix OLED device according to another embodiment;

41 is a cross-sectional cross-sectional view illustrating an active matrix OLED device according to yet another embodiment;

42 is a cross-sectional cross-sectional view illustrating an active matrix OLED device according to yet another embodiment;

43 is a diagram illustrating a transparent active matrix OLED device according to an embodiment;

Figure 44 is a cross-sectional view illustrating the device according to Figure 43;

Figure 45A is a top-view SEM image of sample 1;

Figures 45B and 45C are magnified SEM images showing a portion of the sample of Figure 45A;

Figure 45D is a cross-sectional SEM image showing the sample of Figure 45A;

Figure 45E is a cross-sectional SEM image showing the sample of Figure 45A;

Figure 45F is a cross-sectional SEM image showing another portion of the sample of Figure 45A;

Figure 45G is an oblique SEM image showing the sample portion of Figure 45F;

Figure 45H is a graph showing the EDX spectrum taken from the sample of Figure 45A;

Figure 46A is a top-view SEM image of sample 2;

Figure 46B is an enlarged SEM image showing a portion of the sample of Figure 46A;

Figure 46C is a further enlarged SEM image showing the portion of the sample of Figure 46B;

Figure 46D is a cross-sectional SEM image showing the sample of Figure 46A;

46E and 46F are oblique SEM images showing the surface of the sample of 46A;

Figure 46G is a graph showing the EDX spectrum taken from the sample of Figure 46A;

Figure 46H shows the magnesium EDX spectrum superimposed on the SEM image showing the corresponding portion of the spectrum obtained from the sample;

47 is a schematic diagram illustrating a chamber set up for deposition experiments using quartz crystal microbalances (QCMs);

48 is a circuit diagram showing an example driving circuit of an active matrix OLED display device;

49 is a schematic diagram of a magnesium coating deposited between portions of a nucleation inhibiting coating;

Figure 50A is a top view SEM image showing a sample made with a BAlq nucleation inhibiting coating;

Figure 50B is an SEM image showing an enlarged portion of the sample of 50A;

Figures 50C and 50D are SEM images showing enlarged portions of the sample of Figure 50A;

Figure 50E is an oblique SEM image showing a surface of the sample of Figure 50A;

Figure 51A is a top view SEM image showing one of the comparative samples made using the HT211 nucleation inhibiting coating;

Figure 51B is a cross-sectional SEM image of the comparative sample of Figure 51A;

Figure 52A is a top view SEM image showing a comparative sample made using shadow mask deposition;

Figure 52B is a cross-sectional SEM image of the comparative sample of Figure 52A;

Figure 53 is a graph of transmittance versus wavelength for comparative samples made at various deposition rates with the HT211 nucleation inhibiting coating;

Figure 54 is a graph of transmittance versus wavelength for samples made with various nucleation inhibiting coatings;

55 is a top view showing the pattern of an auxiliary electrode according to an example embodiment;

56 is a graph showing sheet resistance specifications and associated auxiliary electrode thicknesses for various display panel sizes;

Figure 57 is a graph showing the layer thickness of magnesium deposited on a reference QCM surface versus the layer thickness of magnesium deposited on sample QCM surfaces covered with various nucleation modification coatings;

Figure 58 is a graph showing the adhesion probability of magnesium vapor on a sample QCM surface, versus layer thickness deposited on sample QCM surfaces covered with various nucleation modified coatings; and

59A and 59B illustrate a method of removing a nucleation inhibiting coating after depositing a conductive coating, according to one embodiment.

100: Substrate

102: Surface

110: Shadow Mask

112: holes, slits

120: Source

122: Arrow

140: Nucleation inhibiting coating

Claims (80)

A device having a plurality of layers, comprising: a nucleation-inhibiting coating disposed on a surface of an underlying layer on one side of the device; and at least one island disposed on a surface of the nucleation-inhibiting coating; wherein the at least one island is formed of a conductive coating material. A device having a plurality of layers extending substantially transverse to a side of the device, the side including a first region and a second region, wherein the layers include: a substrate extending across the first region and the second region; and a conductive coating supported by the substrate and disposed only along the second region; wherein the conductive coating is formed by actions including: depositing a nucleation inhibiting coating on the substrate only along the first region; and subjecting the substrate and the nucleation-inhibiting coating to a vapor flux of a conductive coating material, the nucleation-inhibiting coating being applied to the conductive coating material to affect a propensity of the vapor flux to be deposited thereon , so that the conductive coating is formed primarily where the substrate is substantially free of the nucleation-inhibiting coating. An optoelectronic device comprising a plurality of layers deposited on the substrate and extending along a side defined by at least one lateral axis thereof, comprising at least one island comprising a conductive coating material and disposed over the side a first region on a first layer surface, wherein: The first region is substantially free of a seal coat of the conductive coating material, and The first region corresponds to at least a portion of at least one of: an emission region and a transmission region. A device comprising a plurality of layers deposited on a substrate, the plurality of layers further comprising: at least one island formed of a conductive coating material and disposed on a surface of a first layer, and At least one overlying layer covering the at least one island. 2. The apparatus of claim 2, wherein the act of depositing comprises an act of exposing the first region of the substrate to a vapor flux of a nucleation-inhibiting coating material. 2. The apparatus of claim 2, wherein the act of depositing includes the act of positioning a mask to confine a side of depositing the nucleation-inhibiting coating to the first region. The apparatus of claim 2, wherein the subjecting action is performed in at least one of an open mask and a maskless deposition. 2. The device of claim 2, wherein the layers further comprise the nucleation-inhibiting coating supported by the substrate and disposed only along the first region. 8. The device of claim 8, wherein the layers further comprise at least one island disposed on a surface of the nucleation-inhibiting coating. 9. The device of claim 9, wherein the at least one island is formed during the subjecting action. The apparatus of claim 9, wherein the at least one island is disposed in a portion of the first region. The device of claim 9, wherein the at least one island is formed of the conductive coating material. The device of claim 9, wherein the conductive coating comprises a first portion covering the second region and a second portion overlapping the nucleation-inhibiting coating portion, wherein the second portion is connected to the nucleation-inhibiting coating through a gap A nuclear inhibitory coating separates. The device of claim 13, wherein the layers further comprise a nucleation promoting coating disposed between the first portion and the second region of the substrate. The device of claim 14, wherein the nucleation promoting coating extends along the first region. The device of claim 14, wherein the nucleation-promoting coating is formed by an act of adding the nucleation-promoting coating. The apparatus of claim 16, wherein the act of adding occurs before or after the act of depositing. 17. The apparatus of claim 16, wherein the act of adding comprises the act of inserting a mask to limit the addition of a lateral extent of the nucleation-promoting coating. The device of claim 2, further comprising an act of removing the nucleation-inhibiting coating after the subjecting act. The device of claim 1, wherein the nucleation-inhibiting coating covers a first region of the surface. An apparatus as claimed in claim 4, wherein: One side of the device includes a first area and a second area, the at least one island is disposed in the first region, and The first region is substantially free of a seal coat of the conductive coating material. The device of claim 1, 3, 4 or 10, wherein the at least one island forms a discontinuous cluster. The apparatus of claim 22, wherein the discontinuous clusters are physically separated from other discontinuous clusters. 9. The device of claim 1 or 9, wherein the at least one island does not comprise a continuous layer. The apparatus of claim 20, wherein the at least one island is disposed in a portion of the first region. The device of claim 3, further comprising a conductive coating comprising the conductive coating material deposited on the surface of a second layer in a second region of the side. The device of claim 21, further comprising a conductive coating comprising the conductive coating material and deposited on the surface of a second layer in the second region. The device of claim 26, further comprising a nucleation inhibiting coating deposited in the first region of the device, wherein: One of the nucleation-inhibiting coatings forms the first layer surface through the exposed layer surface; and The nucleation-inhibiting coating is adapted to affect a tendency of the vapor flux of the conductive coating material to be deposited thereon such that the nucleation-inhibiting coating is substantially free of a seal coat of the conductive coating material . The device of claim 27, further comprising a nucleation inhibiting coating deposited in the first region of the device, wherein: One of the nucleation-inhibiting coatings forms the first layer surface through the exposed layer surface; and The nucleation-inhibiting coating is adapted to affect a tendency of the vapor flux of the conductive coating material to be deposited thereon such that the nucleation-inhibiting coating is substantially free of a seal coat of the conductive coating material . The device of claim 20, further comprising a conductive coating covering a second region of the surface. The device of claim 30, wherein the conductive coating is formed of the conductive coating material. The device of claim 26, wherein the at least one island is formed in the first region during deposition of the conductive coating material to form the conductive coating in the second region. The device of claim 30, wherein the conductive coating comprises a first portion covering the second region and a second portion partially overlapping the nucleation inhibiting coating. 28. The device of claim 28, wherein the conductive coating includes a first portion covering the second region and a second portion overlapping a portion of the nucleation-inhibiting coating, and wherein the second portion of the conductive coating Separated from the nucleation inhibiting coating by a gap. 29. The device of claim 29, wherein the conductive coating includes a first portion covering the second region and a second portion overlapping a portion of the nucleation-inhibiting coating, and wherein the second portion of the conductive coating Separated from the nucleation inhibiting coating by a gap. 4. The device of claim 13, 34 or 35, wherein the second portion extends over and is spaced from the at least one island. The device of claim 33, wherein the second portion is spaced from the at least one island. The device of claim 13 or 33, wherein another portion of the nucleation inhibiting coating is exposed from the conductive coating. The device of claim 33, further comprising a nucleation promoting coating disposed between the first portion and the second region of the surface. The device of claim 14 or 39, wherein the nucleation promoting coating comprises a fullerene. The device of claim 9, 26, 27, or 30, wherein the at least one island is disposed in a discontinuous layer having a thickness of no more than about 5% of a thickness of the conductive coating in the second region an average layer thickness. The device of any one of claims 1 to 4, wherein the conductive coating material comprises magnesium. The device of claim 1 or 2, wherein the conductive coating material comprises a high vapor pressure material. The device of claim 43, wherein the high vapor pressure material is at least one selected from the group consisting of ytterbium, cadmium, and zinc. The device of claim 1, 2, 28, or 29, wherein the nucleation-inhibiting coating is characterized by having an initial adhesion probability of the conductive coating material of no more than about 0.02. The device of claim 1, 2, 28 or 29, wherein the nucleation inhibiting coating comprises a polycyclic aromatic compound. The device of claim 1, 2, 28 or 29, wherein the nucleation inhibiting coating comprises a polymer. The device of claim 47, wherein the polymer is at least one of the following: a fluoropolymer, polyvinylbiphenyl, and polyvinylcarbazole. 48. The device of claim 48, wherein the fluoropolymer is selected from the group consisting of: perfluoropolymer and polytetrafluoroethylene. The device of claim 1, 2, 28 or 29, wherein the nucleation inhibiting coating comprises an organic compound comprising a core moiety and a terminal moiety bonded to the core moiety. The device of claim 50, wherein the terminal moiety comprises at least one of: a biphenyl moiety, a phenyl moiety, a fluorene moiety, and a phenylene moiety. The device of claim 51, wherein the biphenyl moiety is substituted with at least one substituent independently selected from at least one of tritium, fluorine, alkyl, cycloalkyl, aralkyl, silyl, aryl radical, heteroaryl and fluoroalkyl. The device of claim 51, wherein the phenyl moiety is substituted with at least one substituent independently selected from at least one of tritium, fluorine, alkyl, cycloalkyl, silyl, and fluoroalkyl. The device of claim 50, wherein the terminal moiety comprises at least one substituent independently selected from at least one of tritium, fluorine, alkyl, cycloalkyl, aralkyl, silyl, aryl, hetero Aryl, fluoroalkyl, and any combination thereof. The device of claim 50, wherein the organic compound further comprises at least one additional terminal moiety having a molecular weight of no more than about 2 times the molecular weight of one of the terminal moieties. The device of claim 50, wherein the core moiety comprises at least one of the following: a substituted alkyl, an unsubstituted alkyl, a cycloalkynyl, an alkenyl, a alkynyl, an aryl, a Aralkyl, a cyclic hydrocarbon moiety, a heterocyclic moiety, a cyclic ether moiety, a heteroaryl, a fluorene moiety and a silyl group. The device of claim 1, wherein the underlying layer comprises: a backplane including a transistor; and a frontplate disposed on the backplane, wherein the frontplate includes a first plate electrically coupled to the transistor an electrode and a second electrode; and at least one organic layer disposed on the first electrode and the second electrode. 2. The device of claim 2, wherein the substrate comprises a backplane layer and a frontplane layer, wherein the frontplane layer extends between the backplane layer and the conductive coating. The device of claim 58, wherein the backplane layer includes a transistor, and the frontplane layer includes an electrode electrically coupled thereto and at least one organic layer, wherein the electrode is in the backplane layer and the at least one organic layer extends between layers. The device of claim 59, wherein the electrode is a first electrode, and the front plate layer further comprises a second electrode, wherein the at least one organic layer extends between the first electrode and the second electrode. The device of claim 60, wherein the first electrode is disposed within the second region. The device of claim 60 or 61, wherein the second electrode comprises the conductive coating. The device of claim 60 or 61, wherein the first electrode is disposed within the first region. The device of claim 63, wherein the conductive coating comprises an auxiliary electrode electrically coupled to the second electrode. The apparatus of claim 3, wherein the emission area comprises: a first electrode; at least one organic layer; and a second electrode; in: the first electrode is located between the substrate and the at least one organic layer; and The at least one organic layer is located between the first electrode and the second electrode. 65. The device of claim 65, wherein the first region corresponds to at least a portion of the emitting region, and wherein the conductive coating is electrically coupled to the second electrode. 65. The device of claim 65, wherein the first region corresponds to at least a portion of the transmissive region, and wherein the conductive coating forms at least a portion of the second electrode in the second region. 67. The device of claim 67, wherein the conductive coating is a continuous structure defining a plurality of apertures corresponding to the first region. 65. The device of claim 65, wherein the first region corresponds to at least a portion of the transmissive region, and wherein the conductive coating is electrically coupled to the second electrode. The device of claim 1, 2, or 4, wherein the device is an optoelectronic device comprising at least one emitting region, the at least one emitting region comprising: a first electrode; at least one organic layer; and a second electrode; wherein the first electrode is located between the substrate and the at least one organic layer; and Wherein the at least one organic layer is located between the first electrode and the second electrode. The device of claim 70, wherein the conductive coating is electrically coupled to the second electrode. The apparatus of claim 70, wherein the first region corresponds to at least a portion of the at least one emission region. The device of claim 70, further comprising at least one transmissive region configured to transmit light therethrough, wherein the first region corresponds to at least a portion of the at least one transmissive region. 73. The device of claim 73, wherein the conductive coating forms at least a portion of the second electrode in the second region. The device of claim 28, further comprising at least one overlying layer overlying the at least one island. The device of claim 1, further comprising at least one overlying layer covering the at least one island. The device of claim 9, further comprising at least one overlying layer covering the at least one island. The device of any one of claims 4 and 75 to 77, wherein the overlying layer comprises at least one of: a cap layer, a barrier coating, and a thin film encapsulation (TFE) layer. The device of claim 78, wherein the barrier coating is a multi-layer coating comprising at least one of the following: an organic material, an inorganic material, and combinations thereof. The device of any one of claims 29 and 75 to 77, wherein the at least one island is disposed between the nucleation inhibiting coating and the overlying layer.

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