TWI806943B - Process circuit board, multilayer circuit board, and circuit board with cover film manufacturing method, and film with adhesive layer - Google Patents

Abstract

Provided are a manufacturing method for processing a circuit substrate and a thin film for attaching an adhesive layer. The manufacturing method of the processed circuit substrate of the present invention is to apply plasma treatment to the conductive circuit side surface of the circuit substrate having the polymer layer and the conductive circuit to obtain the circuit substrate with the plasma treated surface, and then heat-compress the plasma treated surface of the aforementioned circuit substrate and the adhesive layer of the substrate with the adhesive layer at a temperature lower than 260 ° C. The aforementioned polymer layer contains tetrafluoroethylene polymer and the aforementioned conductive circuit is arranged on the surface of the aforementioned polymer layer; Adhesive adhesive layer, and after the aforementioned thermosetting adhesive layer is hardened under the conditions of pressing temperature 160°C, pressing pressure 4 MPa, and pressing time 90 minutes, the peel strength of the interface between the aforementioned film and the hardened aforementioned thermosetting adhesive layer is 5 N/cm or more.

Description

Process circuit board, multilayer circuit board, and circuit board with cover film manufacturing method, and film with adhesive layer

The present invention relates to a method for manufacturing a processed circuit substrate, a multilayer circuit substrate, and a circuit substrate with a cover film, and a film for attaching an adhesive layer.

With the miniaturization and high-performance of electronic equipment and electrical equipment, the demand for multilayer circuit substrates with multi-layer conductor circuits or circuit substrates with cover films is increasing. The manufacture of these circuit boards is currently adopting the method of thermocompression bonding the original circuit board with the conductor circuit on the surface of the polyimide film and the substrate with a thermosetting adhesive layer (adhesive sheet (adhesive sheet) or cover film).

Furthermore, in recent years, these circuit boards are required to have electrical characteristics (low dielectric coefficient, etc.) that can cope with high-frequency bands, and heat resistance that can withstand solder reflow. However, conventional polyimide thin films have insufficient electrical characteristics. In this regard, Patent Document 1 proposes a multilayer circuit board, which uses a liquid crystal polymer film as an insulating material layer, an adhesive sheet or a cover film of the original circuit board.

Patent Document 2 proposes a flexible metal laminate and a flexible printed substrate using the same. The flexible metal laminate has: a polyimide film, a fluoropolymer layer on the surface of the polyimide film and having an adhesive group with a melting point of 280-320°C, and a metal foil on the surface of the layer.

Patent Documents 3, 4, 5 and 6 propose a cover film having a polyimide film and an adhesive layer containing a fluoropolymer, which can be used as a cover film with excellent electrical characteristics and low transmission loss of a circuit board.

prior art literature patent documents Patent Document 1: Japanese Patent Laid-Open No. 2014-042043 Patent Document 2: International Publication No. 2015/080260 Patent Document 3: Japanese Patent Laid-Open No. 2014-032980 Patent Document 4: Japanese Patent Laid-Open No. 2014-197611 Patent Document 5: Japanese Patent Laid-Open No. 2015-133480 Patent Document 6: Japanese Patent Laid-Open No. 2015-176921

The problem to be solved by the invention Heat-resistant liquid crystal polymer has a melting point as high as 270°C or higher, so when manufacturing these circuit boards, the original circuit board and the adhesive substrate must be thermally bonded at a high temperature of 270°C or higher. Therefore, in the case of using a liquid crystal polymer film, a press device generally used for an adhesive substrate that uses a thermosetting adhesive as an adhesive layer component cannot be used because the set temperature for thermocompression bonding is as low as, for example, lower than 220° C., and a press device that can handle high temperature thermocompression bonding is required. In addition, once thermocompression bonding is performed at a high temperature of 270° C. or higher, the liquid crystal polymer film may melt and the position of the conductor circuit may be displaced.

When thermocompression-bonding the flexible printed circuit board of Patent Document 2 and the adhesive substrate, a high temperature (for example, 280° C. or higher) above the melting point of the fluoropolymer is required, and the same problem occurs when liquid crystal polymer is used. Therefore, there is a need for a method for manufacturing a multilayer circuit substrate or a circuit substrate with a cover film by thermally bonding the original circuit substrate and the adhesive substrate at a lower temperature.

In terms of adhesive substrates such as cover films, there is also a need for a substrate with adhesive properties and electrical properties under relatively low temperature thermocompression bonding. That is, in order to make the cover films with the adhesive layer of the fluoropolymer in Patent Documents 3, 4, 5 and 6 also exhibit adhesiveness, it is necessary to heat at a high temperature above the melting point of the fluoropolymer during thermocompression bonding, and a special press device capable of performing high temperature thermocompression bonding that cannot be handled by general press devices is required.

The object of the present invention is to provide a manufacturing method capable of thermocompressing an adhesive substrate and a circuit substrate at a relatively low temperature to manufacture a multilayer circuit substrate or a circuit substrate with a cover film, etc.;

means to solve problems The present invention has the following aspects. (1) A manufacturing method of a processed circuit substrate, characterized in that: plasma treatment is performed on the conductive circuit side surface of the circuit substrate having a polymer layer and a conductive circuit to obtain a circuit substrate with a plasma-treated surface, and then the plasma-treated surface of the aforementioned circuit substrate and the adhesive layer of the substrate with an adhesive layer are thermally bonded at a temperature lower than 260 ° C to manufacture a processed circuit substrate. (2) The production method according to (1) above, wherein the peel strength of the thermocompression bonded surface of the processed circuit board is 5 N/cm or more. (3) The manufacturing method according to (1) or (2) above, wherein the aforementioned substrate with an adhesive layer is a cover film with an adhesive layer attached, and the aforementioned processed circuit substrate is a circuit substrate with a covered film; or, the aforementioned substrate with an adhesive layer is an adhesive sheet, and the aforementioned processed circuit substrate is a circuit substrate with an adhesive layer attached.

(4) The production method according to (1) to (3) above, wherein the wetting tension of the exposed surface of the polymer layer of the circuit board having a plasma-treated surface is 30 mN/m or more through the plasma treatment. (5) The production method according to (1) to (4) above, wherein the tetrafluoroethylene-based polymer has at least one functional group selected from the group consisting of a carbonyl-containing group, a hydroxyl group, an epoxy group, an amide group, an amine group, and an isocyanate group. (6) The production method according to (1) to (5) above, wherein the tetrafluoroethylene-based polymer has a melting point of 260° C. or higher. (7) The production method according to (1) to (6) above, wherein the adhesive layer is a thermosetting adhesive layer containing a rubber-modified epoxy resin and a hardener. (8) The manufacturing method according to (1) to (7) above, wherein the aforementioned substrate with an adhesive layer is a substrate as follows: after the plasma-treated surface of the aforementioned circuit substrate and the adhesive layer of the aforementioned substrate with an adhesive layer are thermally bonded under the conditions of a pressing temperature of 160° C., a pressing pressure of 4 MPa, and a pressing time of 90 minutes, the peel strength of the thermally-pressed surface of the aforementioned treated circuit substrate is 5 N/cm or more.

(9) A method of manufacturing a multilayer circuit board, characterized in that: plasma treatment is performed on the side surface of the conductor circuit of the circuit board having the polymer layer and the conductor circuit to obtain a circuit board with a plasma-treated surface, and then the plasma-treated surfaces of the plurality of circuit boards with the plasma-treated surface are respectively opposed and an adhesive sheet is arranged between the plasma-treated surfaces, and thermal compression is performed at a temperature lower than 260° C. to manufacture a multi-layer circuit board with multiple layers of conductor circuits. (10) A method of manufacturing a circuit substrate with a cover film, characterized in that: plasma treatment is performed on the conductor circuit side surface of the circuit substrate having a polymer layer and a conductor circuit to obtain a circuit substrate with a plasma-treated surface, and then the plasma-treated surface of the circuit substrate and the adhesive layer of the cover film attached to the adhesive layer are subjected to thermal compression at a temperature lower than 260° C. to manufacture a circuit substrate with a cover film. (11) A film with an adhesive layer attached, characterized in that a tetrafluoroethylene-based polymer film and a thermosetting adhesive layer are sequentially laminated, and after the thermosetting adhesive layer is cured at a pressing temperature of 160° C., a pressing pressure of 4 MPa, and a pressing time of 90 minutes, the peel strength of the interface between the film and the hardened thermosetting adhesive layer is 5 N/cm or more.

(12) The adhesive layer-attached film according to (11) above, wherein the tetrafluoroethylene-based polymer has at least one functional group selected from the group consisting of carbonyl-containing groups, hydroxyl groups, epoxy groups, amido groups, amine groups, and isocyanate groups. (13) The adhesive layer-attached film according to (11) or (12) above, wherein the tetrafluoroethylene-based polymer has a melting point of 260°C or higher. (14) The adhesive layer-attached film according to (11) to (13) above, wherein the thermosetting adhesive layer is a thermosetting adhesive layer containing a rubber-modified epoxy resin and a curing agent. (15) The film for attaching the adhesive layer as described in (11) to (14) above, which is a cover film or an interlayer insulating film.

Invention effect According to the manufacturing method of the present invention, the circuit substrate and the adhesive substrate can be heat-compressed at a relatively low temperature to manufacture multilayer circuit substrates or circuit substrates with cover films and other processed circuit substrates. According to the present invention, it is possible to obtain a film for attaching an adhesive layer, which has excellent electrical characteristics at relatively low temperatures and exhibits sufficient adhesiveness, and which is effective as a cover film or an interlayer insulating film.

The definitions of the following terms apply to this specification and the scope of the patent application. "The temperature of hot pressing" refers to the setting temperature of the hot plate of the pressing device. "Melting point" refers to the temperature corresponding to the maximum value of the melting peak measured by differential scanning calorimetry (DSC). "Wetting tension" is a value measured in accordance with JIS K 6768:1999 (corresponding to international standard ISO 8296:1987). The measurement of wetting tension is to quickly wipe the swab soaked with the test solution of known wetting tension on the test piece to form a 6cm ² liquid film and observe the state of the liquid film 2 seconds after coating. If there is no rupture, it means wet. The maximum wetting tension that does not cause liquid film rupture is the wetting tension of the test piece. In addition, the lower limit of the wetting tension of the test solution specified in JIS K 6768:1999 is 22.6mN/m.

"Peel strength of processed circuit board" is the value measured in the following manner. The processed circuit board was cut out to a length of 150 mm and a width of 10 mm to prepare evaluation samples. Peel off the polymer layer, the conductive circuit and the adhesive layer from one end of the evaluation sample in the longitudinal direction to a position of 50 mm. Using a tensile tester, peel at a tensile speed of 50 mm/min so as to form 90°, and measure the average load (N/cm) at a distance of 20 mm to 80 mm as the peel strength.

The "peel strength of the adhesive layer-attached film" is a value measured in the following manner. Cut the film with the adhesive layer after thermosetting to a length of 150 mm and a width of 10 mm to make an evaluation sample. The polymer layer and the thermosetting adhesive layer after thermosetting were peeled off to a position of 50 mm from one end of the evaluation sample in the longitudinal direction. Using a tensile tester, peel at a tensile speed of 50 mm/min so as to form 90°, and measure the average load (N/cm) at a distance of 20 mm to 80 mm as the peel strength.

"Melt-formable polymer" means a polymer that has a melt flow rate of 0.1 to 1000 g/10 minutes at a temperature 20°C higher than the melting point of the resin under a load of 49N. "Melt flow rate" is the melt mass flow rate (MFR) stipulated in JIS K 7210-1:2014 (conforming to international standard ISO 1133-1:2011). "Ten-point average roughness (Rz _JIS )" is the value stipulated in JIS B 0601:2013 Appendix JA.

"Unit" is a general term for an atomic group formed directly by polymerizing one molecule of a monomer, and an atomic group obtained by chemically converting a part of the atomic group. Monomer-based units are also indicated only as "units". The value of "pressure" means "absolute pressure" unless otherwise mentioned. FIGS. 1 to 18 are all schematic diagrams, and the dimensional ratios among them are different from the real ones for convenience of description.

The processed circuit substrate of the present invention is obtained by performing plasma treatment on the conductive circuit side surface of a circuit substrate having a polymer layer and a conductive circuit (hereinafter also referred to as the original circuit substrate) to obtain a circuit substrate with a plasma-treated surface, and then thermally pressing the plasma-treated surface of the aforementioned circuit substrate and the adhesive layer of the substrate with an adhesive layer (hereinafter also referred to as the adhesive substrate) at a temperature lower than 260°C. ), and the conductor circuit is arranged on the surface of the F layer.

The processing circuit board has an F layer, a conductive circuit provided on the surface of the F layer, and an adhesive layer (hereinafter also referred to as an adhesive layer) in contact with the conductive circuit surface and the surface of the F layer other than the portion where the conductive circuit is provided. The adhesive layer is a layer formed by thermocompression bonding of an adhesive substrate, specifically, a layer derived from an adhesive layer of an adhesive sheet or a cover film with an adhesive layer to be described later. The processing circuit substrate is preferably: the adhesive substrate is a cover film with an adhesive layer attached, and the processing circuit substrate is a circuit substrate with a cover film; or, the adhesive substrate is an adhesive sheet, and the processing circuit substrate is a circuit substrate with an adhesive layer.

The latter processing circuit board may further have a cover layer in contact with the surface of the processing circuit board. The cover layer is a layer for protecting the conductor circuit, and specifically, a cover layer formed of a cover film with an adhesive layer to be described later is exemplified. The processing circuit board may have a heat-resistant base material layer in contact with the surface of the F layer opposite to the side where the conductor circuit is provided. The processing circuit board may have two or more F layers, may have two or more heat-resistant substrate layers, and may have two or more cover layers.

Through holes, via holes, and the like may be formed in the processing circuit substrate. The peel strength of the thermocompression bonded surface of the processed circuit substrate is preferably 5 N/cm or higher, more preferably 8 N/cm or higher, and especially preferably 10 N/cm or higher. If the peel strength is above the lower limit value of the aforementioned range, then the adhesiveness between the F layer and the adhesive layer is good. The higher the peel strength, the better, and the upper limit is not limited. In addition, the so-called thermocompression bonding surface refers to the interface between the F layer and the conductor circuit and the bonding layer. The heat-resistant base material layer is a layer containing a heat-resistant base material, and may have a single-layer structure or a multi-layer structure.

Examples of heat-resistant substrates include polyimide (aromatic polyimide, etc.), polyarylate, polyamide, polyallylamide (polyetheramide, etc.), aromatic polyamide, aromatic polyetheramide, polyphenylene sulfide, polyallyl ether ketone, polyamideimide, liquid crystal polyester, and fiber-reinforced substrates. The fiber-reinforced base material has a matrix resin (cured product of thermosetting resin such as epoxy resin, heat-resistant resin, etc.), and reinforcing fibers (glass fiber, carbon fiber, aramid fiber, polybenzoic acid, etc.) embedded in the matrix resin. Azole fibers, polyarylate fibers, etc., can be woven or non-woven fabrics). The thickness of the heat-resistant substrate layer is usually 5-150 μm, preferably 7.5-100 μm, more preferably 12-75 μm.

The conductor circuit of the present invention can be, for example, a conductor circuit in which a metal-clad laminate having a metal foil, an F layer, and an optional heat-resistant substrate layer is processed by etching the metal foil to form a specified circuit pattern; an electroplated copper conductor circuit in which a specified circuit pattern is formed by processing the metal foil of the metal-clad laminate using the SAP method or MSAP method described later. The material of the metal foil can be, for example, copper, copper alloy, stainless steel, nickel, nickel alloy (including 42 alloy), aluminum, aluminum alloy, etc. Copper foils such as rolled copper foils and electrolytic copper foils are generally used for circuit substrates used in electronic equipment. Copper foils are also suitable for the metal foils of the present invention.

It is also possible to form an anti-rust layer (an oxide film such as chromate, etc.), a heat-resistant layer, etc. on the surface of the metal foil. Surface treatment (coupling agent treatment etc.) for improving the adhesiveness to an adhesive layer can also be given to the surface of metal foil. The ten-point average roughness (Rz _JIS ) of the surface of the metal foil is preferably 0.2-2.0 μm, more preferably 0.3-1.5 μm. In this case, it is easy to strike a balance between the reduction of the adhesive force with the adhesive layer and the loss of electrical transmission. The thickness of the metal foil is preferably 5-75 μm. The conductive circuit is preferably formed by processing the aforementioned metal-clad laminate by the semi-additive method (SAP method) or the modified semi-additive method (MSAP method).

The first aspect of the SAP method includes a method having the following steps. A step of completely removing the metal foil of the metal-clad laminate by etching, The step of providing either or both of the through hole and the via hole, Steps for removing slag on the entire surface (including through holes and via holes), Steps for providing electroless plating on the entire surface (including through holes and via holes), The step of providing an electroplating protective film on the non-circuit area of the electroless plating surface, The step of forming a conductor circuit by electroplating after the electroplating protective film is installed, The steps of removing the electroplating protective film, The electroless plating layer exposed after removing the electroplating protective film is removed by rapid etching.

The second aspect of the SAP method is a method having the following steps. The step of providing either or both of the through hole and the via hole in the metal-clad laminate, Steps for removing slag on the entire surface (including through holes and via holes), The step of completely removing the metal foil by etching, Steps for providing electroless plating on the entire surface (including through holes and via holes), The step of providing an electroplating protective film on the non-circuit area of the electroless plating surface, The step of forming a conductor circuit by electroplating after the electroplating protective film is installed, The steps of removing the electroplating protective film, The electroless plating layer exposed after removing the electroplating protective film is removed by rapid etching.

The first aspect of the MSAP method includes a method having the following steps. The step of providing either or both of the through hole and the via hole in the metal-clad laminate, Steps for removing slag on the entire surface (including through holes and via holes), Steps for providing electroless plating on the entire surface (including through holes and via holes), The step of providing an electroplating protective film on the non-circuit area of the electroless plating surface, The step of forming a conductor circuit by electroplating after the electroplating protective film is installed, The steps of removing the electroplating protective film, The step of removing the electroless plating layer and metal foil exposed after removing the electroplating protective film by rapid etching.

The second aspect of the MSAP method includes a method having the following steps. The step of arranging an electroplating protective film on the non-circuit area of the metal foil surface of the metal-clad laminate, The step of forming a conductor circuit by electroplating after the electroplating protective film is installed, The steps of removing the electroplating protective film, The step of removing the metal foil exposed after removing the electroplating protective film by rapid etching or the like.

The adhesive substrate of the present invention is preferably an adhesive sheet or a cover film for attaching an adhesive layer. Also, the adhesive layer of the adhesive substrate can be thermoplastic or thermosetting, and thermosetting is preferable. That is, the adhesive substrate is preferably a substrate having a thermosetting adhesive layer. In this case, the adhesive layer of the processed circuit board contains cured products of these adhesive components (cured products of thermosetting adhesives).

The adhesive sheet is a sheet-like adhesive, and may be a sheet consisting only of an adhesive, or may be a sheet in which adhesive layers are provided on both sides of a heat-resistant resin film. When the adhesive of the adhesive tablet is a thermosetting adhesive, the thermosetting adhesive is preferably a semi-cured product in a semi-cured state. The cover film with an adhesive layer attached has a cover layer (cover film), and an adhesive layer provided on one side of the cover layer. When the adhesive of the adhesive layer of the cover film to which the adhesive layer is attached is a thermosetting adhesive, the thermosetting adhesive is preferably a semi-cured product in a semi-cured state.

The material of the covering layer may be, for example, heat-resistant resin, F polymer, or the like. The thickness of the covering layer is preferably 12-100 μm. The thickness of the adhesive layer of the adhesive substrate is preferably 5-50 μm. The thermosetting adhesive layer preferably contains a thermosetting resin. Thermosetting resins include epoxy resins, cyanate resins, polyfunctional maleimide resins, unsaturated polyphenylene ether resins, benzo resin, vinyl ester resin, etc. Two or more types of thermosetting resins may be used in combination.

A thermosetting adhesive layer usually contains a curing agent and a curing accelerator. A hardening agent can be selected suitably according to the kind of thermosetting resin. For example, examples of the curing agent when the thermosetting resin is an epoxy resin include amine-based curing agents, phenol-based curing agents, acid anhydride-based curing agents, dicyandiamine, and low-molecular-weight polyphenylene ether compounds. Two or more curing agents may be used in combination. Examples of hardening accelerators include imidazoles, tertiary amines, organic phosphine compounds, and metal soaps. The hardening accelerator may use 2 or more types together.

The thermosetting adhesive layer may further contain fillers, thermoplastic resins, and other additives. 填料可舉如氧化矽、金屬氧化物(氧化鋁、氧化鎂、氧化鈦等)、金屬氫氧化物(氫氧化鋁、氫氧化鎂等)、硫酸鋇、碳酸鈣、碳酸鎂、氮化硼、硼酸鋁、鈦酸鋇、鈦酸鍶、鈦酸鈣、鈦酸鎂、鈦酸鉍、滑石、黏土、雲母粉、硬化樹脂粉、橡膠粒子(丙烯酸橡膠粒子、核殼型橡膠粒子、交聯丙烯腈丁二烯橡膠粒子、交聯苯乙烯丁二烯橡膠粒子等)。 You may use 2 or more types of filler together.

Examples of thermoplastic resins include acrylic resins, phenoxy resins, polyvinyl acetal resins, polyphenylene ether resins, and carbodiimide resins. Other additives include flame retardants, flame retardant aids, leveling agents, coloring agents, and the like. The thermosetting adhesive layer in the present invention is preferably a thermosetting adhesive layer containing a rubber-modified epoxy resin and a curing agent.

The rubber-modified epoxy resin is an epoxy resin having two or more epoxy groups and forming a rubber skeleton in the resin structure. Examples of the rubber forming the rubber skeleton include polybutadiene, acrylonitrile butadiene rubber, styrene-based elastomer, urethane rubber, and acrylic rubber. The acrylonitrile butadiene rubber may have a carboxyl terminal. Examples of styrene-based elastomers include styrene-butadiene block copolymers, styrene-ethylene propylene block copolymers, styrene-butadiene-styrene block copolymers, styrene-isoprene-styrene block copolymers, styrene-ethylene butylene-styrene block copolymers, and styrene-ethylene propylene-styrene block copolymers. Examples of urethane rubber include copolymers of polycarbonate diol and isocyanate. Examples of the acrylic rubber include copolymers of glycidyl (meth)acrylate, alkyl (meth)acrylate, and aromatic vinyl compounds.

The epoxy equivalent of rubber modified epoxy resin should be 200~350g/eq. The rubber modified epoxy resin is preferably a glycidyl ether type epoxy resin, a glycidyl ester type epoxy resin, a glycidylamine type epoxy resin or an oxidized epoxy resin. The glycidyl ether type epoxy resin is preferably bisphenol A type epoxy resin, bisphenol F type epoxy resin, novolac type epoxy resin or alcohol type epoxy resin.

The glycidyl ester type epoxy resin is preferably hydrophthalic acid type epoxy resin or dimer acid type epoxy resin. The hardener should be dicyandiamine, aromatic diamine, aliphatic diamine, phenol novolac resin, naphthol novolak resin, amino three Novolac resin, or acid anhydride. From the point of view of heat resistance, the system is based on the amino three Novolac resins are preferred.

The F layer in the present invention is a layer containing a tetrafluoroethylene polymer (F polymer) having units (hereinafter also referred to as TFE units) mainly composed of tetrafluoroethylene (hereinafter also referred to as TFE). The F layer may also contain inorganic fillers, resins other than the F polymer, additives, and the like. The ratio of the F polymer in the F layer is preferably 90% by mass or more, and the upper limit thereof is 100% by mass.

The thickness of the F layer is usually 1-1000 μm, preferably 5-500 μm, more preferably 10-500 μm, more preferably 10-300 μm, and especially preferably 10-200 μm. The F polymer is preferably a melt formable F polymer. The melt flow rate of the aforementioned polymer F is preferably 0.1-1000 g/10 min, more preferably 0.5-100 g/10 min, and especially preferably 5-20 g/10 min.

The melting point of polymer F is preferably above 260°C, more preferably 260~325°C, more preferably 280~320°C, and especially preferably 280~315°C. In this case, the F layer has excellent heat resistance, and it is easy to suppress dislocation during thermocompression bonding when forming a conductor circuit or the like. Also, general-purpose devices can be used. The fluorine content of the F polymer is preferably 70 to 78% by mass. In addition, the fluorine content is the ratio of the total mass of fluorine atoms to the total mass of the F polymer, and is determined by ¹⁹ F-NMR.

The F polymer may have at least one functional group (hereinafter also referred to as a functional group) selected from the group consisting of carbonyl-containing groups, hydroxyl groups, epoxy groups, amide groups, amine groups, and isocyanate groups, or may not have functional groups. From the viewpoint of better adhesion between the F layer and other layers (adhesive layer, conductive circuit, heat-resistant substrate layer, etc., hereinafter the same), the F polymer with functional groups is preferable. The F polymer with a functional group may be, for example, a F polymer containing a unit mainly composed of a monomer with a functional group or an end group with a functional group. Specifically, examples include copolymers of TFE with functional groups and PAVE, copolymers of TFE with functional groups and HFP, copolymers of ethylene with functional groups and TFE, and the like.

There may be two or more types of functional groups in the F polymer. From the viewpoint of better adhesion between the F layer and other layers, the functional group is preferably a carbonyl group-containing group. Examples of carbonyl-containing groups include ketone groups, carbonate groups, carboxyl groups, haloformyl groups, alkoxycarbonyl groups, and acid anhydride residues. In addition, the "acid anhydride residue" refers to a group represented by -C(=O)-O-C(=O)-. The keto group is preferably contained between the carbon atoms in the alkylene group having 2 to 8 carbons. In addition, the carbon number of the above-mentioned alkylene group is the carbon number of the carbon atom not containing the ketone group. Examples of haloformyl include -C(=O)F, -C(=O)Cl, -C(=O)Br, -C(=O)I, and -C(=O)F is preferred.

The alkoxy group of the alkoxycarbonyl group is preferably an alkoxy group having 1 to 8 carbon atoms, and particularly preferably a methoxy group or an ethoxy group. The carbonyl-containing group is preferably an anhydride residue or a carboxyl group. The content of functional groups in polymer F is preferably 10-60000, more preferably 300-5000, relative to the number of carbons in the main chain of polymer F which is 1×10 ⁶ . In this case, the adhesion between the F layer and other layers is excellent, especially low-temperature adhesion. The content of the adhesive functional group can be measured by the method described in Unexamined-Japanese-Patent No. 2007-314720.

The functional group in the F polymer is preferably present as a terminal group of the F polymer main chain or a side group of the F polymer main chain, and is particularly preferably present as a side group of the F polymer main chain from the viewpoint of adhesion between the F layer and other layers. These F polymers can be produced by a method of copolymerizing TFE with a monomer having a functional group, or a method of polymerizing TFE using a chain transfer agent or a polymerization initiator capable of imparting a functional group.

The monomer with functional groups is preferably a monomer having a carbonyl group, a hydroxyl group, an epoxy group, an amide group, an amine group or an isocyanate group, and is especially preferably a monomer having an acid anhydride residue or a carboxyl group. Examples of such monomers include maleic acid, itaconic acid, citraconic acid, undecylenic acid, itaconic anhydride (hereinafter also referred to as "IAH"), citraconic anhydride (hereinafter also referred to as CAH), 5-norbornene-2,3-dicarboxylic anhydride (hereinafter also referred to as NAH), maleic anhydride, hydroxyalkyl vinyl ether, and epoxyalkyl vinyl ether. The chain transfer agent that can bring a functional group can be exemplified by acetic acid, acetic anhydride, methyl acetate, ethylene glycol, propylene glycol, and the like.

Polymerization initiators that can bring functional groups can be exemplified by di-n-propyl peroxydicarbonate, diisopropyl peroxydicarbonate, tertiary butylperoxyisopropyl carbonate, bis(4-tertiary butylcyclohexyl)peroxydicarbonate, di-2-ethylhexyl peroxydicarbonate, and the like. The F polymer in which the functional group exists as a side group of the main chain can be exemplified from the viewpoint of its adhesiveness as an F polymer having the following units: a TFE unit, a unit mainly composed of a monomer having an acid anhydride residue, and a unit mainly composed of a fluoroolefin other than TFE.

The aforementioned monomers are preferably IAH, CAH, NAH or maleic anhydride, more preferably IAH, CAH or NAH, especially preferably IAH or NAH. In this case, the adhesion between the F layer and other layers is excellent. In addition, the aforementioned F polymer may contain a 1,2-dicarboxylic acid residue formed by hydrolysis of a part of the acid anhydride residue. In this case, the content of the 1,2-dicarboxylic acid unit is included in the content of the unit mainly composed of a monomer having an acid anhydride residue. Fluoroolefins other than TFE include fluoroethylene, difluoroethylene, trifluoroethylene, hexafluoropropylene (hereinafter also referred to as HFP), hexafluoroisobutylene, perfluoro(alkyl vinyl ether) (hereinafter also referred to as PAVE), functional group-containing fluorovinyl ether, fluorine (divinyl ether), polyfluoro(alkylethylene) (hereinafter also referred to as FAE), and fluoromonomers with a ring structure. VE and FAE are suitable.

PAVE can be exemplified by CF ₂ =CFOCF ₃ , CF ₂ =CFOCF ₂ CF ₃ , CF ₂ =CFOCF ₂ CF ₂ CF ₃ (hereinafter also referred to as PPVE), CF ₂ =CFOCF ₂ CF _{2 CF} 2 CF ₃ , and CF ₂ =CFO(CF ₂ ) ₆ F. FAE can be exemplified by CH ₂ =CF(CF ₂ ) ₂ F, CH ₂ =CF(CF 2 ) ₄ F, CH ₂ =CF(CF ₂ ) ₆ F, CH 2 =CF(CF ₂ ) ₂ H, CH ₂ =CF(CF ₂ ) ₄ H _, CH ₂ =CF(CF ₂ ) ₆ H, CH ₂ =CH(CF ₂ ) ₂ F (also shown below PFEE), CH ₂ =CH(CF ₂ ) ₄ F ₍ hereinafter also referred to as PFBE), CH 2 =CH(CF 2 ) 6 F, CH ₂ =CH(CF ₂ ) 2 H, CH ₂ =CH(CF ₂ ) ₄ H, _{CH 2 = CH} ( _{CF 2 ) 6} H.

Fluorine monomers with a ring structure can be exemplified by perfluoro(2,2-dimethyl-1,3-di uh), 2,2,4-trifluoro-5-trifluoromethoxy-1,3-di Er, perfluoro(2-methylene-4-methyl-1,3-dioxolane). Fluorovinyl ethers with functional groups can be exemplified by CF ₂ =CFOCF ₂ CF(CF ₃ )OCF ₂ CF ₂ SO ₂ F, CF ₂ =CFOCF ₂ CF 2 SO ₂ F, CF ₂ =CFOCF ₂ CF(CF ₃ )OCF ₂ CF ₂ SO ₃ H, CF ₂ =CFOCF ₂ CF ₂ SO ₃ H, CF 2 =C _FO (CF ₂ ) ₃ COOCH ₃ , _{CF 2 =} CFO(CF ₂ ) ₃ COOH. Examples of fluorine (divinyl ether) include CF ₂ =CFCF ₂ CF ₂ OCF=CF ₂ and CF ₂ =CFCF ₂ OCF=CF ₂ .

The F polymer may further have units mainly composed of non-fluorine monomers other than the aforementioned monomers. Examples of non-fluorine monomers include ethylene, propylene, 1-butene, and vinyl esters (vinyl acetate, etc.). Suitable specific examples of the F polymer can be illustrated as: a copolymer of TFE, NAH and PPVE; a copolymer of TFE, IAH and PPVE; a copolymer of TFE, CAH and PPVE; a copolymer of TFE, IAH and HFP; a copolymer of TFE, CAH and HFP; a copolymer of TFE, IAH, PFBE and ethylene; Copolymer of TFE, IAH, HFP, PFBE and ethylene.

In the total units of the F polymer, the TFE unit preferably accounts for 50-99.89 mol% (preferably 50-98.9 mol%), the unit mainly composed of functional monomers preferably accounts for 0.01-5 mol% (preferably 0.1-2 mol%), and the unit mainly composed of HFP, PAVE or FAE preferably accounts for 0.1-49.99 mol% (preferably 1-49.9 mol%). In this case, the heat resistance, chemical resistance and high temperature elastic modulus of the F layer, the adhesiveness between the F layer and other layers, and the moldability and flex resistance of the F polymer are excellent.

When the F polymer contains TFE units, units mainly based on monomers with functional groups, units mainly based on HFP, PAVE or FAE, and units mainly based on ethylene, in the total units constituting the polymer, TFE units should account for 25-80 mole % (preferably 45-63 mole %), and units mainly based on monomers with functional groups should account for 0.01-5 mole % (preferably 0.05-1 mole %), mainly HFP, PAVE or FAE The unit should account for 0.2-20 mol% (preferably 0.5-15 mol%), and the unit mainly composed of ethylene should account for 20-75 mol% (preferably 37-55 mol%). In this case, the chemical resistance and flex resistance of the F layer, the adhesion between the F layer and the adhesive layer, the conductive circuit, the heat-resistant base material layer, and the formability of the F polymer will be more excellent.

Examples of fluororesins without functional groups include copolymers of TFE and PAVE, copolymers of TFE and HFP, copolymers of ethylene and TFE, homopolymers of vinylidene fluoride, homopolymers of chlorotrifluoroethylene, and copolymers of ethylene and chlorotrifluoroethylene. In the manufacturing method of the present invention, the conductive circuit side surface of the circuit substrate having the F layer and the conductive circuit is subjected to plasma treatment, and the conductive circuit is provided on the surface of the F layer. Plasma treatment may include atmospheric pressure plasma treatment, vacuum plasma treatment, etc., and vacuum plasma treatment is preferred.

Vacuum plasma treatment is a plasma treatment using glow discharge in a decompression vessel. The applied voltage is lower than that of corona discharge, which can reduce power consumption. In addition, because of the treatment under low pressure, there is less oxidative degradation on the surface of the F polymer, and the generation of pollutants (low-molecular-weight substances that are decomposition products of the F polymer, etc.) caused by the treatment is less, so the occurrence of WBL (Weak Boundary Layer) can be suppressed, and the peel strength between the F layer and the adhesive layer can be further improved. Examples of the processing gas include helium gas, neon gas, argon gas, nitrogen gas, oxygen gas, carbon dioxide gas, methane gas, carbon tetrafluoride gas, hydrogen gas, and the like. A single gas or a mixed gas can be used for the processing gas. From the viewpoint of forming a plasma-treated surface with an appropriate wetting tension, the processing gas is preferably argon, carbon dioxide gas, a mixed gas of nitrogen and hydrogen, or a mixed gas of argon and hydrogen.

The gas pressure is preferably 0.1~1330Pa, preferably 1~266Pa. A suitable combination of processing gas and processing pressure during plasma processing can be, for example, a combination of nitrogen or a mixture of argon and hydrogen, or carbon dioxide gas with a processing pressure of 1-266 Pa. In this case, it is particularly easy to form a plasma-treated surface with excellent wetting tension, and it is easy to obtain a processed substrate with high peel strength. Under the aforementioned gas pressure, if a power of 10W to 100kW is applied between the electrodes at a high frequency of, for example, 10kHz to 2GHz, the glow discharge will be stable. As the frequency band, other than high frequency, low frequency, microwave, direct current, etc. may be used.

In order to keep the wetting tension of the exposed surface of the F layer within an appropriate range, it is advisable to set the discharge power at 10~500W and the treatment time at 10~100 seconds. The vacuum plasma generator is preferably an internal electrode type. According to the situation, it can also be capacitive coupling type or inductive coupling type such as external electrode type and coil furnace. The shape of the electrode may be, for example, a flat plate, a ring, a rod, or a cylinder. The shape of grounding can also be formed by using the metal inner wall of the processing device as one of the electrodes. To apply a voltage of more than 1000V between the electrodes to maintain a stable plasma state, it is advisable to apply an insulating coating with great voltage resistance to the input electrodes. In the case of exposed metal electrodes such as copper, iron, and aluminum, it is easy to cause arc discharge, so it is advisable to apply enamel coating, glass coating, ceramic coating, etc. to the electrode surface.

The wetting tension of the exposed surface of the F layer in the plasma treated surface is preferably above 30mN/m, more preferably 30~60mN/m, and more preferably below 30~50mN/m. The wetting tension of the exposed surface of the F layer in the plasma treated surface tends to be higher as the number of adhesive groups on the surface of the F layer increases. If the wetting tension is above the lower limit of the above-mentioned range, even if the thermocompression temperature is lowered, the bonding peel strength between the F layer and the adhesive layer will still be further improved. If the wetting tension is below the upper limit of the above-mentioned range, there will be less pollutants caused by the surface treatment, and the adhesion inhibition caused by the pollutants can be suppressed.

In the manufacturing method of the present invention, the plasma-treated surface of the circuit substrate with the plasma-treated surface and the adhesive layer of the adhesive substrate are further thermally bonded at a temperature lower than 260°C. For example, the plasma-treated surface and the adhesive sheet are thermocompressed, or the plasma-treated surface and the adhesive layer of the cover film are thermocompressed. The thermocompression bonding temperature is lower than 260°C, preferably lower than 220°C, more preferably lower than 200°C. If the temperature of thermocompression bonding is lower than 260°C, the position of the conductor circuit etc. will not be displaced easily during thermocompression bonding, and a press device for conventional adhesive substrates can be used.

The temperature for thermocompression bonding is preferably 120°C or higher, more preferably 140°C or higher, and more preferably 160°C or higher from the viewpoint of excellent peel strength between the F layer and the adhesive layer. The pressure of hot pressing is preferably 1~8MPa, preferably 2~6MPa. The time for hot pressing is preferably 30-150 minutes, more preferably 60-120 minutes. A suitable first aspect of the manufacturing method of the present invention can include the following manufacturing method of a multilayer circuit substrate having a multilayer conductor circuit: plasma treatment is performed on the conductor circuit side surface of the original circuit substrate to obtain a circuit substrate with a plasma treatment surface, the plasma treatment surfaces of the plurality of circuit substrates with plasma treatment surfaces are made to face each other, an adhesive sheet is arranged between each plasma treatment surface, and thermal compression bonding is performed at a temperature lower than 260°C.

A suitable second aspect of the manufacturing method of the present invention can be mentioned the following method of manufacturing a circuit substrate with a cover film: the conductor circuit side surface of the original circuit substrate is subjected to plasma treatment to obtain a circuit substrate with a plasma-treated surface, and then the plasma-treated surface of the circuit substrate and the adhesive layer of the cover film attached to the adhesive layer are subjected to thermal compression at a temperature lower than 260°C. FIG. 1 is a cross-sectional view showing an example of a multilayer circuit board. The multilayer circuit board 1 has a heat-resistant base material layer 10, an F layer 12 arranged on both sides thereof, a conductor circuit 14 arranged on the surface of the F layer 12, an adhesive layer 16 connected to the surface of the conductor circuit 14 and the surface of the F layer 12, and a cover layer 18 connected to the adhesive layer 16.

Fig. 2 is a cross-sectional view showing an example of a multilayer circuit board. The multilayer circuit substrate 2 has two layers of heat-resistant base material layers 10, F layers 12 arranged on both sides of each heat-resistant base material layer, conductor circuits 14 arranged on the surface of the F layer 12, an adhesive layer 16A in contact with the conductor circuit 14 surface and the F layer 12 surface on both sides, an adhesive layer 16B in contact with the conductor circuit 14 surface and the F layer 12 surface on one side, and a cover layer 18 in contact with the adhesive layer 16B. Fig. 3 is a cross-sectional view showing an example of a multilayer circuit board. The multilayer circuit board 3 has two heat-resistant substrate layers 10, an F layer 12 disposed on one side of each heat-resistant substrate layer, a conductor circuit 14 disposed on the surface of the F layer 12, an adhesive layer 16A in which one surface is in contact with the surface of the conductor circuit 14 on the lower side and the surface of the F layer 12, and the other surface is in contact with the heat-resistant substrate layer 10 on the upper side, an adhesive layer 16B in which one surface is in contact with the surface of the conductor circuit 14 on the upper side and the surface of the F layer 12, and the adhesive layer 16B. The covering layer 18.

Fig. 4 is a cross-sectional view showing the state of manufacturing the multilayer circuit board of Fig. 1 . The circuit board 20 has a heat-resistant base material layer 10 , F layers 12 provided on both surfaces thereof, and conductor circuits 14 provided on the surface of the F layer 12 . Both surfaces of the circuit substrate 20 are treated with plasma. The adhesive layer-attached cover film 22 has a cover layer 18 composed of an F layer, and an adhesive layer 26 provided on one side of the cover layer 18 . After the cover film 22 with the adhesive layer attached, the circuit board 20 , and the cover film 22 with the adhesive layer are stacked sequentially from below in such a way that the plasma-treated surface of the circuit board 20 is in contact with the adhesive layer 26, they are heat-compressed at a temperature lower than 260°C.

Fig. 5 is a cross-sectional view showing the state of manufacturing the multilayer circuit board of Fig. 2 . The adhesive layer-attached cover film 22, circuit board 20, adhesive sheet 24, circuit board 20, and adhesive layer-attached cover film 22 are stacked sequentially from below in such a way that the plasma-treated surface of the circuit board 20 is in contact with the adhesive layer 26, and then heat-compressed at a temperature lower than 260°C. Fig. 6 is a cross-sectional view showing the state of manufacturing the multilayer circuit board of Fig. 3 . The circuit board 30 has a heat-resistant base material layer 10 , an F layer 12 provided on one surface thereof, and a conductor circuit 14 provided on the surface of the F layer 12 . The surface of the circuit board 30 on the conductor circuit 14 side is treated with plasma. After the circuit substrate 30, the adhesive sheet 24, the circuit substrate 30, and the cover film 22 with the adhesive layer attached are stacked sequentially from below in such a way that the plasma-treated surface of the circuit substrate 30 is in contact with the adhesive layer 26, they are heat-compressed at a temperature lower than 260°C.

In the manufacturing method of the present invention described above, since the surface of the original circuit board on the side where the conductor circuit is provided has been subjected to plasma treatment, the adhesive layer of the original circuit board and the adhesive substrate can still be fully thermally bonded even at a temperature lower than 260°C. As a result, a processed circuit board (multilayer circuit board, circuit board with cover film, etc.) with excellent adhesion between the F layer and the adhesive layer and a peel strength of, for example, 5 N/cm or more between the F layer and the conductor circuit can be obtained.

The adhesive layer-attached film (hereinafter also referred to as the adhesive film) of the present invention is a film in which the F polymer film (hereinafter also referred to as the F film) and the thermosetting adhesive layer are sequentially laminated. After hardening the thermosetting adhesive layer attached to the film under the conditions of pressing temperature 160°C, pressing pressure 4 MPa, and pressing time 90 minutes, the peel strength of the interface between the F film and the hardened thermosetting adhesive layer is 5 N/cm or more.

The subsequent film may have a thermosetting adhesive layer on only one side of the F film, or may have a thermosetting adhesive layer on both sides of the F film. An F film with a thermosetting adhesive layer on only one side of the F film is advantageous as a cover film. The F film having a thermosetting adhesive layer on the double-sided layer of the F film is advantageous as an interlayer insulating film. When the adhesive film has thermosetting adhesive layers on both sides of the F film, the peel strength of the interface between the F film and the cured thermosetting adhesive layer is 5 N/cm or more for either thermosetting adhesive layer.

The peel strength of the interface between the F film and the cured thermosetting adhesive layer is preferably 8 N/cm or higher, more preferably 10 N/cm or higher. If the aforementioned peel strength is more than the lower limit value of the aforementioned range, the adhesion between the F film and the cured thermosetting adhesive layer will be excellent. The higher the peel strength, the better, and the upper limit is not limited. Next, the thermosetting adhesive layer in the film contains a thermosetting adhesive. Next, the thickness of the thermosetting adhesive layer in the film is preferably 5-50 μm. When the adhesive film has thermosetting adhesive layers on both sides of the F film, the thickness of each thermosetting adhesive layer is preferably within the aforementioned range.

The thermosetting adhesive layer preferably contains a thermosetting resin. The thermosetting adhesive layer preferably further contains a curing agent and a curing accelerator. Next, the types of the thermosetting resin, curing agent, and curing accelerator in the film are the same as those described above for the manufacturing method of the processed circuit board of the present invention, and their suitable ranges are also the same. Next, the F film among the films is a film containing a tetrafluoroethylene-based polymer (F polymer) having units mainly composed of tetrafluoroethylene.

F film may also contain inorganic fillers, resins other than F polymer, additives, etc. The ratio of the F polymer in the F film is preferably 90% by mass or more. The upper limit of the ratio of the F polymer is 100% by mass. The thickness of F film should be 12~100μm. Next, the F polymer in the thin film is the same as the F polymer in the above-mentioned method for manufacturing a circuit board of the present invention, and its suitable range is also the same. The manufacturing method of the subsequent film can be, for example: a method of coating a thermosetting adhesive on one or both surfaces of the F film; a method of laminating a thermosetting adhesive sheet on one or both surfaces of the F film. When using the adhesive film as a cover film, a thermosetting adhesive layer is formed on one surface of the F film. When using the adhesive film as an interlayer insulating film, a thermosetting adhesive layer is formed on both sides of the F film.

Examples of coating methods for thermosetting adhesives include die coating, spray coating, roll coating, spin coating, gravure coating, micro gravure coating, gravure lithography, knife coating, contact coating, rod coating, fountain wire bar, slot die coating, and the like. The method of laminating the F film and the thermosetting adhesive sheet includes pressing, roll lamination, double-belt pressing, and the like.

In the manufacture of the adhesive film, it is advisable to conduct plasma treatment on one or both surfaces of the F film, and form a thermosetting adhesive layer on the surface of the plasma-treated side of the F film. Thereby, the adhesion between the F film and the thermosetting adhesive layer will be more excellent. The conditions of the plasma treatment are the same as those described in the plasma treatment in the manufacturing method of the circuit board of the present invention, and the suitable range is also the same. In the following film, the wetting tension of the plasma-treated surface of the F film is preferably 30mN/m or more, preferably 30-60mN/m, and more preferably 30-50mN/m. The wetting tension of the plasma-treated surface of the F film tends to be higher as the amount of functional groups on the surface of the F film increases. If the wetting tension is above the lower limit of the aforementioned range, even if the thermocompression temperature is lowered, the adhesion between the F film and the thermosetting adhesive layer is still more excellent. If the wetting tension is below the upper limit of the aforementioned range, less pollutants will be produced by surface treatment, and it will be less likely to cause adhesion hindrance caused by pollutants.

As explained above, the adhesive film of the present invention is laminated with the F film and the thermosetting adhesive layer. Since F film has better electrical characteristics than polyimide film, it can reduce transmission loss when used as a printed substrate material for high-frequency applications. In addition, after the adhesive film of the present invention is thermocompressed at a temperature of 160°C, a pressure of 4 MPa, and a time of 90 minutes to harden the thermosetting adhesive layer, the peel strength of the interface between the F film and the cured thermosetting adhesive layer is 5 N/cm or more. Therefore, the bonding film of the present invention and the circuit substrate can still be firmly bonded even under relatively low temperature (lower than 260° C.) thermocompression bonding.

Furthermore, in the adhesive film of the present invention, if the F polymer with functional groups is used as the F polymer, it is easy to adjust the peel strength of the interface between the F film and the cured thermosetting adhesive layer to 5 N/cm or more. Also, if a thermosetting adhesive layer is formed on the surface of the F film whose surface wettability has been adjusted by plasma treatment, it is easy to adjust the peel strength of the interface between the F film and the cured thermosetting adhesive layer to 5 N/cm or more. The adhesive film of the present invention is preferably used as a cover film or an interlayer insulating film, especially as an adhesive base material in the above-mentioned method for manufacturing a processed substrate of the present invention. Fig. 7 is a cross-sectional view showing an example of using an adhesive film as a cover film. Next, the film 10' has an F film 12' and a thermosetting adhesive layer 14' provided on the surface of the F film 12'. The surface of the F film 12' on the side of the thermosetting adhesive layer 14' is treated with plasma.

Fig. 8 is a cross-sectional view showing an example of using an adhesive film as an interlayer insulating film. Next, the film 11' has an F film 12' and thermosetting adhesive layers 14' provided on both sides thereof. The surface of the F film 12' on the side of the thermosetting adhesive layer 14' is treated with plasma. Fig. 9 is a cross-sectional view showing an example of a circuit board with a cover film in which an adhesive film is used as a cover film. The circuit substrate 1' with a cover film has an insulating layer 20', a conductor circuit 22' disposed on both sides thereof, and an adhesive film 10''. The adhesive film 10'' is a hardened adhesive film 10' that is in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20'. In the following film 10'', the thermosetting adhesive layer 14' of the film 10' is thermally hardened to form an adhesive layer 14'' that is in contact with the surface of the conductive circuit 22' and the surface of the insulating layer 20' other than the part where the conductive circuit 22' is provided.

Fig. 10 is a cross-sectional view showing another example of a circuit board with a cover film in which an adhesive film is used as a cover film. The circuit substrate 2' with a cover film has two insulating layers 20', a conductor circuit 22' on both sides, an adhesive layer 24'' that is in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20', and an adhesive film 10'' that is in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20'. Fig. 11 is a cross-sectional view showing another example of a circuit board with a cover film in which an adhesive film is used as a cover film. The circuit substrate 3' with a cover film has two insulating layers 20', a conductor circuit 22' on one side thereof, an adhesive layer 24'', and an adhesive film 10'' that is in contact with the surface of the conductor circuit 22' on the upper side and the surface of the insulating layer 20', and one surface of the aforementioned adhesive layer 24'' is in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20' on the lower side, while the other surface is in contact with the insulating layer 20' on the upper side.

12 is a cross-sectional view showing an example of a cover film-attached multilayer circuit board in which an adhesive film is used as a cover film and an interlayer insulating film. The multilayer circuit substrate 4' with a cover film has two insulating layers 20', a conductor circuit 22' disposed on both sides of each insulating layer, an adhesive film 11'', and an adhesive film 10'' that is in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20'. In the following film 10'', the thermosetting adhesive layer 14' of the film 10' is thermally hardened to form an adhesive layer 14'' that is in contact with the surface of the conductive circuit 22' and the surface of the insulating layer 20' other than the part where the conductive circuit 22' is provided. On both sides of the film 11'', the thermosetting adhesive layer 14 on both sides of the film 11 is thermally hardened to form an adhesive layer 14'', which is in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20' respectively.

Fig. 13 is a cross-sectional view showing another example of a cover film-attached multilayer circuit board in which an adhesive film is used as a cover film and an interlayer insulating film. The circuit substrate 5 with a cover film has two insulating layers 20', a conductor circuit 22' on one side of each insulating layer, an adhesive film 11'', and an adhesive film 10'' that is in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20' on the upper side.

Fig. 14 is a cross-sectional view showing how the circuit board of Fig. 9 is manufactured. The circuit substrate 30' has an insulating layer 20' and conductor circuits 22' provided on both sides thereof. The surface of the insulating layer 20' on both sides of the circuit substrate 30' is treated with plasma. The adhesive film 10', the circuit board 30', and the adhesive film 10' are stacked in order from below so that the plasma-treated surface of the circuit board 30' is in contact with the thermosetting adhesive layer 14', and then thermally press-bonded.

Fig. 15 is a cross-sectional view showing how the circuit board of Fig. 10 is manufactured. The adhesive film 10', the circuit board 30', the adhesive sheet 24', the circuit board 30', and the adhesive film 10' are stacked sequentially from below in such a way that the plasma-treated surface of the circuit board 30' is in contact with the thermosetting adhesive layer 14', and then thermally pressed together. Fig. 16 is a cross-sectional view showing how the circuit board of Fig. 11 is manufactured. The circuit board 32' has an insulating layer 20' and a conductor circuit 22 provided on one side thereof. The surface of the insulating layer 20' of the circuit substrate 32' on the side where the conductor circuit 22' is provided is treated with plasma. The circuit board 32', the adhesive sheet 24', the circuit board 32', and the adhesive film 10' are stacked sequentially from below in such a way that the plasma-treated surface of the circuit board 32' is in contact with the thermosetting adhesive layer 14', and then thermally pressed together.

Fig. 17 is a cross-sectional view showing how the circuit board of Fig. 12 is manufactured. The bonding film 10', the circuit substrate 30', the bonding film 11', the circuit substrate 30', and the bonding film 10' are stacked sequentially from below in such a way that the plasma-treated surface of the circuit substrate 30' is in contact with the thermosetting adhesive layer 14', and then heat-compressed. Fig. 18 is a cross-sectional view showing how the circuit board of Fig. 13 is manufactured. The circuit board 32', the adhesive film 11', the circuit board 32', and the adhesive film 10' are sequentially stacked from below in such a way that the plasma-treated surface of the circuit board 32' is in contact with the thermosetting adhesive layer 14', and then heat-compressed.

In addition, the circuit boards 30' and 32' are preferably circuit boards having a plasma-treated surface obtained by plasma-treating at least the surface of the original circuit board on the conductor circuit side in the above-mentioned manufacturing method of the present invention. As explained above, the adhesive film of the present invention has excellent electrical properties when used as a cover film, an interlayer insulating film, etc., can reduce transmission loss in high-frequency applications, and can be used at relatively low temperatures (less than 260°C).

Example Hereinafter, the present invention will be described in detail with examples, but the present invention should not be interpreted by these limitations. In addition, the materials, physical properties, and evaluation methods used in Examples and the like are as follows. (melting point of polymer) A differential scanning calorimeter (DSC-7020 manufactured by Seiko Instruments Inc.) was used to record the melting peak of the polymer when the temperature was raised at a rate of 10°C/min, and the temperature (°C) corresponding to the maximum value was taken as the melting point.

(melt flow rate of polymer) Using a melt indexer (manufactured by Technol Seven Co., Ltd.), the mass (g) of the copolymer flowing out from a nozzle with a diameter of 2 mm and a length of 8 mm under a load of 49 N at 372° C. for 10 minutes was measured, and it was regarded as a melt flow rate. (wet tension) The wetting tension of the exposed surface of the polymer layer after plasma treatment was determined in accordance with JIS K 6768:1999 using a mixed liquid for wetting tension test (manufactured by Wako Pure Chemical Industries, Ltd.). (peel strength) The object (film or processed circuit board) is cut out to a length of 150 mm and a width of 10 mm to prepare an evaluation sample. Peel off the polymer layer and the adhesive layer from one end of the evaluation sample in the longitudinal direction to a position of 50 mm. Using a tensile testing machine, peel at 90° at a tensile speed of 50 mm/min, and measure the average load at a distance of 20 mm to 80 mm as the peel strength (N/cm).

<TFE-based polymer> Polymer F1: polymer produced according to paragraphs [0111]~[0113] of International Publication No. 2016/104297 (ratio of each unit (molar ratio): TFE unit/NAH unit/PPVE unit=97.9/0.1/2.0, adhesive group content: 1000 units relative to the number of carbons in the main chain of the polymer 1×10 ⁶ , melting point: 305°C, melting Flow rate: 11.0 g/10 minutes, fluorine content: 75% by mass). Polymer F2: Commercially available PFA (ratio of each unit (molar ratio): TFE unit/PPVE unit=98.0/2.0, melting point: 310° C., melting flow rate: 11.0 g/10 minutes, fluorine content: 75% by mass).

＜Film F1＞ Film F1: A film obtained by extruding polymer F1 into a film at a die temperature of 340° C. using a 65 mmφ single-screw extruder having a coat hanger-shaped die with a width of 750 mm (thickness: 12 μm). ＜Film F2＞ Film F2: A film (thickness 12 μm) obtained by extruding polymer F2 into a film at a die temperature of 340° C. using a 65 mmφ single-screw extruder having a coat hanger-shaped die with a width of 750 mm.

<Polyimide film> Film PI: KAPTON (trade name) 100EN (thickness: 25 μm) manufactured by Toray-DuPont Corporation. <Copper foil> Copper foil: Electrolytic copper foil (manufactured by Fukuda Metal Foil Powder Industry Co., Ltd., CF-T4X-SV-12, thickness: 12 μm, surface arithmetic average roughness (Rz _JIS ): 1.1 μm).

<Thermosetting adhesive sheet> Adhesive sheet 1: NIKAFLEX (trade name) SAFG (thickness: 25 μm) manufactured by Nikkan Kogyo Co., Ltd. Adhesive Tablet 11: Contains acrylonitrile butadiene modified epoxy resin, aluminum hydroxide, acrylic rubber, amino three Adhesive sheet (thickness: 15 μm) of novolak resin (curing agent) and imidazole (hardening accelerator).

[Example 1] Production example and evaluation example of a thin film with an adhesive layer [Example 1-1] A high-frequency voltage of 110 kHz was applied between the electrodes in a carbon dioxide gas environment with a gas pressure of 20 Pa, and plasma treatment was performed on one side of the film F1 under the condition of a discharge power of 300 W for 60 seconds. The wetting tension of the plasma-treated surface of film F1 was 50 mN/m. Adhesive sheet 1 was stacked on the plasma-treated surface of film F1 to obtain film Ad1 with a thermosetting adhesive layer. Film Ad1 was press-treated by vacuum pressing (temperature 160°C, pressure 4 MPa, time 90 minutes), and the peel strength of the interface between film F1 and the hardened adhesive layer was measured for the treated film Ad1, and the result was 8N/cm.

[Example 1-2] ~ [Example 1-7] Except for changing the type of film and plasma treatment conditions, in the same manner as in Example 1-1, films Ad2-Ad7 with thermosetting adhesive layers were respectively obtained. Table 1 summarizes the production conditions, wetting tension, and peel strength of the films of the respective adhesive layers.

[Table 1]

In addition, in Examples 1-3 (comparative examples), the plasma-treated film F1 was superimposed on the adhesive sheet 1, and the peeling strength of the interface was lower than 0.2 N/cm after the pressing treatment conditions were set at a temperature of 280° C., a pressure of 4 MPa, and a time of 30 minutes. It is believed that this is due to the fact that the temperature of the pressing process was 280°C and the adhesive layer had been thermally decomposed.

[Example 2] Production example and evaluation example of processed circuit board (Part 1) [Example 2-1] The copper foil, the film F1, the film PI, the film F1, and the copper foil were sequentially stacked, and hot-pressed under vacuum at 320° C. for 30 minutes to obtain a metal-clad laminate. One side of the metal-clad laminate was masked and immersed in an etching solution (manufactured by Sunhayato Co., Ltd., H-1000A, ferric chloride aqueous solution) to completely remove the copper foil on one side. Subsequently, a high-frequency voltage of 110 kHz was applied between the electrodes in a carbon dioxide gas environment with a gas pressure of 20 Pa, and plasma treatment was performed on the exposed surface of the film F1 layer under the condition of a discharge power of 300 W for 60 seconds, and a circuit substrate 1 with a plasma-treated surface was obtained. The wetting tension of the exposed surface of the film F1 layer on the plasma-treated surface was 50 mN/m.

Arrange two circuit boards 1 with their respective plasma-treated surfaces facing each other, insert and stack adhesive sheets 1 therebetween, and perform thermal compression treatment (temperature 160° C., pressure 4 MPa, thermocompression bonding for 90 minutes) to obtain a processed circuit board 1 in which two circuit boards 1 are adhered via the cured product of the adhesive sheet 1 . The peel strength of the interface between the film F1 and the cured adhesive layer was measured and found to be 8 N/cm.

[Example 2-2] ~ [Example 2-7] Processed circuit substrates 2 to 4 were obtained in the same manner as in Example 1-1, except for changing the type of film and the plasma treatment conditions. Table 2 summarizes the manufacturing conditions of each processed circuit board, the wetting tension and the peeling strength of the thin film layer.

[Table 2]

In addition, in Example 2-3 (comparative example), two circuit boards 1 are arranged in such a way that their respective plasma-treated surfaces face each other, and a stacked adhesive sheet 1 is inserted between them, and the hot-pressing treatment conditions are set at a temperature of 280° C., a pressure of 4 MPa, and a pressing time of 30 minutes. After the pressing treatment, the peel strength of the interface is lower than 0.2 N/cm. It is believed that the cover is thermally decomposed due to the temperature of 280°C during the pressing process. In addition, in Example 2, the evaluation was performed without providing a conductive circuit on the surface of the TFE-based polymer layer, but the same result was obtained when the conductive circuit was provided on the surface of the TFE-based polymer layer.

[Example 3] Production example and evaluation example of processed circuit board (Part 2) The copper foil, the film F1, the film PI, the film F1, and the copper foil were sequentially stacked, and hot-pressed under vacuum at 320° C. for 30 minutes to obtain a metal-clad laminate. One side of the metal-clad laminate was masked and immersed in an etching solution (manufactured by Sunhayato Co., Ltd., H-1000A, ferric chloride aqueous solution), and a conductor circuit was formed from the copper foil on one side. A high-frequency voltage of 110 kHz was applied between the electrodes in a carbon dioxide gas environment with a gas pressure of 20 Pa, and a plasma treatment was performed on the conductive circuit side (the exposed surface of the F1 layer of the film) under the condition of a discharge power of 300 W for 60 seconds to obtain a circuit substrate 11 with a plasma-treated surface.

The plasma-treated surfaces of the two circuit boards 11 were arranged to face each other, and the stacked adhesive sheets 11 were inserted therebetween, and heat-pressed by vacuum pressing (temperature 160° C., pressure 4 MPa, heat-compression bonding for 90 minutes) to obtain a processed circuit board 11 in which two circuit boards 11 were bonded via the cured product of the adhesive sheet 11. The peel strength of the interface between the film F1 and the cured adhesive layer was measured and found to be 9 N/cm. Also, when the acrylonitrile-butadiene-modified epoxy resin was replaced with butadiene-modified epoxy resin rubber, styrene-based elastomer-modified epoxy resin, urethane-modified epoxy resin, or acryl-based modified epoxy resin, the same results were obtained.

Industrial availability The processed circuit substrate obtained by the manufacturing method of the present invention is advantageous as a circuit substrate for electronic devices and electrical devices requiring miniaturization and high performance as multilayer circuit substrates and circuit substrates with cover films. The adhesive film of the present invention is advantageous as a cover film, interlayer insulating film, etc. used in the manufacture of multilayer circuit boards, circuit boards with cover films, and the like.

In addition, the Japanese patent application No. 2017-243191 filed on December 19, 2017 and the Japanese patent application No. 2018-006324 filed on January 18, 2018 are cited here, and all contents of the specification, scope of claims, drawings and abstracts are incorporated as the disclosure of the specification of the present invention.

1, 2, 3‧‧‧Multilayer circuit board 10‧‧‧Heat-resistant substrate layer 12‧‧‧F floor 14‧‧‧conductor circuit 16, 16A, 16B‧‧‧adhesion layer 18‧‧‧Covering layer 20, 30‧‧‧circuit board 22‧‧‧Cover film with adhesive layer attached 24‧‧‧adhesive tablets 26‧‧‧adhesive layer 1', 2', 3'‧‧‧circuit substrate with cover film 4', 5'‧‧‧Multilayer circuit board with cover film 10', 11'‧‧‧Film Bonding 10'', 11''‧‧‧adhesive film after hardening 12'‧‧‧F film 14'‧‧‧thermosetting adhesive layer 14''‧‧‧thermosetting adhesive layer 20'‧‧‧Insulation layer 22'‧‧‧conductor circuit 24'‧‧‧adhesive tablet 30', 32'‧‧‧circuit board

FIG. 1 is a cross-sectional view showing an example of a multilayer circuit board. Fig. 2 is a cross-sectional view showing another example of a multilayer circuit board. Fig. 3 is a cross-sectional view showing another example of a multilayer circuit board. Fig. 4 is a cross-sectional view showing the state of manufacturing the multilayer circuit board of Fig. 1 . Fig. 5 is a cross-sectional view showing the state of manufacturing the multilayer circuit board of Fig. 2 . Fig. 6 is a cross-sectional view showing the state of manufacturing the multilayer circuit board of Fig. 3 . Fig. 7 is a cross-sectional view showing an example of an adhesive film as a cover film.

Fig. 8 is a cross-sectional view showing an example of an adhesive film as an interlayer insulating film. Fig. 9 is a cross-sectional view showing an example of a circuit board with a cover film. Fig. 10 is a cross-sectional view showing another example of a circuit board with a cover film. Fig. 11 is a cross-sectional view showing another example of a circuit board with a cover film. Fig. 12 is a cross-sectional view showing an example of a multilayer circuit board with a cover film. Fig. 13 is a cross-sectional view showing another example of a multilayer circuit board with a cover film. Fig. 14 is a cross-sectional view showing how the circuit board of Fig. 9 is manufactured.

Fig. 15 is a cross-sectional view showing how the circuit board of Fig. 10 is manufactured. Fig. 16 is a cross-sectional view showing how the circuit board of Fig. 11 is manufactured. Fig. 17 is a cross-sectional view showing the state of manufacturing the multilayer circuit board of Fig. 12 . Fig. 18 is a cross-sectional view showing the state of manufacturing the multilayer circuit board of Fig. 13 .

10‧‧‧Heat-resistant substrate layer

12‧‧‧F floor

14‧‧‧conductor circuit

18‧‧‧Covering layer

20‧‧‧circuit board

22‧‧‧Cover film with adhesive layer attached

26‧‧‧adhesive layer

Claims (9)

A method for manufacturing a processed circuit substrate, characterized in that: plasma treatment is performed on the conductive circuit side surface of the circuit substrate having a polymer layer and a conductive circuit to obtain a circuit substrate having a plasma-treated surface having a wetting tension of the exposed surface of the polymer layer of 30 mN/m or more, and then the plasma-treated surface of the circuit substrate is thermally bonded to the adhesive layer of the substrate with an adhesive layer at a temperature lower than 260° C. to manufacture a processed circuit substrate. And it is formed by processing a metal foil whose surface ten-point average roughness (Rz _JIS ) is 2.0 μm or less. The manufacturing method according to claim 1, wherein the peel strength of the thermocompression bonding surface of the aforementioned processed circuit substrate is 5 N/cm or more. The manufacturing method according to claim 1 or 2, wherein the aforementioned substrate with an adhesive layer is a cover film with an adhesive layer attached, and the aforementioned processed circuit substrate is a circuit substrate with a covered film; or, the aforementioned substrate with an adhesive layer is an adhesive sheet, and the aforementioned processed circuit substrate is a circuit substrate with an adhesive layer attached. The production method according to claim 1 or 2, wherein the tetrafluoroethylene-based polymer has at least one functional group selected from the group consisting of carbonyl-containing groups, hydroxyl groups, epoxy groups, amido groups, amine groups, and isocyanate groups. The production method according to claim 1 or 2, wherein the melting point of the aforementioned tetrafluoroethylene-based polymer is 260° C. or higher. The manufacturing method according to claim 1 or 2, wherein the aforementioned adhesive layer is a thermosetting adhesive containing a rubber-modified epoxy resin and a hardener layer. The manufacturing method according to claim 1 or 2, wherein the aforementioned substrate with an adhesive layer is a substrate as follows: after the plasma-treated surface of the aforementioned circuit substrate and the adhesive layer of the aforementioned substrate with an adhesive layer are thermally bonded under the conditions of a pressing temperature of 160° C., a pressing pressure of 4 MPa, and a pressing time of 90 minutes, the peel strength of the thermally-pressed surface of the aforementioned treated circuit substrate is 5 N/cm or more. A method for manufacturing a multi-layer circuit board, characterized in that: plasma treatment is performed on the conductor circuit side surface of the circuit board having a polymer layer and a conductor circuit to obtain a circuit board having a plasma-treated surface with a wetting tension of the exposed surface of the polymer layer above 30 mN/m, and then the plasma-treated surfaces of the plurality of circuit boards with plasma-treated surfaces face each other and an adhesive sheet is placed between each plasma-treated surface, and thermal compression bonding is performed at a temperature lower than 260° C. to manufacture a multi-layer circuit board with multiple layers of conductor circuits. The polymer layer comprises a tetrafluoroethylene polymer, and the conductor circuit is set on the surface of the polymer layer and the surface ten-point average roughness (Rz_JIS) is formed by processing a metal foil of 2.0 μm or less. A method for manufacturing a circuit substrate with a cover film, characterized in that: plasma treatment is performed on the conductor circuit side surface of the circuit substrate having a polymer layer and a conductor circuit to obtain a circuit substrate having a plasma-treated surface whose wetting tension on the exposed surface of the polymer layer is 30 mN/m or more, and then the plasma-treated surface of the circuit substrate is thermally bonded to the adhesive layer of the cover film with an adhesive layer below 260°C to produce a circuit substrate with a cover film. The above-mentioned conductive circuit is set on the surface of the above-mentioned polymer layer, and the surface ten-point average roughness (Rz_JIS) is formed by processing a metal foil of 2.0 μm or less.