TWI803981B - Driving circuit, display apparatus and driving method thereof - Google Patents

Abstract

A driving circuit, a display apparatus and a driving method thereof are provided. The driving circuit includes a driving transistor, a driving signal generator, and a control circuit. The driving transistor is used to drive a light emitting element. The driving signal generator is coupled to the driving transistor. The driving signal generator compares a sweep signal with a data voltage to generate a driving signal. The driving signal is used to control a connection state of the driving transistor. The control circuit is coupled to the driving signal generator. The control circuit is used to adjust the data voltage according to a signal width of the driving signal.

Description

Driving circuit, display device and driving method thereof

The present invention relates to a driving circuit, and in particular to a driving circuit capable of stably outputting driving signals, a display device and a driving method thereof.

In the current driving method of the display panel, a pulse width modulation (Pulse Width Modulation, PWM) signal generator can be used to control the light-emitting period of the display panel through scanning signals. However, in the process of signal transmission, it may be affected by unexpected current and impedance in the display panel, which may cause waveform distortion of the scanning signal (such as distortion of resistors and capacitors). Especially in large-size, high-resolution or three-dimensional display panels, it is easy to delay and deform the waveform of the scanning signal due to the parasitic capacitance and load impedance generated by the pixel array on the display panel, resulting in The driving signal does not meet expectations, causing problems such as too short light-emitting periods or uneven brightness of some light-emitting elements in the display panel, which further affects the display quality.

In view of this, the present invention provides a driving circuit, a display device and a driving method thereof, which can stably output driving signals, thereby improving the display quality of the display panel.

In an embodiment of the present invention, the driving circuit includes a driving transistor, a driving signal generator and a control circuit. The driving transistor is used to drive the light emitting element. The driving signal generator is coupled to the driving transistor. The driving signal generator compares the frequency sweep signal with the data voltage to generate a driving signal. The driving signal is used to control the conduction state of the driving transistor. The control circuit is coupled to the driving signal generator. The control circuit is used for adjusting the data voltage according to the signal width of the driving signal.

In an embodiment of the present invention, the display device includes a plurality of light emitting elements, a plurality of driving transistors, a plurality of driving signal generators and a control circuit. The plurality of driving transistors are respectively used to drive a plurality of light-emitting elements. The multiple driving signal generators are correspondingly coupled to the multiple driving transistors. Each driving signal generator compares the frequency sweep signal with the data voltage to generate a driving signal. The driving signal is used to control the conduction state of the corresponding driving transistor. The control circuit is coupled to a plurality of driving signal generators. The control circuit is used for adjusting the corresponding data voltage according to the signal width of the driving signal of each driving signal generator.

In an embodiment of the present invention, the driving method includes: generating a driving signal by comparing the scanning signal and the data voltage through a driving signal generator; controlling the conduction state of the driving transistor according to the driving signal, wherein the driving transistor is used to drive a light emitting element; and adjusting the data voltage according to the signal width of the driving signal through the control circuit.

Based on the above, the driving circuit, the display device and the driving method thereof proposed by the present invention can generate the driving signal through the driving signal generator according to the sweep signal and the data voltage, and adjust the data voltage according to the signal width of the driving signal through the control circuit. In this way, it is possible to stably output a driving signal whose signal width meets expectations, thereby improving the display quality of the display panel.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

The term "coupled (or connected)" used throughout the specification of this case (including the scope of claims) may refer to any direct or indirect means of connection. For example, if it is described in the text that a first device is coupled (or connected) to a second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be connected to the second device through other devices or certain A connection means indirectly connected to the second device. The terms "first" and "second" mentioned in the entire description of this case (including the scope of the patent application) are used to name elements (elements), or to distinguish different embodiments or ranges, and are not used to limit the number of elements The upper or lower limit of , nor is it used to limit the order of the elements.

FIG. 1 is a schematic diagram of a driving circuit 100 according to an embodiment of the present invention. In the embodiment shown in FIG. 1 , the driving circuit 100 includes a driving transistor M1 , a driving signal generator 110 and a control circuit 120 . In this embodiment, the driving signal generator 110 is coupled to the driving transistor M1 and the control circuit 120, and the driving transistor M1 is coupled to the light emitting element L1. Wherein, the driving transistor M1 is used to drive the light emitting element L1. According to design requirements, the light emitting element L1 can be, for example, an organic light emitting diode (Organic Light Emitting Diode, OLED), a micro light emitting diode (Micro LED) or any other form of light emitting diode, which is not limited in this embodiment. .

FIG. 2 is a schematic flowchart of a driving method according to an embodiment of the present invention. For the driving circuit 100 shown in FIG. 1 , the display device 400 shown in FIG. 4 , the display device 500 shown in FIG. 5 , and (or) the display device 600 shown in FIG. 6 , reference may be made to the related description of FIG. 2 . Please refer to Figure 1 and Figure 2 at the same time. In step S210 , the driving signal generator 110 can receive the sweep signal Vsweep and the data voltage Vdata, and compare the sweep signal Vsweep and the data voltage Vdata to generate the driving signal DS. The frequency sweep signal Vsweep and the data voltage Vdata can be generated by the control circuit 120 or other signal generators (not shown), which are not limited in this embodiment.

In step S220, the driving circuit 100 can control the conduction state of the driving transistor M1 according to the driving signal DS, thereby controlling the light-emitting period of the light-emitting element L1. According to practical applications, in some embodiments, the frequency sweep signal Vsweep may include a ramp signal. The driving signal generator 110 may include a pulse width modulation (Pulse Width Modulation, PWM) signal generator to output the driving signal DS in the form of PWM. For example, in some embodiments, the frequency sweep signal Vsweep may have an initial level (different from the voltage value of the data voltage Vdata) and continuously decrease (or increase) its voltage value within a certain period of time. When the voltage value of the sweep signal Vsweep is lower than (or higher than) the voltage value of the data voltage Vdata, the driving signal generator 110 can generate the driving signal DS to turn on the driving transistor M1 to drive the light emitting element L1 to start emitting light. Relatively, when the voltage value of the frequency sweep signal Vsweep is not lower than (or not higher than) the voltage value of the data voltage Vdata, the driving signal generator 110 may not generate the driving signal DS, and the driving transistor M1 is turned off at this time, and the light-emitting element L1 does not emit light. In this way, the driving signal generator 110 can control the light-emitting period of the light-emitting element L1 according to the sweep signal Vsweep and the data voltage Vdata.

In step S230, the control circuit 120 can adjust the data voltage Vdata according to the signal width of the driving signal DS. For example, FIG. 3 shows an action waveform diagram of a driving circuit 100 according to an embodiment of the present invention. Please refer to Figure 1 to Figure 3. In the embodiment shown in FIG. 3 , it is assumed that the frequency sweep signal Vsweep has an initial level Vsi (in this embodiment, the initial level Vsi is greater than the data voltage Vdata) and under ideal conditions, the voltage change of the frequency sweep signal Vsweep is as waveform 301 , and assume that the voltage value of the data voltage Vdata is Vd1. Then the driving signal generator 110 shown in FIG. 1 can generate the driving signal D1 after comparing the waveform 301 with the voltage value Vd1, wherein the signal width of the driving signal D1 is T, which is the ideal width (expected width) of the driving signal DS. In this embodiment, it is further assumed that the voltage change of the sweep signal Vsweep after the waveform distortion occurs is as shown in the waveform 302 . Then, when the data voltage Vdata keeps the voltage value Vd1 unchanged, the driving signal generator 110 generates the driving signal D2 after comparing the waveform 302 with the voltage value Vd1, wherein the signal width of the driving signal D2 is N.

In detail, in this embodiment, when the waveform distortion shown in the waveform 302 occurs in the frequency sweep signal Vsweep, resulting in that the signal width N of the driving signal D2 actually output by the driving signal generator 110 is not equal to the ideal width T, it will cause The actual turn-on time of the driving transistor M1 is not as expected, thereby affecting the light-emitting time of the light-emitting element M1, for example, may cause too short a light-emitting period or uneven brightness or other problems. In this case, the control circuit 120 can receive the driving signal D2, and adjust the voltage value Vd1 of the data voltage Vdata according to the signal width T of the driving signal D2, so that the driving signal generator 110 can output the driving signal DS with an ideal width T. .

For example, in some embodiments, the control circuit 120 can generate the ideal width T according to the data voltage Vdata, and detect the signal width N of the driving signal D2. For example, in the embodiment of FIG. 3 , the control circuit 120 can sample the driving signal D2 according to the clock signal CLK, so as to detect the signal width N of the driving signal D2 according to the pulse number CNT. Wherein, the frequency of the clock signal CLK is greater than the frequency of the driving signal D2. In some embodiments, the control circuit 120 can calculate the width difference between the ideal width T and the signal width N, and obtain the adjustment value Vcomp of the data voltage Vdata according to the width difference, and then adjust the data voltage Vdata according to the adjustment value Vcomp. For example, in this embodiment, the control circuit 120 can adjust the data voltage Vdata from the voltage value Vd1 to the voltage value Vd2 (in this embodiment, Vd2=Vd1+Vcomp), so that the driving signal generator 110 compares the waveform 302 with the adjusted The driving signal DS generated after the voltage value Vd2 of the data voltage Vdata has a signal width of an ideal width T.

來獲得調整值Vcomp。舉例而言，在一些實施例中，可以參照下列數學關係式來計算資料電壓Vdata的調整值Vcomp：

其中電壓值VL’表示掃頻訊號Vsweep在發生波形失真後的電壓下降值（在本實施例中

）。失真參數

可以相關於掃頻訊號Vsweep（例如波形302）的斜率與標準值（例如波形301的斜率）間的誤差。在一些實施例中，可以預先設置失真參數

的初始值再透過實驗進行調整或建立查找表，或者可以依據掃頻訊號Vsweep的實際失真情況動態調整失真參數

。舉例而言，假設在解析度為8K4K（即7680*4320畫素）的顯示面板中，其中一個驅動訊號產生器對應接收的Vsi定義為10位元（bit）資料的最大值1023、輸入影像的資料Vdata為512，其產生的驅動訊號的理想寬度T為5120個時脈週期（clock cycle）、實際輸出的訊號寬度N為5000個時脈週期，以及失真參數

設定為0.9。則資料Vdata的補償值Vcomp為

，即資料Vdata可以由512調整為522（即512+10），使該驅動訊號產生器可以穩定輸出具有理想寬度T的驅動訊號。 Regarding the calculation method of the adjustment value Vcomp, in some embodiments, the control circuit 120 can be based on the width difference between the ideal width T and the signal width N of the driving signal D2 and the preset distortion parameters

to obtain the adjustment value Vcomp. For example, in some embodiments, the adjustment value Vcomp of the data voltage Vdata can be calculated with reference to the following mathematical relationship:

The voltage value VL' represents the voltage drop value of the sweep signal Vsweep after waveform distortion occurs (in this embodiment

). Distortion parameters

It can be related to the error between the slope of the sweep signal Vsweep (such as the waveform 302 ) and the standard value (such as the slope of the waveform 301 ). In some embodiments, distortion parameters can be preset

The initial value can be adjusted through experiments or a look-up table can be established, or the distortion parameters can be dynamically adjusted according to the actual distortion of the sweep signal Vsweep

. For example, suppose that in a display panel with a resolution of 8K4K (that is, 7680*4320 pixels), one of the drive signal generators is defined as the maximum value of 1023 for 10-bit (bit) data and 1023 for the input image. The data Vdata is 512, the ideal width T of the driving signal generated by it is 5120 clock cycles (clock cycle), the actual output signal width N is 5000 clock cycles, and the distortion parameters

Set to 0.9. Then the compensation value Vcomp of the data Vdata is

, that is, the data Vdata can be adjusted from 512 to 522 (ie, 512+10), so that the driving signal generator can stably output a driving signal with an ideal width T.

、調整後的資料電壓Vdata以及（或是）調整值Vcomp。此外，在一些實施例中，控制電路120可以重複執行上述圖2所示的步驟S210～S230，直到資料電壓Vdata在調整前後的調整值Vcomp小於預先定義的電壓閾值，或驅動訊號DS的訊號寬度N與理想寬度T的寬度差小於預先定義的寬度閾值，以結束上述步驟。在一些實施例中，控制電路100可以透過顯示器、揚聲器或其他輸出設備（未繪示）來輸出調整結果。 According to actual application requirements, in some embodiments, the control circuit 120 may have a memory (not shown) to store distortion parameters

, the adjusted data voltage Vdata and (or) the adjusted value Vcomp. In addition, in some embodiments, the control circuit 120 may repeatedly execute the above-mentioned steps S210-S230 shown in FIG. 2 until the adjustment value Vcomp of the data voltage Vdata before and after adjustment is smaller than a predefined voltage threshold or the signal width of the driving signal DS The width difference between N and the ideal width T is smaller than a predefined width threshold, so as to end the above steps. In some embodiments, the control circuit 100 can output the adjustment result through a display, a speaker or other output devices (not shown).

According to design requirements, the control circuit 120 can be an arithmetic unit with computing power, such as a central processing unit (Central Processing Unit, CPU), or other programmable general-purpose or special-purpose microprocessors (Microprocessor), digital Signal processor (Digital Signal Processor, DSP), programmable controller, application specific integrated circuit (Application Specific Integrated Circuits, ASIC), programmable logic device (Programmable Logic Device, PLD) or other similar devices or these devices A combination of computer programs that can be loaded and executed to complete corresponding operating functions. In some embodiments, the control circuit 120 can also implement various operating functions in the form of hardware circuits, and its detailed steps and implementation methods can obtain sufficient teachings, suggestions and implementation instructions from common knowledge in the technical field.

FIG. 4 is a schematic diagram of a display device 400 according to an embodiment of the present invention. In the embodiment shown in FIG. 4 , the display device 400 includes pixel circuits 430_1 - 430 — n , driving signal generators 410_1 - 410 — n and a control circuit 420 . Each of the pixel circuits 430_1˜430 — n includes a light emitting element and a driving transistor for driving the light emitting element. In this embodiment, the driving signal generators 410_1-410_n are respectively coupled to the driving transistors in the pixel circuits 430_1-430_n, and output driving signals DS1-DSn to control the conduction states of the corresponding driving transistors. The implementation of the driving signal generators 410_1~410_n and the driving transistors and light emitting elements in the pixel circuits 430_1~430_n shown in FIG. 4 can refer to the driving signal generator 110, the driving transistor M1 and the light emitting element T1 shown in FIG. Relevant instructions are analogized, so I won’t repeat them here.

In this embodiment, the control circuit 420 can generate the frequency sweep signal Vsweep and the data voltages Vdata1˜Vdatan, and adjust the corresponding data voltages Vdata1˜Vdatan according to the signal widths of the driving signals DS1˜DSn generated by the driving signal generators 430_1˜430_n respectively. Vdatan. In some embodiments, the control circuit 420 may be implemented using a timing controller (Timing Controller). According to design requirements, in some embodiments, the display device 400 may further include level shifters 440_1˜440_n respectively coupled between the driving signal generators 410_1˜410_n and the control circuit 420 to adjust the driving signals DS1˜ DSn voltage value.

It should be noted here that, in this embodiment, the display device 400 has resistors R1 ˜ Rn to indicate the influence of the circuit on the sweep signal Vsweep during signal transmission. In detail, after the frequency sweep signal Vsweep is affected by one or more of the resistors R1 ˜ Rn, the frequency sweep signals Vsweep1 ˜ Vsweepn actually received by the driving signal generators 410_1 ˜ 410 — n may have different degrees of waveform distortion. For example, in this embodiment, the sweeping signal Vsweepn received by the driving signal generator 410_n that is farther away from the control circuit 420 (the more resistors R1-Rn pass through) (compared with the one that is closer to the control circuit 420 The degree of waveform distortion of the sweep signal Vsweep1) received by the driving signal generator 410_1 may be greater. Therefore, in some embodiments, the control circuit 420 can set the distortion parameters according to the actual distortion levels of the sweeping signals Vsweep1-Vsweepn or the distribution positions of the driving signal generators 410_1-410_n, or can also set the distortion parameters according to some known distortion parameters and The relative positions of the driving signal generators 410_1˜410_n are used to estimate the distortion parameters corresponding to the sweeping signals Vsweep1˜Vsweepn, so as to adjust the corresponding data voltages Vdata1˜Vdatan. The adjustment method of the data voltages Vdata1 -Vdatan can be deduced by referring to the related description of FIG. 3 , and will not be repeated here.

In this embodiment, the control circuit 420 can receive all the driving signals DS1 - DSn to adjust the corresponding data voltages Vdata1 - Vdatan. In other embodiments, the control circuit 420 may also only receive part of the driving signals DS1˜DSn. For example, according to actual application requirements, the driving signal generators 410_1-410_n can be divided into multiple groups, and the control circuit 420 can receive one of the driving signals DS1-DSn corresponding to each group as a representative of each group. drive signal. For example, they can be grouped according to sub-pixels with different wavelengths (such as red, green, blue (RGB) or other wavelengths) in the pixel circuits 430_1-430_n, or can be grouped according to the distribution of the driving signal generators 410_1-410_n position or in other ways. In this way, the control circuit 420 can adjust the corresponding data voltages Vdata1-Vdatan of each group according to one or more of the driving signals DS1-DSn of each group.

FIG. 5 is a schematic diagram of a display device 500 according to another embodiment of the present invention. In the embodiment shown in FIG. 5 , the display device 500 includes pixel circuits 530_1 - 530_n, driving signal generators 510_1 - 510_n, a control circuit 520 and level shifters 541_1 - 541_n. The pixel circuits 530_1-530_n, the driving signal generators 510_1-510_n, the control circuit 520 and the level shifters 540_1-540_n shown in FIG. 5 can refer to the pixel circuits 430_1-430_n, the driving signal generators 410_1-410_n shown in FIG. The related descriptions of the control circuit 420 and the level shifters 440_1˜440_n are analogized. The difference from the embodiment shown in FIG. 4 is that the display device 500 shown in FIG. 5 may further include a logic gate G1 for performing logic operations on all (or part of) the driving signals DS1˜DSn received by the control circuit 520, and The operation result is transmitted to the control circuit 520 , thereby reducing the wiring cost from the logic gate G1 to the control circuit 520 . For example, in this embodiment, the logic gate G1 may be an OR logic gate. In other embodiments, according to design requirements, the logic gate G1 may also be an AND logic gate or other logic gates, which is not limited in this embodiment.

FIG. 6 is a schematic diagram of a display device 600 according to yet another embodiment of the present invention. FIG. 7 illustrates a signal timing diagram of the display device 600 shown in FIG. 6 according to an embodiment of the present invention. In the embodiment shown in FIG. 6 , the display device 600 includes a driving signal generator 610 , a pixel circuit 630 and a control circuit 620 . According to actual design, in some embodiments, a part of the display device 400 shown in FIG. 4 and (or) the display device 500 shown in FIG. 5 may include the display device 600 shown in FIG. 6 .

According to design requirements, the display device 600 shown in FIG. 6 may include a switching transistor M3. In some embodiments, the control circuit 620 may generate a sweep voltage Vsweep, a data voltage Vdata, and a scan signal Vscan, wherein the scan signal Vscan may control the transistor The conduction state of M3. In detail, in this embodiment, the first terminal of the switching transistor M3 receives the data voltage Vdata, the second terminal of the switching transistor M3 is coupled to the driving signal generator 610, and the control terminal of the switching transistor M3 receives the scan signal Vscan. Thus, in some embodiments, the control circuit 620 can specify the driving signal generator 610 to generate the driving signal DS through the scanning signal Vscan and the switching transistor M3, and adjust the corresponding data voltage according to the signal width of the received driving signal DS. Vdata. The adjustment method of the data voltage Vdata can be deduced by referring to the related description of FIG. 3 , and will not be repeated here.

According to design requirements, in this embodiment, the pixel circuit 630 may include a light emitting element L2, a driving transistor M2, and a transistor M4. In detail, the first terminal of the transistor M4 receives the first voltage Vdd, and the control terminal of the transistor M4 receives the enabling signal EM. The enabling signal EM can be generated by the control circuit 620 or other signal generators (not shown), which is not limited in this embodiment. The first terminal of the driving transistor M2 is coupled to the second terminal of the transistor M4, the second terminal of the driving transistor M2 is coupled to the first terminal of the light-emitting element L2, and the control terminal of the driving transistor M2 receives the driving signal generator The driving signal DS generated by 610 . The second end of the light emitting element L2 receives the second voltage Vss. In this embodiment, the driving transistor M2 and the switching transistor M3 may be metal-oxide-semiconductor field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistors, MOSFETs) whose conduction type is N-type, and the transistor M4 may be It is a P-type MOSFET, which is not limited in this embodiment. In some embodiments, the voltage Vdd may be a logic high level, and the voltage Vss may be a ground level, which is not limited in this embodiment.

Refer to FIG. 7 for the signal timing diagram of the above-mentioned display device 600 . Please refer to FIG. 6 and FIG. 7 at the same time. In the embodiment shown in FIG. 7, when the scan signal Vscan is switched from a logic low level to a logic high level, the switching transistor M3 is turned on, and the driving signal generator 610 can receive the data voltage Vdata output by the control circuit 620. At this time, the display device 600 may enter the scan period Tsc from the reset period Tre. When the enabling signal EM is switched from a logic high level to a logic low level, the transistor M4 is turned on, and the control circuit 620 can output the frequency sweep signal Vsweep to the driving signal generator 610, and the voltage value of the frequency sweep signal Vsweep begins to gradually decrease (in this case In the embodiment, the initial level of the sweep signal Vsweep is greater than the data voltage Vdata), at this time, the display panel 600 can enter the light emitting period Tem from the scanning period Tsc. When the voltage value of the frequency sweep signal Vsweep is lower than the data voltage Vdata, the driving signal generator 610 can generate a driving signal DS to turn on the driving transistor M2, thereby controlling the light-emitting element L2 to start emitting light, and simultaneously sending the driving signal DS to the control circuit 620. In this way, the control circuit 620 can adjust the data voltage Vdata according to the signal width of the driving signal DS, thereby maintaining the driving signal generator 610 to generate the driving signal DS with an ideal width.

In summary, the driving circuit, display device and driving method thereof proposed by the present invention can generate a driving signal through the driving signal generator according to the frequency sweep signal and the data voltage, and adjust the data through the control circuit according to the signal width of the driving signal. Voltage. In this way, it is possible to stably output a driving signal whose signal width meets expectations, thereby improving the display quality of the display panel.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention should be defined by the scope of the appended patent application.

100: drive circuit 110, 410_1, 410_n, 510_1, 510_n, 610: driving signal generator 120, 420, 520, 620: control circuit 301, 302: waveform 400, 500, 600: display device 430_1, 430_n, 530_1, 530_n, 630: pixel circuit 440_1, 440_n, 540_1, 540_n: level shifters CLK: clock signal CNT: pulse number D1, D2, DS, DS1, DSn: drive signal EM: enable signal G1: logic gate L1, L2: light emitting elements M1～M4: Transistor N, T: signal width R1, Rn: resistance S210～S230: steps Tem: during glow Tre: during reset Tsc: during scan Vcomp: compensation value Vd1, Vd2, Vdd, Vsi, Vss: voltage value Vdata, Vdata1, Vdatan: data voltage Vscan: scan signal Vsweep, Vsweep1, Vsweepn: frequency sweep signal

FIG. 1 is a schematic diagram of a driving circuit according to an embodiment of the present invention. FIG. 2 is a schematic flowchart of a driving method according to an embodiment of the present invention. FIG. 3 is a schematic diagram of an action waveform of a driving circuit according to an embodiment of the present invention. FIG. 4 is a schematic diagram of a display device according to an embodiment of the present invention. FIG. 5 is a schematic diagram of a display device according to another embodiment of the present invention. FIG. 6 is a schematic diagram of a display device according to yet another embodiment of the present invention. FIG. 7 is a diagram illustrating a signal timing diagram of the display device shown in FIG. 6 according to an embodiment of the present invention.

100: drive circuit 110: Driving signal generator 120: control circuit DS: drive signal L1: light emitting element M1: drive transistor Vdata: data voltage Vsweep: frequency sweep signal

Claims (21)

A drive circuit, comprising: A driving transistor for driving a light-emitting element; a driving signal generator, coupled to the driving transistor, the driving signal generator compares a sweep signal and a data voltage to generate a driving signal, the driving signal is used to control the conduction state of the driving transistor; and A control circuit, coupled to the driving signal generator, is used for adjusting the data voltage according to a signal width of the driving signal. The driving circuit as claimed in item 1, wherein the control circuit is used for: generating an ideal width according to the data voltage; detecting the signal width of the drive signal; calculating a width difference between the ideal width and the signal width, and obtaining an adjustment value according to the width difference; and The data voltage is adjusted according to the adjustment value. The driving circuit according to claim 2, wherein the control circuit samples the driving signal according to a clock signal to detect the signal width of the driving signal. The driving circuit as claimed in claim 2, wherein the control circuit obtains the adjustment value according to the width difference and a distortion parameter, and the distortion parameter is related to an error between the slope of the frequency sweep signal and a standard value. The driving circuit as described in claim item 4, wherein the calculation method of the adjustment value is as follows:

in

represents the ideal width,

Indicates the signal width,

Indicates the frequency sweep signal,

represents the distortion parameter, and

Indicates the data voltage. The driving circuit according to claim 1, wherein when the voltage value of the frequency sweep signal is lower than the voltage value of the data voltage, the driving signal generator generates the driving signal to turn on the driving transistor. A display device comprising: A plurality of light emitting elements and a plurality of driving transistors, wherein the driving transistors are respectively used to drive the light emitting elements; A plurality of driving signal generators are correspondingly coupled to the driving transistors, wherein each driving signal generator compares a frequency sweep signal with a data voltage to generate a driving signal, and the driving signal is used to control the corresponding driving transistor the conduction state of the crystal; and A control circuit, coupled to the driving signal generators, is used for adjusting the corresponding data voltage according to the signal width of the driving signal of each driving signal generator. The display device as claimed in item 7, wherein the control circuit is used for: generating an ideal width according to the data voltage; detecting the signal width of the driving signal; calculating a width difference between the ideal width and the signal width of the driving signal, and obtaining an adjustment value according to the width difference; and The data voltage is adjusted according to the adjustment value. The display device according to claim 8, wherein the control circuit samples the driving signal according to a clock signal to detect the signal width of the driving signal. The display device as claimed in claim 8, wherein the control circuit obtains the adjustment value according to the width difference and a distortion parameter, and the distortion parameter is related to an error between the slope of the frequency sweep signal and a standard value. The display device as described in claim item 10, wherein the calculation method of the adjustment value is as follows:

,in

represents the ideal width,

Indicates the signal width of the drive signal,

Indicates the frequency sweep signal,

represents the distortion parameter, and

Indicates the data voltage. The display device as claimed in item 7, wherein when the voltage value of the sweep signal is lower than the voltage value of the data voltage, the driving signal generator generates the driving signal to turn on the corresponding driving transistor. The display device as described in claim 7, wherein the driving signal generators are divided into a plurality of groups, and the control circuit receives one of the driving signals corresponding to each group, or receives all of the driving signals signal. The display device as described in claim item 7, further comprising: A logic gate performs a logic operation on the driving signals received by the control circuit, and transmits an operation result to the control circuit. The display device as described in claim item 7, further comprising: A plurality of level shifters are respectively correspondingly coupled between the driving signal generators and the control circuit for adjusting the voltage of the driving signals. A driving method comprising: comparing a frequency sweep signal with a data voltage through a driving signal generator to generate a driving signal; controlling the conduction state of a driving transistor according to the driving signal, wherein the driving transistor is used to drive a light-emitting element; and The data voltage is adjusted through a control circuit according to a signal width of the driving signal. The driving method as described in claim 16, further comprising using the control circuit to: generating an ideal width according to the data voltage; detecting the signal width of the drive signal; calculating a width difference between the ideal width and the signal width, and obtaining an adjustment value according to the width difference; and The data voltage is adjusted according to the adjustment value. The driving method as described in claim item 17, further comprising: The signal width of the driving signal is detected by sampling the driving signal according to a clock signal through the control circuit. The driving method as described in claim item 17, further comprising: The adjustment value is obtained through the control circuit according to the width difference and a distortion parameter, and the distortion parameter is related to the error between the slope of the frequency sweep signal and a standard value. The driving method as described in claim item 19, wherein the calculation method of the adjustment value is as follows:

,in

represents the ideal width,

Indicates the signal width,

Indicates the frequency sweep signal,

represents the distortion parameter, and

Indicates the data voltage. The driving method according to claim 16, wherein when the voltage value of the frequency sweep signal is lower than the voltage value of the data voltage, the driving signal generator generates the driving signal to turn on the driving transistor.

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