TWI802001B - Doppler signal processing device and doppler signal processing method - Google Patents
Doppler signal processing device and doppler signal processing method Download PDFInfo
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Abstract
Description
本發明關於一種都普勒訊號處理裝置,尤指一種用以抑制背景中的干擾的都普勒訊號處理裝置。The invention relates to a Doppler signal processing device, in particular to a Doppler signal processing device for suppressing background interference.
當使用雷達裝置偵測物體時,背景干擾常造成問題。舉例而言,若使用雷達裝置偵測生命跡象或人體,背景干擾常甚為顯著,導致偵測結果不正確。為了減少背景干擾之影響,可使用訊號能量門檻值裝置或頻率能量偵測方法,以判斷偵測結果。然而,這些方法都無法提供高精確度的偵測結果。Background interference often causes problems when using radar devices to detect objects. For example, if a radar device is used to detect vital signs or human bodies, background interference is often significant, resulting in incorrect detection results. In order to reduce the influence of background interference, a signal energy threshold device or a frequency energy detection method can be used to judge the detection result. However, none of these methods can provide high-precision detection results.
實施例提供一種都普勒訊號處理裝置,用以根據一接收無線訊號抑制一背景之干擾,該都普勒訊號處理裝置包含一頻率分析器、一干擾抑制器、一干擾基線估測器及一合成器。該頻率分析器用以根據一數位訊號產生一頻域訊號,其中該數位訊號對應於該接收無線訊號,且該數位訊號包含該背景之該干擾產生之干擾能量。該干擾抑制器用以根據該頻域訊號及一頻域干擾估測訊號執行一抑制操作以產生一干擾抑制頻域訊號,其中於該干擾抑制頻域訊號中,該干擾能量於頻域係被該頻域干擾估測訊號所抑制。該干擾基線估測器用以根據該頻域訊號產生或更新該頻域干擾估測訊號,其中該頻域干擾估測訊號對應於該干擾於該頻域之一能量分佈。該合成器用以根據該干擾抑制頻域訊號產生一干擾抑制時域數位訊號,其中該干擾抑制時域數位訊號係相關於該干擾能量已被抑制之該數位訊號。The embodiment provides a Doppler signal processing device for suppressing a background interference according to a received wireless signal, the Doppler signal processing device includes a frequency analyzer, an interference suppressor, an interference baseline estimator and a synthesizer. The frequency analyzer is used to generate a frequency domain signal according to a digital signal, wherein the digital signal corresponds to the received wireless signal, and the digital signal contains interference energy generated by the interference of the background. The interference suppressor is used to perform a suppression operation according to the frequency-domain signal and a frequency-domain interference estimation signal to generate an interference-suppressed frequency-domain signal, wherein in the interference-suppressed frequency-domain signal, the interference energy in the frequency domain is suppressed by the The frequency-domain interference estimation signal is suppressed. The interference baseline estimator is used for generating or updating the frequency domain interference estimation signal according to the frequency domain signal, wherein the frequency domain interference estimation signal corresponds to an energy distribution of the interference in the frequency domain. The synthesizer is used for generating an interference-suppressed time-domain digital signal according to the interference-suppressed frequency-domain signal, wherein the interference-suppressed time-domain digital signal is related to the digital signal whose interference energy has been suppressed.
另一實施例提供一種都普勒訊號處理方法,用以根據一接收無線訊號抑制一背景之干擾,該都普勒訊號處理方法包含根據一數位訊號產生一頻域訊號,其中該數位訊號對應於該接收無線訊號,且該數位訊號包含該背景之該干擾產生之干擾能量;根據該頻域訊號及一頻域干擾估測訊號執行一抑制操作以產生一干擾抑制頻域訊號,其中於該干擾抑制頻域訊號中,該干擾能量於頻域係被抑制;根據該頻域訊號產生或更新該頻域干擾估測訊號,其中該頻域干擾估測訊號對應於該干擾於該頻域之一能量分佈;及根據該干擾抑制頻域訊號產生一干擾抑制時域數位訊號,其中該干擾抑制時域數位訊號係相關於該干擾能量已被抑制之該數位訊號。Another embodiment provides a Doppler signal processing method for suppressing background interference based on a received wireless signal, the Doppler signal processing method includes generating a frequency domain signal based on a digital signal, wherein the digital signal corresponds to The received wireless signal, and the digital signal contains interference energy generated by the background interference; performing a suppression operation according to the frequency domain signal and a frequency domain interference estimation signal to generate an interference suppressed frequency domain signal, wherein in the interference In suppressing the frequency domain signal, the interference energy is suppressed in the frequency domain; generating or updating the frequency domain interference estimation signal according to the frequency domain signal, wherein the frequency domain interference estimation signal corresponds to the interference in one of the frequency domains energy distribution; and generating an interference-suppressed time-domain digital signal based on the interference-suppressed frequency-domain signal, wherein the interference-suppressed time-domain digital signal is related to the digital signal whose interference energy has been suppressed.
下文將參照附圖以詳細描述示例性實施例,以便本領域一般技術人員易於實現。本發明之構思可以各種形式體現,而不限於本文闡述之示例性實施例。為清楚起見,已省略習知部件之描述,且相同之附圖標記係意指相同之元件。Exemplary embodiments will be described in detail below with reference to the accompanying drawings for easy implementation by those skilled in the art. The inventive concept can be embodied in various forms without being limited to the exemplary embodiments set forth herein. For clarity, descriptions of well-known components have been omitted, and like reference numbers refer to like elements.
第1圖係實施例中,用以偵測物體Obj之訊號偵測裝置10的示意圖。訊號偵測裝置10可為雷達。訊號偵測裝置10可包含天線ANtx及ANrx、放大裝置Atx及Arx、振盪器OSC、接收單元1066,及都普勒訊號處理裝置100。都普勒訊號處理裝置100可抑制干擾,如下所述。訊號偵測裝置10可另包含數位轉類比轉換器15及16,及數位串行干擾單位17。該些元件之耦接關係可如第1圖所示。FIG. 1 is a schematic diagram of a
振盪器OSC可提供載波訊號fc,且載波訊號fc實質上具有固定頻率。放大裝置Atx(例如功率放大器)可輸出無線訊號d(例如射頻發射訊號),由天線ANtx發射。無線訊號d可根據載波訊號fc而產生。產生無線訊號d之產生器可根據載波訊號fc選擇性設置於振盪器OSC及放大裝置Atx之間。若物體Obj(例如人體)位於訊號偵測裝置10之偵測範圍中,則物體Obj可反射無線訊號d,以產生接收無線訊號d’,例如為射頻接收訊號。天線ANrx可接收反射的接收無線訊號d’,放大裝置Arx(例如低雜訊放大器)可放大接收無線訊號d’,且接收無線訊號d’可輸入至接收單元1066。The oscillator OSC can provide a carrier signal fc, and the carrier signal fc has a substantially fixed frequency. The amplifying device Atx (such as a power amplifier) can output a wireless signal d (such as a radio frequency transmission signal), which is transmitted by the antenna ANtx. The wireless signal d can be generated according to the carrier signal fc. The generator for generating the wireless signal d can be selectively arranged between the oscillator OSC and the amplifying device Atx according to the carrier signal fc. If the object Obj (such as a human body) is within the detection range of the
接收單元1066可根據載波訊號fc及接收無線訊號d’產生至少一數位訊號。舉例而言,接收單元1066可包含混合器1071及1072、相位調整單元1073、及類比轉數位轉換器(ADC)1074及1075。混合器1071可混合載波訊號fc及接收無線訊號d’,且將結果由類比轉數位轉換器1074轉為數位訊號S1。相位調整單元1073可將載波訊號fc的相位旋轉特定相位(例如90度)以產生調整後載波訊號fc’。混合器1072可混合調整後載波訊號fc’及接收無線訊號d’,且將結果由類比轉數位轉換器1075轉為數位訊號S2。接收單元1066輸出的至少一數位訊號可包含類比轉數位轉換器1074及/或1075輸出的數位訊號S1及/或S2。The
舉例而言,數位訊號S1及S2可為時域信號,分別相關於正交/同相(In-phase/quadrature,I/Q)調變之同相通道及正交通道。都普勒訊號處理裝置100可對數位訊號S1及S2進行處理以抑制數位訊號S1及S2之干擾部份,以產生數位訊號S1’及S2’。For example, the digital signals S1 and S2 can be time-domain signals, which are respectively related to an in-phase channel and a quadrature channel of In-phase/quadrature (I/Q) modulation. The Doppler
數位訊號S1’及S2’可為時域信號,分別由數位轉類比轉換器15及16進行處理以產生類比訊號S1a及S2a。舉例而言,類比訊號S1a及S2a可分別相關於正交/同相(I/Q)調變之同相通道及正交通道。數位串行干擾單元(digital serial interference unit)17可對數位訊號S1’及S2’進行處理以產生用以偵測物體之資料。數位串行干擾單元17產生的資料可透過序列周邊介面(SPI)或積體電路間(I
2C)介面傳送至外部,例如是由使用者選用的裝置,以進行分析。舉例而言,微控制器(MCU)可用以分析數位串行干擾單元17產生之資料以偵測物體Obj。因為時域信號中干擾部份已被抑制,相較於數位訊號S1及S2,數位訊號S1’及S2’可較為「乾淨」(也就是在時域包含較少的干擾能量),且使用者可允許使用相對較為簡易的硬體/軟體以處理相關於偵測物體Obj之資料。第1圖之接收單元1066之架構僅為舉例,而非用以限制電路的構造。
The digital signals S1 ′ and S2 ′ can be time-domain signals, which are respectively processed by the digital-to-
第2圖為第1圖之都普勒訊號處理裝置100的示意圖。都普勒訊號處理裝置100可根據接收無線訊號d’抑制背景中之干擾。被抑制的干擾可為固定干擾(stationary interference),例如,可為干擾頻率大致不變或變化不大的準固定干擾(quasi-stationary interference)。都普勒訊號處理裝置100可包含頻率分析器(frequency analyzer)110、干擾抑制器(interference suppressor)120、干擾基線估測器(interference baseline estimator)130及合成器(synthesizer)140。第2圖中,i可為時間之索引,n可為時域區塊之索引,且k可為頻率之索引,亦即頻格(frequency bin)。FIG. 2 is a schematic diagram of the Doppler
頻率分析器110可根據數位訊號x(i)產生頻域訊號X
n(k)。第2圖之數位訊號x(i)可對應於第1圖之數位訊號S1及/或S2,且為相關於正交/同相(I/Q)調變之同相通道及正交通道的原始資料。數位訊號x(i)可對應於接收無線訊號d’,且包含背景中的干擾產生之(待抑制的)干擾能量。
The
干擾抑制器120可根據頻域訊號X
n(k)及頻域干擾估測訊號U
n(k)執行抑制操作以產生干擾抑制頻域訊號Y
n(k)。干擾抑制頻域訊號Y
n(k)中,干擾能量於頻域可藉由使用頻域干擾估測訊號U
n(k)而被抑制。
The
干擾基線估測器130可根據頻域訊號X
n(k)產生或更新頻域干擾估測訊號U
n(k)。頻域干擾估測訊號U
n(k)可對應於干擾在頻域中的能量分佈(例如,準固定干擾能量)。
The
合成器140可根據干擾抑制頻域訊號Y
n(k)產生干擾抑制時域數位訊號y(i)。干擾抑制時域數位訊號y(i)可相關於干擾能量已被抑制的數位訊號x(i)。第1圖及第2圖中,第2圖之干擾抑制時域數位訊號y(i)可對應於第1圖之數位訊號S1’及S2’。
The
第2圖至第6圖中,頻域訊號X n(k)可包含頻域訊號向量,且頻域干擾估測訊號U n(k)可包含頻域干擾估測訊號向量。 From FIG. 2 to FIG. 6, the frequency-domain signal X n (k) may include a frequency-domain signal vector, and the frequency-domain interference estimation signal U n (k) may include a frequency-domain interference estimation signal vector.
第3圖為一實施例中,第1圖及第2圖之都普勒訊號處理裝置100的示意圖。如第3圖所示,頻率分析器110可執行短時距傅立葉轉換1102以使用數位訊號x(i)產生頻域訊號X
n(k)。頻率分析器110可另執行緩衝操作1101以收集相異時點之數位訊號x(i)以作為短時距傅立葉轉換1102之輸入。
FIG. 3 is a schematic diagram of the Doppler
如第3圖所示,合成器140可使用干擾抑制頻域訊號Y
n(k)執行逆快速傅立葉轉換(Inverse FFT)1401以產生相關於干擾抑制時域數位訊號y(i)之時域訊號y
n(m)。合成器140另可使用時域訊號y
n(m)執行重疊累加操作1402以產生干擾抑制時域數位訊號y(i)。
As shown in FIG. 3 , the
第4圖為相關於第3圖之短時距傅立葉轉換(STFT)的訊號處理的示意圖。第4圖中,M、K、L及O可為相關於離散時間訊號的索引。表示為X的訊號可相關於頻域,表示為x的訊號可相關於時域,且m及n可為時域區塊的索引。FIG. 4 is a schematic diagram of signal processing related to the short-time Fourier transform (STFT) in FIG. 3 . In FIG. 4, M, K, L, and O may be indexes related to discrete-time signals. A signal denoted X may be related to the frequency domain, a signal denoted x may be related to the time domain, and m and n may be indexes of time domain blocks.
於第3圖及第4圖中,舉例而言,緩衝操作1101可包含收集數位訊號x(i)之K個樣本,以產生訊號x
n(m)。頻域訊號X
n(k)可表示為{X
n(k): k = 0~(K-1)},且干擾抑制頻域訊號Y
n(k)可表示為{Y
n(k): k = 0~(K-1)}。
In FIGS. 3 and 4, for example,
第3圖中,干擾抑制頻域訊號Y n(k)可表示為Y n(k) = A n(k) × e j ∠ Xn(k),或表示為Y n(k) = B n(k) × e j ∠ Xn(k),如後文所述。 In Figure 3, the interference suppression frequency domain signal Y n (k) can be expressed as Y n (k) = A n (k) × e j ∠ Xn(k) , or as Y n (k) = B n ( k) × e j ∠Xn (k) , as described later.
根據實施例,可根據頻譜相減方法,將干擾抑制頻域訊號Y n(k)表示為Y n(k) = A n(k) × e j ∠ Xn(k),其中A n(k) = MAX {|X n(k)| - α•U n(k),η }。參數η可為A n(k)之最小值,且參數α可被調整以控制訊雜比(SNR),以達到目標訊雜比。 According to an embodiment, the interference-suppressed frequency-domain signal Y n (k) can be expressed as Y n (k) = A n (k) × e j ∠ Xn(k) according to the spectral subtraction method, where A n (k) = MAX {|X n (k)| - α•U n (k),η }. The parameter η can be the minimum value of A n (k), and the parameter α can be adjusted to control the signal-to-noise ratio (SNR) to achieve a target SNR.
根據實施例,可根據頻譜加權方法,將干擾抑制頻域訊號Y n(k)表示為Y n(k) = B n(k) × e j ∠ Xn(k),其中B n(k) = (|X n(k)| / (1+ β•U n(k))。參數β可被調整以控制訊雜比(SNR),以達到目標訊雜比。 According to an embodiment, the interference-suppressed frequency-domain signal Y n (k) can be expressed as Y n (k) = B n (k) × e j ∠ Xn(k) according to the spectrum weighting method, where B n (k) = (|X n (k)| / (1+ β·U n (k)). The parameter β can be adjusted to control the signal-to-noise ratio (SNR) to achieve the target SNR.
第3圖中,短時距傅立葉轉換1102可分析及轉換時域的資料(例如,訊號x
n(m))以產生頻域的資料(例如,頻域訊號X
n(k))。干擾基線估測器130可估測相關於固定頻率範圍之干擾基線。舉例而言,所述的干擾可為(但不限於)來自風扇、日光燈、空調適配器之干擾。干擾可被抑制,以改善偵測物體Obj的精確度。第3圖中,干擾抑制頻域訊號Y
n(k)之干擾部份已被減少,且可執行逆快速傅立葉轉換1401以處理頻域的干擾抑制頻域訊號Y
n(k)以產生時域的時域訊號y
n(m)。
In FIG. 3 ,
第3圖之短時距傅立葉轉換1102可如第4圖所示。第4圖僅為舉例,而非限制實施例的範圍。第4圖說明六個區塊B0至B5之操作。第4圖之橫軸可對應於時域之樣本索引,其係用於數位訊號處理(DSP)。區塊B0可對應於n=1,區塊B1可對應於n=2,依此類推。關於區塊B0,可具有K個樣本,其中L個樣本並無重疊,但O個樣本與區塊B1之一部分樣本重疊。The
根據實施例,前文述及的訊號x n(m)、X n(k)、y n(m)及y(i)可根據下文之等式eq-1至eq-3予以表示及求得: x n(m) = …eq-1; X n(k) = FFT {x n(m)} = n(m)•exp (-j ) …eq-2; y n(m) = IFFT{Y n(k)}= …eq-3; y(i) = …eq-4; According to an embodiment, the aforementioned signals x n (m), X n (k), y n (m) and y (i) can be expressed and obtained according to the following equations eq-1 to eq-3: x n (m) = …eq-1; X n (k) = FFT {x n (m)} = n (m)·exp (-j ) …eq-2; y n (m) = IFFT{Y n (k)}= ...eq-3; y(i) = ...eq-4;
其中M及K可為正整數,M ≤ K,且M可選擇性地等於K。等式eq-1可相關於第3圖之緩衝操作1101,其中窗格訊號w(m)可為已知的窗格訊號,如第4圖所示。等式eq-2可相關於第3圖所示之短時距傅立葉轉換。等式eq-3可相關於第3圖所示之逆快速傅立葉轉換1401。等式eq-4可相關於第3圖所示之重疊累加操作1402。等式eq-1至eq-4可描述都普勒訊號處理裝置100的操作原理。Wherein M and K can be positive integers, M ≤ K, and M can be optionally equal to K. Equation eq-1 may be related to the
第5圖為實施例中,第1圖及第2圖之都普勒訊號處理裝置100的示意圖。如第5圖所示,頻率分析器110可包含濾波器組(filter bank)110A,用以對數位訊號x(i)進行濾波以產生頻域訊號X
n(k)。如第5圖所示,合成器140可包含濾波器組140A,用以對干擾抑制頻域訊號Y
n(k)進行濾波以產生干擾抑制時域數位訊號y(i)。根據實施例,濾波器組110A可為分析濾波器組(analysis filter bank),且濾波器組140A可為合成濾波器組(synthesis filter bank)。舉例而言,濾波器組110A可被抽取(decimated),且濾波器組140A可對應地被內插(interpolated);或者,濾波器組110A可被非抽取(non-decimated),且濾波器組140A可對應地被非內插(non-interpolated)。
Fig. 5 is a schematic diagram of the Doppler
第5圖中,干擾抑制頻域訊號Y n(k)可表示為Y n(k) = A n(k)•e j ∠ Xn(k),或表示為Y n(k) = B n(k)•e j ∠ Xn(k),如下所述。 In Figure 5, the interference suppression frequency domain signal Y n (k) can be expressed as Y n (k) = A n (k)·e j ∠ Xn(k) , or as Y n (k) = B n ( k)•e j ∠Xn (k) , as described below.
根據實施例,可根據頻譜相減方法,將干擾抑制頻域訊號Y n(k)表示為Y n(k) = A n(k)•e j ∠ Xn(k),其中A n(k) = MAX {|X n(k)| - α•U n(k),η}。參數η可為A n(k)之最小值,且參數α可被調整以控制訊雜比(SNR),以達到目標訊雜比。 According to an embodiment, the interference-suppressed frequency-domain signal Y n (k) can be expressed as Y n (k) = A n (k)•e j ∠Xn (k) according to the spectral subtraction method, where A n (k) = MAX {|X n (k)| - α•U n (k),η}. The parameter η can be the minimum value of A n (k), and the parameter α can be adjusted to control the signal-to-noise ratio (SNR) to achieve a target SNR.
根據實施例,可根據頻譜加權方法,將干擾抑制頻域訊號Y n(k)表示為Y n(k) = B n(k)•e j ∠ Xn(k),其中B n(k) = (|X n(k)| / (1+β•U n(k))。參數β可被調整以控制訊雜比(SNR),以達到目標訊雜比。在此情況中,可使用零強制(zero-forcing)法。舉例而言,此情況可相關於維納(Wiener)解法之相關濾波器。此情況中,可在保持相位之同時,衰減訊號強度。 According to an embodiment, the interference-suppressed frequency-domain signal Y n (k) can be expressed as Y n (k) = B n (k)·e j ∠ Xn(k) according to the spectrum weighting method, where B n (k) = (|X n (k)| / (1+β·U n (k)). The parameter β can be adjusted to control the signal-to-noise ratio (SNR) to achieve the target SNR. In this case, zero can be used Zero-forcing method. For example, this case can be related to the correlation filter of the Wiener (Wiener) solution. In this case, the signal strength can be attenuated while maintaining the phase.
第6圖為第2圖、第3圖及第5圖所述的干擾基線估測器130的示意圖。如第6圖所示,干擾基線估測器130可包含絕對值資料單元610、濾波單元620、減法器630、控制單元640、加法器650及延遲單元660。FIG. 6 is a schematic diagram of the
絕對值資料單元610可產生頻域訊號X
n(k)之絕對值資料|X
n(k)|。濾波單元620可根據絕對值資料|X
n(k)|產生濾波訊號(R
n(k)或E
n(k))。減法器630可產生濾波訊號(R
n(k)或E
n(k))及頻域干擾估測訊號U
n(k)之差值資料Δ
n(k)。控制單元640可處理差值資料Δ
n(k)以產生調整資料Q
n(k)。加法器650可相加調整資料Q
n(k)及頻域干擾估測訊號U
n(k)以產生更新頻域干擾估測訊號U
n+1(k)。延遲單元660可使用更新頻域干擾估測訊號U
n+1(k)以置換頻域干擾估測訊號U
n(k)。換言之,頻域干擾估測訊號U
n(k)及更新頻域干擾估測訊號U
n+1(k)可分別相關於時間線上的一頻域訊號區塊索引及下一頻域訊號區塊索引,其中兩頻域訊號區塊索引之間的差值可相關於延遲單元660。
The absolute
根據實施例,絕對值資料|X n(k)|包含絕對值,差值資料Δ n(k)包含差值,調整資料Q n(k)包含調整值,且濾波訊號R n(k)或E n(k)包含濾波資料向量。 According to an embodiment, the absolute value data | Xn (k)| contains absolute values, the difference data Δn (k) contains difference values, the adjustment data Qn (k) contains adjustment values, and the filtered signal Rn (k) or En (k) contains the filtered data vector.
關於濾波單元620,濾波單元620可至少包含濾波器6201及選擇性地另包含包絡偵測器6202。濾波器6201可執行於時間線上之區塊索引n進行之濾波操作,及/或於頻格(frequency bin)k進行之濾波操作。Regarding the
若濾波單元620包含濾波器6201且不包含包絡偵測器6202,濾波器6201可對絕對值資料|X
n(k)|進行濾波以產生濾波訊號R
n(k),且濾波訊號R
n(k)可被輸入至減法器630。
If the
另一情況中,若濾波單元620包含濾波器6201及包絡偵測器6202,濾波器6201可對絕對值資料|X
n(k)|進行濾波以產生濾波訊號R
n(k)以作為初步濾波訊號,其中初步濾波訊號可包含初步濾波訊號向量。包絡偵測器6202可求得初步濾波訊號R
n(k)之包絡資訊,以產生濾波訊號E
n(k)。包絡偵測器6202可使結果於時間線上更為平滑,且可減少突發雜訊造成的非預期的抖動,因為系統主要是用以處理固定雜訊。
In another case, if the
第7圖為第6圖之控制單元640的有限狀態機(FSM)的示意圖。控制單元640可用於追蹤控制。第k頻格的追蹤控制有限狀態機可如第7圖所示。有限狀態機可包含狀態710至730。FIG. 7 is a schematic diagram of a finite state machine (FSM) of the
狀態710可為閒置狀態,對應於都普勒訊號處理裝置100為閒置的情況。當都普勒訊號處理裝置100啟動時,可發出啟動訊號S
system_startup。當接收物體Obj的資訊時,可求得頻域估測訊號U
n(k)之初始資料U
initial(k),然後進入狀態715。控制單元640可根據一時段之差值資料Δ
n(k)及濾波訊號R
n(k) or E
n(k)求得初始資料U
initial(k)。根據實施例,初始資料U
initial(k)可包含初始值。
The
舉例而言,若濾波訊號為第6圖的包絡偵測器6202產生的濾波訊號E
n(k),上述相關於濾波訊號E
n(k)的時段可為訊號E
0(k),E
1(k),E
2(k)…E
Nacq-1(k)所經過的時間,也就是,時域區塊之索引n從0變為Nacq-1的時間。狀態715可為資訊獲取狀態,其中U
initial可為複數個振幅值(也就是訊號強度)之平均。舉例而言, U
initial(k)可為AVG{E
0(k), E
1(k), E
2(k)…E
Nacq-1(k)},且AVG{}可為平均函數。
For example , if the filtered signal is the filtered signal En ( k) generated by the
於狀態715之後,有限狀態機可進入狀態720。狀態720可為慢追蹤狀態。控制單元640可進入慢追蹤狀態(狀態720)以使用第一速度更新頻域干擾估測訊號U
n(k)。此情況中,訊號之更新可較慢,且可保留訊號中較多的原始部份。
After
於狀態720之後,有限狀態機可根據訊號S
to_fast進入狀態725。狀態725可為快追蹤狀態。控制單元640可進入快追蹤狀態(狀態725)以使用第二速度更新頻域干擾估測訊號U
n(k),其中第二速度高於第一速度。此情況中,訊號之更新可較快,且可保留訊號中較少的原始部份。
After
於狀態720之後,有限狀態機可根據訊號S
~to_fast進入狀態725。如第7圖所示,有限狀態機可根據需求交替地進入狀態720或狀態725。
After
於狀態720之後,有限狀態機可根據訊號S
~(to_slow|to_fast)進入狀態730。狀態730可為凍結狀態,用以停止更新頻域干擾估測訊號U
n(k)。有限狀態機可根據訊號S
to_slow從狀態730進入狀態720。
After the
第8圖為第6圖的濾波單元620產生的濾波訊號之範圍示意圖。第8圖之範圍可相關於第7圖所示的狀態。如上述,濾波訊號可為第6圖之濾波訊號R
n(k)或E
n(k),在此以濾波訊號E
n(k)為例。當濾波訊號E
n(k)的強度介於第一門檻值及高於第一門檻值之第二門檻值之間,控制單元640可進入慢追蹤狀態(例如,第7圖之有限狀態機的狀態720)。舉例而言,如第8圖所示,第一門檻值可為–λ•U
n(k),且第二門檻值可為γ•U
n(k),其中λ及γ可為給定的正值。當濾波訊號E
n(k)的強度低於第一門檻值–λ•U
n(k),控制單元640進入快追蹤狀態(例如,第7圖之有限狀態機的狀態725)。當濾波訊號E
n(k)的強度高於第二門檻值γ•U
n(k),控制單元640可進入凍結狀態(例如,第7圖之有限狀態機的狀態730)。換言之,上述的訊號S
to_slow可相關於E
n(k) < γ•U
n(k)且E
n(k) ≥ –λ•U
n(k)之情況。上述的訊號S
to_fast可相關於另一情況,即E
n(k) < –λ•U
n(k)之情況。上述的訊號S
~(to_slow|to_fast)可相關於另一情況,即E
n(k) ≥ γ•U
n(k)之情況。
FIG. 8 is a schematic diagram of the range of the filtered signal generated by the
關於第6圖的調整資料Q n(k),調整資料Q n(k)可表示為以下的等式eq-5: Q n(k) = …eq-5; Regarding the adjustment data Q n (k) in Fig. 6, the adjustment data Q n (k) can be expressed as the following equation eq-5: Q n (k) = ...eq-5;
其中α
fast及α
slow為介於0至1之間的正值,且可為選用以產生調整資料Q
n(k)。舉例而言,等式eq-5所述之「快追蹤」狀態、「慢追蹤」狀態及「凍結」狀態可分別對應於第7圖的狀態725、狀態720及狀態730。
Wherein α fast and α slow are positive values between 0 and 1, and can be selected to generate the adjustment data Q n (k). For example, the "fast track" state, "slow track" state, and "freeze" state described in equation eq-5 may correspond to
第1圖至第7圖可描述實施例提供的裝置之架構及狀態。第1圖之都普勒訊號處理裝置100中,第2圖、第3圖、第5圖及第6圖之各方塊可用適當的硬體(例如電路)搭配適宜的控制軟體及/或韌體而實現,或可用微處理器(MCU)或數位訊號處理器(DSP)內嵌的軟體功能而實現。Figures 1 to 7 can describe the structure and state of the device provided by the embodiment. In the Doppler
第9圖為第1圖中,根據接收無線訊號d’抑制背景之干擾的都普勒訊號處理方法900的流程圖。都普勒訊號處理方法900可藉由上述訊號偵測裝置10及都普勒訊號處理裝置100而執行,且可包含以下步驟。FIG. 9 is a flowchart of a Doppler
步驟910:根據數位訊號x(i)產生頻域訊號X n(k),其中數位訊號x(i)可對應於接收無線訊號d’,且數位訊號x(i)包含背景之干擾產生之干擾能量; Step 910: Generate a frequency-domain signal X n (k) according to the digital signal x(i), wherein the digital signal x(i) can correspond to the received wireless signal d', and the digital signal x(i) includes interference caused by background interference energy;
步驟920:根據頻域訊號X n(k)及頻域干擾估測訊號U n(k)執行抑制操作以產生干擾抑制頻域訊號Y n(k),其中於干擾抑制頻域訊號Y n(k)中,干擾能量於頻域可被抑制; Step 920: Perform a suppression operation according to the frequency-domain signal X n (k) and the frequency-domain interference estimation signal U n (k) to generate an interference-suppressed frequency-domain signal Y n (k), wherein the interference-suppressed frequency-domain signal Y n ( In k), the interference energy can be suppressed in the frequency domain;
步驟930:根據頻域訊號X n(k)產生或更新頻域干擾估測訊號U n(k),其中頻域干擾估測訊號U n(k)對應於干擾於頻域之能量分佈;及 Step 930: Generate or update a frequency-domain interference estimation signal U n (k) according to the frequency-domain signal X n (k), wherein the frequency-domain interference estimation signal U n (k) corresponds to the energy distribution of the interference in the frequency domain; and
步驟940:根據干擾抑制頻域訊號Y n(k)產生干擾抑制時域數位訊號y(i),其中干擾抑制時域數位訊號y(i)係相關於干擾能量已被抑制之數位訊號x(i)。 Step 940: Generate an interference-suppressed time-domain digital signal y(i) according to the interference-suppressed frequency-domain signal Yn (k), wherein the interference-suppressed time-domain digital signal y(i) is related to the digital signal x( i).
步驟910、920、930及940可分別相關於第2圖、第3圖及第5圖所示的頻率分析器110、干擾抑制器120、干擾基線估測器130及合成器140。相關的細節可如上述,故不重述。
總結而言,實施例提供的訊號偵測裝置10、都普勒訊號處理裝置100及都普勒訊號處理方法900可有效地藉由抑制干擾以更新偵測結果,時域信號中的固定干擾(例如背景中的準固定干擾)可大幅減低,因此,可達到精確的追蹤控制。此外,干擾抑制計算可降低時域信號中背景中特定頻段對應的干擾能量,故可改善偵測精準度。
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。
In summary, the
10:訊號偵測裝置 100:都普勒訊號處理裝置 1066:接收單元 1071,1072:混合器 1073:相位調整單元 1074,1075:類比轉數位轉換器 110:頻率分析器 1101:緩衝操作 1102:短時距傅立葉轉換 110A,140A:濾波器組 120:干擾抑制器 130:干擾基線估測器 140:合成器 1401:逆快速傅立葉轉換 1402:重疊累加操作 15,16:數位轉類比轉換器 17:數位串行干擾單元 610:絕對值資料單元 620:濾波單元 6201:濾波器 6202:包絡偵測器 630:減法器 640:控制單元 650:加法器 660:延遲單元 710,715,720,725,730:狀態 900:都普勒訊號處理方法 910,920,930,940:步驟 ANtx,ANrx:天線 Atx,Arx:放大裝置 B0,B1,B2,B3,B4,B5:區塊 d:無線訊號 d':接收無線訊號 fc:載波訊號 fc':調整後載波訊號 Obj:物體 OSC:振盪器 Q n(k):調整資料 R n(k),E n(k):濾波訊號 S1,S2,x(i),S1',S2':數位訊號 S1a,S2a:類比訊號 S system_startup:啟動訊號 U n(k):頻域干擾估測訊號 U n+1(k):更新頻域干擾估測訊號 w(m):窗格訊號 X n(k):頻域訊號 x n(m),S to_fast,S ~to_fast,S to_slow,S ~(to_slow|to_fast):訊號 x(i):數位訊號 y(i):干擾抑制時域數位訊號 Y n(k):干擾抑制頻域訊號 y n(m):時域訊號 |X n(k)|:絕對值資料 Δ n(k):差值資料 10: signal detection device 100: Doppler signal processing device 1066: receiving unit 1071, 1072: mixer 1073: phase adjustment unit 1074, 1075: analog to digital converter 110: frequency analyzer 1101: buffer operation 1102: short Time-distance Fourier Transform 110A, 140A: Filter Bank 120: Interference Suppressor 130: Interference Baseline Estimator 140: Synthesizer 1401: Inverse Fast Fourier Transform 1402: Overlap-Accumulate Operation 15, 16: Digital-to-Analog Converter 17: Digital Serial interference unit 610: absolute value data unit 620: filter unit 6201: filter 6202: envelope detector 630: subtractor 640: control unit 650: adder 660: delay unit 710, 715, 720, 725, 730: state 900: Doppler signal processing Methods 910, 920, 930, 940: Steps ANtx, ANrx: Antenna Atx, Arx: Amplifying devices B0, B1, B2, B3, B4, B5: Block d: Wireless signal d': Received wireless signal fc: Carrier signal fc': Adjusted carrier signal Obj: Object OSC: Oscillator Q n (k): Adjustment data R n (k), E n (k): Filtered signals S1, S2, x(i), S1', S2': Digital signals S1a, S2a: Analog signal S system_startup : start signal U n (k): frequency domain interference estimation signal U n+1 (k): update frequency domain interference estimation signal w(m): pane signal X n (k): frequency domain Signal x n (m), S to_fast , S ~to_fast , S to_slow , S ~(to_slow|to_fast) : Signal x(i): Digital signal y(i): Interference suppression time-domain digital signal Y n (k): Interference suppression frequency domain signal y n (m): time domain signal |X n (k)|: absolute value data Δ n (k): difference data
第1圖係實施例中,用以偵測物體之訊號偵測裝置的示意圖。 第2圖為第1圖之都普勒訊號處理裝置的示意圖。 第3圖為一實施例中,第1圖及第2圖之都普勒訊號處理裝置的示意圖。 第4圖為相關於第3圖之短時距傅立葉轉換的訊號處理的示意圖。 第5圖為一實施例中,第1圖及第2圖之都普勒訊號處理裝置的示意圖。 第6圖為第2圖、第3圖及第5圖所述的干擾基線估測器的示意圖。 第7圖為第6圖之控制單元的有限狀態機的示意圖。 第8圖為第6圖的濾波單元產生的濾波訊號之範圍示意圖。 第9圖為一實施例中,抑制干擾的都普勒訊號處理方法的流程圖。 Fig. 1 is a schematic diagram of a signal detection device for detecting objects in an embodiment. Fig. 2 is a schematic diagram of the Doppler signal processing device in Fig. 1. Fig. 3 is a schematic diagram of the Doppler signal processing device in Fig. 1 and Fig. 2 in an embodiment. FIG. 4 is a schematic diagram of signal processing related to the short-time Fourier transform in FIG. 3 . Fig. 5 is a schematic diagram of the Doppler signal processing device in Fig. 1 and Fig. 2 in an embodiment. FIG. 6 is a schematic diagram of the interference baseline estimator described in FIG. 2 , FIG. 3 and FIG. 5 . FIG. 7 is a schematic diagram of the finite state machine of the control unit in FIG. 6 . FIG. 8 is a schematic diagram of the scope of the filtered signal generated by the filtering unit in FIG. 6 . FIG. 9 is a flowchart of a Doppler signal processing method for suppressing interference in an embodiment.
100:都普勒訊號處理裝置 100: Doppler signal processing device
110:頻率分析器 110:Frequency Analyzer
120:干擾抑制器 120: Interference suppressor
130:干擾基線估測器 130: Interference baseline estimator
140:合成器 140: Synthesizer
Un(k):頻域干擾估測訊號 U n (k): frequency domain interference estimation signal
Xn(k):頻域訊號 X n (k): frequency domain signal
x(i):數位訊號 x(i): digital signal
y(i):干擾抑制時域數位訊號 y(i): Interference suppressed time-domain digital signal
Yn(k):干擾抑制頻域訊號 Y n (k): Interference suppression frequency domain signal
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