TWI800970B - 單端轉雙端電路、使用該電路的連續漸近式類比數位轉換器及單端訊號轉雙端訊號的方法 - Google Patents
單端轉雙端電路、使用該電路的連續漸近式類比數位轉換器及單端訊號轉雙端訊號的方法 Download PDFInfo
- Publication number
- TWI800970B TWI800970B TW110140917A TW110140917A TWI800970B TW I800970 B TWI800970 B TW I800970B TW 110140917 A TW110140917 A TW 110140917A TW 110140917 A TW110140917 A TW 110140917A TW I800970 B TWI800970 B TW I800970B
- Authority
- TW
- Taiwan
- Prior art keywords
- ended
- differential
- signal
- ended signal
- successive
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
- H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
- H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/04—Differential modulation with several bits, e.g. differential pulse code modulation [DPCM]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
- H03M1/466—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors
- H03M1/468—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors in which the input S/H circuit is merged with the feedback DAC array
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW110140917A TWI800970B (zh) | 2021-11-03 | 2021-11-03 | 單端轉雙端電路、使用該電路的連續漸近式類比數位轉換器及單端訊號轉雙端訊號的方法 |
US17/864,464 US20230134950A1 (en) | 2021-11-03 | 2022-07-14 | Single-ended to differential-ended converter circuit, successive-approximation register analog-to-digital converter utilizing same, and method of converting single-ended signal to differential-ended signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW110140917A TWI800970B (zh) | 2021-11-03 | 2021-11-03 | 單端轉雙端電路、使用該電路的連續漸近式類比數位轉換器及單端訊號轉雙端訊號的方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI800970B true TWI800970B (zh) | 2023-05-01 |
TW202320492A TW202320492A (zh) | 2023-05-16 |
Family
ID=86145009
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW110140917A TWI800970B (zh) | 2021-11-03 | 2021-11-03 | 單端轉雙端電路、使用該電路的連續漸近式類比數位轉換器及單端訊號轉雙端訊號的方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US20230134950A1 (zh) |
TW (1) | TWI800970B (zh) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5180932A (en) * | 1990-03-15 | 1993-01-19 | Bengel David W | Current mode multiplexed sample and hold circuit |
US6369729B1 (en) * | 1999-10-08 | 2002-04-09 | Cirrus Logic, Inc. | Common mode shift in downstream integrators of high order delta sigma modulators |
US6972705B1 (en) * | 2004-12-14 | 2005-12-06 | Cirrus Logic, Inc. | Signal processing system having an ADC delta-sigma modulator with single-ended input and feedback signal inputs |
US20130169454A1 (en) * | 2011-12-29 | 2013-07-04 | STMicroelectronics PVT LTD (INDIA) | System and Method for a Successive Approximation Analog to Digital Converter |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2437268B1 (en) * | 2010-09-30 | 2013-01-02 | ST-Ericsson SA | Single-ended to differential buffer circuit and method for coupling at least a single-ended input analog signal to a receiving circuit with differential inputs |
JP6986020B2 (ja) * | 2016-09-06 | 2021-12-22 | ソニーセミコンダクタソリューションズ株式会社 | アナログデジタル変換器、電子装置、および、アナログデジタル変換器の制御方法 |
-
2021
- 2021-11-03 TW TW110140917A patent/TWI800970B/zh active
-
2022
- 2022-07-14 US US17/864,464 patent/US20230134950A1/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5180932A (en) * | 1990-03-15 | 1993-01-19 | Bengel David W | Current mode multiplexed sample and hold circuit |
US6369729B1 (en) * | 1999-10-08 | 2002-04-09 | Cirrus Logic, Inc. | Common mode shift in downstream integrators of high order delta sigma modulators |
US6972705B1 (en) * | 2004-12-14 | 2005-12-06 | Cirrus Logic, Inc. | Signal processing system having an ADC delta-sigma modulator with single-ended input and feedback signal inputs |
US20130169454A1 (en) * | 2011-12-29 | 2013-07-04 | STMicroelectronics PVT LTD (INDIA) | System and Method for a Successive Approximation Analog to Digital Converter |
Also Published As
Publication number | Publication date |
---|---|
TW202320492A (zh) | 2023-05-16 |
US20230134950A1 (en) | 2023-05-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8487803B1 (en) | Pipelined analog-to-digital converter having reduced power consumption | |
US8947286B2 (en) | Analog/digital converter | |
US8269657B2 (en) | Background calibration of offsets in interleaved analog to digital converters | |
WO2008146302A3 (en) | High speed parallel processing digital path for sar adc | |
EP2587674A3 (en) | Multi-bit successive approximation ADC | |
WO2011028674A3 (en) | Low-power area-efficient sar adc using dual capacitor arrays | |
WO2012116006A3 (en) | Pipelined adc inter-stage error calibration | |
US7847720B2 (en) | Pipelined analog-to-digital converter | |
WO2009134734A3 (en) | Successive approximation register analog to digital converter with improved immunity to time varying noise | |
WO2016017898A1 (ko) | 분리 형태의 듀얼 캐패시터 어레이를 가지는 연속 근사 레지스터 아날로그 디지털 변환기 | |
EP4072021A4 (en) | TIME-INTERMEDIATED SUCCESSIVE APPROACH ANALOG-TO-DIGITAL CONVERTER AND CALIBRATION METHOD THEREOF | |
WO2011003978A3 (en) | Interleaved pipelined binary search a/d converter | |
ATE553540T1 (de) | Analog-digital-umsetzung unter verwendung eines asynchronen zyklischen strommodus-vergleichs | |
EP3607659A4 (en) | DYNAMIC RANGE EXTENSION OF ANALOG-DIGITAL CONVERTER (ADC) WITH SUCCESSIVE APPROXIMATION REGISTER (SAR) | |
SG134212A1 (en) | Pipelined analog-to-digital converters | |
TWI800970B (zh) | 單端轉雙端電路、使用該電路的連續漸近式類比數位轉換器及單端訊號轉雙端訊號的方法 | |
WO2008042247A3 (en) | Adaptive composite analog to digital converter | |
WO2008042250A3 (en) | Composite analog to digital receiver with adaptive self-linearization | |
Shehzad et al. | Low-power 10-bit SAR ADC using class-AB type amplifier for IoT applications. | |
WO2009034683A1 (ja) | パイプライン型ad変換器 | |
CN102148618B (zh) | 具有低反冲噪声的模拟数字转换器及次模拟数字转换器 | |
EP4272316A4 (en) | ANALOG-TO-DIGITAL CONVERTER WITH SUCCESSIVE APPROXIMATION REGISTER | |
Wang et al. | A novel 12-bit 0.6-mW two-step coarse-fine time-to-digital converter | |
Wang et al. | A 1V 5-bit 5GSample/sec CMOS ADC for UWB receivers | |
US20100182182A1 (en) | Pipeline Analog-To-Digital Converter |