TWI799983B - 記憶體內計算的裝置及方法 - Google Patents

記憶體內計算的裝置及方法 Download PDF

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Publication number
TWI799983B
TWI799983B TW110133489A TW110133489A TWI799983B TW I799983 B TWI799983 B TW I799983B TW 110133489 A TW110133489 A TW 110133489A TW 110133489 A TW110133489 A TW 110133489A TW I799983 B TWI799983 B TW I799983B
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TW
Taiwan
Prior art keywords
compute
memory
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TW110133489A
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English (en)
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TW202230165A (zh
Inventor
李伯浩
李嘉富
史毅駿
池育德
藤原英弘
森陽紀
趙威丞
Original Assignee
台灣積體電路製造股份有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Biophysics (AREA)
  • Mathematical Analysis (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Neurology (AREA)
  • Computational Mathematics (AREA)
  • Evolutionary Computation (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Complex Calculations (AREA)
  • Static Random-Access Memory (AREA)
TW110133489A 2021-01-29 2021-09-09 記憶體內計算的裝置及方法 TWI799983B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US202163143467P 2021-01-29 2021-01-29
US63/143,467 2021-01-29
US17/387,598 2021-07-28
US17/387,598 US20220244916A1 (en) 2021-01-29 2021-07-28 Compute in memory

Publications (2)

Publication Number Publication Date
TW202230165A TW202230165A (zh) 2022-08-01
TWI799983B true TWI799983B (zh) 2023-04-21

Family

ID=81858118

Family Applications (1)

Application Number Title Priority Date Filing Date
TW110133489A TWI799983B (zh) 2021-01-29 2021-09-09 記憶體內計算的裝置及方法

Country Status (5)

Country Link
US (1) US20220244916A1 (zh)
KR (1) KR20220110090A (zh)
CN (1) CN114613404A (zh)
DE (1) DE102021120080A1 (zh)
TW (1) TWI799983B (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12019905B2 (en) * 2021-08-02 2024-06-25 Qualcomm Incorporated Digital compute in memory
US11790243B1 (en) * 2022-06-30 2023-10-17 International Business Machines Corporation Ferroelectric field effect transistor for implementation of decision tree
US20240028298A1 (en) * 2022-07-19 2024-01-25 Samsung Electronics Co., Ltd. Memory device and method with in-memory computing
KR102662742B1 (ko) * 2022-08-05 2024-05-03 주식회사 아티크론 Msb 스킵 기법 기반 저전력 cim 및 이의 mac 연산 방법
KR102665969B1 (ko) * 2022-08-30 2024-05-17 삼성전자주식회사 Imc(in memory computing) 회로, imc 회로를 포함하는 뉴럴 네트워크 장치, 및 imc 회로의 동작 방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110010176A (zh) * 2017-12-28 2019-07-12 英特尔公司 用于在存储器阵列上执行计算的方法和系统
US20200026498A1 (en) * 2019-09-27 2020-01-23 Intel Corporation Compute in/near memory (cim) circuit architecture for unified matrix-matrix and matrix-vector computations
TW202013213A (zh) * 2018-05-22 2020-04-01 密西根大學董事會 記憶處理單元

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Publication number Priority date Publication date Assignee Title
JP4010995B2 (ja) * 2003-07-31 2007-11-21 Ｎｅｃエレクトロニクス株式会社 半導体メモリ及びそのリファレンス電位発生方法
US11379714B2 (en) * 2018-05-29 2022-07-05 British Cayman Islands Intelligo Technology Inc. Architecture of in-memory computing memory device for use in artificial neuron
US12099912B2 (en) * 2018-06-22 2024-09-24 Samsung Electronics Co., Ltd. Neural processor
KR20200004700A (ko) * 2018-07-04 2020-01-14 삼성전자주식회사 뉴럴 네트워크에서 파라미터를 처리하는 방법 및 장치
US10748603B2 (en) * 2018-09-28 2020-08-18 Intel Corporation In-memory multiply and accumulate with global charge-sharing
US11714570B2 (en) * 2020-02-26 2023-08-01 Taiwan Semiconductor Manufacturing Company, Ltd. Computing-in-memory device and method
US11340867B2 (en) * 2020-03-03 2022-05-24 Qualcomm Incorporated Compute-in-memory (CIM) binary multiplier
KR20220096991A (ko) * 2020-12-31 2022-07-07 삼성전자주식회사 컨볼루션 sram 및 대각방향 축적 sram을 포함하는 신경망 가속기
US20220269483A1 (en) * 2021-02-19 2022-08-25 Taiwan Semiconductor Manufacturing Company, Ltd. Compute in memory accumulator
US20220366968A1 (en) * 2022-08-01 2022-11-17 Intel Corporation Sram-based in-memory computing macro using analog computation scheme

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110010176A (zh) * 2017-12-28 2019-07-12 英特尔公司 用于在存储器阵列上执行计算的方法和系统
TW202013213A (zh) * 2018-05-22 2020-04-01 密西根大學董事會 記憶處理單元
US20200026498A1 (en) * 2019-09-27 2020-01-23 Intel Corporation Compute in/near memory (cim) circuit architecture for unified matrix-matrix and matrix-vector computations

Also Published As

Publication number Publication date
CN114613404A (zh) 2022-06-10
US20220244916A1 (en) 2022-08-04
DE102021120080A1 (de) 2022-08-04
KR20220110090A (ko) 2022-08-05
TW202230165A (zh) 2022-08-01

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