TWI797779B - Vertical heat treatment furnaces processing boat and heat treatment method of semiconductor wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: When heat treatment the semiconductor wafers, provide the vertical heat treatment furnaces processing boat and the heat treatment method of semiconductor wafers which could suppress the slippage of semiconductor wafers compared with the previous ones. SOLUTION: A vertical heat treatment furnaces processing boat equipped with a plurality of support pillars and one or more support parts connected to each of the plurality of support pillars to support the back surface of the semiconductor wafer. Regarding at least one of the plurality of pillars, the pillar 11 includes: a first region A1 which is a region containing the central axis O of the processing boat and sandwiched between the two surfaces P1 and P2 of the pillar 11, and a second region A2 which is a region other than the first region A1. the support parts11a which connected with pillar 11 support the back surface of the semiconductor wafer by the second area A2.

Description

Heat treatment method for boat and semiconductor wafer in vertical heat treatment furnace

The invention relates to a vertical heat treatment furnace treatment boat and a heat treatment method for semiconductor wafers.

In the process of manufacturing semiconductor wafers such as silicon wafers that are substrates of semiconductor devices, the wafers undergo various heat treatment steps. In addition, in the manufacturing process of the semiconductor device, in the steps of oxidation, diffusion, and film formation, the semiconductor wafer serving as the substrate of the semiconductor device is repeatedly subjected to high-temperature heat treatment. As a furnace for performing such heat treatment, there are vertical heat treatment furnaces in which the in-plane direction of the semiconductor wafer to be heat-treated is horizontal and a plurality of pieces are arranged in the vertical direction for heat treatment, and there are vertical heat treatment furnaces in which the in-plane direction of the semiconductor wafer is vertical A horizontal heat treatment furnace in which a plurality of sheets are arranged in the horizontal direction for heat treatment. Among them, the vertical heat treatment furnace is suitable for heat treatment of a large number of large-diameter semiconductor substrates due to its small installation space, so it is generally used for various heat treatments of semiconductor wafers.

A vertical heat treatment furnace includes: a processing boat including a plurality of columns, and one or more supporting parts connected to the plurality of columns; and a heater arranged around the processing boat. In such a vertical heat treatment furnace, a semiconductor wafer to be heat treated is introduced, placed on a support portion of a processing boat, heated by a heater, and heat treated on the semiconductor wafer.

When the above-mentioned vertical heat treatment furnace is used to heat treat the semiconductor wafer, uneven temperature distribution in the surface of the semiconductor wafer will cause thermal stress, and sliding displacement will occur in the semiconductor wafer. Slip displacement causes an increase in leakage current of the semiconductor device and a cause of deterioration of the flatness of the semiconductor wafer, so it is very important to suppress the occurrence of slip displacement of the semiconductor wafer during heat treatment.

So far, there have been various proposals for processing boats that suppress slippage of semiconductor wafers during heat processing. For example, in Patent Document 1, a processing boat is described, which has: a plurality of pillars; and a supporting part, which is detachably installed on each pillar, and supports the object to be processed horizontally, which can effectively prevent slippage and pollution.

In addition, in Patent Document 2, it is described that the relationship between the relative position of the position of the processing boat and the mounting position of the semiconductor wafer and the amount of slippage generated is obtained, and the position of the processing boat and the position of the semiconductor wafer are set based on the obtained relationship. The initial position of the relative position of the loading position is a method of stably suppressing the occurrence of slippage by heat-treating the semiconductor wafer placed on the processing boat from the set initial position within a reference value. [Prior Art Literature] [Patent Document]

[Patent Document 1] Japanese Unexamined Patent Publication No. 2004-241545 [Patent Document 2] Japanese Unexamined Patent Publication No. 2013-110364

[Problem to be solved by the invention]

As a result of research, the present inventors have found that the occurrence of slip displacement cannot be sufficiently suppressed when heat-treating semiconductors using the treatment boat described in Patent Document 1 and the treatment boat used in the method described in Patent Document 2.

Therefore, the object of the present invention is to provide a vertical type heat treatment furnace processing boat and a heat treatment method for semiconductor wafers that can suppress slippage of semiconductor wafers more than conventionally when heat treating semiconductor wafers. [means used to solve a problem]

The present invention for solving the above-mentioned problems is as follows.

[1] A treatment boat for a vertical heat treatment furnace, which is equipped with: a plurality of supports; and one or more supporting parts connected to each of the plurality of supports to support the back surface of the above-mentioned semiconductor wafer, characterized in that: With regard to at least one of the above-mentioned plurality of props, the region that includes the central axis of the above-mentioned processing boat and is sandwiched between the two surfaces of the above-mentioned prop is defined as the first region, and the region other than the above-mentioned first region is defined as the first region. In the case of the second region, the support portion connected to the pillar is configured so that the back surface of the semiconductor wafer is supported in the second region.

[2] The vertical type heat treatment furnace processing boat as in [1], wherein the above-mentioned plurality of supports are arranged on the wafer filling surface perpendicular to the wafer filling direction by including the central axis of the above-mentioned vertical type processing boat. Two first pillars on the front side, and one or more second pillars on the rear side of the wafer filling, When viewed from above, the wafer support region connected to the support portion of each of the above-mentioned two first pillars is arranged at the end of any support portion connected to the above-mentioned one or more second pillars with respect to the central axis of the above-mentioned vertical heat treatment boat. Point-symmetrical location of the wafer support area.

[3] The vertical type heat treatment furnace processing boat according to [1] or [2], wherein the support portion connecting each of the at least one pillar is arranged on the inner side of the outer circumference of the semiconductor wafer and on the outer side of the processing area of the device Supports the backside of the above-mentioned semiconductor wafer.

[4] The vertical heat treatment furnace boat according to any one of [1] to [3], wherein the support portion connecting all of the plurality of supports is configured to support the back surface of the semiconductor wafer in the second region.

[5] The vertical heat treatment furnace boat according to any one of [1] to [4], wherein the vertical heat treatment furnace boat is made of silicon, silicon carbide or silicon dioxide.

[6] A heat treatment method for a semiconductor wafer, characterized in that: the semiconductor wafer to be heat treated is placed on the above-mentioned support portion of the vertical heat treatment furnace treatment boat according to any one of the above-mentioned [1] to [5], and The aforementioned semiconductor wafer is subjected to heat treatment.

[7] The heat treatment method for a semiconductor wafer according to [6], wherein the semiconductor wafer is a silicon wafer. [Efficacy of the invention]

According to the present invention, when the heat treatment is applied to the semiconductor wafer, it is possible to suppress the occurrence of slip displacement of the semiconductor wafer more than in the past.

(handling boat) Hereinafter, embodiments of the present invention will be described with reference to the drawings. The processing boat of the present invention is a vertical type heat treatment furnace processing boat that includes a plurality of supports and one or more supporting parts connected to each of the plurality of supports to support the back surface of the semiconductor wafer. Here, it is characterized in that: with regard to at least one of each of the plurality of support supports, an area including the central axis of the above-mentioned processing boat and sandwiched between the two surfaces of the above-mentioned support is used as the first area, and the above-mentioned When the area other than the first area is used as the second area, it is configured as a supporting portion connected to the pillar, and the back surface of the semiconductor wafer is supported in the second area.

As described above, it has been found that slippage occurs in vertical heat treatment furnaces when semiconductor wafers are heat treated using conventional boats. The inventors of the present invention studied a processing boat having a structure as shown in FIG. 1 while researching a processing boat capable of suppressing the slip displacement of semiconductor wafers during heat processing.

The processing boat 100 shown in FIG. 1( a) is equipped with: two first pillars 11 and two second pillars 12, and each of the first pillars 11 and the second pillars 12 is connected to the back surface of the semiconductor wafer W supporting the heat treatment object. The plurality of supporting parts 11a, 12a. As shown in FIG. 1( b ), the first pillar 11 is arranged on the plane P perpendicular to the wafer filling direction while including the central axis O of the vertical processing boat 100 without hindering the filling of the semiconductor wafer W. The two pillars on the front side of the wafer filling, the second pillar 12 is the pillar arranged on the rear side of the wafer filling. FIG. 1( c ) shows a state in which the support portion 11 a supports the back surface of the semiconductor wafer W. As shown in FIG. Furthermore, the support portions 11a and 12a configured to support the same semiconductor wafer W are substantially the same in height and position of the surface in contact with the semiconductor wafer W (that is, substantially on the same plane).

Fig. 2 is a diagram showing details of the first pillar 11 and the support portion 11a, (a) is an overall view, and (b) is a plan view. In addition, in FIG. 2( b ), Lw represents the outer periphery of the semiconductor wafer W. As shown in FIG. As shown in FIG. 2( a ), the support portion 11 a connected to the first support 11 is configured to have an outer periphery Lw extending from the first support 11 along the semiconductor wafer W when the semiconductor wafer W is placed on the support 11 a. The extended shape is in contact with the back surface of the semiconductor wafer W in the region (wafer support region) Ac shown in FIG. 2( b ).

In addition, FIG. 3 is a figure which shows the detail of the 2nd support|pillar 12 and the support part 12a, (a) is an overall view, (b) is a top view. In addition, in FIG.3(b), Lw has shown the outer periphery of the semiconductor wafer W. As shown in FIG. As shown in FIG. 3( a), the support portion 12a connected to the second support 12 is configured in the same manner as the processing boat described in Patent Documents 1 and 2. When the semiconductor wafer W is placed on the support portion 12a, there is 2. The support 12 has a shape extending toward the center of the semiconductor wafer W placed on the support portion 12a, and is in contact with the back surface of the semiconductor wafer W in the wafer support region Ac shown in FIG. 3(b).

Moreover, when the semiconductor wafer W to be heat-treated by the above-mentioned processing boat 100 is placed on the support parts 11a, 12a, since a large amount of the weight of the semiconductor wafer W will lean against the first support 11 side, the semiconductor wafer will be damaged. The wafer W is placed with the center of gravity of the wafer slightly tilted toward the first support 11 side. In addition, as shown in FIG. 1(a), a heater 13 for heating the semiconductor wafer W is arranged around the processing boat 100, but the heater 13 shown in FIG. 1(a) is a simple model, different from the actual one.

The present inventors introduced the processing boat 100 shown in FIG. 1 into a vertical heat treatment furnace to perform heat treatment on a plurality of silicon wafers. As a result, slip displacement occurred from several flaws formed on the outer peripheral portion of the silicon wafer, and in any of them, slip displacement occurred from flaws located near the first pillar 11 .

FIG. 4 is an example of an X-ray observation image showing a silicon wafer in which slip aberration has occurred. In the silicon wafer shown in FIG. 4, it can be considered that, as indicated by the arrow, a flaw formed by contact with the support portion 11a is formed on the outer peripheral portion of the silicon wafer. Then, only from the flaw located at the position closest to the first support 11 , slippage occurs.

In addition, although not shown in the figure, the second support 12 has a flaw thought to be formed by the contact between the supporting portion 12a of the second support 12 and the outer peripheral portion of the silicon wafer, but no slippage occurs from the flaw.

The inventors of the present invention, based on the above results, conducted a heat transfer analysis of a silicon wafer during heat treatment by simulation in order to investigate the cause of the occurrence of slip dislocation only from the flaw located near the first pillar 11 . As a result, it was found that the thermal stress in the area of the silicon wafer away from the first pillar 11 (for example, the tip portion of the support portion 11a) is relatively small, and the heat from the heater 13 is shielded by the first pillar 11 of the silicon wafer. The thermal stress in the area is relatively high. In addition, it was confirmed that the supporting portion 12a was not subjected to thermal stress like the supporting portion 11a.

The reason why the thermal stress becomes larger in the area shaded by the first support 11 is that the heat from the heater 13 is blocked by the first support 11 and the area shaded by the first support 11 is not hindered. Near the boundary of the region, the temperature variation of the silicon wafer will become larger.

Based on the results of the heat transfer analysis described above, the present inventors concentrated on studying the shape of the processing boat capable of suppressing the slip displacement of the semiconductor wafer W during heat processing. As the structure of the processing boat used in the vertical heat treatment furnace, it is difficult to remove the first pillars 11 and 12 that block the heat from the heater 13 . Therefore, the present inventors concentrated on research on a processing boat 100 having the first pillars 11, 12 as shown in FIG. shape. As a result, it was found that the configuration in which the back surface of the semiconductor wafer W is supported by the support portion 11a in an area (second area) other than the area (the first area) that becomes the shadow of the first pillar 11 under the heat from the heater 13 is very effective. And complete the present invention.

Furthermore, in the present invention, the above-mentioned "the area where the heat from the heater 13 becomes the shadow of the first pillar 11 (the first area)" means, as shown in FIG. At the same time, the central axis O is connected to the area (first area) A1 between the two surfaces P1, P2 of the first support 11 (second support 12).

In FIG. 5 , the back surface of the semiconductor wafer W can be supported by the support portion 11a in an area (second area) A2 other than the area (first area) A1, so that it is possible to suppress damage to the semiconductor wafer from forming on the semiconductor wafer during heat treatment. Wounds in the outer peripheral portion of the slippage occurred.

FIG. 6 is a diagram illustrating a method of supporting the semiconductor wafer W using the support unit 11a. FIG. 6( a ) shows the first support 11 in which a slippage occurs from a flaw in the vicinity of the first support 11 , which is the same as that shown in FIG. 2 . The support portion 11a shown in FIG. 6(a) also supports the back surface of the semiconductor wafer W in the first region A1 which is the shadow of the first pillar 11, and the support portion 11a and the semiconductor wafer W are on the wafer support region Ac surface. touch. On the other hand, in the supporting portion 21a shown in FIG. 6( b ), the shadowed portion of the first pillar 21 is largely removed. Thus, the first supporting portion 21a does not support the back surface of the semiconductor wafer W in the first area A1, and the supporting portion 21a and the semiconductor wafer W are in surface contact only in the wafer supporting area Ac in the second area A2. This prevents the support portion 21a from coming into contact with a region of the semiconductor wafer W having a large thermal stress during the heat treatment, and suppresses the occurrence of slip displacement from flaws formed on the outer periphery of the semiconductor wafer W during the heat treatment.

Furthermore, in each of the wafer support regions Ac connected to the support portions 21a of the two first pillars 21, with respect to the central axis O of the upright type heat treatment boat 100, it is arranged on any one of the second pillars 12 of one or more. A point-symmetrical position of the wafer support area Ac of a connected support portion 12a is preferred. Thereby, the load of the semiconductor wafer W can be evenly distributed to the support parts 21a, 12a, and excessive load on specific support parts 21a, 12a can be suppressed, and the occurrence of slip displacement can be further suppressed. Furthermore, the so-called "in the wafer supporting region Ac of the supporting part 21a, with respect to the central axis O of the vertical heat treatment boat 100, the wafer of the supporting part 12a connected to any of the one or more second pillars 12 is disposed." The point-symmetrical position of the circular support region Ac is as shown in FIG. At least a part of the wafer supporting area Ac of any supporting portion 12 a of the pillar 12 overlaps. In other words, it means that a straight line passing through a certain point of the wafer supporting region Ac of the first supporting portion 21 a and the central axis O passes through the wafer supporting region Ac of any supporting portion 12 a of the second pillar 12 .

In addition, the support portions 21a, 12a connecting each of at least one pillar 21, 12 are preferably arranged inside the outer periphery of the semiconductor wafer W, and support the back surface of the semiconductor wafer W outside the device processing area. In the device forming step, heat treatment such as RTA and FLA is performed at a high rate of temperature rise and fall, but if there is a scratch on the back of the device processing area, slippage may occur. By arranging the supporting parts 21a, 12a inside the outer periphery of the semiconductor wafer W, and supporting the back surface of the semiconductor wafer W outside the device processing area, scratches are prevented from being formed on the back surface of the device processing area, and slippage can be prevented. poor row, but can improve the yield.

Furthermore, when the diameter of the semiconductor wafer W to be supported is, for example, 450 mm, the weight of the wafer will increase, so the load on the supporting parts 21a and 12a will be greater than that of a diameter of 300 mm. In such a case, the support portions 21a, 12a of all the first pillars 21, 12 are configured to support the semiconductor wafer W in the second area A2 other than the first area A1 that is shaded by the first pillars 21, 12. The back is better. Thereby, it is possible to suppress the occurrence of slip displacement from scratches formed by the contact between the semiconductor wafer W and the support portions 21a and 12a.

In addition, the diameter of the semiconductor wafer W is not particularly limited, and may be, for example, 150 mm or more, 300 mm or more, specifically, 150 mm, 200 mm, 300 mm, 450 mm, or the like. Each configuration of the processing boat 1 can be configured according to the size of the diameter of the semiconductor wafer W. As shown in FIG.

The first pillars 21, 12 and the support portions 21a, 12a can be made of silicon, silicon carbide, or silicon oxide.

(Heat treatment method for semiconductor wafers) Next, a heat treatment method for a semiconductor wafer according to the present invention will be described. The heat treatment method of a semiconductor wafer according to the present invention is characterized in that a semiconductor wafer to be heat treated is placed on the support portion of the processing boat according to the present invention, and heat treatment is performed on the semiconductor wafer.

As described above, in the processing boat 1 of the present invention, the support portion 21a of the first support 21 supports the semiconductor wafer W to be heat-treated in the second area A2 other than the first area A1 that is shaded by the first support 21. The back. Therefore, by setting the above-mentioned processing boat 1 in the vertical heat treatment furnace, and placing the semiconductor wafer W to be heat-treated on the support portions 21a, 12a of the first pillars 21, 12 for heat treatment, it is possible to suppress the formation of the semiconductor wafer W during the heat treatment. The flaws in the outer peripheral portion of the semiconductor wafer W generate slip displacement.

The semiconductor wafer to be subjected to the above heat treatment is not particularly limited, but in the case of a silicon wafer, it is suitable for heat treatment. [Example]

Examples of the present invention will be described below, but the present invention is not limited to the examples.

(Invention Example 1) A silicon wafer (diameter: 200 mm) was heat-treated using a processing boat having a support portion 21 a shown in FIG. 8( a ). The supporting part 21a shown in FIG. 8(a) has a structure similar to the supporting part 11a shown in FIG. In addition, as shown in FIG. 8( b ), the wafer support region Ac connected to the support portion 21 a of each first support 21 is arranged at the point where the second support 12 is connected with respect to the central axis O of the vertical heat treatment boat 1 . The point-symmetrical position of the wafer supporting area Ac of any supporting part 12a. Silicon wafers were placed on the support parts 21a and 12a of such a processing boat, and 110 silicon wafers were heat-treated. Specifically, it was charged into a vertical heat treatment furnace at 700° C., and the temperature was raised to 1100° C. at a temperature increase rate of 5° C./minute, and held for 60 minutes. Thereafter, the temperature was lowered to 700° C. at a cooling rate of 2.5° C./minute, and it was taken out from the furnace. As a result, the silicon wafer did not suffer from slipping. The calculation of heat transfer by simulation shows that the maximum value of von Mises stress is 1.22MPa, and the average value is 1.16MPa in the contact point of the contact area between the support part and the silicon wafer.

(Invention Example 2)

Similar to Invention Example 1, the silicon wafer was heat-treated. However, as the processing boat, one having a support portion 21a as shown in FIG. 9(a) is used. The support portion 21a shown in FIG. 9(a) is configured to support a part closer to the center side of the silicon wafer than that shown in FIG. part. In addition, as shown in FIG. 9( b ), the wafer support region Ac connected to the support portion 21 a of each first support 21 is arranged at the position where the second support 12 is connected with respect to the central axis O of the vertical heat treatment boat 1 . The point-symmetrical position of the wafer supporting area Ac of any supporting part 12a. Other conditions are the same as Invention Example 1. As a result, the silicon wafer did not suffer from slipping. As a result of heat transfer calculation by simulation, the von Mises stress has a maximum value of 1.09MPa and an average value of 0.98MPa in the contact point of the contact area between the support part and the silicon wafer.

(comparative example)

Similar to Invention Example 1, the silicon wafer was heat-treated. However, as the processing boat, the processing boat 100 shown in FIGS. 1 to 3 is used. In the processing boat 100 shown in FIGS. 1 to 3 , the silicon wafer is also supported by the first region A1 that is shaded by the first pillar 11 . Other conditions are the same as Invention Example 1. As a result, slippage occurs from the flaw in the first region A1 that is shaded by the first support 11 . Calculation of heat transfer by simulation shows that the von Mises stress has a maximum value of 1.35 MPa and an average value of 1.23 MPa in the contact point of the contact area between the support portion 11 a and the silicon wafer.

[Industrial Utilization]

According to the present invention, when a semiconductor wafer is subjected to heat treatment, the occurrence of slip and displacement of the semiconductor wafer can be suppressed more than in the past, so it is useful in the semiconductor industry.

1,100: Processing boat 11,21: Pillar 1 12: 2nd pillar 11a, 12a, 21a: support department 13: heater A1: Area 1 A2: The second area Ac: Wafer support area P,P1,P2: faces Lw: Perimeter of semiconductor wafer O: Central axis of the handling boat W: semiconductor wafer

Fig. 1 is a view showing the structure of the processing boat under study, (a) is an overall view, (b) is a plan view, and (c) is a cross-sectional view taken along line X-X in (a). It is a figure which shows the detail of a 1st pillar and a support part, (a) is an overall view, (b) is a top view. It is a figure which shows the detail of a 2nd pillar and a support part, (a) is an overall view, (b) is a top view. FIG. 4 is an example of an X-ray observation image of a silicon wafer in which slip aberration has occurred. FIG. 5 is a diagram illustrating a position for supporting the back surface of a semiconductor wafer in the processing boat of the present invention. FIG. 6 is a diagram illustrating a support region of a semiconductor wafer in a support portion. FIG. 7 is a diagram illustrating a method of supporting semiconductor wafers more evenly in the present invention. FIG. 8( a ) is a support portion of the processing boat used in Invention Example 1, and FIG. 8( b ) is a plan view of the processing boat. Fig.9 (a) is the support part used for the processing boat of the invention example 2, (b) is a top view of a processing boat.

11: Pillar 1

11a: Support Department

A1: Area 1

A2: The second area

P1, P2: surface

O: Central axis of the handling boat

Claims (9)

A vertical heat treatment furnace treatment boat, which is equipped with a plurality of support pillars, and connected to each of the plurality of support supports to support more than one support portion on the back side of the above-mentioned semiconductor wafer, the vertical heat treatment furnace treatment boat, its characteristics In that: for at least one of the above-mentioned plurality of support supports, the area including the central axis of the above-mentioned processing boat and sandwiched between the two surfaces of the above-mentioned support is used as the first area, and the area other than the above-mentioned first area is used as the first area. When the region is used as the second region, it is configured such that the support portion connected to the pillars supports the back surface of the semiconductor wafer only in the second region. The processing boat for a vertical heat treatment furnace as claimed in claim 1, wherein the above-mentioned plurality of supporting pillars are arranged on the front side of the wafer filling for the surface perpendicular to the filling direction of the wafer, including the central axis of the above-mentioned vertical processing boat. Two first pillars, and one or more second pillars on the rear side of the wafer filling, when viewed from above, the wafer support area connected to the supporting part of each of the above two first pillars, compared with the above-mentioned vertical heat treatment The central axis of the boat is arranged at a point-symmetrical position connecting the wafer holding area of any one of the supporting parts of the one or more second pillars. The processing boat for a vertical heat treatment furnace according to Claim 1, wherein the support portion connecting each of the at least one support is arranged on the inner side of the outer circumference of the semiconductor wafer, and supports the back surface of the semiconductor wafer outside the device processing area . The processing boat for a vertical heat treatment furnace according to claim 2, wherein the support portion connecting each of the at least one support is arranged on the inner side of the outer circumference of the semiconductor wafer, and supports the back surface of the semiconductor wafer on the outer side of the device processing area . The vertical heat treatment furnace processing boat according to any one of claims 1 to 4, wherein the support portion connecting all of the plurality of supports is configured to support the back surface of the semiconductor wafer in the second region. The vertical heat treatment furnace boat according to any one of claims 1 to 4, wherein the vertical heat treatment boat is made of silicon, silicon carbide or silicon dioxide. The vertical heat treatment furnace treatment boat according to claim 5, wherein the vertical heat treatment furnace treatment boat is made of silicon, silicon carbide or silicon dioxide. A heat treatment method for a semiconductor wafer, characterized in that: the semiconductor wafer to be heat treated is placed on the above-mentioned supporting part of the vertical heat treatment furnace treatment boat according to any one of claims 1 to 7, and the above-mentioned semiconductor wafer is subjected to heat treatment. The heat treatment method for a semiconductor wafer as claimed in claim 8, wherein the above-mentioned semiconductor wafer is a silicon wafer.

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