TWI795144B - Light emitting diode display device - Google Patents

Abstract

A light-emitting diode display device includes a circuit substrate, a dielectric layer, a light-emitting diode and a reflective layer. The circuit substrate has a first pad. The dielectric layer is located on the circuit substrate. The dielectric layer has a first through hole overlapping the first pad. The first surface of the dielectric layer has microstructures. The microstructures include raised microstructures or recessed microstructures. The light emitting diode is overlapping with the first through hole and is electrically connected to the first pad. The reflective layer is located on the first surface of the dielectric layer and overlapping with the microstructures.

Description

light emitting diode display device

The present invention relates to a light-emitting diode display device, and in particular to a light-emitting diode display device with a dielectric layer having a microstructure.

Light-emitting diode is a kind of electroluminescent semiconductor element, which has the advantages of high efficiency, long life, unbreakable, fast response, high reliability, etc. Therefore, light-emitting diode display device is regarded as a very competitive display device. Generally speaking, besides the light-emitting diodes, the light-emitting diode display device also includes many materials with different refractive indices. When the light emitted by the light-emitting diode is transmitted from a high-refractive-index medium to a low-refractive-index medium, and the incident angle of the light is greater than the critical angle (critical angle), the light will have a problem of total reflection, and cause the light-emitting diode The brightness of volumetric display devices is insufficient, and therefore, a method that can solve the aforementioned problems is urgently needed at present.

The invention provides a light-emitting diode display device, which can improve the problem of brightness reduction caused by total reflection.

The invention provides a method for manufacturing a light-emitting diode display device, which can improve the problem that the brightness of the light-emitting diode display device decreases due to total internal reflection.

At least one embodiment of the invention provides a light emitting diode display device. The light emitting diode display device includes a circuit substrate, a dielectric layer, a light emitting diode and a reflective layer. The circuit substrate has a first pad. The dielectric layer is on the circuit substrate. The dielectric layer has a first through hole overlapping with the first pad. The first surface of the dielectric layer has multiple microstructures. The microstructures include a plurality of raised microstructures or a plurality of recessed microstructures. The light emitting diode overlaps the first through hole and is electrically connected to the first pad. The reflective layer is located on the first surface of the dielectric layer and overlaps the microstructure.

At least one embodiment of the present invention provides a method for manufacturing a light-emitting diode display device, including forming a dielectric layer on a circuit substrate, wherein the circuit substrate has a first pad, and the dielectric layer has a layer overlapping the first pad. The first via hole, wherein the first surface of the dielectric layer has a plurality of microstructures, and the microstructures include a plurality of convex microstructures or a plurality of concave microstructures; electrically connect the light emitting diode to the first pad , wherein the light emitting diode is overlapped on the first through hole; and a reflective layer is formed on the first surface of the dielectric layer, and the reflective layer is overlapped on the microstructure.

FIG. 1 is a schematic cross-sectional view of a light emitting diode display device according to an embodiment of the present invention.

Please refer to FIG. 1 , the light emitting diode display device 10 includes a circuit substrate CB, a dielectric layer 200 , a light emitting diode 410 and a reflective layer 312 . In this embodiment, the LED display device 10 further includes a first buffer layer 300 , electrodes 314 , bonding pads 316 , a second buffer layer 320 , a first connection structure 402 , a second connection structure 404 and a die-bonding glue 500 .

The circuit board CB includes a substrate 100, a first pad 112, a second pad 114, a third pad 116, a first insulating layer 120, an extension structure 132, a first signal line 134, a second signal line 136 and a second insulating layer. Layer 140. The circuit board CB has a display area DA and a peripheral area PA. The peripheral area PA is located on at least one side of the display area DA.

The material of the substrate 100 can be glass, quartz, organic polymer or opaque/reflective material (eg conductive material, metal, wafer, ceramic or other applicable materials) or other applicable materials. If conductive materials or metals are used, an insulating layer (not shown) is covered on the substrate 100 to avoid short circuit problems.

The first pad 112 , the second pad 114 and the third pad 116 are located on the substrate 100 . In this embodiment, the first pad 112 , the second pad 114 and the third pad 116 belong to the same conductive film layer, such as the first metal layer. In other words, the first pad 112 , the second pad 114 and the third pad 116 are defined by the same patterning process. In other embodiments, the first pad 112 , the second pad 114 and the third pad 116 may respectively belong to different conductive film layers. In this embodiment, the first pad 112 and the second pad 114 are located in the display area DA of the circuit substrate CB, and the third pad 116 is located in the peripheral area PA of the circuit substrate CB.

The first insulating layer 120 is located in the display area DA and the peripheral area PA of the circuit substrate CB. The first insulating layer 120 has a plurality of through holes overlapping the first pad 112 , the second pad 114 and the third pad 116 respectively.

The extension structure 132 , the first signal line 134 and the second signal line 136 are located on the first insulating layer 120 . The extension structure 132 is electrically connected to the first pad 112 . The first signal line 134 is electrically connected to the second pad 114 . The second signal line 136 is electrically connected to the third pad 116 . In this embodiment, the extension structure 132 , the first signal line 134 and the second signal line 136 belong to the same conductive film layer, such as the second metal layer. In other words, the extension structure 132 , the first signal line 134 and the second signal line 136 are defined by the same patterning process. In other embodiments, the extension structure 132 , the first signal line 134 and the second signal line 136 may respectively belong to different conductive film layers. In this embodiment, the extension structure 132 and the first signal line 134 are located in the display area DA of the circuit substrate CB, and the second signal lines 136 are located in the peripheral area PA of the circuit substrate CB. In some embodiments, the second signal line 136 extends from the peripheral area PA to the display area DA, and is electrically connected to the first signal line 134 and/or the extension structure 132 . For example, the second signal line 136 is electrically connected to one or more active devices (not shown) in the display area DA, and the aforementioned one or more active devices are electrically connected to the second signal line 136 to the first signal Line 134 and/or extension structure 132 .

In this embodiment, the extension structure 132 , the first signal line 134 and the second signal line 136 are located above the first insulating layer 120 , and the first pad 112 , the second pad 114 and the third pad 116 are located on the first pad. between the insulating layer 120 and the substrate 100 , but the present invention is not limited thereto. The positions of the first metal layer and the second metal layer can be reversed. In other words, in other embodiments, the extension structure 132 , the first signal line 134 and the second signal line 136 are located between the first insulating layer 120 and the substrate 100 , while the first pad 112 , the second pad 114 and The third pad 116 is located above the first insulating layer 120 .

The second insulating layer 140 is located on the extension structure 132 , the first signal line 134 and the second signal line 136 . The second insulating layer 140 has a plurality of through holes overlapping the extension structure 132 , the first signal line 134 and the second signal line 136 respectively. In this embodiment, the through holes of the second insulating layer 140 overlap the first pad 112 , the second pad 114 and the third pad 116 respectively.

The dielectric layer 200 is located on the circuit substrate CB. In some embodiments, the dielectric layer 200 is located on the display area DA of the circuit substrate CB and does not extend to the peripheral area PA of the circuit substrate CB. The dielectric layer 200 has a first via hole 210 overlapping the first pad 112 . In this embodiment, the first through hole 210 overlaps the first pad 112 and the second pad 114 at the same time. The dielectric layer 200 has a second via hole 220 overlapping the extension structure 132 . In some embodiments, the width W2 of the second through hole 220 is 8 microns to 10 microns. In some embodiments, the width W1 and the width W2 respectively refer to the maximum widths of the first through hole 210 and the second through hole 220 , and the width W1 is greater than the width W2 .

The first surface S1 of the dielectric layer 200 has a plurality of microstructures 202 . In this embodiment, the microstructure 202 includes a plurality of protruding microstructures. In this embodiment, the microstructure 202 is the surface structure of the dielectric layer 200 itself. Therefore, the process required for manufacturing the dielectric layer 200 can be simplified. In some embodiments, the dielectric layer 200 is an organic material layer, and is suitable for ultra high aperture (UHA) display panel technology.

In this embodiment, part of the dielectric layer 200 overlaps the conductive layer (eg, the extension structure 132 and the first signal line 134 ), while another part of the dielectric layer 200 does not overlap the conductive layer. In some embodiments, the top surface of a portion of the dielectric layer 200 overlapping the conductive layer is higher than the top surface of another portion of the dielectric layer 200 not overlapping the conductive layer, but the invention is not limited thereto. In other embodiments, the top surface of a portion of the dielectric layer 200 overlapping the conductive layer is at the same level as the top surface of another portion of the dielectric layer 200 not overlapping the conductive layer.

The light emitting diode 410 overlaps the first through hole 210 of the dielectric layer 200 and is electrically connected to the first pad 112 and the second pad 114 . In this embodiment, the light emitting diode 410 may include any form of light emitting diode. In this embodiment, two electrodes (not shown) of the light emitting diode 410 are electrically connected to the first connection structure 402 and the second connection structure 404 in the first through hole 210 respectively, and pass through the first connection structure 402 and the second connection structure 404 are electrically connected to the first pad 112 and the second pad 114 respectively. The first connection structure 402 and the second connection structure 404 can be single-layer or multi-layer structures. In some embodiments, the first connection structure 402 and the second connection structure 404 are solder. In some embodiments, the thickness H1 of the first connection structure 402 and the second connection structure 404 is greater than the thickness H2 of the dielectric layer 200 .

The first buffer layer 300 is located on the first surface S1 of the dielectric layer 200 . In this embodiment, the first buffer layer 300 is directly formed on the dielectric layer 200 , and the first buffer layer 300 covers the microstructure 202 . In this embodiment, the first buffer layer 300 conforms to the microstructure 202 , so the first buffer layer 300 on the first surface S1 of the dielectric layer 200 has a shape corresponding to the microstructure 202 . In this embodiment, the first buffer layer 300 also lines the sidewalls of the first through hole 210 and the sidewall of the second through hole 220 .

In this embodiment, both the reflective layer 312 and the electrode 314 are disposed on the display area DA, and both the reflective layer 312 and the electrode 314 have shapes corresponding to the microstructure 202 . In some embodiments, the reflective layer 312 is a floating electrode, but the invention is not limited thereto.

The reflective layer 312 is located on the first surface S1 of the dielectric layer 200 and overlaps the microstructure 202 . In this embodiment, the reflective layer 312 is directly formed on the first buffer layer 300 and is conformal to the surface of the first buffer layer 300 , therefore, the reflective layer 312 has a shape corresponding to the microstructure 202 .

The electrode 314 is located on the first surface S1 of the dielectric layer 200 and overlaps the microstructure 202 . In this embodiment, the electrode 314 is directly formed on the first buffer layer 300 and is conformal to the surface of the first buffer layer 300 . Therefore, the electrode 314 has a shape corresponding to the microstructure 202 . The electrode 314 is separated from the reflective layer 312 .

The electrode 314 extends from above the microstructure 202 into the second through hole 220 . The electrode 314 is electrically connected to the extension structure 140 of the circuit substrate CB. In some embodiments, the electrode 314 can be used as an electrode for testing the LED 410 . For example, by touching the electrode 314 with a probe, it is tested whether the light emitting diode 410 can work normally. In this embodiment, with the arrangement of the electrodes 314, the aforementioned probes only need to contact the electrodes 314 on the first surface S1 of the dielectric layer 200 to be electrically connected to the light-emitting diodes 410, without using the probes. The needle protrudes into the second through hole 220, so the width W2 of the second through hole 220 can be set smaller.

The second buffer layer 320 is directly formed on the reflective layer 312 . The reflective layer 312 is located between the first buffer layer 300 and the second buffer layer 320 . In this embodiment, the second buffer layer 320 has a through hole overlapping the electrode 314 , so the probe can contact the electrode 314 through the aforementioned through hole. In some embodiments, the second buffer layer 320 fills the gap between the reflective layer 312 and the electrode 314 , thereby reducing the chance of the short circuit between the reflective layer 312 and the electrode 314 , but the invention is not limited thereto. In other embodiments, the second buffer layer 320 does not fill the gap between the reflective layer 312 and the electrode 314 .

The die-bonding adhesive 500 covers the LED 410 . In some embodiments, the die-bonding glue 500 flows into the first through hole 210 and covers the first connection structure 402 and the second connection structure 404 under the light emitting diode 410 . In some embodiments, the die-bonding glue 500 covers the electrodes 314 and is selectively filled into the second through holes 220 . In some embodiments, the die-bonding adhesive 500 is a transparent packaging material, such as epoxy resin or other suitable materials. The refractive index of the die-bonding adhesive 500 is greater than 1. In some embodiments, the refractive index of the die-bonding adhesive 500 is 1.2 to 1.7, such as 1.5.

In this embodiment, when the incident angle θ1 of the light L emitted by the light emitting diode 410 reaches the interface between the die-bonding adhesive 500 and air is greater than the critical angle, the light L will be totally reflected. After the light L is reflected by the interface between the die-bonding glue 500 and the air, it will be reflected by the reflective layer 312 or the electrode 314 above the microstructure 202 and reach the interface between the die-bonding glue 500 and the air again. When the light L reaches the interface between the die-bonding adhesive 500 and the air again, the incident angle θ2 is smaller than the critical angle, and the light L can leave the die-bonding adhesive 500 . Based on the foregoing, by disposing the reflective layer 312 and/or the electrode 314 , the problem of brightness decrease due to total reflection can be improved.

In some embodiments, a black matrix (not shown) is further included on the display area DA. The black matrix is suitable for preventing different pixels or sub-pixels from interfering with each other.

Bonding pads 316 are located on the peripheral area PA. The bonding pad 316 is electrically connected to the third pad 116 and the second signal line 136 . In some embodiments, the bonding pad 316 , the electrode 314 and the reflective layer 312 belong to the same film layer. In other words, the bonding pad 316, the electrode 314 and the reflective layer 312 are defined by the same patterning process. In this embodiment, the bonding pad 316 , the electrode 314 and the reflective layer 312 include the same material. For example, the bonding pad 316 , the electrode 314 and the reflective layer 312 include aluminum, silver, or the aforementioned metals or other reflective materials.

2A to 2F are schematic cross-sectional views of the manufacturing method of the light emitting diode display device of FIG. 1 .

Referring to FIG. 2A , a circuit substrate CB is provided. The circuit board CB includes a substrate 100, a first pad 112, a second pad 114, a third pad 116, a first insulating layer 120, an extension structure 132, a first signal line 134, a second signal line 136 and a second insulating layer. layer 140, wherein the first insulating layer 120 and the second insulating layer 140 have a via hole 122 overlapping the first pad 112, a via hole 124 overlapping the second pad 114, and a via hole overlapping the third pad 116 126. The second insulating layer 140 has a through hole 128 overlapping the extension structure 132 .

Referring to FIG. 2B to FIG. 2E , a dielectric layer 200 is formed on the circuit substrate CB.

First, referring to FIG. 2B , the first photoresist layer PR1 is coated on the circuit substrate CB. The first photoresist layer PR1 is located on the display area DA, and selectively located on the peripheral area PA. The first photoresist layer PR1 selectively fills the via holes 122 , 124 , 126 and 128 of the second insulating layer 140 .

Referring to FIG. 2C , a first lithography process is performed on the first photoresist layer PR1 to form an organic material layer 200 a. The organic material layer 200a is located on the display area DA and does not extend to the peripheral area PA. The organic material layer 200 a has a first through hole 210 and a second through hole 220 . The first through hole 210 overlaps the first pad 112 and the second pad 114 . The second through hole 220 overlaps the extension structure 132 .

Referring to FIG. 2D, the second photoresist layer PR2 is coated on the organic material layer 200a. In some embodiments, the first photoresist layer PR1 and the second photoresist layer PR2 include the same photoresist material. For example, both the first photoresist layer PR1 and the second photoresist layer PR2 are positive photoresist materials or both the first photoresist layer PR1 and the second photoresist layer PR2 are negative photoresist materials.

Referring to FIG. 2E , a second photolithography process is performed on the second photoresist layer PR2 to form a raised microstructure 202 . The dielectric layer 200 includes an organic material layer and a raised microstructure 202 on the surface of the organic material layer. In some embodiments, since the organic material layer and the raised microstructure 202 comprise the same material, the boundary between the organic material layer and the raised microstructure 202 is less obvious.

Next, referring to FIG. 2F , a first buffer layer 300 is formed on the dielectric layer 200 . In some embodiments, the first buffer layer 300 selectively fills the first via hole 210 and the second via hole 220 and contacts the second insulating layer 140 .

A reflective layer 312 , electrodes 314 and bonding pads 316 are formed. The reflective layer 312 and the electrode 314 are formed on the first surface S1 of the dielectric layer 200 , and the bonding pad 316 is formed on the peripheral area PA. In this embodiment, the reflective layer 312 and the electrode 314 are directly formed on the first buffer layer 300 , and the bonding pad 316 is directly formed on the second insulating layer 140 . The reflective layer 312 and the electrode 314 overlap the microstructure 202 .

Finally, referring to FIG. 1 , the light emitting diode 410 is electrically connected to the first pad 112 and the second pad 114 . In some embodiments, a probe is used to touch the electrode 314 to detect whether the LED 410 can function normally. After the light-emitting diode 410 is inspected, a die-bonding glue 500 is formed on the light-emitting diode 410 .

FIG. 3 is a schematic cross-sectional view of a light emitting diode display device according to an embodiment of the present invention. It must be noted here that the embodiment in FIG. 3 uses the component numbers and parts of the content in the embodiment in FIG. 1 , wherein the same or similar numbers are used to denote the same or similar components, and the description of the same technical content is omitted. For the description of the omitted part, reference may be made to the foregoing embodiments, and details are not repeated here.

The main difference between the light emitting diode display device 20 in FIG. 3 and the light emitting diode display device 10 in FIG. 1 is that the microstructure 602 of the surface S1 of the flat layer 200 of the light emitting diode display device 20 is a concave microstructure.

Please refer to FIG. 3 , the light emitting diode display device 20 includes a circuit substrate CB, a dielectric layer 200 , a light emitting diode 410 and a reflective layer 312 . In this embodiment, the light emitting diode display device 20 further includes electrodes 314 , bonding pads 316 , a second buffer layer 320 , a first connection structure 402 , a second connection structure 404 and a die-bonding adhesive 500 .

The circuit board CB includes a substrate 100, a first pad 112, a second pad 114, a third pad 116, a first insulating layer 120, an extension structure 132, a first signal line 134, a second signal line 136, a third signal line wire 138 and a second insulating layer 140 . The circuit board CB has a display area DA and a peripheral area PA. The peripheral area PA is located on at least one side of the display area DA.

The first pad 112 , the second pad 114 and the third pad 116 are located on the substrate 100 . In this embodiment, the first pad 112 and the second pad 114 are located in the display area DA of the circuit substrate CB, and the third pad 116 is located in the peripheral area PA of the circuit substrate CB.

The first insulating layer 120 is located in the display area DA and the peripheral area PA of the circuit substrate CB. The first insulating layer 120 has a plurality of through holes overlapping the first pad 112 , the second pad 114 and the third pad 116 respectively. In this embodiment, the first pad 112 , the second pad 114 and the third pad 116 belong to the same conductive film layer, such as the first metal layer.

The extension structure 132 , the first signal line 134 , the second signal line 136 and the third signal line 138 are located on the first insulating layer 120 . The extension structure 132 is electrically connected to the first pad 112 . The first signal line 134 is electrically connected to the second pad 114 . The second signal line 136 is electrically connected to the third pad 116 . In this embodiment, the extension structure 132 , the first signal line 134 , the second signal line 136 and the third signal line 138 belong to the same conductive film layer, such as the second metal layer. In this embodiment, the extension structure 132 , the first signal line 134 and the third signal line 138 are located in the display area DA of the circuit substrate CB, and the second signal line 136 is located in the peripheral area PA of the circuit substrate CB. In some embodiments, the second signal line 136 extends from the peripheral area PA to the display area DA, and is electrically connected to the first signal line 134 , the third signal line 138 and/or the extension structure 132 . The third signal wire 138 can be any wire of the LED display device 20, such as a power wire, a clock signal wire, a ground wire or other wires.

In this embodiment, the extension structure 132 , the first signal line 134 , the second signal line 136 and the third signal line 138 are located above the first insulating layer 120 , while the first pad 112 , the second pad 114 and the third The pad 116 is located between the first insulating layer 120 and the substrate 100 , but the invention is not limited thereto. The positions of the first metal layer and the second metal layer can be reversed.

The second insulating layer 140 is located on the extension structure 132 , the first signal line 134 , the second signal line 136 and the third signal line 138 . The second insulating layer 140 has a plurality of through holes overlapping the extension structure 132 , the first signal line 134 and the second signal line 136 respectively. In this embodiment, the through holes of the second insulating layer 140 also overlap the first pad 112 , the second pad 114 and the third pad 116 respectively.

The dielectric layer 600 is on the circuit substrate CB. In some embodiments, the dielectric layer 600 is located on the display area DA of the circuit substrate CB and does not extend to the peripheral area PA of the circuit substrate CB. In this embodiment, the first through hole 610 overlaps the first pad 112 and the second pad 114 at the same time. The dielectric layer 620 has a second via hole 620 overlapping the extension structure 132 . In some embodiments, the width W2 of the second through hole 620 is 8 microns to 10 microns. In some embodiments, the width W1 of the first through hole 610 is greater than the width W2 of the second through hole 620 .

The first surface S1 of the dielectric layer 600 has a plurality of microstructures 602 . In this embodiment, the microstructure 602 includes a plurality of concave microstructures. In this embodiment, the microstructure 602 is the surface structure of the dielectric layer 600 itself. Therefore, the process required for manufacturing the dielectric layer 600 can be simplified. In some embodiments, the dielectric layer 600 is an organic material layer, and is suitable for ultra high aperture (UHA) display panel technology.

The light emitting diode 410 overlaps the first through hole 610 of the dielectric layer 600 and is electrically connected to the first pad 112 and the second pad 114 . In this embodiment, the light emitting diode 410 may include any form of light emitting diode. In this embodiment, two electrodes (not shown) of the light emitting diode 410 are electrically connected to the first connection structure 402 and the second connection structure 404 in the first through hole 610 respectively, and pass through the first connection structure 402 and the second connection structure 404 are electrically connected to the first pad 112 and the second pad 114 respectively. The first connection structure 402 and the second connection structure 404 can be single-layer or multi-layer structures. In some embodiments, the first connection structure 402 and the second connection structure 404 are solder. In some embodiments, the thickness H1 of the first connection structure 402 and the second connection structure 404 is greater than the thickness H2 of the dielectric layer 600 .

In this embodiment, both the reflective layer 312 and the electrode 314 are disposed on the display area DA, and both the reflective layer 312 and the electrode 314 have shapes corresponding to the microstructure 202 . In some embodiments, the reflective layer 312 is a floating electrode, but the invention is not limited thereto.

The reflective layer 312 is located on the first surface S1 of the dielectric layer 200 and overlaps the microstructure 202 . In this embodiment, the reflective layer 312 is directly formed on the dielectric layer 600 and conforms to the surface of the dielectric layer 600 , so the reflective layer 312 has a shape corresponding to the microstructure 202 .

The electrode 314 is located on the first surface S1 of the dielectric layer 600 and overlaps the microstructure 202 . In this embodiment, the electrode 314 is directly formed on the dielectric layer 600 and is conformal to the surface of the dielectric layer 600 . Therefore, the electrode 314 has a shape corresponding to the microstructure 602 . The electrode 314 is separated from the reflective layer 312 .

The electrode 314 extends from above the microstructure 602 into the second through hole 220 . The electrode 314 is electrically connected to the extension structure 140 of the circuit substrate CB. In some embodiments, the electrode 314 can be used as an electrode for testing the LED 410 . For example, by touching the electrode 314 with a probe, it is tested whether the light emitting diode 410 can work normally. In this embodiment, with the arrangement of the electrodes 314, the aforementioned probes only need to contact the electrodes 314 on the first surface S1 of the dielectric layer 600 to be electrically connected to the light emitting diodes 410, without using the probes. The needle protrudes into the second through hole 620, so the width W2 of the second through hole 620 can be set smaller.

The second buffer layer 320 is directly formed on the reflective layer 312 . The reflective layer 312 is located between the dielectric layer 600 and the second buffer layer 320 . In this embodiment, the second buffer layer 320 has a through hole overlapping the electrode 314 , so the probe can pass through the through hole to connect to the electrode 314 . In some embodiments, the second buffer layer 320 does not fill the gap between the reflective layer 312 and the electrode 314 .

The die-bonding adhesive 500 covers the LED 410 . In some embodiments, the die-bonding glue 500 flows into the first through hole 610 and covers the first connection structure 402 and the second connection structure 404 under the light emitting diode 410 . In some embodiments, the die-bonding adhesive 500 covers the electrodes 314 and is selectively filled into the second through holes 620 .

In this embodiment, when the incident angle θ1 of the light L emitted by the light emitting diode 410 reaches the interface between the die-bonding adhesive 500 and air is greater than the critical angle, the light L will be totally reflected. After the light L is reflected by the interface between the die-bonding glue 500 and the air, it will be reflected by the reflective layer 312 or the electrode 314 above the microstructure 602 and reach the interface between the die-bonding glue 500 and the air again. When the light L reaches the interface between the die-bonding adhesive 500 and the air again, the incident angle θ2 is smaller than the critical angle, and the light L can leave the die-bonding adhesive 500 . Based on the foregoing, by disposing the reflective layer 312 and/or the electrode 314 , the problem of brightness decrease due to total reflection can be improved.

Bonding pads 316 are located on the peripheral area PA. The bonding pad 316 is electrically connected to the third pad 116 and the second signal line 136 . In some embodiments, the bonding pad 316 , the electrode 314 and the reflective layer 312 belong to the same film layer.

4A to 4E are schematic cross-sectional views of the manufacturing method of the light emitting diode display device of FIG. 3 .

Referring to FIG. 4A to FIG. 4D , a dielectric layer 600 is formed on the circuit substrate CB.

First, referring to FIG. 4A , the first photoresist layer PR1 is coated on the circuit substrate CB. The first photoresist layer PR1 is located on the display area DA, and selectively located on the peripheral area PA. The first photoresist layer PR1 selectively fills the via holes 122 , 124 , 126 and 128 of the second insulating layer 140 .

Referring to FIG. 4B , a first lithography process is performed on the first photoresist layer PR1 to form an organic material layer 600 a. The organic material layer 600a is located on the display area DA and does not extend to the peripheral area PA. The organic material layer 600 a has a first through hole 610 and a second through hole 620 . The first through hole 610 overlaps the first pad 112 and the second pad 114 . The second through hole 620 overlaps the extension structure 132 .

Coating the second photoresist layer PR2 on the organic material layer 600a. In some embodiments, the first photoresist layer PR1 and the second photoresist layer PR2 include different photoresist materials. For example, one of the first photoresist layer PR1 and the second photoresist layer PR2 is a positive photoresist material, and the other is a negative photoresist material.

Referring to FIG. 4C , a second lithography process is performed on the second photoresist layer PR2 to form a mask pattern MS. In some embodiments, the pitch P1 of the mask pattern MS is greater than 4 micrometers, and the thickness H3 of the mask pattern MS is 2.1 micrometers to 2.4 micrometers.

Referring to FIG. 4D , the organic material layer 600 a is etched using the mask pattern MS as a mask to form a dielectric layer 600 having a recessed microstructure 602 . In some embodiments, the method of etching the organic material layer 600 a includes dry etching, for example.

When the dielectric layer includes raised microstructures, the top surfaces of the raised microstructures tend to be smoothed after the heat treatment process. If the raised microstructure is not raised enough, it may reduce the ability of the reflective layer or electrode on the raised microstructure to redirect light. In this embodiment, the concave microstructure 602 of the dielectric layer 600 does not have the problems encountered by the aforementioned convex microstructure, so the brightness of the light-emitting diode display device can be improved.

Referring to FIG. 4E , a reflective layer 312 , electrodes 314 and bonding pads 316 are formed. The reflective layer 312 and the electrode 314 are formed on the first surface S1 of the dielectric layer 600 , and the bonding pad 316 is formed on the peripheral area PA. In this embodiment, the reflective layer 312 and the electrode 314 are directly formed on the dielectric layer 600 , and the bonding pad 316 is directly formed on the second insulating layer 140 . The reflective layer 312 and the electrode 314 overlap the microstructure 602 .

Finally, referring to FIG. 3 , the light emitting diode 410 is electrically connected to the first pad 112 and the second pad 114 . In some embodiments, a probe is used to touch the electrode 314 to detect whether the LED 410 can function normally. After the light-emitting diode 410 is inspected, a die-bonding glue 500 is formed on the light-emitting diode 410 .

FIG. 5 is a schematic top view of a light emitting diode display device according to an embodiment of the present invention. It must be noted here that the embodiment in FIG. 5 follows the component numbers and part of the content of the embodiment in FIG. 1 , wherein the same or similar numbers are used to denote the same or similar components, and the description of the same technical content is omitted. For the description of the omitted part, reference may be made to the foregoing embodiments, and details are not repeated here.

Please refer to FIG. 5 , the first surface of the dielectric layer has a plurality of microstructures 202 arranged in an array. In this embodiment, the microstructure 202 is a protruding microstructure, but the invention is not limited thereto. In other embodiments, the microstructures 202 are recessed microstructures.

The light emitting diode 410 overlaps the first through hole 210 of the dielectric layer, and is electrically connected to the first pad (not shown in FIG. 5 ) and the second pad (not shown in FIG. 5 ) under the first through hole 210 . Show).

The reflective layer 312 and the electrode 314 are located on the first surface of the dielectric layer and overlap the microstructure 202 . The reflective layer 312 and the electrode 314 are separated from each other. The electrode 314 is electrically connected to the extension structure (not shown in FIG. 5 ) through the second via hole 220 of the dielectric layer.

In this embodiment, the microstructure 202 is located around the light emitting diode 410 and surrounds the light emitting diode 410 .

10, 20: Light-emitting diode display device 100: Substrate 112: First pad 114: Second pad 116: The third pad 120: the first insulating layer 122, 124, 126, 128: through holes 132: Extended structure 134: The first signal line 136: Second signal line 138: The third signal line 140: second insulating layer 200, 600: dielectric layer 200a, 600a: organic material layer 202: Microstructure / Raised Microstructure 210, 610: the first through hole 220, 620: the second through hole 300: the first buffer layer 312: reflective layer 314: electrode 316: Bonding Pad 320: the second buffer layer 402: The first connection structure 404: The second connection structure 410: light emitting diode 500: solid crystal glue 602: Microstructure / Depressed Microstructure CB: circuit board DA: display area H1, H2, H3: Thickness L: light MS: Mask pattern P1: Pitch PA: Peripheral Area PR1: The first photoresist layer PR2: The second photoresist layer S1: the first side W1, W2: width θ1, θ2: angle of incidence

FIG. 1 is a schematic cross-sectional view of a light emitting diode display device according to an embodiment of the present invention. 2A to 2F are schematic cross-sectional views of the manufacturing method of the light emitting diode display device of FIG. 1 . FIG. 3 is a schematic cross-sectional view of a light emitting diode display device according to an embodiment of the present invention. 4A to 4E are schematic cross-sectional views of the manufacturing method of the light emitting diode display device of FIG. 3 . FIG. 5 is a schematic top view of a light emitting diode display device according to an embodiment of the present invention.

10: Light-emitting diode display device

100: Substrate

112: First pad

114: Second pad

116: The third pad

120: the first insulating layer

132: Extended structure

134: The first signal line

136: Second signal line

140: second insulating layer

200: dielectric layer

202: Microstructure / Raised Microstructure

210: the first through hole

220: Second through hole

300: the first buffer layer

312: reflective layer

314: electrode

316: Bonding Pad

320: the second buffer layer

402: The first connection structure

404: The second connection structure

410: light emitting diode

500: solid crystal glue

CB: circuit board

DA: display area

H1, H2: Thickness

L: light

PA: Peripheral Area

S1: the first side

W1, W2: width

θ1, θ2: incident angle

Claims (11)

A light-emitting diode display device, comprising: a circuit substrate with a first pad and an extension structure; a dielectric layer located on the circuit substrate, and the dielectric layer has a structure overlapping the first pad a first via hole, and the dielectric layer has a second via hole, wherein a first surface of the dielectric layer has a plurality of microstructures, and the microstructures include a plurality of protruding microstructures or a plurality of depressions Microstructure; a light-emitting diode overlapping the first through hole and electrically connected to the first pad; and a reflective layer located on the first surface of the dielectric layer and overlapping the microstructure structure; and an electrode extending from above the microstructure into the second through hole and electrically connected to the extending structure of the circuit substrate. The light emitting diode display device as claimed in claim 1, wherein the extension structure is electrically connected to the first pad. The light emitting diode display device as claimed in item 1, wherein the circuit substrate has a display area and a peripheral area, the dielectric layer is located in the display area and does not extend to the peripheral area, and the first contact The pad and the extension structure are located in the display area. The light emitting diode display device as claimed in claim 3, further comprising: a bonding pad located on the peripheral region, wherein the bonding pad and the reflective layer are made of the same material. The light emitting diode display device according to claim 1, further comprising: a first buffer layer formed directly on the dielectric layer, and the reflective layer directly formed on the first buffer layer; and a second The buffer layer is directly formed on the reflective layer, and the reflective layer is located between the first buffer layer and the second buffer layer. The light-emitting diode display device as claimed in claim 1, further comprising: a first connection structure electrically connecting the light-emitting diode to the first pad, wherein the thickness of the first connection structure is greater than that of the dielectric layer thickness. A method for manufacturing a light-emitting diode display device, comprising: forming a dielectric layer on a circuit substrate, wherein the circuit substrate has a first pad, and the dielectric layer has a A first through hole, wherein a first surface of the dielectric layer has a plurality of microstructures, and the microstructures include a plurality of raised microstructures or a plurality of recessed microstructures; electrically connecting a light emitting diode to the The first pad, wherein the light-emitting diode overlaps the first through hole; and a reflection layer is formed on the first surface of the dielectric layer, and the reflection layer overlaps the microstructure. The method for manufacturing a light-emitting diode display device as claimed in item 7, wherein the method for forming the dielectric layer on the circuit substrate includes: coating a first photoresist layer on the circuit substrate; performing a first lithography process on the first photoresist layer to form an organic material layer, wherein the organic material layer has the first through hole; coating a second photoresist layer on the organic material layer; performing a second photolithography process on the second photoresist layer to form the raised microstructures, wherein the dielectric layer includes the organic material layer and the raised microstructures. The method of manufacturing a light emitting diode display device as claimed in claim 8, wherein the first photoresist layer and the second photoresist layer comprise the same photoresist material. The method for manufacturing a light-emitting diode display device as claimed in item 7, wherein the method for forming the dielectric layer on the circuit substrate includes: coating a first photoresist layer on the circuit substrate; performing a first lithography process on the first photoresist layer to form an organic material layer, wherein the organic material layer has the first through hole; coating a second photoresist layer on the organic material layer; performing a second photolithography process on the second photoresist layer to form a mask pattern; and etching the organic material layer using the mask pattern as a mask to form the dielectric layer with the recessed microstructures. The method of manufacturing a light emitting diode display device as claimed in claim 10, wherein the first photoresist layer and the second photoresist layer comprise different photoresist materials.

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