TWI793797B - Source driver of reducing interpolation error of channel operational amplifier circuit - Google Patents
Source driver of reducing interpolation error of channel operational amplifier circuit Download PDFInfo
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本發明係與運算放大器有關,特別是關於一種能夠有效消除其輸出電壓曲線之內插誤差(Interpolation error)的包括通道運算放大器(CHOP)電路之源極驅動器。 The present invention relates to operational amplifiers, in particular to a source driver including a channel operational amplifier (CHOP) circuit capable of effectively eliminating the interpolation error of its output voltage curve.
一般而言,傳統應用於源極驅動器的電流控制(current controlled)內插通道運算放大器電路在實際操作時會存在由於尾電流(Tail current)準確度不佳所造成的內插誤差。 Generally speaking, the traditional current controlled interpolation channel operational amplifier circuit applied to the source driver has an interpolation error caused by poor tail current (Tail current) accuracy during actual operation.
請參照圖1,圖1繪示傳統的實際電壓曲線相較於理想電壓曲線具有內插誤差的示意圖。如圖1所示,假設內插區域IPA係位於第一參考電壓VA至第二參考電壓VB之間,則在第一參考電壓VA至平均電壓(VA+VB)/2之間,由於實際電壓曲線CU具有內插誤差ER而大於理想電壓曲線ID;在平均電壓(VA+VB)/2至第二參考電壓VB之間,由於實際電壓曲線CU具有內插誤差ER而小於理想電壓曲線ID,因而導致顯示面板之顯示畫面可能出現偏差,亟待進一步改善。 Please refer to FIG. 1 . FIG. 1 is a schematic diagram showing the interpolation error between the traditional actual voltage curve and the ideal voltage curve. As shown in Figure 1, assuming that the interpolation area IPA is located between the first reference voltage VA and the second reference voltage VB, then between the first reference voltage VA and the average voltage (VA+VB)/2, due to the actual voltage The curve CU has an interpolation error ER which is larger than the ideal voltage curve ID; between the average voltage (VA+VB)/2 and the second reference voltage VB, since the actual voltage curve CU has an interpolation error ER which is smaller than the ideal voltage curve ID, As a result, deviations may occur in the display images of the display panel, and further improvement is urgently needed.
因此,本發明提出一種能夠有效消除其輸出電壓曲線之內插誤差的包括通道運算放大器電路之源極驅動器,以解決先前技術所遭遇到的問題。 Therefore, the present invention proposes a source driver including a channel operational amplifier circuit capable of effectively eliminating the interpolation error of its output voltage curve, so as to solve the problems encountered in the prior art.
本發明之一較佳具體實施例為一種源極驅動器。於此實施例中,源極驅動器包括通道運算放大器電路、時序控制器及伽瑪電路。時序控制器耦接通道運算放大器電路,用以提供顯示資料至通道運算放大器電路,其中顯示資料包括奇數幀及偶數幀。伽瑪電路耦接通道運算放大器電路。當顯示資料為奇數幀時,伽瑪電路提供第一參考電壓及第二參考電壓至通道運算放大器電路,以供通道運算放大器電路據以輸出第一電壓曲線;當顯示資料為偶數幀時,伽瑪電路提供第一平均電壓及第二平均電壓通道運算放大器電路,以供該通道運算放大器電路據以輸出第二電壓曲線,其中伽瑪電路係分別將第一參考電壓與第二參考電壓相減/相加後進行平均而得到第一平均電壓及第二平均電壓。 A preferred embodiment of the present invention is a source driver. In this embodiment, the source driver includes a channel operational amplifier circuit, a timing controller and a gamma circuit. The timing controller is coupled to the channel operational amplifier circuit for providing display data to the channel operational amplifier circuit, wherein the display data includes odd frames and even frames. The gamma circuit is coupled to the channel operational amplifier circuit. When the display data is an odd frame, the gamma circuit provides the first reference voltage and the second reference voltage to the channel operational amplifier circuit for the channel operational amplifier circuit to output the first voltage curve; when the display data is an even frame, the gamma circuit The Ma circuit provides a first average voltage and a second average voltage channel operational amplifier circuit for the channel operational amplifier circuit to output a second voltage curve, wherein the Gamma circuit subtracts the first reference voltage from the second reference voltage respectively After adding / and averaging, the first average voltage and the second average voltage are obtained.
於一實施例中,若第一參考電壓為VA且第二參考電壓為VB,則伽瑪電路將第一參考電壓VA與第二參考電壓VB相減後進行平均而得到第一平均電壓為(VA-VB)/2,且第一平均電壓(VA-VB)/2小於第一參考電壓VA。 In one embodiment, if the first reference voltage is VA and the second reference voltage is VB, the gamma circuit subtracts the first reference voltage VA from the second reference voltage VB and averages them to obtain the first average voltage as ( VA-VB)/2, and the first average voltage (VA-VB)/2 is less than the first reference voltage VA.
於一實施例中,若第一參考電壓為VA且第二參考電壓為VB,則伽瑪電路將第一參考電壓VA與第二參考電壓VB相加後進行平均而得到第二平均電壓為(VA+VB)/2,且第二平均電壓(VA+VB)/2大於第一參考電壓VA且小於第二參考電壓VB。 In one embodiment, if the first reference voltage is VA and the second reference voltage is VB, then the gamma circuit adds the first reference voltage VA and the second reference voltage VB and averages them to obtain the second average voltage as ( VA+VB)/2, and the second average voltage (VA+VB)/2 is greater than the first reference voltage VA and less than the second reference voltage VB.
於一實施例中,第一電壓曲線對應於第一內插區域且第一內插區域位於第一參考電壓與第二參考電壓之間,第二電壓曲線係 受位移訊號影響而對應於第二內插區域且第二內插區域位於第一平均電壓與第二平均電壓之間。 In one embodiment, the first voltage curve corresponds to the first interpolation area and the first interpolation area is located between the first reference voltage and the second reference voltage, and the second voltage curve is Affected by the displacement signal, it corresponds to the second interpolation area and the second interpolation area is located between the first average voltage and the second average voltage.
於一實施例中,第一內插區域與第二內插區域彼此重疊於第一參考電壓與第二平均電壓之間。 In one embodiment, the first interpolation area and the second interpolation area overlap each other between the first reference voltage and the second average voltage.
於一實施例中,在第一參考電壓與第二平均電壓之間,當像素顯示奇數幀時之第一電壓曲線與像素顯示偶數幀時之第二電壓曲線係彼此對稱於理想電壓曲線。 In one embodiment, between the first reference voltage and the second average voltage, the first voltage curve when the pixel displays odd frames and the second voltage curve when the pixel displays even frames are symmetrical to the ideal voltage curve.
於一實施例中,第一電壓曲線具有第一內插誤差而大於理想電壓曲線且第二電壓曲線具有第二內插誤差而小於理想電壓曲線,第一內插誤差與第二內插誤差的大小相等。 In one embodiment, the first voltage curve has a first interpolation error larger than the ideal voltage curve and the second voltage curve has a second interpolation error smaller than the ideal voltage curve, the difference between the first interpolation error and the second interpolation error equal in size.
於一實施例中,當第一電壓曲線與第二電壓曲線進行時域上的平均後會得到理想電壓曲線。 In one embodiment, an ideal voltage curve is obtained after the first voltage curve and the second voltage curve are averaged in the time domain.
於一實施例中,當顯示資料為奇數幀時,由小至大的第一編碼、第二編碼及第三編碼分別對應於第一參考電壓、第二平均電壓及第二參考電壓。 In one embodiment, when the display data is an odd number of frames, the first code, the second code and the third code from small to large correspond to the first reference voltage, the second average voltage and the second reference voltage respectively.
於一實施例中,當顯示資料為偶數幀時,由小至大的第一編碼、第二編碼及第三編碼分別對應於第一平均電壓、第一參考電壓及第二平均電壓。 In one embodiment, when the display data is an even frame, the first code, the second code and the third code from small to large correspond to the first average voltage, the first reference voltage and the second average voltage respectively.
相較於先前技術,本發明提出一種包括通道運算放大器電路之源極驅動器,其伽瑪電路在顯示面板之像素顯示奇數幀及偶數幀時分別提供不同的參考電壓給通道運算放大器電路,使得通道運算放大器電路在顯示奇數幀及偶數幀時分別輸出的第一電壓曲線及第二電壓曲線能在內插區域內進行時域上的平均而有效消除第一電壓曲線及第二電壓曲線之內插誤差,以得到理想電壓曲線。 Compared with the prior art, the present invention proposes a source driver including a channel operational amplifier circuit, and its gamma circuit provides different reference voltages to the channel operational amplifier circuit when the pixels of the display panel display odd frames and even frames, so that the channel The first voltage curve and the second voltage curve respectively output by the operational amplifier circuit when displaying odd frames and even frames can be averaged in the time domain in the interpolation area to effectively eliminate the interpolation of the first voltage curve and the second voltage curve error to get the ideal voltage curve.
ID:理想電壓曲線 ID: ideal voltage curve
CU:實際電壓曲線 CU: actual voltage curve
ER:內插誤差 ER: Interpolation Error
IPA:內插區域 IPA: Interpolation Area
2:源極驅動器 2: Source driver
20:伽瑪(Gamma)電路 20: Gamma (Gamma) circuit
21:時序控制器 21: Timing controller
22:通道運算放大器電路 22: Channel operational amplifier circuit
F1:第一幀 F1: first frame
F2:第二幀 F2: second frame
F3:第三幀 F3: third frame
F4:第四幀 F4: the fourth frame
F5:第五幀 F5: fifth frame
F6:第六幀 F6: sixth frame
DATA:顯示資料 DATA: display data
SH:位移訊號 SH: displacement signal
+:加法單元 +: addition unit
VA:第一參考電壓 VA: the first reference voltage
VB:第二參考電壓 VB: Second reference voltage
(VA-VB)/2:第一平均電壓 (VA-VB)/2: first average voltage
(VA+VB)/2:第二平均電壓 (VA+VB)/2: Second average voltage
XX0000:編碼 XX0000: encoding
XX1000:編碼 XX1000: Coding
XX1111:編碼 XX1111: Coding
CU1:第一電壓曲線 CU1: first voltage curve
CU2:第二電壓曲線 CU2: Second voltage curve
IPA1:第一內插區域 IPA1: first interpolation area
IPA2:第二內插區域 IPA2: the second interpolation area
ER1:第一內插誤差 ER1: First interpolation error
ER2:第二內插誤差 ER2: second interpolation error
圖1繪示傳統的實際電壓曲線具有內插誤差而偏離理想電壓曲線的示意圖。 FIG. 1 is a schematic diagram illustrating that a conventional actual voltage curve has an interpolation error and deviates from an ideal voltage curve.
圖2A及圖2B分別繪示本發明之一具體實施例中之包括通道運算放大器電路的源極驅動器操作於顯示資料為奇數幀及偶數幀時的示意圖。 2A and FIG. 2B respectively illustrate schematic diagrams of a source driver including a channel operational amplifier circuit operating when the display data is an odd frame and an even frame in a specific embodiment of the present invention.
圖3繪示本發明透過將顯示奇數幀及偶數幀時的不同實際電壓曲線進行時域上的平均以有效消除內插誤差而趨近於理想電壓曲線的示意圖。 FIG. 3 shows a schematic diagram of the present invention approaching an ideal voltage curve by averaging different actual voltage curves when displaying odd frames and even frames in the time domain to effectively eliminate interpolation errors.
本發明之一較佳具體實施例為一種包括通道運算放大器電路的源極驅動器。於此實施例中,包括通道運算放大器電路的源極驅動器可應用於顯示裝置且通道運算放大器電路可透過資料線耦接至顯示面板,但不以此為限。 A preferred embodiment of the present invention is a source driver including a channel operational amplifier circuit. In this embodiment, the source driver including the channel operational amplifier circuit can be applied to the display device and the channel operational amplifier circuit can be coupled to the display panel through the data line, but not limited thereto.
請參照圖2A及圖2B,圖2A及圖2B分別繪示此實施例中之包括通道運算放大器電路22的源極驅動器2操作於顯示資料為奇數幀及偶數幀時的示意圖。
Please refer to FIG. 2A and FIG. 2B . FIG. 2A and FIG. 2B respectively illustrate schematic diagrams of the operation of the
如圖2A所示,源極驅動器2包括伽瑪電路20、時序控制器21及通道運算放大器電路22。時序控制器21耦接通道運算放大器電路22,用以提供顯示資料DATA至通道運算放大器電路22,其中顯示資料DATA包括奇數幀及偶數幀。伽瑪電路20耦接通道運算放大器電路22。
As shown in FIG. 2A , the
當時序控制器21所提供的顯示資料DATA為奇數幀(例如
第一幀F1、第三幀F3、第五幀F5…)時,伽瑪電路20提供第一參考電壓VA及第二參考電壓VB至通道運算放大器電路22,以供通道運算放大器電路22根據第一參考電壓VA及第二參考電壓VB輸出第一電壓且第一電壓對應於編碼之曲線即為圖3所示之第一電壓曲線CU1。
When the display data DATA provided by the timing controller 21 is an odd frame (such as
During the first frame F1, the third frame F3, the fifth frame F5...), the gamma circuit 20 provides the first reference voltage VA and the second reference voltage VB to the channel
如圖2B所示,當時序控制器21所提供的顯示資料DATA為偶數幀(例如第二幀F2、第四幀F4、第六幀F6…)時,設置於時序控制器21與通道運算放大器電路22之間的加法單元+會將位移訊號SH加入至顯示資料DATA的偶數幀(例如第二幀F2、第四幀F4、第六幀F6…)後提供給通道運算放大器電路22。
As shown in FIG. 2B, when the display data DATA provided by the timing controller 21 is an even frame (such as the second frame F2, the fourth frame F4, the sixth frame F6...), it is set between the timing controller 21 and the channel operational amplifier. The addition unit + between the
此時,伽瑪電路20不會再提供第一參考電壓VA及第二參考電壓VB至通道運算放大器電路22,而是改提供第一平均電壓(VA-VB)/2及第二平均電壓(VA+VB)/2至通道運算放大器電路22,以供通道運算放大器電路22根據第一平均電壓(VA-VB)/2及第二平均電壓(VA+VB)/2輸出第二電壓且第二電壓對應於編碼之曲線即為圖3所示之第二電壓曲線CU2。
At this time, the gamma circuit 20 no longer provides the first reference voltage VA and the second reference voltage VB to the channel
需說明的是,伽瑪電路20係分別將第一參考電壓VA與第二參考電壓VB相減/相加後進行平均而得到第一平均電壓(VA-VB)/2及第二平均電壓(VA+VB)/2,但不以此為限。 It should be noted that, the gamma circuit 20 respectively subtracts/adds the first reference voltage VA and the second reference voltage VB and averages them to obtain the first average voltage (VA−VB)/2 and the second average voltage ( VA+VB)/2, but not limited thereto.
接著,請參照圖3,圖3繪示本發明透過將顯示奇數幀及偶數幀時的不同實際電壓曲線進行時域上的平均以有效消除內插誤差而趨近於理想電壓曲線的示意圖。 Next, please refer to FIG. 3 . FIG. 3 shows a schematic diagram of the present invention approaching an ideal voltage curve by averaging different actual voltage curves when displaying odd frames and even frames in the time domain to effectively eliminate interpolation errors.
如圖3所示,當顯示資料DATA為奇數幀(例如第一幀F1、第三幀F3、第五幀F5…)時,通道運算放大器電路22輸出的第一電壓對
應於編碼之第一電壓曲線CU1對應於第一內插區域IPA1且第一內插區域IPA1位於第一參考電壓VA與第二參考電壓VB之間。
As shown in FIG. 3, when the display data DATA is an odd frame (such as the first frame F1, the third frame F3, the fifth frame F5...), the first voltage output by the channel
由於第一電壓曲線CU1在第一參考電壓VA至第二平均電壓(VA+VB)/2之間係大於理想電壓曲線ID且第一電壓曲線CU1在第二平均電壓(VA+VB)/2至第二參考電壓VB之間係小於理想電壓曲線ID,因此,第一電壓曲線CU1與理想電壓曲線ID會有三個交點:第一個交點對應於第一參考電壓VA與第一編碼XX0000、第二個交點對應於第二平均電壓(VA+VB)/2與第二編碼XX1000且第三個交點對應於與第二參考電壓VB與第三編碼XX1111。 Since the first voltage curve CU1 is greater than the ideal voltage curve ID between the first reference voltage VA and the second average voltage (VA+VB)/2, and the first voltage curve CU1 is between the second average voltage (VA+VB)/2 The distance between the second reference voltage VB and the ideal voltage curve ID is smaller than the ideal voltage curve ID. Therefore, there will be three intersection points between the first voltage curve CU1 and the ideal voltage curve ID: the first intersection point corresponds to the first reference voltage VA and the first code XX0000, and the first intersection point corresponds to the first code XX0000. The two intersections correspond to the second average voltage (VA+VB)/2 and the second code XX1000, and the third intersection corresponds to the second reference voltage VB and the third code XX1111.
當顯示資料DATA為偶數幀(例如第二幀F2、第四幀F4、第六幀F6…)時,由於其加入了位移訊號SH而使通道運算放大器電路22輸出的第二電壓對應於編碼之第二電壓曲線CU2產生位移而對應於與第一內插區域IPA1不同的第二內插區域IPA2。第二內插區域IPA2位於第一平均電壓(VA-VB)/2與第二平均電壓(VA+VB)/2之間。
When the display data DATA is an even-numbered frame (such as the second frame F2, the fourth frame F4, the sixth frame F6...), the second voltage output by the channel
由於第二電壓曲線CU2在第一平均電壓(VA-VB)/2至第一參考電壓VA之間係大於理想電壓曲線ID且第二電壓曲線CU2在第一參考電壓VA至第二平均電壓(VA+VB)/2之間係小於理想電壓曲線ID,因此,第二電壓曲線CU2與理想電壓曲線ID會有三個交點:第一個交點對應於第一平均電壓(VA-VB)/2與第一編碼XX0000、第二個交點對應於第一參考電壓VA與第二編碼XX1000且第三個交點對應於第二平均電壓(VA+VB)/2與第三編碼XX1111。 Since the second voltage curve CU2 is greater than the ideal voltage curve ID between the first average voltage (VA-VB)/2 and the first reference voltage VA and the second voltage curve CU2 is between the first reference voltage VA and the second average voltage ( VA+VB)/2 is smaller than the ideal voltage curve ID, therefore, the second voltage curve CU2 and the ideal voltage curve ID will have three intersections: the first intersection corresponds to the first average voltage (VA-VB)/2 and The first code XX0000, the second intersection point correspond to the first reference voltage VA and the second code XX1000, and the third intersection point corresponds to the second average voltage (VA+VB)/2 and the third code XX1111.
在奇數幀時之第一電壓曲線CU1所對應的第一內插區域IPA1與在偶數幀時之第二電壓曲線CU2所對應的第二內插區域IPA2會彼此重疊於第一參考電壓VA與第二平均電壓(VA+VB)/2之間。在第一 參考電壓VA與第二平均電壓(VA+VB)/2之間,在奇數幀時之第一電壓曲線CU1與在偶數幀時之第二電壓曲線CU2係彼此對稱於理想電壓曲線ID。第一電壓曲線CU1具有第一內插誤差ER1而大於理想電壓曲線ID且第二電壓曲線CU2具有第二內插誤差ER2而小於理想電壓曲線ID,第一內插誤差ER1與第二內插誤差ER2的大小相等。因此,當顯示面板之像素依序顯示奇數幀(例如第一幀F1)與偶數幀(例如第二幀F2)時,可在第一參考電壓VA與第二平均電壓(VA+VB)/2之間對奇數幀(例如第一幀F1)的第一電壓曲線CU1與偶數幀(例如第二幀F2)的第二電壓曲線CU2進行時域上的平均,以將第一電壓曲線CU1的第一內插誤差ER1與第二電壓曲線CU2的第二內插誤差ER2彼此抵消而可得到理想電壓曲線ID。 The first interpolation area IPA1 corresponding to the first voltage curve CU1 at the odd frame and the second interpolation area IPA2 corresponding to the second voltage curve CU2 at the even frame overlap each other between the first reference voltage VA and the first reference voltage VA. Between two average voltages (VA+VB)/2. at first Between the reference voltage VA and the second average voltage (VA+VB)/2, the first voltage curve CU1 at odd frames and the second voltage curve CU2 at even frames are symmetrical to the ideal voltage curve ID. The first voltage curve CU1 has a first interpolation error ER1 which is larger than the ideal voltage curve ID and the second voltage curve CU2 has a second interpolation error ER2 which is smaller than the ideal voltage curve ID. The first interpolation error ER1 and the second interpolation error ER2 is equal in size. Therefore, when the pixels of the display panel sequentially display odd frames (such as the first frame F1) and even frames (such as the second frame F2), the first reference voltage VA and the second average voltage (VA+VB)/2 Between the first voltage curve CU1 of the odd frame (such as the first frame F1) and the second voltage curve CU2 of the even frame (such as the second frame F2) are averaged in the time domain, so that the first voltage curve CU1 of the first voltage curve CU1 An interpolation error ER1 and a second interpolation error ER2 of the second voltage curve CU2 cancel each other to obtain an ideal voltage curve ID.
相較於先前技術,本發明提出一種包括通道運算放大器電路之源極驅動器,其伽瑪電路在顯示面板之像素顯示奇數幀及偶數幀時分別提供不同的參考電壓給通道運算放大器電路,使得通道運算放大器電路在顯示奇數幀及偶數幀時分別輸出的第一電壓曲線及第二電壓曲線能在內插區域內進行時域上的平均而有效消除第一電壓曲線及第二電壓曲線之內插誤差,以得到理想電壓曲線。 Compared with the prior art, the present invention proposes a source driver including a channel operational amplifier circuit, and its gamma circuit provides different reference voltages to the channel operational amplifier circuit when the pixels of the display panel display odd frames and even frames, so that the channel The first voltage curve and the second voltage curve respectively output by the operational amplifier circuit when displaying odd frames and even frames can be averaged in the time domain in the interpolation area to effectively eliminate the interpolation of the first voltage curve and the second voltage curve error to get the ideal voltage curve.
2:源極驅動器 2: Source driver
20:伽瑪(Gamma)電路 20: Gamma (Gamma) circuit
21:時序控制器 21: Timing controller
22:通道運算放大器電路 22: Channel operational amplifier circuit
F2:第二幀 F2: second frame
F4:第四幀 F4: the fourth frame
F6:第六幀 F6: sixth frame
DATA:顯示資料 DATA: display data
SH:位移訊號 SH: displacement signal
+:加法單元 +: addition unit
VA:第一參考電壓 VA: the first reference voltage
VB:第二參考電壓 VB: Second reference voltage
(VA-VB)/2:第一平均電壓 (VA-VB)/2: first average voltage
(VA+VB)/2:第二平均電壓 (VA+VB)/2: Second average voltage
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US6037918A (en) * | 1998-03-30 | 2000-03-14 | Candescent Technologies, Inc. | Error compensator circuits used in color balancing with time multiplexed voltage signals for a flat panel display unit |
US20100220122A1 (en) * | 1999-04-30 | 2010-09-02 | E Ink Corporation | Methods for driving bistable electro-optic displays, and apparatus for use therein |
CN104038206A (en) * | 2013-03-05 | 2014-09-10 | 三星电子株式会社 | Output buffer circuit and source driving circuit including the same |
TW202018692A (en) * | 2018-11-05 | 2020-05-16 | 大陸商昆山龍騰光電股份有限公司 | Driving method of liquid crystal display device |
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US6037918A (en) * | 1998-03-30 | 2000-03-14 | Candescent Technologies, Inc. | Error compensator circuits used in color balancing with time multiplexed voltage signals for a flat panel display unit |
US20100220122A1 (en) * | 1999-04-30 | 2010-09-02 | E Ink Corporation | Methods for driving bistable electro-optic displays, and apparatus for use therein |
CN104038206A (en) * | 2013-03-05 | 2014-09-10 | 三星电子株式会社 | Output buffer circuit and source driving circuit including the same |
TW202018692A (en) * | 2018-11-05 | 2020-05-16 | 大陸商昆山龍騰光電股份有限公司 | Driving method of liquid crystal display device |
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