TWI787116B - Method and computer program product and apparatus for dynamically updating optimization read voltage table - Google Patents

Abstract

The invention is related to a method, a computer program product, and an apparatus for dynamically updating optimization read voltage (RV) table. The method, performed by a microcontroller unit of a flash controller, includes: obtaining a data-read transaction and replying with the data-read transaction to a host side after listing to a request for read-performance data, which is issued by the host side, thereby enabling the data-read transaction to be used to update an optimization RV table for a designated memory-unit type; and programming entries of an updated optimization RV table for the designated memory-unit type into a designated location of a NAND flash module after listening to a request for updating the optimization RV table for the designated memory-unit type, which is issued by the host side. The data-read transaction includes the current environmental parameters of the NAND flash module, the designated memory-unit type, and a bit error rate (BER). Each entry of the updated optimization RV table includes a set of RV parameters, and environmental parameters associated with the set of RV parameters. With the update and the usage of optimization RV table, the number of times the read retry mechanism is triggered would be reduced.

Description

Method for dynamically updating and optimizing reading voltmeter, computer program product and device

The invention relates to a storage device, in particular to a method for dynamically updating and optimizing reading of a voltmeter, a computer program product and a device.

Flash memory is usually divided into NOR flash memory and NAND flash memory. NOR flash memory is a random access device. The central processing unit (Host) can provide any address for accessing NOR flash memory on the address pin, and obtain the data stored on the address from the data pin of NOR flash memory in time. material. In contrast, NAND flash memory is not random access, but sequential access. NAND flash memory cannot access any random address like NOR flash memory. Instead, the CPU needs to write the value of the sequence of bytes (Bytes) into the NAND flash memory to define the type of request command (Command) (such as , read, write, erase, etc.), and the address used on this command. The address can point to a page (the smallest data block for writing operations in flash memory) or a block (the smallest data block for erasing operations in flash memory). Improving the accuracy rate of reading data has always been an important issue affecting the overall performance of the flash memory controller system. therefore. The present invention proposes a method for dynamically updating and optimizing the reading of a voltmeter, a product computer program and a device for improving the reading accuracy of data.

In view of this, how to alleviate or eliminate the deficiencies in the above-mentioned related fields is a problem to be solved.

This specification relates to a method for dynamically updating and optimizing the read voltage meter, which is executed by the microcontroller unit of the flash memory controller, including: when monitoring the read performance information sent by the host After the data request, obtain and reply the data read transaction to the host side, so that the data read transaction can be used to update the optimized read voltage table of the specific memory cell type; and when the host receives the After the request sent by the terminal to update the optimized read voltage table of the specific memory cell type, write multiple records of the updated optimized read voltage table of the specific memory cell type to the NAND flash memory The specified location of the module.

This manual also relates to a computer program product, including program codes. When the microcontroller unit of the flash memory controller executes the program code, the method for dynamically updating the optimized reading voltage table as described above is implemented.

This specification further relates to a device for dynamically updating the optimized reading voltmeter, comprising: a flash memory interface coupled to a NAND flash memory module; and a microcontroller unit coupled to the flash memory interface. The microcontroller unit is used to obtain and reply data read transactions to the host after listening to the request for reading performance data sent by the host, so that the data read transactions can be used to update specific memory unit types The optimized reading voltage table of the device; and after listening to the request sent by the host to update the optimized reading voltage table of the specific memory cell type, driving the flash memory interface to write the Multiple records of the updated optimized read voltmeter for a specific memory cell type are stored in designated locations of the NAND flash memory module.

The data reading transaction includes the current environmental parameters of the NAND flash memory module, the specific memory cell type and bit error rate. Each record includes a set of read voltage parameters and an environment parameter associated with the set of read voltage parameters.

As one of the advantages of the above embodiments, by optimizing the update and usage of the read voltmeter, the number of times to initiate the read retry mechanism can be reduced.

Other advantages of the present invention will be explained in more detail with the following description and drawings.

100: Internet

112: personal computer

114: mobile phone

116: Tablet PC

120:Cloud storage system

130: server

20:Computing equipment

210: processing unit

212:Data Collection and Feedback Module

214: Form update start module

220: NAND flash storage device

230: NAND flash memory module

240: Flash memory controller

242: Data reading monitoring module

244:Return module

246:Form update module

250: random access memory

260: communication interface

310: Flash interface

331: interface

333#0~333#15: NAND flash memory unit

CH#0~CH#3: channel

CE#0~CE#3: enable signal

410: processing unit

412: Data Collection and Feedback Module

414: Form update start module

420#0~420#n: NAND flash storage device (solid state drive)

430:RAID controller

450: random access memory

460: communication interface

S510~S550: method steps

S605~S610: method steps

710: request

720: reply

730: Data reading transaction

750:Read performance data processing module

810: Form transfer module

820,830: request

FIG. 1 is a schematic diagram of a network environment according to an embodiment of the present invention.

FIG. 2 is a block diagram of a computing device according to an embodiment of the invention.

FIG. 3 is a schematic diagram of a NAND flash memory module according to an embodiment of the present invention.

FIG. 4 is a block diagram of a cloud storage system according to an embodiment of the present invention.

FIG. 5 is a flowchart of a data reading method according to some implementations.

FIG. 6 is a flowchart of a data reading method according to an embodiment of the invention.

FIG. 7 is a sequence diagram of collecting and reporting read performance data according to an embodiment of the present invention.

FIG. 8 is a sequence diagram of updating an optimized reading voltage table according to an embodiment of the present invention.

The following description is a preferred implementation mode of the invention, and its purpose is to describe the basic spirit of the invention, but not to limit the invention. For the actual content of the invention, reference must be made to the scope of the claims that follow.

It must be understood that words such as "comprising" and "including" used in this specification are used to indicate the existence of specific technical features, values, method steps, operations, components and/or components, but do not exclude the possibility of adding More technical characteristics, numerical values, method steps, operation processes, components, components, or any combination of the above.

Words such as "first", "second", and "third" used in the claims are used to modify the elements in the claims, and are not used to indicate that there is a priority order, a pre-relationship, or an element An element preceding another element, or a chronological order in performing method steps, is only used to distinguish elements with the same name.

It must be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element, intervening elements may be present. In contrast, when an element is described as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. Other words used to describe the relationship between elements may be interpreted in a similar fashion, eg, "between" versus "directly between," or "adjacent" versus "directly adjacent," and so forth.

The present invention proposes a mechanism for dynamically updating an Optimization Read Voltage (RV) Table, which can be applied to computing devices in a network environment and NAND flash storage devices in cloud storage systems to optimize The read voltmeter is used in the process of reading data from the NAND flash storage device. NAND flash storage devices can It is a NAND flash memory card, a NAND flash memory module, a solid state drive (Solid State Drive, SSD) and the like. With reference to Fig. 1, computing device can be personal computer 112, mobile phone 114, panel computer 116, notebook computer (Laptop PC), digital camera, digital video camera, or other consumer electronic products, wherein is equipped with NAND flash memory card, NAND flash memory Body modules, solid state drives, or any combination of the above, are used to store various user data, such as digital files, high-resolution images, video files, etc. The computing device can upload and store various user data to the cloud storage system 120 through the network 100, and download user data from the cloud storage system 120, so that various application programs can be loaded and processed. The cloud storage system 120 may include one or more redundant arrays of independent disks (Redundant Array of Independent Disks, RAID), and each redundant array of independent disks includes several solid state drives.

Refer to the embodiment of the hardware architecture of the computing device 20 (such as the personal computer 112 , the mobile phone 114 , the tablet computer 116 ) shown in FIG. 2 . A processing unit 210 , a NAND flash storage device 220 , a random access memory (Random Access Memory, RAM) 250 , and a communication interface 260 may be disposed in the computing device 20 , and are connected to each other through a bus structure. The processing unit 210 (also referred to as the host side, Host Side) can be implemented in a variety of ways, such as using general-purpose hardware (for example, a single processor, multi-processors with parallel processing capabilities, graphics processing units, or other computing capabilities) processor) and, when executing software and/or firmware instructions, provide the functionality described hereinafter. The RAM 250 can be implemented as a dynamic random access memory (Dynamic Random Access Memory, DRAM), a static random access memory (Static Random Access Memory, SRAM) or a combination of the above two, used to store data needed during execution , for example, variable, data table, etc. The communication interface 260 can be a Local Area Network (LAN) module, a wireless LAN module, a Bluetooth module, a 2G/3G/4G/5G telecommunications communication module, or any combination of the above modules, It is used to communicate with the server 130 in the flash memory research laboratory through the network 100 . NAND flash storage device 220 (also referred to as device side, Device Side) includes NAND flash memory module 230 and flash memory controller 240, flash memory control The device 240 is used for accessing the data in the NAND flash memory module 230 according to the commands issued by the processing unit 210 . In detail, the flash memory controller 240 may include a Microcontroller Unit (MCU), and when loading and executing appropriate codes, it cooperates with other components in the flash memory controller 240 to complete specific functions. For example, the MCU drives the host interface (Host Interface) to receive host commands and necessary user data from the processing unit 210, and drives the flash memory interface (Flash Interface) to read data from the specified address of the NAND flash memory module 230 according to the host command, Writing data to the specified address of the NAND flash memory module 230, erasing data at the specified address of the NAND flash memory module 230, and so on. The MCU performs background operations to improve the performance of the NAND flash memory module 230 , such as garbage collection (Garbage Collection, GC) procedures, wear-leveling (Wear-Leveling, WL) procedures, and so on.

The host interface of the processing unit 210 and the flash memory controller 240 can be connected by a universal serial bus (Universal Serial Bus, USB), an advanced technology attachment (ATA), a serial advanced technology attachment (SATA), Communication protocols such as peripheral component interconnect express (PCI-E), universal flash storage (UFS), and embedded multi-media card (eMMC) communicate with each other. The flash memory interface of the flash memory controller 240 and the NAND flash memory module 230 can communicate with each other with a double data rate (Double Data Rate, DDR) protocol, for example, open NAND flash (Open NAND Flash Interface, ONFI), double data rate rate switch (DDR Toggle) or other communication protocols. The flash memory interface uses several electronic signals to coordinate data and command transmission between the flash memory controller 240 and the NAND flash memory module 230, including data lines (Data Line), clock signals (Clock Signal) and control signals (Control Signal). Data lines can be used to transmit commands, addresses, read and write data; control signal lines can be used to transmit chip enable (Chip Enable, CE), address extraction enable (Address Latch Enable, ALE), command extraction enable Can (Command Latch Enable, CLE), Write Enable (Write Enable, WE) and other control signals.

The NAND flash memory module 230 provides a large amount of storage space, usually hundreds of gigabytes (Gigabytes, GB), or even several terabytes (Terabytes, TB), for storing a large amount of user data , such as high-resolution images, videos, etc. The NAND flash memory module 230 includes a control circuit and a memory array, and the memory cells in the memory array can be configured as single-level cells (Single Level Cells, SLCs), multi-level cells (Multiple Level Cells, MLCs), three-layer Triple Level Cells (TLCs), Quad-Level Cells (QLCs), or any combination of the above. Referring to FIG. 3 , the interface 331 in the NAND flash memory module 230 can include four input/output channels (I/O channels, hereinafter referred to as channels) CH#0 to CH#3, and each channel is connected to four NAND flash memory units, for example, Channel CH#0 is connected to NAND flash memory units 333#0, 333#4, 333#8 and 333#12. Each NAND flash memory cell can be packaged as an independent die. The flash memory interface 310 of the flash memory controller 240 can send one of the enable signals CE#0 to CE#3 through the interface 331 to enable the NAND flash memory units 333#0 to 333#3, 333#4 to 333#7, 333# 8 to 333#11, or 333#12 to 333#15, and then read user data from the enabled NAND flash memory unit in parallel, or write user data to the enabled NAND flash memory unit.

When each memory cell in a physical block is SLC and can record two states, each physical word line stores user data of a single page, which requires a read voltage (Read Voltage, RV) to determine each Which of the two states is the charge in the SLC. When each memory cell in a physical block is MLC and can record four states, each physical word line stores double pages (including the most significant bit page-Most Significant Bit Page, and the least significant bit page-Least Significant Bit Page), which requires three read voltages to determine which of the four states the charge in each MLC is in. When each memory cell in a physical block is TLC and can record eight states, each physical word line stores three pages (including the most significant bit page, the middle significant bit page-Center Significant Bit Page, and the least significant bit Page ), which requires seven read voltages to determine which of eight states the charge in each TLC is in. When each memory cell in a physical block is QLC and can record sixteen states, each physical word line stores four pages (including the top significant bit page-Top Significant Bit Page, the most significant bit page, the middle significant bit page, and LSB page), which requires fifteen read voltages to determine which of sixteen states the charge in each QLC is in.

For different types of physical pages, the manufacturer of the NAND flash memory module 230 provides recommended read voltages, so that the flash memory controller 240 can read data from the memory cells of the NAND flash memory module 230 accordingly. For example, the manufacturer of the NAND flash memory module 230 may provide the following recommended read voltage {0.8V, 1.4V, 2.4V, 3.2V, 3.9V, 4.8V, 5.7V}, which is used to indicate that the flash memory controller 240 can read from Read data from MSB, MSB, and LSB pages in memory cells configured as triple-level cells.

Refer to the embodiment of the hardware architecture of the cloud storage system 120 shown in FIG. 4 . A processing unit 410, a random access memory 450, a communication interface 460, and a RAID controller 430 can be set in the cloud storage system 120, and the RAID controller 430 is connected to a plurality of solid state drives 420#0 to 420#n (which can be generally referred to as NAND flash memory device). The functions of the processing unit 410, the random access memory 450, the communication interface 460, and the solid state disks 420#0 to 420#n are similar to those of the processing unit 210, the random access memory 250, the communication interface 260, and the solid state disks in FIG. 2, respectively. Disc 220, for the sake of brevity will not be repeated. The RAID controller 430 can organize the solid state disks 420#0 to 420# into RAID groups. In some embodiments, two or more (n>=2) SSDs can be configured as RAID 1, forming data mirroring, but not including parity or striping . Data will be written identically to at least two solid-state drives, resulting in a set of mirrored solid-state drives. Any SSD in the group can service read requests. In other embodiments, two or more (n>=2) SSDs can be configured as RAID 2, forming bit-level stripes, with a specific Hamming-code parity check (Hamming-code parity). Calculate the Hamming code parity according to the corresponding bits in different SSDs, and store it in at least one odd Even-parity SSD. In still other embodiments, three or more (n>=3) solid-state drives can be configured as RAID 5 to form chunk-level stripes with distributed parity. The parity information is distributed among the SSDs, allowing normal operation without an SSD. When a single SSD is damaged, the missing data can be calculated from the scattered parity, so that the data will not be lost. In still other embodiments, four or more (n>=4) SSDs can be configured as RAID 6, forming block-level striping with twice the distributed parity. The parity information is distributed among the SSDs, allowing normal operation without two SSDs. Twice the parity provides error tolerance for up to two SSD failures.

As the programming/erasing cycle of the NAND flash memory module 230 increases, the ambient temperature changes, and the number of times of storage increases, the stability of the data stored in the NAND flash memory module 230 will deteriorate. In the previous implementation, the manufacturer of the NAND flash memory module 230 provides a read retry table (Read Retry Table) in addition to the above suggested read voltage, which records multiple sets of RV parameters. Each set of RV parameters is associated with an extreme case. In the read retry mechanism, the flash memory controller 240 executes a loop repeatedly until the read data is correct, or all RV parameter sets have been tried. The read retry mechanism is like a blind-try program. With reference to the flow chart of the data reading method shown in FIG. 5, this method is executed by the MCU in the flash memory controller 240, and is used to drive the flash memory interface in the flash memory controller 240 according to the host read command sent by the host end, for from One or more designated pages of the NAND flash memory module 230 read data, and the details are as follows:

Step S510: Drive the flash memory interface to read data and cyclic redundancy check from the first or next specified page of the NAND flash memory module 230 with the recommended read voltage provided by the manufacturer of the NAND flash memory module 230 Code (Cyclic Redundancy Check, CRC Code).

Step S520: Determine whether the read page is an Uncorrectable Error Correction Code (UECC) page. If yes, the process continues with the step Processing of S530; otherwise, the flow continues to process of step S550. Specifically, the MCU can be used with the CRC code to determine whether the data on the read page is correct. If it passes the check, it means the page is correct. If the check fails, the MCU starts an error correction program to try to correct the error bits in the read page by using an Error Correcting Code (ECC). If the correction is successful, it means that this page is the correct page. If the bugfixes fail, the page is a UECC page.

Step S530: Start the read retry mechanism. The read retry mechanism executes a loop repeatedly until the read data is correct, or all RV parameter sets have been tried. The loop includes the following operations: adjusting the reading voltage according to a set of RV parameters; reading data with the adjusted reading voltage; and judging whether the read data is correct.

Step S540: Determine whether the read page is still a UECC page. If yes, the process ends and enters the device error state; otherwise, the process proceeds to step S550. Specifically, when all RV parameter sets have been tried and error bits in the read page cannot be corrected, it is determined that the read page is a UECC page.

Step S550: Determine whether the read page is the last specified page. If yes, the process ends and enters the state of the next operation; otherwise, the process proceeds to step S510 for reading the next specified page.

However, because the RV parameter in the read retry table is associated with extreme cases, the success rate of the read retry mechanism is low. In addition, too many iterations of the adjustment and verification loops (Iterations) will instantly reduce the reading speed, resulting in poor reading efficiency.

In order to avoid starting the reading retry mechanism as much as possible, the embodiment of the present invention proposes a plurality of optimized reading voltmeters and methods for using the optimized reading voltmeters. The manufacturer of the NAND flash memory device 220 can store these optimized reading voltage tables in designated locations of the NAND flash memory module 230 before leaving the factory. Each optimized reading voltmeter is associated with a memory unit type, and includes multiple records, each record includes a set of RV parameters (which can be represented by RV offset value or other methods), and the associated RV parameters of this set A set of environment parameters. For example, when the memory cells in the NAND flash memory module 230 can be configured as SLC, In the case of MLC or TLC, the NAND flash memory module 230 can store SLC, MLC and TLC optimized reading voltage tables. Each RV offset value can be represented by an adjustment scale (Adjustment Scale), for example, "0" represents no adjustment, "+1" represents an increase of 0.01V, "+2" represents an increase of 0.02V, and "-1" represents a decrease of 0.01 V, "-2" means decrease by 0.02V, and so on. The environmental parameters may include Data Endurance, Data Retention, Temperature Swing, Read Disturbance, NAND Flash ID, etc. Data durability refers to the degree of usage, which can be represented by the Average of Erase Count (Average of Erase Count), which is the average of the erase counts of all physical blocks. Data retention refers to the length of data storage time, which can be represented by a time scale (Time Scale), for example, "0.25" means less than or equal to one quarter, "0.5" means less than or equal to half a year but greater than one season, "1" means less than or equal to One year but greater than half a year, and so on. Temperature fluctuation indicates the temperature range during operation, which can be represented by a temperature scale (Temperature Scale), for example, "0" represents 0°C~9.99°C, "1" represents 10°C~19.99°C, and so on. The read disturbance refers to the read frequency, which can be represented by the average read count (Average of Read Count), which is the average of the read counts of all physical blocks. The NAND Flash ID carries information about the manufacturer, product type, date of manufacture, and more. Taking the MLC optimized reading voltmeter as an example, the data structure of each record can be expressed as {RV0, RV1, RV2, EP0, EP1, EP2, EP3, EP4}, where "RV0" to "RV2" represent three The voltage offset value, and "EP0" to "EP4" respectively represent environmental parameters such as data durability, data retention, temperature fluctuation, read disturbance, and NAND flash memory identification code. Taking the TLC optimized reading voltmeter as an example, the data structure of each record can be expressed as {RV0, RV1, RV2, RV3, RV4, RV5, RV6, EP0, EP1, EP2, EP3, EP4}, where "RV0 " to " RV6 " represent 7 voltage offset values, and " EP0 " to " EP4 " respectively represent environmental parameters such as data durability, data retention, temperature fluctuation, read disturbance, and NAND flash memory identification code.

In addition to optimizing the read voltmeter, the flash memory controller 240 is also in the NAND flash memory module 230 The designated area in , stores the current environmental parameters, and is used to reflect the current running status of the NAND flash memory module 230 .

With reference to the flow chart of the data reading method shown in Figure 6, this method is carried out by the MCU in the flash memory controller 240, described in detail as follows:

Step S605: Determine a set of read voltages for a specific memory cell type according to the current environmental parameters of the NAND flash memory module 230 and the contents of the optimized read voltage table. Specifically, before actually reading data (that is, before entering the loop of actually reading data), the MCU first obtains the current environmental parameters of the NAND flash memory module 230, and searches for the corresponding best memory cell type. Read the voltmeter to obtain a set of RV offset values adapted to the current environmental parameters. The particular memory cell type may be SLC, MLC, TLC, QLC, etc. The current environmental parameters of the NAND flash memory module 230 may include data durability, data retention, temperature fluctuation, read disturbance, NAND flash memory identification code, and the like. The data durability, data retention, temperature fluctuation and reading disturbance of the NAND flash memory module 230 can be respectively calculated according to the current average erasing times of the NAND flash memory module 230, the storage time length of the data therein, and the current operating temperature. range and the current average read count. MCU can first filter out the record of the NAND flash memory identification code that does not belong to the NAND flash memory module 230 from the optimal reading voltmeter; find out that the remaining record of the optimal reading voltmeter has the closest to the current environmental parameter The matching records of the environmental parameters; and generating the set of read voltages according to the content in the matching records. The MCU can apply any similarity comparison algorithm, decision tree, and empirical rules (Heuristic Rules) known to those skilled in the art to find a set of environmental parameters closest to the current environmental parameters among multiple sets of environmental parameters. The invention is not limited thereby.

Then, the read voltage is determined according to the searched set of RV offset values. The read voltage can be determined using the following formula (1): RV _adj,i =RV _rcm,i +RV _off,i where RV _adj,i represents the i-th final determined read voltage, and RV _rcm,i represents the NAND flash memory The i-th recommended reading voltage provided by the manufacturer of the module 230, RV _{off, i} represents the i-th RV offset value found, i is an integer between 0 and RV _max -1, and RV _max represents the corresponding The total number of RV offset values for the memory cell type (eg, the total number of RV offset values corresponding to TLC is 7). Assume that the recommended reading voltage for reading a TLC block is {0.8V, 1.4V, 2.4V, 3.2V, 3.9V, 4.8V, 5.7V}, and the searched RV offset value is {+1,+1, 0,0,0,0,-2}: The final read voltage is {0.81V, 1.41V, 2.4V, 3.2V, 3.9V, 4.8V, 5.68V}. Optimizing the reading of the voltmeter and its use not only reduces the Bit Error Rate (BER), but also avoids frequent activation of the read retry mechanism.

Step S610: Drive the flash memory interface with a determined read voltage to read data and CRC codes from the first or next designated page of the NAND flash memory module 230 with a recommended read voltage.

For technical details of steps S520 to S550 in FIG. 6 , reference may be made to corresponding paragraphs in FIG. 5 , and details are omitted for simplicity.

However, the RV parameter set of the optimized read voltage table stored in the NAND flash memory module 230 may not be suitable under certain operating conditions, or some operating conditions exceed the original set of RV parameters provided in the optimized read voltage table. The range of environmental parameters. In order to solve the above-mentioned problems, the embodiment of the present invention further proposes a dynamic update method for an optimized reading voltmeter, which is used to modify the RV parameters corresponding to a specific environmental parameter group in the specified optimal reading voltmeter, Or add multiple sets of recently detected environmental parameters and their corresponding RV parameter sets to the designated optimized reading voltmeter.

Refer to the block diagram in Figure 2. After one or more host read commands are executed successfully, the MCU in the flash memory controller 240 generates read performance data ( Read-performance Data), and stored in the RAM in the flash memory controller 240, as a data-read transaction (Data-read Transaction). The reading performance data includes the current environmental parameters of the NAND flash memory module 230, the specific memory cell type, and the bit error rate (Bit Error Rate, BER). BER is used to measure the quality of the data reading transaction. The higher the value, the better the quality. lower.

Refer to the block diagram in FIG. 2 and the sequence diagram in FIG. 7 . In order to complete the collection of read performance data, The MCU in the flash memory controller 240 can load and execute the program code of the reporting module (Reporting Module) 244 in the background to monitor whether the processing unit 210 requests to read performance data. The processing unit 210 can periodically load and execute the program code of the Data Collection-and-feedback Module (Data Collection-and-feedback Module) 212, for sending a request 710 for reading performance data to the feedback module through the internal bus. Group 244. After the report module 244 receives the request 710, it reads all data read transactions from the RAM in the flash memory controller 240, and transmits the reply 720 carrying the data read transaction 730 to the data collection and feedback module through the internal bus. Group 212. After the data collection and feedback module 212 collects the specified number of data read transaction transactions 730, the data read transaction 730 is sent to the read performance data processing module executed by the server 130 in the flash memory research laboratory through the network 100 Group 750. Engineers can use the man-machine interface provided by the reading performance data processing module 750 to select data reading transactions whose BER exceeds the threshold (Threshold), and use artificial intelligence engines, statistical tools, or other algorithms to read data based on the selected data. The content of the transaction to mark the environmental parameters of bad settings. Engineers can design and conduct experiments according to the content of badly set environmental parameters, and modify the corresponding optimal reading voltmeter according to the experimental results. Engineers can modify a record in the corresponding optimized reading voltmeter to change the RV offset value of the specified group associated with the environmental parameters of the specified group. Alternatively, the engineer can add a new record in the corresponding optimized reading voltmeter, including a new set of environmental parameters and their associated set of RV offset values.

Refer to the block diagram of FIG. 2 and the sequence diagram of FIG. 8 . In order to complete the update of the optimized reading voltmeter, the processing unit 210 can load and execute the program code of the table-update triggering module (Table-update Triggering Module) 214 in the background, which is used to monitor the server in the flash memory research laboratory 130 whether to request to update the optimized read voltmeter; the MCU in the flash memory controller 240 can load and execute the program code of the Table-update Module (Table-update Module) 246 in the background to monitor whether the processing unit 210 requests to update Optimized read voltmeter for a specific memory cell type. After the update of the optimized read voltmeter for the specific memory cell type is completed, the processing unit of the server 130 loads and executes the table transfer module The program code of (Table Delivery Module) 810 sends a request 820 for updating the optimized read voltage table of a specific memory cell type through the network 100 to the table update startup module 214, which carries the optimized read table to be updated. Get the identification code of the voltmeter and the record of reading the voltmeter after updating. When the table update activation module 214 receives the request 820, it sends a request 830 to the table update module 246 through the internal bus to update the optimal reading voltage table of the specific memory cell type, which carries the optimal read voltage table to be updated. The identification code of the optimized read voltmeter (including the information of the specific memory cell type), and the updated record of the optimized read voltmeter is sent to the table updating module 246. After the table updating module 246 receives the request 830 for updating the optimized reading voltage table of a specific memory cell type and the record of the updated optimal reading voltage table, it drives the flash memory interface in the flash memory controller 240 to use After writing and updating, the optimized reading voltage table is recorded to a specified position in the NAND flash memory module 230, so that the data reading operation of the specific memory cell type can refer to the updated optimized reading voltage table Adjust RV voltage. For the technical details of the data read operation using the updated optimized read voltmeter for a specific memory cell type, please refer to the related description of FIG. 6 .

Although the above paragraphs take the data collection and feedback module 212 and the table update activation module 214 executed in the computing device 20 of FIG. , but the technical details described therein are also applicable to the data collection and feedback module 412 and the form update activation module 414 executed in the cloud storage system 120 of FIG. 4 . Any one of the solid-state hard drives 420#0 to 420#n of the cloud storage system 120 can be realized by the NAND flash storage device 220 in FIG. The flash memory controllers can all execute the functions of the data reading monitoring module 242 , the reporting module 244 and the table updating module 246 as described above.

All or part of the steps in the method of the present invention can be implemented by computer instructions, such as an application program on the host side, a firmware translation layer (Firmware Translation Layer, FTL) on the device side, a driver program for specific hardware, and the like. In addition, it is also possible Now in other types of programs. Those skilled in the art can write the methods of the embodiments of the present invention into computer instructions, which will not be described again for the sake of brevity. The computer instructions implemented according to the method of the embodiment of the present invention can be stored in a suitable computer-readable medium, such as DVD, CD-ROM, USB disk, hard disk, and can also be placed through a network (for example, the Internet, or other suitable means of access to the web server.

Although the elements described above are included in FIGS. 2 to 4 , it is not excluded to use more other additional elements to achieve better technical effects without violating the spirit of the invention. In addition, although the flowcharts in FIGS. 5 to 6 are executed in a specified order, those skilled in the art can modify the order of these steps without violating the spirit of the invention while achieving the same effect. Therefore, The invention is not limited to using only the sequence described above. In addition, those skilled in the art may also integrate several steps into one step, or perform more steps sequentially or in parallel in addition to these steps, and the present invention is not limited thereby.

Although the present invention is described using the above examples, it should be noted that these descriptions are not intended to limit the present invention. On the contrary, the invention covers modifications and similar arrangements obvious to those skilled in the art. Therefore, the claims of the application must be interpreted in the broadest manner to include all obvious modifications and similar arrangements.

212:Data Collection and Feedback Module

244:Return module

710: Request to read performance data

720: reply

730: Data reading transaction

750:Read performance data processing module

Claims (13)

A method for dynamically updating and optimizing the read voltmeter, which is executed by the microcontroller unit of the flash memory controller, the method includes: after monitoring the request for reading performance data sent by the host end, obtaining and replying to the data read transaction to the host side, so that the data reading transaction can be used to update the optimized reading voltage table of a specific memory cell type, wherein the data reading transaction includes the current environmental parameters of the NAND flash memory module, The specific memory cell type and the bit error rate; and after listening to the request sent by the host to update the optimized reading voltage table of the specific memory cell type, write to the specific memory cell Multiple records of the updated optimized read voltmeter of the type are stored in specified positions of the NAND flash memory module, wherein each record includes a set of read voltage parameters, and the set of read voltage parameters The environment parameter to which the parameter is associated. The method for dynamically updating the optimized reading voltmeter as described in claim 1, comprising: determining said a set of read voltages for specific memory cell types; and reading data from pages of the NAND flash memory module with the set of read voltages. The method for dynamically updating and optimizing the read voltmeter according to claim 1, wherein the specific memory cell type is a single-layer cell, a multi-layer cell, a three-layer cell or a four-layer cell. The method for dynamically updating the optimized read voltmeter as described in claim 1, comprising: filtering out items that do not belong to the NAND flash memory module from the updated optimized read voltmeter. The record of the NAND flash memory identification code of group; Find the matching record with the environmental parameter closest to the current environmental parameter in the leftover record of the optimized reading voltmeter after finding out the update; And according to the Matching the set of read voltage parameters in the record generates the set of read voltages. The method for dynamically updating and optimizing the read voltmeter as described in claim 1, wherein the current environmental parameters include the current average number of erasing times of the NAND flash memory module, the storage time length of the data therein, and the current operating The temperature range during operation and the current average reading times; and the environmental parameters in each record include the average erasing times, the storage time length of data, the operating temperature range and the average reading times. The method for dynamically updating and optimizing the read voltmeter as described in claim 1, wherein the set of read voltage parameters includes a plurality of read voltage offset values, and the set of read voltages is determined using the following formula : RV _adj,i =RV _rcm,i +RV _off,i RV _adj,i represents the i-th read voltage in the set of read voltages, RV _rcm,i represents the manufacturer of the NAND flash memory module The i-th suggested read voltage provided, RV _{off, i} represents the i-th read voltage offset value in the matching record, i is an integer between 0 and RV _max -1, and RV _max represents the specific memory The total number of RV offset values for the unit type. A computer program product, comprising program code, wherein, when the microcontroller unit of the flash memory controller executes the program code, implements the dynamic update optimization reading voltmeter as described in any one of claims 1 to 6 Methods. A device for dynamically updating and optimizing the read voltmeter, comprising: a flash memory interface coupled to a NAND flash memory module; and A microcontroller unit, coupled to the flash memory interface, is used to obtain and reply a data read transaction to the host after monitoring the request for reading performance data sent by the host, so that the data read transaction can is used to update an optimized read voltage table for a specific memory cell type, wherein the data read transaction includes the current environmental parameters of the NAND flash memory module, the specific memory cell type and bit error rate; and when listening After receiving the request from the host to update the optimized read voltage table of the specific memory cell type, drive the flash memory interface to write the updated optimized read voltage table of the specific memory cell type. Taking multiple records of the voltmeter to a designated location of the NAND flash memory module, wherein each record includes a set of read voltage parameters and the environmental parameters associated with the set of read voltage parameters. The device for dynamically updating the optimized read voltage meter as described in claim 8, wherein the microcontroller unit is based on the current environmental parameters of the NAND flash memory module and the updated optimized read voltage The contents of the table determine a set of read voltages for the specific memory cell type; and drive the flash memory interface to read data from a page of the NAND flash memory module with the set of read voltages. The device for dynamically updating and optimizing reading of a voltmeter according to claim 8, wherein the specific memory cell type is a single-layer cell, a multi-layer cell, a three-layer cell or a four-layer cell. The device for dynamically updating the optimized read voltmeter as described in claim 8, wherein the microcontroller unit filters out the elements that do not belong to the NAND flash memory module from the updated optimized read voltmeter. The record of the NAND flash memory identification code of group; Find out the matching record that has the closest described environmental parameter with described current environmental parameter in the remaining record of the optimized reading voltmeter after described update; And according to described Matching the set of read voltage parameters in the record produces The set of read voltages. The device for dynamically updating and optimizing the reading voltmeter as described in claim 8, wherein the current environmental parameters include the current average number of erasing times of the NAND flash memory module, the storage time length of the data therein, and the current operation The temperature range during operation and the current average reading times; and the environmental parameters in each record include the average erasing times, the storage time length of data, the operating temperature range and the average reading times. The device for dynamically updating and optimizing the read voltmeter as described in claim 8, wherein the set of read voltage parameters includes a plurality of read voltage offset values, and the set of read voltages is determined using the following formula : RV _adj,i =RV _rcm,i +RV _off,i RV _adj,i represents the i-th read voltage in the set of read voltages, RV _rcm,i represents the manufacturer of the NAND flash memory module The i-th suggested read voltage provided, RV _{off, i} represents the i-th read voltage offset value in the matching record, i is an integer between 0 and RV _max -1, and RV _max represents the specific memory The total number of RV offset values for the unit type.

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