TWI786853B - Display panel and operation method thereof - Google Patents

Abstract

The present invention discloses a display panel and an operation method thereof. The display panel includes a number of pixel circuits. The pixel circuit is arranged as a first group and a second group. The first contact of the pixel circuits of the first group receive a first source voltage, the second contact of the same receive a second source voltage. The first contact of the pixel circuits of the second group receive the second source voltage, the second contact of the same receive the first source voltage. During a first period of a frame, drain the second source voltage for performing data writing of the pixel circuits of the first group, and the pixel circuits of the second group perform emission by applying the first source voltage as reference voltage. During a second period of the frame, drain the first source voltage for performing data writing of the pixel circuits of the second group, and the pixel circuits of the first group perform emission by applying the second source voltage as reference voltage.

Description

Display panel and its operation method

The invention relates to a display panel and its operating method.

The resolution of display devices is increasing day by day. The improvement of the resolution means the increase of the scanning line (SCAN line). For high-resolution display devices, there are still some practical problems in the progressive scanning driving method. For example, current division affects optical effects, signal voltage conversion loading and other issues. Therefore, it is necessary to improve the high-resolution display device and its driving method.

An embodiment of the invention discloses a display panel including a plurality of pixel circuits. The pixel circuits are configured as a plurality of rows and columns, and the pixel circuits of some rows are configured as a first group, and the pixel circuits of the remaining rows are configured as a second group, each of the pixel circuits There are one or more first contacts and one or more second contacts, for each of the pixel circuits of the first group, the one or more first contacts receive a first power supply voltage, the one or more A plurality of second contacts receive a second power supply voltage, and for each of the pixel circuits of the second group, the one or more first contacts receive the second power supply voltage, and the one or more second contacts receiving the first power supply voltage. The first power supply When one of the voltage and the second power supply voltage is pumped, the voltage value and current value of the other do not change in real value.

Another embodiment of the present invention discloses a method for operating a display panel, including: during a first time period of a frame, using one or more first contacts of a plurality of pixel circuits of a first group of a display panel receiving a first power supply voltage and pumping a second power supply voltage to make the pixel circuits of the first group perform data writing; during the first time period, a plurality of a second group of the display panel One or more second contacts of the pixel circuit receive the first power supply voltage as a reference voltage and use one or more first contacts of the pixel circuits of the second group of the display panel to receive the first power supply voltage. Two power supply voltages are used to make the pixel circuits of the second group emit light; during a second time period of the frame, the one or more first contacts of the pixel circuits of the second group receive The second power supply voltage pumps the first power supply voltage to make the pixel circuits of the second group perform data writing; and during the second time period, with the pixel circuits of the first group One or more second contacts receive the second power supply voltage as a reference voltage and use the one or more first contacts of the pixel circuits of the first group to receive the first power supply voltage to make the first power supply voltage A group of these pixel circuits emit light. When one of the first power supply voltage and the second power supply voltage is pumped, the voltage value and current value of the other one do not change in real value.

In order to have a better understanding of the above-mentioned and other aspects of the present invention, the following specific examples are given in detail with the accompanying drawings as follows:

100, 500: display panel

110, 510: control chip

P11~Pxy, 200, 600, 700, 800, 900, 1000: pixel circuit

HL1~HLx: horizontal signal lines

VL1~VLy: vertical signal line

VLA1~VLAy: the first vertical signal line

VLB1~VLB2: The second vertical signal line

T1~T11: Transistor

LED: light emitting element

C1, C2: capacitance

t1: the first time

t2: second time

FR: frame

FIG. 1 is a block diagram of a display panel according to an embodiment of the invention.

FIG. 2 is a block diagram of a pixel circuit according to an embodiment of the present invention.

FIG. 3 is a schematic diagram illustrating the operation of the display panel according to an embodiment of the present invention.

FIG. 4 is a schematic diagram illustrating voltage changes of the first power supply voltage and the second power supply voltage according to an embodiment of the present invention.

FIG. 5 is a block diagram of a display panel according to another embodiment of the present invention.

FIG. 6 is a block diagram of a pixel circuit according to an embodiment of the present invention.

FIG. 7 is a circuit diagram of a pixel circuit according to an embodiment of the present invention.

FIG. 8 is a circuit diagram of a pixel circuit according to another embodiment of the present invention.

FIG. 9 is a circuit diagram of a pixel circuit according to yet another embodiment of the present invention.

FIG. 10 is a circuit diagram of a pixel circuit according to yet another embodiment of the present invention.

Please refer to FIG. 1 , which is a block diagram of a display panel according to an embodiment of the present invention. Please refer to FIG. 2 , which is a block diagram of a display panel according to an embodiment of the present invention. The display panel 100 includes a plurality of pixel circuits P11 -Pxy, a plurality of horizontal signal lines HL1 -HLx, a plurality of vertical signal lines VL1 -VLy and a control chip 110 . The pixel circuits P11 ˜ Pxy are configured as x rows and y columns, where x and y are positive integers. Each row of pixel circuits is coupled to the control chip 110 through a corresponding horizontal signal line. The pixel circuits of each column are coupled to the control chip 110 through corresponding vertical signal lines. The pixel circuits are also divided into two groups. The first group and the second group of pixel circuits respectively include multiple rows of pixel circuits, wherein the row belonging to the first group of pixel circuits is called the first pixel circuit row, and the row belonging to the second group of pixel circuits is called the second row of pixel circuits. Pixel circuit row. In one embodiment, the first pixel circuit row and the second pixel circuit row are arranged alternately. For example, pixel circuits of odd rows are assigned to the first group, and pixel circuits of even rows are assigned to the second group.

Please refer to FIG. 2 . FIG. 2 shows a schematic block diagram of a first set of pixel circuits and a second set of pixel circuits according to an embodiment of the present invention. FIG. 2 shows two adjacent pixel circuits in the same column of the display panel 100 , that is, two adjacent pixel circuits belonging to the first group and pixel circuits belonging to the second group. Each pixel circuit may include one or more first contacts CT1 and one or more second contacts CT2. For the first pixel circuit PIX-A, the first contact CT1 is used to receive a first power supply voltage VDD1, and the second contact CT2 is used to receive a second power supply voltage VDD2 during a second time period of a frame. . For the second group of pixel circuits PIX-B, the first contact CT1 is used to receive the second power supply voltage VDD2, and the second contact CT2 is used to receive the first power supply voltage VDD1 during a first time period of the frame. Please refer to FIG. 3 at the same time. FIG. 3 is a schematic diagram illustrating the operation of the first set of pixel circuits and the second set of pixel circuits according to an embodiment of the present invention. In Figure 3, the horizontal axis is time, and the vertical axis is the number of pixel circuit rows. For example, for the first group of pixel circuits, it is 1, 3, 5, ... from top to bottom, and for the second group of pixel circuits From top to bottom are 2, 4, 6, .... 310 is a schematic diagram of the operation of the first group of pixel circuits, and 320 is a schematic diagram of the operation of the second group of pixel circuits. During the first time t1 of each frame FR, the pixel circuit performs progressive scanning according to the scanning signal SCAN[n], and the first group of pixel circuits PIX-A does not emit light and is based on the pulse width modulation signal D_PWM[m] and the amplitude modulation signal D_PAM[m] perform the data writing operation, the second group of pixel circuit PIX-B emits light according to the data written in the previous data writing and according to the pulse width modulation signal D_PWM[ m] and the amplitude modulation signal D_PAM[m] perform data writing operation. It should be noted that for the For a group of pixel circuits PIX-A, the period of the first time t1 is the data writing time, and the data writing during this period is to reset and update the old/ Wrong pixel data, thinking that the next step is to prepare for lighting according to the correct pixel data; and for the second set of pixel circuit PIX-B, the period of the first time t1 is the lighting time, and the written data is not correct Data, the pixel data on which light is emitted during this period is the correct pixel data written during the previous data writing period of the second group of pixel circuits (that is, the latest second time t2 before). During the first time t1, when the control chip generates the pulse width modulation signal D_PWM[m] and/or D_PAM[m], it is pumped from the second power supply voltage VDD2 to make the second group of pixel circuits emit light. The voltage value of the first power supply voltage VDD1 of the reference voltage is kept stable, thereby reducing flickering when the second group of pixel circuits emit light.

During the second time t2 of each frame, the pixel circuit performs line-by-line sequential scanning according to the scanning signal SCAN[n], and the second group of pixel circuits PIX-B does not emit light and according to the pulse width modulation signal D_PWM[m] Perform data writing operation with the amplitude modulation signal D_PAM[m], the first group of pixel circuit PIX-A emits light according to the data written in the previous data writing and according to the pulse width modulation signal D_PWM[m] and the amplitude The modulation signal D_PAM[m] performs data writing operation. It should be noted that, for the second group of pixel circuits PIX-B, the second time period T2 is the data writing time, and the data writing during this period is to reset and update the second group of pixel circuits PIX-B. The old/wrong pixel data stored in B is used to prepare for lighting according to the correct pixel data; and for the first group of pixel circuits PIX-A, the period of the second time t2 is the lighting time, The written data is not the correct data. The pixel data based on the light emission during this period is the correct one written during the data writing period of the first group of pixel circuits in the previous time (that is, the first time t1 of the latest previous time). Pixel data. During the second time t2, the control When the control chip generates the pulse width modulation signal D_PWM[m] and/or D_PAM[m], it is extracted from the first power supply voltage VDD1, so as to make the second power supply used as the reference voltage for the first group of pixel circuits to emit light The voltage value of the voltage VDD2 is kept stable, thereby reducing flickering when the first group of pixel circuits emit light.

Please refer to FIG. 4 , which shows a schematic diagram of a first power supply voltage and a second power supply voltage according to an embodiment of the present invention. 410 shows the change of the voltage value of the first power supply voltage VDD1, and 420 shows the change of the voltage value of the second power supply voltage VDD2. It can be seen from Figure 4 that the voltage value of the first power supply voltage VDD1 remains stable during the first time t1, while the voltage value of the second power supply voltage VDD2 is unstable because it is used as a pumping source; during the second time t2 The voltage value of the second power supply voltage VDD2 remains stable, while the voltage value of the first power supply voltage VDD1 is not stable because it is used as a pumping source. This mechanism can prevent the reference voltage used by the pixel circuit from being unstable when the pixel circuit emits light from the voltage that is simultaneously used as a pumping source for data writing, thereby reducing the occurrence of flicker in the pixel circuit.

Back to Figure 2, since the lighting time of the first group of pixel circuits PIX-A and the second group of pixel circuits PIX-B are staggered and do not overlap, the first group of pixel circuits PIX-A and the second group of pixel circuits The pixel circuit PIX-B uses different light-emitting control signals and time control signals, wherein the light-emitting control signal refers to one or more elements used to control the light-emitting time and/or light-emitting brightness of a light-emitting element (not shown) in the pixel circuit. The signal, the time control signal refers to one or more signals used to control the lighting time. As shown in Figure 2, the first group of pixel circuits PIX-A uses the light emission control signal EM-A[n] and the time control signal SWEEP-A[n], while the second group of pixel circuits PIX-B uses are the light emission control signal EM-B[n] and the time control signal SWEEP-B[n].

Please refer to FIG. 5 , which is a block diagram of a display panel according to another embodiment of the present invention. The display panel 500 includes a plurality of pixel circuits P11˜Pxy, a plurality of horizontal signal lines HL1˜HLx, a plurality of first vertical signal lines VLA1˜VLAy, a plurality of second vertical signal lines VLB1˜VLBy and a control chip 510 . The pixel circuits P11 ˜ Pxy are configured as x rows and y columns, where x and y are positive integers. Each row of pixel circuits is coupled to the control chip 110 through a corresponding horizontal signal line. The pixel circuits are also divided into two groups. The first group and the second group of pixel circuits respectively include multiple rows of pixel circuits, the row belonging to the first group of pixel circuits is called the first pixel circuit row, and the row belonging to the second group of pixel circuits is called the second pixel circuit Circuit line. In one embodiment, the first pixel circuit row and the second pixel circuit row are arranged alternately. For example, pixel circuits of odd rows are assigned to the first group, and pixel circuits of even rows are assigned to the second group. Pixel circuits belonging to the first group in each column are coupled to the control chip 510 through corresponding first vertical signal lines. Pixel circuits belonging to the second group in each column are coupled to the control chip 510 through corresponding second vertical signal lines.

Please refer to FIG. 6 , which is a schematic block diagram of a first set of pixel circuits and a second set of pixel circuits according to another embodiment of the present invention. FIG. 6 shows two adjacent pixel circuits in the same column in the display panel 500 , that is, two adjacent pixel circuits belonging to the first group and pixel circuits belonging to the second group. The embodiment in Fig. 6 is similar to the embodiment in Fig. 2, the difference is that the first vertical signal line and the second vertical signal line are respectively used to transmit the pulse widths corresponding to the first group of pixel circuits and the second group of pixel circuits The modulation signals D_PWM-A[m], D_PWM-B[m], and the first group of pixel circuits and the second group of pixel circuits use their respective first scan signal SCAN-A[n] and second scan signal SCAN -B[n]. Therefore, during the first time t1 shown in Figure 3, only the first group of pixel circuits Scanning and writing data (updating pixel data), the second group of pixel circuits emit light and do not write data; during the second time t2 shown in Figure 3, only the second group of pixel circuits line by line Scan and write data (update pixel data), the first group of pixel circuits emit light and do not write data. This method can avoid the power consumption of wrongly writing data.

In an embodiment, the length of the first time t1 is equal to the length of the second time t2.

Please refer to FIG. 7 , which shows a circuit diagram of a pixel circuit according to an embodiment of the present invention. The pixel circuit 700 includes transistors T1-T11, light-emitting elements LED and capacitors C1-C2.

The first end of the light emitting element LED is connected to the reference power supply VSS. The first terminal of the transistor T1 is used for receiving the reset voltage RES. The control terminal of the transistor T1 is used for receiving the reset control signal RES[n]. The control terminal of the transistor T2 is used for receiving the gate control signal G1[n]. The first end of the transistor T3 is coupled to the first end of the transistor T2. The control terminal of the transistor T3 is coupled to the second terminal of the transistor T2. The first end of the transistor T4 is used for receiving the amplitude modulation signal D_PAM[m]. The control terminal of the transistor T4 is used for receiving the gate control signal G2[n]. The first end of the transistor T5 is coupled to the second end of the transistor T1. The control terminal of the transistor T5 is used to receive the gate control signal G2[n]. The first end of the transistor T6 is used to receive one of the first power voltage VDD1 and the second power voltage VDD2 . The second end of the transistor T6 is coupled to the second end of the transistor T4. The control terminal of the transistor T6 is used for receiving the light emission control signal EM1[n]. The first end of the transistor T7 is coupled to the second end of the transistor T4. The control terminal of the transistor T7 is even the second terminal of the transistor T1. The second end of the transistor T7 is coupled to the second end of the transistor T5. The control terminal of the transistor T7 is coupled to the first terminal of the transistor T2. The first end of the transistor T8 is coupled to the second end of the transistor T5 end. The control terminal of the transistor T8 is used for receiving the light emission control signal EM2[n]. The second end of the transistor T8 is coupled to the second end of the light emitting element LED. The first end of the transistor T9 is used to receive the other one of the first power voltage VDD1 and the second power voltage VDD2 . The second end of the transistor T9 is coupled to the second end of the transistor T3. The first end of the transistor T10 is coupled to the second end of the transistor T3. The second terminal of the transistor T10 is used for receiving the pulse width modulation signal D_PWM[m]. The control terminal of the transistor T10 is used for receiving the gate control signal G1[n]. A first terminal of the capacitor C1 is coupled to a first terminal of the transistor T6. The second end of the capacitor C1 is coupled to the first end of the transistor T2. The first terminal of the capacitor C2 is coupled to the control terminal of the transistor T3. The second terminal of the capacitor C2 is used for receiving the time control signal SWEEP[n]. A first terminal of the transistor T11 is coupled to a second terminal of the capacitor C2. The second end of the transistor T11 is used to receive one of the first power voltage VDD1 and the second power voltage VDD2 . The control terminal of the transistor T11 is used for receiving the setting signal VSET[n].

It should be noted that when the pixel circuit 700 belongs to the first group, the first end of the transistor T6 and the second end of the transistor T11 are used to receive the first power supply voltage VDD1, and the first end of the transistor T9 is used to Receive the second power supply voltage VDD2; when the pixel circuit 700 belongs to the second group, the first end of the transistor T6 and the second end of the transistor T11 are used to receive the second power supply voltage VDD2, and the first end of the transistor T9 Used to receive the first power supply voltage VDD1.

Please refer to FIG. 8 , which is a circuit diagram of a pixel circuit according to another embodiment of the present invention. The pixel circuit 800 includes transistors T1-T11, light-emitting elements LED and capacitors C1-C2.

The pixel circuit 800 is similar to the pixel circuit 700, the difference lies in the connection method of the transistor T11. In the pixel circuit 800, the first end of the transistor T11 is coupled to the first end of the capacitor C2. Two terminals, the second terminal of the transistor T11 is used to receive the reset voltage RES, and the control terminal of the transistor T11 is used to receive the set signal VSET[n].

Please refer to FIG. 9 , which is a circuit diagram of a pixel circuit according to another embodiment of the present invention. The pixel circuit 900 includes transistors T1 - T10 , light emitting elements LED and capacitors C1 - C2 .

The pixel circuit 900 is similar to the pixel circuit 700 except that the transistor T11 is removed.

Please refer to FIG. 10 , which is a circuit diagram of a pixel circuit according to another embodiment of the present invention. The pixel circuit 10000 includes transistors T1-T11, light-emitting elements LED and capacitors C1-C2.

The pixel circuit 800 is similar to the pixel circuit 1000, the difference lies in the connection method of the transistor T11. In the pixel circuit 1000, the first end of the transistor T11 is coupled to the first end of the capacitor C2, the second end of the transistor T11 is used to receive the reset voltage RES, and the control end of the transistor T11 is used to receive the gate control Signal VG1[n+1].

It should be noted that the gate drive signals G1[n], G1[n+1], G2[n], light control signals EM1[n], EM2[n], set signal VST[n], reset signal RES [n] and time control signal SWEEP[n] are signals corresponding to the pixel circuit in the nth row, which can be generated by a gate drive circuit array (gate on array, GOA), wherein the GOA circuit can be integrated in the control chip or part It is integrated in the control chip and provided additionally. The pulse width modulation signal D_PWM[m] and the amplitude modulation signal D_PAM[m] are pixel data corresponding to the pixel circuit in the mth column, which can be generated by the control chip. The first power supply voltage VDD1 and the second power supply voltage VDD2 can be regarded as two independent voltage sources, that is, when one of them is subjected to current extraction, the voltage and current of the other will not be affected substantially.

In combination with the above description, the present invention also proposes a method for operating a display panel. The operation method includes: during a first time period of a frame, a plurality of first contacts of a first group of pixel circuits of the display panel receive a first power supply voltage and pump data signals generated from a second power supply voltage To write data, the plurality of second contacts of the second group of pixel circuits of the display panel receive the first power supply voltage as a reference voltage and the plurality of first contacts of the second group of pixel circuits of the display panel receive the second The power supply voltage emits light; and during a second time period of the frame, the first contact of the second group of pixel circuits of the display panel receives the second power supply voltage and performs data processing according to the data signal generated from the first power supply voltage For writing, the second contact of the first group of pixel circuits of the display panel receives the second power supply voltage as a reference voltage and the first contact of the first group of pixel circuits of the display panel receives the first power supply voltage to emit light. Wherein, the first time and the second time form a frame, and the first time and the second time do not overlap. When one of the first power supply voltage and the second power supply voltage is pumped, it does not affect the voltage value and current value of the other one.

The advantage of the present invention is that, while improving the resolution, the update rate is ensured, and by using two independent power supply voltages to drive the pixel circuit, it can avoid that the power supply voltage pumped by some pixel circuits when data is written is another The reference voltage used by some pixel circuits to emit light, so as to avoid the flickering caused by voltage instability caused by the reference voltage being pumped by the current when the pixel circuit is illuminated.

To sum up, although the present invention has been disclosed by the above embodiments, it is not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs, without departing from Various changes and modifications can be made within the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the scope of the appended patent application.

100: display panel

110: control chip

P11~Pxy: pixel circuit

HL1~HLx: horizontal signal lines

VL1~VLy: vertical signal line

Claims (10)

A display panel, comprising: a plurality of pixel circuits configured as a plurality of rows and columns, and the pixel circuits of some rows are configured as a first group, and the pixel circuits of the remaining rows are configured as a second group group, each of the pixel circuits has one or more first contacts and one or more second contacts, for each of the pixel circuits of the first group, the one or more first contacts receive a first A power supply voltage, the one or more second contacts receive a second power supply voltage, for each of the pixel circuits of the second group, the one or more first contacts receive the second power supply voltage, the one or a plurality of second contacts receive the first power supply voltage, wherein when one of the first power supply voltage and the second power supply voltage is pumped, the voltage value and current value of the other one do not change in real value. The display panel as described in claim 1, wherein during a first time period of a frame, the pixel circuits are sequentially scanned row by row, and the two power supply voltages are pumped to the pixel circuits of the first group For data writing, the pixel circuits of the second group emit light using the first power supply voltage as a reference voltage, and scan the pixel circuits row by row during a second time period of the frame, The first power supply voltage is pumped to write data into the pixel circuits of the second group, and the pixel circuits of the first group use the first power supply voltage as a reference voltage to emit light. The display panel according to claim 2, wherein the first time and the second time constitute the frame, and the first time and the second time do not overlap. The display panel as claimed in claim 3, wherein the length of the first time is equal to the length of the second time. The display panel as described in claim 3, wherein during the first time period, the pixel circuits of the second group perform wrong data writing, and during the second time period, the pixel circuits of the first group Mistyped data. The display panel as claimed in claim 1, wherein the pixel circuits of the first group and the pixel circuits of the second group are arranged alternately in row units. A method for operating a display panel, comprising: during a first time period of a frame, using one or more first contacts of a plurality of pixel circuits of a first group of a display panel to receive a first power supply voltage and Pumping a second power supply voltage to make the pixel circuits of the first group perform data writing; during the first time period, one or more of a plurality of pixel circuits of a second group of the display panel A second contact receives the first power supply voltage as a reference voltage and uses one or more first contacts of the pixel circuits of the second group of the display panel to receive the second power supply voltage to make the first power supply voltage The pixel circuits of the second group emit light; during a second time period of the frame, the one or more first contacts of the pixel circuits of the second group receive the second power supply voltage and extract carrying the first power supply voltage to enable the pixel circuits of the second group to write data; and During the second time period, one or more second contacts of the pixel circuits of the first group receive the second power supply voltage as a reference voltage and use the pixel circuits of the first group The one or more first contacts receive the first power supply voltage to make the pixel circuits of the first group emit light, wherein when one of the first power supply voltage and the second power supply voltage is pumped , the voltage value and current value of the other do not change in real value. The operating method according to claim 7, wherein the first time and the second time constitute the frame, and the first time and the second time do not overlap. The operating method as claimed in claim 7, wherein the length of the first time is equal to the length of the second time. The operation method as described in claim item 7, further comprising: during the first time period, performing wrong data writing on the pixel circuits of the second group; and during the second time period, writing The pixel circuits miswrite data.

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