TWI778160B - 用於機器學習的系統和方法 - Google Patents
用於機器學習的系統和方法 Download PDFInfo
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- TWI778160B TWI778160B TW107138106A TW107138106A TWI778160B TW I778160 B TWI778160 B TW I778160B TW 107138106 A TW107138106 A TW 107138106A TW 107138106 A TW107138106 A TW 107138106A TW I778160 B TWI778160 B TW I778160B
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0611—Improving I/O performance in relation to response time
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N20/00—Machine learning
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/62—Details of cache specific to multiprocessor cache arrangements
- G06F2212/621—Coherency control relating to peripheral accessing, e.g. from DMA or I/O device
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Software Systems (AREA)
- Medical Informatics (AREA)
- Data Mining & Analysis (AREA)
- Evolutionary Computation (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Artificial Intelligence (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Advance Control (AREA)
- Storage Device Security (AREA)
- Computer And Data Communications (AREA)
- Numerical Control (AREA)
- Feedback Control In General (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201862625532P | 2018-02-02 | 2018-02-02 | |
| US62/625,532 | 2018-02-02 | ||
| US15/942,218 US11182694B2 (en) | 2018-02-02 | 2018-03-30 | Data path for GPU machine learning training with key value SSD |
| US15/942,218 | 2018-03-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201935224A TW201935224A (zh) | 2019-09-01 |
| TWI778160B true TWI778160B (zh) | 2022-09-21 |
Family
ID=67475620
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107138106A TWI778160B (zh) | 2018-02-02 | 2018-10-29 | 用於機器學習的系統和方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (4) | US11182694B2 (enExample) |
| JP (1) | JP2019133662A (enExample) |
| KR (1) | KR102442682B1 (enExample) |
| CN (2) | CN110135589B (enExample) |
| TW (1) | TWI778160B (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11182694B2 (en) * | 2018-02-02 | 2021-11-23 | Samsung Electronics Co., Ltd. | Data path for GPU machine learning training with key value SSD |
| LU101360B1 (en) * | 2019-08-26 | 2021-03-11 | Microsoft Technology Licensing Llc | Pinned physical memory supporting direct memory access for virtual memory backed containers |
| US11327891B2 (en) * | 2019-09-20 | 2022-05-10 | Samsung Electronics Co., Ltd. | Prefetching operations in storage devices |
| KR102818037B1 (ko) * | 2020-01-20 | 2025-06-10 | 에스케이하이닉스 주식회사 | 응용 프로세서와 데이터를 제공하는 데이터 저장 장치를 포함하는 시스템 |
| US11972361B2 (en) | 2020-01-29 | 2024-04-30 | Samsung Electronics Co., Ltd. | Performance optimization of object grouping schema in a network key-value storage device using adaptive regression |
| US11243694B2 (en) * | 2020-01-29 | 2022-02-08 | Samsung Electronics Co., Ltd. | Grouping key value object IOs to improve IO performance for key-value storage devices |
| US12360906B2 (en) | 2022-04-14 | 2025-07-15 | Samsung Electronics Co., Ltd. | Systems and methods for a cross-layer key-value store with a computational storage device |
| US12019548B2 (en) | 2022-04-18 | 2024-06-25 | Samsung Electronics Co., Ltd. | Systems and methods for a cross-layer key-value store architecture with a computational storage device |
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2018
- 2018-03-30 US US15/942,218 patent/US11182694B2/en active Active
- 2018-10-10 KR KR1020180120769A patent/KR102442682B1/ko active Active
- 2018-10-29 TW TW107138106A patent/TWI778160B/zh active
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2019
- 2019-01-21 CN CN201910054704.XA patent/CN110135589B/zh active Active
- 2019-01-21 CN CN202411905846.XA patent/CN119861870A/zh active Pending
- 2019-01-30 JP JP2019013888A patent/JP2019133662A/ja active Pending
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2021
- 2021-11-22 US US17/533,059 patent/US11907814B2/en active Active
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2024
- 2024-02-09 US US18/437,769 patent/US12299548B2/en active Active
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2025
- 2025-05-13 US US19/207,220 patent/US20250335826A1/en active Pending
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| US20150324118A1 (en) * | 2014-05-07 | 2015-11-12 | HGST Netherlands B.V. | SYSTEM AND METHOD FOR PEER-TO-PEER PCIe STORAGE TRANSFERS |
| US20160379686A1 (en) * | 2015-06-29 | 2016-12-29 | Microsoft Technology Licensing, Llc | Server systems with hardware accelerators including stacked memory |
| WO2017003831A1 (en) * | 2015-06-29 | 2017-01-05 | Microsoft Technology Licensing, Llc | Machine learning classification on hardware accelerators with stacked memory |
| TW201714076A (zh) * | 2015-10-14 | 2017-04-16 | 三星電子股份有限公司 | 具有介面控制機構之電子系統及其操作方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN119861870A (zh) | 2025-04-22 |
| TW201935224A (zh) | 2019-09-01 |
| CN110135589A (zh) | 2019-08-16 |
| US20190244140A1 (en) | 2019-08-08 |
| US11907814B2 (en) | 2024-02-20 |
| CN110135589B (zh) | 2025-01-10 |
| US20240185132A1 (en) | 2024-06-06 |
| KR20190094079A (ko) | 2019-08-12 |
| US11182694B2 (en) | 2021-11-23 |
| KR102442682B1 (ko) | 2022-09-13 |
| US12299548B2 (en) | 2025-05-13 |
| JP2019133662A (ja) | 2019-08-08 |
| US20220164708A1 (en) | 2022-05-26 |
| US20250335826A1 (en) | 2025-10-30 |
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