TWI767061B - Systems and methods for patterning features in tantalum nitride (tan) layer - Google Patents

Systems and methods for patterning features in tantalum nitride (tan) layer Download PDF

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TWI767061B
TWI767061B TW107133770A TW107133770A TWI767061B TW I767061 B TWI767061 B TW I767061B TW 107133770 A TW107133770 A TW 107133770A TW 107133770 A TW107133770 A TW 107133770A TW I767061 B TWI767061 B TW I767061B
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substrate
layer
tan
passivation
processing
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TW201923887A (en
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凡恩 隆
阿希姆 杜塔
朱庭菜
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日商東京威力科創股份有限公司
美商國際商業機器股份有限公司
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Abstract

Embodiments of systems and methods for patterning features in tantalum nitride (TaN) are described. In an embodiment, a method may include receiving a substrate comprising a TaN layer. The method may also include etching the substrate to expose at least a portion of the TaN layer. Additionally, the method may include performing a passivation process to reduce lateral etching of the TaN layer. The method may further include etching the TaN layer to form a feature therein, wherein the passivation process is controlled to meet one or more target passivation objectives.

Description

氮化鉭層中之特徵部的圖案化系統及方法System and method for patterning features in tantalum nitride layers

本發明有關用於基板處理的系統及方法，且更特別地是有關用於在氮化鉭(TaN)中之特徵部的圖案化系統及方法。 The present invention relates to systems and methods for substrate processing, and more particularly to systems and methods for patterning features in tantalum nitride (TaN).

所敘述之實施例有關工業中所使用的TaN之電漿處理，TaN用作半導體記憶體及邏輯裝置的後段製程(BEOL)圖案化用之硬罩幕。該電漿製程包括蝕刻複數個薄膜。於一些裝置中，該等薄膜可包括含矽抗反射塗層(SiARC)薄膜、碳平坦化(OPL)薄膜、四乙氧基矽烷(TEOS)薄膜、及氮化鉭(TaN)薄膜。在一些系統中，使用電容式耦合電漿反應器蝕刻該等薄膜。雖然該電漿反應器的操作參數可取決於該應用及目標處理結果而變動，此一種系統能在第一電極以60MHz RF電力的高頻及在第二電極以13.5MHz RF電力的低頻操作。 The described embodiments relate to the plasma processing of TaN used in the industry as a hard mask for back end of line (BEOL) patterning of semiconductor memory and logic devices. The plasma process includes etching a plurality of thin films. In some devices, the films may include silicon-containing antireflective coating (SiARC) films, carbon planarization (OPL) films, tetraethoxysilane (TEOS) films, and tantalum nitride (TaN) films. In some systems, the thin films are etched using a capacitively coupled plasma reactor. While the operating parameters of the plasma reactor may vary depending on the application and target process results, such a system can operate at a high frequency of 60 MHz RF power at the first electrode and at a low frequency of 13.5 MHz RF power at the second electrode.

用SF6電漿蝕刻TaN之一問題係該側壁的各向同性蝕刻，這能使所建立之特徵部的臨界尺寸降級。於一些極端案例中，所建立之特徵部可能被災難性的底切所破壞，或降級至任何最終裝置不起作用的程度。 One problem with etching TaN with SF6 plasma is the isotropic etching of the sidewalls, which can degrade the critical dimensions of the features created. In some extreme cases, established features may be destroyed by catastrophic undercuts, or degraded to the point that any final device is inoperative.

敘述用於氮化鉭(TaN)中之特徵部的圖案化系統及方法之實 施例。在一實施例中，方法可包括承納一包含TaN層的基板。該方法亦可包括蝕刻該基板，以暴露該TaN層之至少一部份。另外，該方法可包括施行鈍化製程，以減少該TaN層的橫側蝕刻。該方法可另包括蝕刻該TaN層，以在其中形成特徵部，其中控制該鈍化製程，以滿足一或多個目標鈍化結果。 Describe the practice of patterning systems and methods for features in tantalum nitride (TaN) Example. In one embodiment, the method may include receiving a substrate including a TaN layer. The method may also include etching the substrate to expose at least a portion of the TaN layer. Additionally, the method may include performing a passivation process to reduce lateral etching of the TaN layer. The method may further include etching the TaN layer to form features therein, wherein the passivation process is controlled to meet one or more target passivation results.

100:蝕刻和鈍化處理系統 100: Etching and Passivation Processing Systems

110:處理室 110: Processing room

120:基板夾具 120: substrate fixture

122:電極 122: Electrodes

125:晶圓 125: Wafer

126:背側氣體供給系統 126: Backside gas supply system

128:靜電夾持系統 128: Electrostatic clamping system

130:RF產生器 130: RF generator

131:偏壓信號控制器 131: Bias signal controller

132:阻抗匹配網路 132: Impedance matching network

140:氣體分配系統 140: Gas distribution system

145:處理區域 145: Processing area

150:真空泵送系統 150: Vacuum Pumping System

155:來源控制器 155: Source Controller

170:上電極 170: Upper electrode

172:RF產生器 172: RF Generator

174:阻抗匹配網路 174: Impedance matching network

190:電源 190: Power

302:第一TaN層 302: the first TaN layer

304:銅(Cu)層 304: Copper (Cu) layer

306:第二TaN層 306: Second TaN layer

308:含金屬堆疊 308: Metal-containing stack

316:第三TaN層 316: The third TaN layer

318:四乙氧基矽烷(TEOS)層 318: Tetraethoxysilane (TEOS) layer

320:有機平坦化(OPL)層 320: Organic Planarization (OPL) Layer

322:矽抗反射塗覆(SiARC)層 322: Silicon Anti-Reflection Coating (SiARC) layer

324:光阻層 324: photoresist layer

402:圖案化特徵部 402: Patterned features

404:氮化硼(BN)鈍化層 404: boron nitride (BN) passivation layer

406:溴化鉭(TaBr)鈍化層 406: Tantalum Bromide (TaBr) Passivation Layer

502:基板 502: Substrate

併入及構成本說明書之一部份的附圖說明本發明之實施例，且隨同上面給出的發明之一般敘述、及下面給出的詳細描述一起用於敘述本發明。 The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the general description of the invention given above, and the detailed description given below, serve to describe the invention.

圖1說明用於TaN層中之特徵部的圖案化系統之一實施例。 FIG. 1 illustrates one embodiment of a patterning system for features in a TaN layer.

圖2A說明用於TaN層中的特徵部之圖案化方法的一實施例。 2A illustrates one embodiment of a method for patterning features in a TaN layer.

圖2B說明用於TaN層中之特徵部的圖案化方法之另一實施例。 2B illustrates another embodiment of a patterning method for features in a TaN layer.

圖3A係截面圖，說明用於處理圖案化工件的工作流程之一實施例。 3A is a cross-sectional view illustrating one embodiment of a workflow for processing a patterned workpiece.

圖3B係截面圖，說明用於處理圖案化工件的工作流程之一實施例。 3B is a cross-sectional view illustrating one embodiment of a workflow for processing a patterned workpiece.

圖3C係截面圖，說明用於處理圖案化工件的工作流程之一實施例。 3C is a cross-sectional view illustrating one embodiment of a workflow for processing a patterned workpiece.

圖3D係截面圖，說明用於處理圖案化工件的工作流程之一實施例。 3D is a cross-sectional view illustrating one embodiment of a workflow for processing a patterned workpiece.

圖3E係截面圖，說明用於處理圖案化工件的工作流程之一實施例。 3E is a cross-sectional view illustrating one embodiment of a workflow for processing a patterned workpiece.

圖4A係截面圖，說明具有圖案化TaN層的工件之一實施例。 4A is a cross-sectional view illustrating one embodiment of a workpiece having a patterned TaN layer.

圖4B係截面圖，說明具有圖案化TaN層的工件之一實施例。 4B is a cross-sectional view illustrating one embodiment of a workpiece having a patterned TaN layer.

圖4C係截面圖，說明具有圖案化TaN層的工件之一實施例。 4C is a cross-sectional view illustrating one embodiment of a workpiece having a patterned TaN layer.

圖5係尺寸圖，說明在TaN層中所圖案化的特徵部之尺寸。 Figure 5 is a dimension drawing illustrating the dimensions of the features patterned in the TaN layer.

圖6A係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 6A is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖6B係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 6B is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖6C係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 6C is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖6D係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 6D is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖6E係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 6E is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖6F係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 6F is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖7A係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 7A is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖7B係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 7B is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖7C係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 7C is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖8A係截面圖，說明根據用於TaN層中的特徵部之圖案化方法的一實施例而在TaN層中圖案化之特徵部的輪廓。 8A is a cross-sectional view illustrating the outline of features patterned in a TaN layer according to one embodiment of a patterning method for features in a TaN layer.

圖8B係截面圖，說明根據用於TaN層中的特徵部之圖案化方 法的一實施例而在TaN層中圖案化之特徵部的輪廓。 8B is a cross-sectional view illustrating a patterning method according to features used in the TaN layer Contours of features patterned in the TaN layer according to one embodiment of the method.

敘述用於圖案化TaN之方法及系統。在一實施例中，此等方法可使用來控制多層堆疊的TaN層中之特徵部的形成，該堆疊形成記憶體裝置或類似BEOL圖案之一部份。於各種實施例中，蝕刻氣體可使用來在電漿反應器室中圖案化該TaN層，該蝕刻氣體包括六氟化硫(SF6)氣體、氬(Ar)氣、三氯化硼(BCl3)氣體、及溴化氫(HBr)氣體與類似者等。於一實施例中，該電漿室可為電容式耦合的電漿反應器。可調整包括溫度、壓力、及暴露時間之額外處理參數，以控制該TaN層中的圖案形成。 Methods and systems for patterning TaN are described. In one embodiment, these methods can be used to control the formation of features in TaN layers of a multilayer stack that forms part of a memory device or similar BEOL pattern. In various embodiments, an etching gas may be used to pattern the TaN layer in the plasma reactor chamber, the etching gas including sulfur hexafluoride ( SF6 ) gas, argon (Ar) gas, boron trichloride (BCl) 3 ) Gas, hydrogen bromide (HBr) gas and the like. In one embodiment, the plasma chamber may be a capacitively coupled plasma reactor. Additional processing parameters including temperature, pressure, and exposure time can be adjusted to control patterning in the TaN layer.

熟習該相關技術領域之人員將認識到，可在沒有一或多個特定細節、或有其他替換及/或另外的方法、材料、或零組件之情況下實踐各種實施例。於其他情況下，未詳細示出或敘述熟知的結構、材料或操作，以避免模糊本發明之各種實施例的態樣。 One skilled in the relevant art will recognize that the various embodiments may be practiced without one or more of the specific details, or with other alternative and/or additional methods, materials, or components. In other instances, well-known structures, materials, or operations have not been shown or described in detail to avoid obscuring aspects of the various embodiments of the invention.

類似地，用於解釋之目的，提出特定之數目、材料、及組構，以便提供對本發明的透徹理解。然而，可在沒有特定細節之情況下實踐本發明。再者，應理解，於該等圖面中所顯示的各種實施例係說明性表示，且不一定須按比例繪製。在參考該等圖面時，類似數字意指通篇之類似零件。 Similarly, for purposes of explanation, specific numbers, materials, and configurations are set forth in order to provide a thorough understanding of the present invention. However, the present invention may be practiced without the specific details. Furthermore, it is to be understood that the various embodiments shown in the figures are illustrative representations and have not necessarily been drawn to scale. When referring to the figures, like numerals refer to like parts throughout.

通篇說明書中對“一個實施例”或“實施例”或其變異型的參考意味著與該實施例所敘述之相關的特別特色、結構、材料、或特徵係包括在本發明的至少一實施例中，但並不指示它們存在於每個實施例中。如此，通篇說明書中在各處出現之諸如“於一個實施例中”或“在實施例中”的片語不須意指本發明的相同實施例。再者，該特別之特色、結構、材料、或特徵能以任何合適的方式結合於一或多個實施例中。在其他實施例中可包括各種額 外之層及/或結構、及/或可省略所敘述的特色。 Reference throughout the specification to "one embodiment" or "an embodiment" or variations thereof means that the particular feature, structure, material, or characteristic recited in connection with the embodiment is included in at least one implementation of the present invention examples, but are not meant to be present in every example. As such, the appearance of phrases such as "in one embodiment" or "in an embodiment" in various places throughout the specification are not necessarily referring to the same embodiment of the invention. Furthermore, the particular features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments. Various amounts may be included in other embodiments Outer layers and/or structures, and/or features described may be omitted.

此外，應理解，除非另有明確地陳述，否則“一個(a)”或“一個(an)”可意指“一個或多個”。 In addition, it is to be understood that "a (a)" or "an (an)" can mean "one or more" unless expressly stated otherwise.

將以最有助於理解本發明之方式把各種操作依序敘述為複數複數個個別操作。然而，敘述的順序不應被解釋為暗示這些操作係必須依照順序。特別地是，這些操作不需要按照呈現之順序施行。所敘述的操作可能以與所敘述實施例不同之順序施行。在額外的實施例中，可施行各種額外之操作及/或可省略所敘述的操作。 Various operations will be described as a plurality of individual operations in order in a manner that is most helpful in understanding the present invention. However, the order of recitation should not be construed to imply that the operating systems must be in order. In particular, these operations need not be performed in the order presented. The operations described may be performed in a different order than the described embodiments. In additional embodiments, various additional operations may be performed and/or the operations described may be omitted.

如在此中所使用，該“基板”一詞意指及包括在其上形成材料的基礎材料或構造。應當理解，該基板可包括單一材料、複數層不同材料、於其中具有不同材料或不同結構之區域的一層或多層等。這些材料可包括半導體、絕緣體、導體或其組合。例如，該基板可為半導體基板、在支撐結構上之基礎半導體層、在其上形成有一或多層、結構或區域的金屬電極或半導體基板。該基板可為傳統矽基板或包含半導體材料層之其他大塊基板。如在此中所使用，該“大塊基板”一詞不僅意指及包括矽晶圓，亦包括絕緣體上矽(“SOI”)基板、諸如藍寶石上矽(“SOS”)基板和玻璃上矽(“SOG”)基板，於基礎半導體基底上的矽外延層，及其他半導體或光電材料、諸如矽-鍺、鍺、砷化鎵、氮化鎵、和磷化銦。該基板可為已摻雜或未摻雜的。 As used herein, the term "substrate" means and includes the base material or construction on which the material is formed. It should be understood that the substrate may comprise a single material, multiple layers of different materials, one or more layers having regions of different materials or different structures therein, and the like. These materials may include semiconductors, insulators, conductors, or combinations thereof. For example, the substrate can be a semiconductor substrate, a base semiconductor layer on a support structure, a metal electrode on which one or more layers, structures or regions are formed, or a semiconductor substrate. The substrate may be a conventional silicon substrate or other bulk substrate containing layers of semiconductor material. As used herein, the term "bulk substrate" means and includes not only silicon wafers, but also silicon-on-insulator ("SOI") substrates, such as silicon-on-sapphire ("SOS") substrates and silicon-on-glass ("SOG") substrates, epitaxial layers of silicon on base semiconductor substrates, and other semiconductor or optoelectronic materials such as silicon-germanium, germanium, gallium arsenide, gallium nitride, and indium phosphide. The substrate may be doped or undoped.

圖1係用於圖案化TaN之系統100的實施例。在另一實施例中，該系統可建構成施行TaN材料之圖案化，如參考圖2A-8B所敘述。建構來施行該上述製程條件的蝕刻和鈍化處理系統100係於圖1中描述，包含處理室110、基板夾具120、固定在基板夾具120上之待處理之晶圓125、及真空泵送系統150。該晶圓125可為半導體基板、晶圓、平板顯示器、或液晶顯示器。處理室110可建構成便於在該晶圓125之表面附近蝕刻該處理區域145。經由 氣體分配系統140導入製程氣體的可電離氣體或混合物。對於給定的製程氣體流動，使用該真空泵送系統150調整該製程壓力。 FIG. 1 is an embodiment of a system 100 for patterning TaN. In another embodiment, the system can be configured to perform patterning of TaN material, as described with reference to Figures 2A-8B. An etching and passivation processing system 100 constructed to perform the above-described process conditions is depicted in FIG. The wafer 125 can be a semiconductor substrate, a wafer, a flat panel display, or a liquid crystal display. The processing chamber 110 may be constructed to facilitate etching the processing region 145 near the surface of the wafer 125 . via The gas distribution system 140 introduces an ionizable gas or mixture of process gases. For a given process gas flow, the process pressure is adjusted using the vacuum pumping system 150 .

該晶圓125能經由夾持系統(未示出)、諸如機械夾持系統或電夾持系統(例如靜電夾持系統)固定至該基板夾具120。再者，基板夾具120能包括加熱系統(未示出)或冷卻系統(未示出)，其係建構成調整及/或控制基板夾具120及該晶圓125之溫度。該加熱系統或冷卻系統可包含熱傳流體的再循環流動，其由基板夾具120接收熱量並當冷卻時將熱量傳送至熱交換器系統(未示出)，或當加熱時將熱量從該熱交換器系統傳送至基板夾具120。於其他實施例中，加熱/冷卻元件、例如電阻加熱元件、或熱電加熱器/冷卻器可包括在該基板夾具120、以及該處理室110之室壁和該處理系統100內的任何其他零組件中。 The wafer 125 can be secured to the substrate holder 120 via a clamping system (not shown), such as a mechanical clamping system or an electrical clamping system (eg, an electrostatic clamping system). Furthermore, the substrate holder 120 can include a heating system (not shown) or a cooling system (not shown) configured to adjust and/or control the temperature of the substrate holder 120 and the wafer 125 . The heating or cooling system may comprise a recirculating flow of heat transfer fluid that receives heat from the substrate holder 120 and transfers heat to a heat exchanger system (not shown) when cooling, or transfers heat from the heat when heating The exchanger system is transferred to the substrate holder 120 . In other embodiments, heating/cooling elements, such as resistive heating elements, or thermoelectric heaters/coolers, may be included in the substrate holder 120 , as well as the chamber walls of the processing chamber 110 and any other components within the processing system 100 middle.

另外，熱傳氣體能經由背側氣體供給系統126輸送至晶圓125之背側，以便改善晶圓125及基板夾具120間之氣隙熱導率。當在升高或減少的溫度下需要該晶圓125的溫度控制時，能利用此一系統。例如，該背側氣體供給系統可包含雙區氣體分配系統，其中該氦氣隙壓力可在晶圓125的中心和邊緣之間獨立地變動。 In addition, the heat transfer gas can be delivered to the backside of the wafer 125 via the backside gas supply system 126 in order to improve the thermal conductivity of the air gap between the wafer 125 and the substrate holder 120 . Such a system can be utilized when temperature control of the wafer 125 is required at elevated or reduced temperatures. For example, the backside gas supply system may comprise a dual zone gas distribution system in which the helium gap pressure may be independently varied between the center and edge of the wafer 125 .

於圖1所示實施例中，基板夾具120可包含電極122，RF電力係經過該電極耦接至該處理區域145。譬如，可經由從RF產生器130通過可選的阻抗匹配網路132傳輸RF電力至基板夾具120，基板夾具120可在RF電壓下電偏壓。該RF電偏壓可用於加熱電子，以形成和維持電漿。在此組構中，該系統100可操作為RIE反應器，其中該腔室和上部氣體注入電極用作接地表面。 In the embodiment shown in FIG. 1 , the substrate holder 120 may include an electrode 122 through which RF power is coupled to the processing region 145 . For example, RF power may be transmitted from RF generator 130 through optional impedance matching network 132 to substrate fixture 120, which may be electrically biased at the RF voltage. This RF electrical bias can be used to heat the electrons to form and maintain the plasma. In this configuration, the system 100 is operable as a RIE reactor, with the chamber and upper gas injection electrodes serving as ground surfaces.

再者，電極122於RF電壓之電偏壓可為脈動式，並使用脈動式偏壓信號控制器131。例如，從該RF產生器130輸出的RF電力可在斷開狀 態和接通狀態之間脈動。交替地，RF電力係在複數個頻率下被施加至該基板夾具電極。再者，阻抗匹配網路132能藉由減少該反射功率來改善RF電力至處理室110中的電漿之傳送。匹配網路拓撲結構(例如L型、π型、T型等)及自動控制方法係那些熟諳此技術領域者所熟知的。 Furthermore, the electrical bias of the electrode 122 to the RF voltage can be pulsating, and the pulsating bias signal controller 131 is used. For example, the RF power output from the RF generator 130 may be disconnected pulsing between state and ON state. Alternately, RF power is applied to the substrate holder electrodes at a plurality of frequencies. Furthermore, the impedance matching network 132 can improve the transfer of RF power to the plasma in the processing chamber 110 by reducing the reflected power. Matching network topologies (eg L-type, π-type, T-type, etc.) and automatic control methods are well known to those skilled in the art.

氣體分配系統140可包含用於導入製程氣體之混合物的噴淋頭設計。另一選擇係，氣體分配系統140可包含多區噴淋頭設計，用於導入製程氣體之混合物、及調整晶圓125上方的製程氣體之混合物的分配。譬如，該多區噴淋頭設計可建構成相對於至晶圓125上方之大體中心區域的製程氣體流動或成份而調整至晶圓125上方的大體周邊區域之製程氣體流動或成份的數量。在此一實施例中，能以合適之組合配送氣體，以於該處理室110內形成高度均勻的電漿。 The gas distribution system 140 may include a showerhead design for introducing a mixture of process gases. Alternatively, the gas distribution system 140 may include a multi-zone showerhead design for introducing a mixture of process gases and adjusting the distribution of the mixture of process gases over the wafer 125 . For example, the multi-zone showerhead design can be constructed such that the amount of process gas flow or composition to the generally peripheral area above wafer 125 is adjusted relative to the process gas flow or composition to the generally central area above wafer 125 . In such an embodiment, gases can be delivered in suitable combinations to form a highly uniform plasma within the processing chamber 110 .

真空泵送系統150可包括渦輪分子真空泵(TMP)及用於節流該腔室壓力之閘閥，該渦輪分子真空泵能夠達到每秒約8000公升(或更高)的泵送速率。在利用於乾式電漿蝕刻之傳統電漿處理裝置中，可採用每秒800至3000公升的TMP。TMP係可用於低壓處理、典型少於約50毫托。用於高壓處理(亦即，大於約80毫托)，可使用機械增壓泵和乾式低真空泵。再者，用於監視腔室壓力之裝置(未示出)可耦接至該處理室110。 The vacuum pumping system 150 may include a turbomolecular vacuum pump (TMP) capable of pumping rates of about 8000 liters per second (or higher) and a gate valve for throttling the chamber pressure. In conventional plasma processing apparatuses utilized for dry plasma etching, TMPs of 800 to 3000 liters per second can be used. TMP systems can be used for low pressure processing, typically less than about 50 mTorr. For high pressure processing (ie, greater than about 80 mTorr), mechanical booster pumps and dry roughing pumps can be used. Furthermore, means for monitoring chamber pressure (not shown) may be coupled to the processing chamber 110 .

在一實施例中，該來源控制器155可包含微處理器、記憶體、及數位輸入/輸出埠，而能夠產生控制電壓，該控制電壓足以傳送和激活至處理系統100的輸入、以及監視來自電漿處理系統100的輸出。再者，來源控制器155能耦接至並可與RF產生器130、脈動式偏壓信號控制器131、阻抗匹配網路132、該氣體分配系統140、該電源190、真空泵送系統150、以及該基板加熱/冷卻系統(未示出)、該背側氣體供給系統126、及/或該靜電夾持系統128交換資訊。例如，儲存在該記憶體中之程式可利用於根據製程配方 啟動至處理系統100的前述零組件之輸入，以便在晶圓125上施行電漿輔助製程、諸如電漿蝕刻製程或後加熱處理製程。 In one embodiment, the source controller 155 may include a microprocessor, memory, and digital input/output ports capable of generating control voltages sufficient to transmit and activate inputs to the processing system 100, and monitor inputs from the processing system 100. The output of the plasma processing system 100 . Furthermore, the source controller 155 can be coupled to and communicate with the RF generator 130, the pulsed bias signal controller 131, the impedance matching network 132, the gas distribution system 140, the power supply 190, the vacuum pumping system 150, and The substrate heating/cooling system (not shown), the backside gas supply system 126, and/or the electrostatic clamping system 128 exchange information. For example, programs stored in the memory can be used according to process recipes Inputs to the aforementioned components of processing system 100 are enabled to perform plasma-assisted processes, such as plasma etch processes or post-heat treatment processes, on wafer 125 .

此外，該處理系統100可另包含上電極170，RF電力可經過選擇性阻抗匹配網路174由RF產生器172耦接至該上電極170。在一實施例中，用於施加RF電力至該上電極的頻率範圍可由約0.1MHz至約200MHz。另一選擇係，本實施例可與電感耦合電漿(ICP)來源、電容耦合電漿(CCP)來源、建構成在GHz頻率範圍中操作之徑向線縫隙天線(RLSA)來源、建構成在sub-GHz至GHz範圍中操作的電子迴旋共振(ECR)來源、以及其他者一起使用。另外，向該下電極施加電力之頻率的範圍可由約0.1MHz至約80MHz。再者，來源控制器155係耦接至RF產生器172及阻抗匹配網路174，以便控制RF電力之施加至上電極170。上電極的設計和實現係那些熟諳此技術領域者所熟知。如所顯示，該上電極170及該氣體分配系統140可設計在該同一腔室組件內。另一選擇係，上電極170可包含多區電極設計，用於調整耦接至晶圓125上方之電漿的RF功率分佈。例如，該上電極170可分段成中心電極和邊緣電極。 In addition, the processing system 100 may further include an upper electrode 170 , and RF power may be coupled to the upper electrode 170 from the RF generator 172 via the selective impedance matching network 174 . In one embodiment, the frequency range for applying RF power to the upper electrode may range from about 0.1 MHz to about 200 MHz. Alternatively, the present embodiment can be combined with an inductively coupled plasma (ICP) source, a capacitively coupled plasma (CCP) source, a Radial Line Slot Antenna (RLSA) source operating in the GHz frequency range, a Electron cyclotron resonance (ECR) sources operating in the sub-GHz to GHz range, as well as others are used. Additionally, the frequency at which power is applied to the lower electrode may range from about 0.1 MHz to about 80 MHz. Furthermore, the source controller 155 is coupled to the RF generator 172 and the impedance matching network 174 to control the application of RF power to the upper electrode 170 . The design and implementation of the upper electrode is well known to those skilled in the art. As shown, the upper electrode 170 and the gas distribution system 140 can be designed within the same chamber assembly. Alternatively, the upper electrode 170 may comprise a multi-region electrode design for adjusting the RF power distribution coupled to the plasma above the wafer 125 . For example, the upper electrode 170 may be segmented into a center electrode and an edge electrode.

該處理系統100可另包含與基板125相對的上電極170耦接之直流(DC)電源190。該上電極170可包含電極板。該電極板可包括一含矽電極板。再者，該電極板可包含摻雜的矽電極板。該DC電源190能包括可變DC電源。另外，該DC電源190可包括雙極DC電源。該DC電源190可另包括一系統，其建構成施行監視、調整、或控制該DC電源190之極性、電流、電壓、或開(on)/關(off)狀態的至少一個。一旦形成電漿，該DC電源190有助於形成彈道電子束。可利用電濾波器(未示出)來由該DC電源190解耦RF電力。 The processing system 100 may further include a direct current (DC) power source 190 coupled to the upper electrode 170 opposite the substrate 125 . The upper electrode 170 may include an electrode plate. The electrode plate may include a silicon-containing electrode plate. Furthermore, the electrode plate may comprise a doped silicon electrode plate. The DC power supply 190 can include a variable DC power supply. Additionally, the DC power supply 190 may comprise a bipolar DC power supply. The DC power supply 190 may further include a system configured to perform monitoring, adjustment, or control of at least one of the polarity, current, voltage, or on/off state of the DC power supply 190 . Once the plasma is formed, the DC power source 190 assists in forming the ballistic electron beam. An electrical filter (not shown) may be used to decouple RF power from the DC power supply 190 .

例如，藉由DC電源190施加至上電極170之DC電壓範圍可由大約-2000伏特(V)至大約1000V。理想地，該DC電壓的絕對值具有等於或大 於大約100V之值，且更理想地，該DC電壓的絕對值具有等於或大於大約1300V之值。另外，其想要的是該DC電壓具有負極性。再者，其想要的是該DC電壓係具有一絕對值之負電壓，該絕對值大於該上電極170的表面上所產生之自偏電壓。該上電極170的面向該基板夾具120之表面可包含含矽材料。 For example, the DC voltage applied to the upper electrode 170 by the DC power supply 190 may range from about -2000 volts (V) to about 1000V. Ideally, the absolute value of this DC voltage has a value equal to or greater than At a value of about 100V, and more ideally, the DC voltage has a value equal to or greater than about 1300V in absolute value. In addition, it is desired that the DC voltage has a negative polarity. Furthermore, it is desired that the DC voltage be a negative voltage with an absolute value greater than the self-bias voltage generated on the surface of the upper electrode 170 . The surface of the upper electrode 170 facing the substrate holder 120 may include a silicon-containing material.

取決於該等應用，諸如感測器或計量裝置的額外裝置能耦接至該處理室110及至該來源控制器155，以收集實時資料及使用此實時資料來在二或多個步驟中同時控制二或更多個所選擇之整合操作變數，該等步驟涉及該整合方案的蝕刻製程、鈍化製程、沉積製程、RIE製程、拉動製程、輪廓重整製程、熱處理製程、包括氮化鉭層的氮化物層之圖案化、及/或圖案轉移製程。再者，能使用該相同之資料來確保達成整合目標，包括完成後熱處理、圖案化均勻性(均勻性)、結構的拉除(拉除)、結構之細窄化(細窄化)、結構的縱橫比(縱橫比)、線寬粗糙度、基板生產量、擁有成本與類似者等。 Depending on the application, additional devices, such as sensors or metering devices, can be coupled to the processing chamber 110 and to the source controller 155 to collect real-time data and use this real-time data for simultaneous control in two or more steps Two or more selected integration operating variables, the steps involved in the etch process, passivation process, deposition process, RIE process, pull process, reprofile process, thermal process, nitride including tantalum nitride layer of the integration scheme Patterning of layers, and/or pattern transfer processes. Furthermore, the same data can be used to ensure that integration goals are achieved, including post-finish heat treatment, pattern uniformity (uniformity), pull-off of structures (pull-off), thinning of structures (narrowing), structures aspect ratio (aspect ratio), line width roughness, substrate throughput, cost of ownership and the like.

藉由調節該施加之電力，典型經過變動該脈衝頻率和負荷比，其係可能獲得與連續波(CW)中所產生的電漿性質明顯不同之電漿性質。因此，該等電極的RF電力調節可提供對時間平均離子通量和離子能量之控制。 By adjusting the applied power, typically by varying the pulse frequency and duty ratio, it is possible to obtain plasma properties significantly different from those produced in continuous wave (CW). Thus, RF power modulation of the electrodes provides control over time-averaged ion flux and ion energy.

圖2A說明用於TaN層中的特徵部之圖案化方法200的實施例。在一實施例中，該方法200包括承納一包含TaN層之基板，如在方塊202所顯示。另外，該方法200可包括蝕刻該基板，以暴露該TaN層的至少一部份，如在方塊204所顯示。在方塊206，該方法200可包括施行鈍化處理，以減少該TaN層之橫側蝕刻。另外，該方法200的實施例可包括蝕刻該TaN層，以在其中形成特徵部，在此控制該鈍化製程，以滿足一或多個目標鈍化結果，如在方塊208所顯示。 FIG. 2A illustrates an embodiment of a method 200 for patterning features in a TaN layer. In one embodiment, the method 200 includes receiving a substrate including a TaN layer, as shown at block 202 . Additionally, the method 200 can include etching the substrate to expose at least a portion of the TaN layer, as shown at block 204 . At block 206, the method 200 may include performing a passivation process to reduce lateral etching of the TaN layer. Additionally, embodiments of the method 200 may include etching the TaN layer to form features therein, where the passivation process is controlled to meet one or more target passivation results, as shown at block 208 .

圖2B說明用於TaN層中的特徵部之圖案化方法220的另一實施例。在一實施例中，於方塊222，製程室中之基板係設有輸入圖案化特徵 部，其包含光阻結構、圖案化層、含氮化鉭層、和下伏層。使用罩幕在該圖案化層上施行一系列材料打開製程，該等打開製程在方塊224建立中間圖案化特徵部。在該中間圖案化特徵部上施行鈍化製程和蝕刻製程，該鈍化製程在方塊226使用含硼及/或含氫氣體混合物。調整一或多個操作變數並反覆執行該鈍化和蝕刻製程，直到在步驟228達成一或多個製程目標。該圖案化層可包括含矽的抗反射塗層、碳平坦化薄膜、和四乙氧基矽烷薄膜。該一或多個操作變數可包括該含硼氣體之流動速率、該含氫氣體的流動速率、該含硼氣體對該含氫氣體之流動速率比、包括氬、SF6的其他氣體之流動速率、高頻電力、低頻電力、該製程室中的壓力、靜電卡盤溫度、及該材料打開製程中之其他操作變數。該一個或多個製程目的可包括該TaN之目標蝕刻速率、包含目標基底寬度、目標髖寬度(target hip width)、目標帽蓋寬度、目標高度的圖案化特徵部之目標輪廓、及/或該輸出圖案化特徵部的目標總高度。 FIG. 2B illustrates another embodiment of a patterning method 220 for features in a TaN layer. In one embodiment, at block 222, a substrate in the process chamber is provided with input patterned features including a photoresist structure, a patterned layer, a tantalum nitride-containing layer, and an underlying layer. A series of material opening processes are performed on the patterned layer using the mask, which create intermediate patterned features at block 224 . A passivation process using a boron- and/or hydrogen-containing gas mixture at block 226 and an etch process are performed on the intermediate patterned features. One or more operating variables are adjusted and the passivation and etch processes are iteratively performed until one or more process goals are achieved at step 228 . The patterned layer may include a silicon-containing antireflection coating, a carbon planarization film, and a tetraethoxysilane film. The one or more operating variables may include the flow rate of the boron-containing gas, the flow rate of the hydrogen-containing gas, the flow rate ratio of the boron-containing gas to the hydrogen-containing gas, the flow rate of other gases including argon, SF6 , high frequency power, low frequency power, pressure in the process chamber, electrostatic chuck temperature, and other operating variables in the material opening process. The one or more process objectives may include a target etch rate for the TaN, a target profile for patterned features including target substrate width, target hip width, target cap width, target height, and/or the Outputs the target overall height of the patterned features.

圖3A-3E係截面圖，說明用於在例如晶圓125之基板上形成記憶體裝置或邏輯裝置用之BEOL互連圖案的工件。於此實施例中，該工件可包括複數層。該複數層能以堆疊結構的形式而使一層形成於另一層上。在一此實施例中，該工件可包括第一TaN層302、銅(Cu)層304、第二TaN層306、用於記憶體裝置或邏輯裝置用的任何另一BEOL互連圖案化之含金屬堆疊308、第三TaN層316、四乙氧基矽烷(TEOS)層318、有機平坦化(OPL)層320、例如矽抗反射塗覆(SiARC)層322的抗反射層、及光阻層324。該堆疊308可為含有像Cu、Co、Ge、Cr、Al、As、Ru、Ti、Te等金屬之單層或多層金屬堆疊。在一實施例中，可圖案化該光阻層324。於一實施例中，該處理室110可承納在其上配置有分層結構的工件，如圖3A中所示。儘管所述實施例包括三個單獨之TaN層，但一般技藝者會認知到實際工件可包括更多或更少數 目的TaN層。實際上，TaN層之數目與本實施例的操作無關。一般技藝者會進一步認知到該工件可包括各種層，包括與在此中所述材料不同之更多或更少數目的層。只要存在至少一TaN層，就可利用所述實施例。 3A-3E are cross-sectional views illustrating a workpiece for forming BEOL interconnect patterns for memory devices or logic devices on a substrate, such as wafer 125 . In this embodiment, the workpiece may include multiple layers. The plurality of layers can be formed in a stacked structure such that one layer is formed on the other layer. In this embodiment, the workpiece may include a first TaN layer 302, a copper (Cu) layer 304, a second TaN layer 306, any other BEOL interconnect patterning for memory devices or logic devices. Metal stack 308, third TaN layer 316, tetraethoxysilane (TEOS) layer 318, organic planarization (OPL) layer 320, anti-reflective layer such as silicon anti-reflective coating (SiARC) layer 322, and photoresist layer 324. The stack 308 may be a single-layer or multi-layer metal stack containing metals such as Cu, Co, Ge, Cr, Al, As, Ru, Ti, Te, and the like. In one embodiment, the photoresist layer 324 may be patterned. In one embodiment, the processing chamber 110 may receive a workpiece having a layered structure disposed thereon, as shown in FIG. 3A. Although the described embodiment includes three separate TaN layers, those of ordinary skill will recognize that actual workpieces may include more or fewer Target TaN layer. Actually, the number of TaN layers is irrelevant to the operation of this embodiment. Those of ordinary skill will further recognize that the workpiece may include various layers, including more or fewer layers of different materials than those described herein. The described embodiments can be utilized as long as at least one TaN layer is present.

如在圖3B-3D中所敘述之一系列蝕刻製程中，根據一或多個習知製程打開數層以暴露該第三TaN層316。於圖3B的製程中，該抗反射層322可在藉由該光阻層324中所界定之圖案中蝕刻。可使用複數組之合適處理參數的其中一者移去該抗反射層322。譬如，於一實施例中，能以於13mT至17mT之範圍中的壓力、在425W至575W之範圍中的高頻電力、於43W至58W之範圍中的低頻電力、及在30℃至52℃之範圍中的溫度施行該抗反射層322蝕刻製程。於一此實施例中，可使用流動速率範圍為3sccm至5sccm之C4F8、流動速率為43sccm至58sccm的CHF3、和流動速率為68sccm至92sccm之CF4的組合作為蝕刻氣體化學物質。一般技藝者會認知到替代之實施例，包括可取決於用在該抗反射層322的材料所使用之替代氣體組合或處理參數範圍。 As in one of the series of etching processes depicted in FIGS. 3B-3D, layers are opened to expose the third TaN layer 316 according to one or more conventional processes. In the process of FIG. 3B , the antireflection layer 322 may be etched in the pattern defined by the photoresist layer 324 . The antireflection layer 322 can be removed using one of the complex set of suitable processing parameters. For example, in one embodiment, pressure in the range of 13mT to 17mT, high frequency power in the range of 425W to 575W, low frequency power in the range of 43W to 58W, and at 30°C to 52°C The anti-reflection layer 322 etching process is performed at a temperature in the range. In one such embodiment, a combination of C4F8 with a flow rate in the range of 3 seem to 5 seem, CHF3 with a flow rate of 43 seem to 58 seem, and CF4 with a flow rate of 68 seem to 92 seem can be used as the etching gas chemistry. Those of ordinary skill will recognize alternative embodiments, including alternative gas combinations or process parameter ranges that may be used depending on the material used in the anti-reflective layer 322.

於圖3C的製程中，該OPL層320可在藉由該SiARC層322所界定之圖案中打開。於圖3C的製程中，該TEOS層318可在藉由該OPL層320所界定之圖案中打開。可使用複數組之合適處理參數的其中一者移去該OPL層320。譬如，於一實施例中，能以10mT至15mT之範圍中的壓力、在425W至575W之範圍中的高頻電力、於85W至115W之範圍中的低頻電力、及在30℃至52℃之範圍中的溫度施行該OPL層320蝕刻製程。於一此實施例中，可使用在77sccm至104sccm之流動速率範圍的HBr、於68sccm至92sccm之流動速率的CO2、在26sccm至35sccm之流動速率的O2、及於170sccm至230sccm之流動速率的He之組合作為蝕刻氣體化學物質。一般技藝者會認知到另外的實施例，包括可取決於用在該OPL層320之材料所使用的替代氣體組合或 處理參數範圍。 In the process of FIG. 3C , the OPL layer 320 may be opened in the pattern defined by the SiARC layer 322 . In the process of FIG. 3C , the TEOS layer 318 may be opened in the pattern defined by the OPL layer 320 . The OPL layer 320 may be removed using one of the appropriate processing parameters of the complex group. For example, in one embodiment, pressure in the range of 10mT to 15mT, high frequency power in the range of 425W to 575W, low frequency power in the range of 85W to 115W, and a temperature of 30°C to 52°C can be used. The OPL layer 320 etching process is performed at a temperature in the range. In one such embodiment, HBr at a flow rate range of 77 seem to 104 seem, CO 2 at a flow rate of 68 seem to 92 seem, O 2 at a flow rate of 26 seem to 35 seem, and a flow rate of 170 seem to 230 seem can be used A combination of He acts as an etching gas chemical. Those of ordinary skill will recognize additional embodiments, including alternative gas combinations or process parameter ranges that may be used depending on the materials used in the OPL layer 320 .

於圖3D之製程中，該TEOS層318可在藉由該OPL層320所界定之圖案中蝕刻。可使用複數組之合適處理參數的其中一者移去該TEOS層318。譬如，於一實施例中，能以26mT至35mT之範圍中的壓力、在170W至230W之範圍中的高頻電力、於680W至920W之範圍中的低頻電力、及在43℃至69℃之範圍中的溫度施行該TEOS層318蝕刻製程。於一此實施例中，可使用在765sccm至1035sccm之流動速率範圍的Ar、於9sccm至19sccm之流動速率的C4F8、在4sccm至6sccm之流動速率的O2、及於85sccm至115sccm之流動速率的N2之組合作為蝕刻氣體化學物質。一般技藝者會認知到另外的實施例，包括可取決於用在該TEOS層318之材料所使用的替代氣體組合或處理參數範圍。 In the process of FIG. 3D , the TEOS layer 318 may be etched in the pattern defined by the OPL layer 320 . The TEOS layer 318 may be removed using one of the appropriate processing parameters of the complex group. For example, in one embodiment, pressure in the range of 26mT to 35mT, high frequency power in the range of 170W to 230W, low frequency power in the range of 680W to 920W, and a temperature of 43°C to 69°C can be used. The TEOS layer 318 etching process is performed at temperatures in the range. In one such embodiment, Ar at a flow rate range of 765 seem to 1035 seem, C4F8 at a flow rate of 9 seem to 19 seem, O 2 at a flow rate of 4 seem to 6 seem, and between 85 seem to 115 seem may be used. A combination of flow rates of N2 acts as the etching gas chemistry. Those of ordinary skill will recognize additional embodiments, including alternative gas combinations or processing parameter ranges that may be used depending on the material used in the TEOS layer 318 .

於一實施例中，可根據圖3E之製程蝕刻該第三TaN層316。在此實施例中，可於藉由該TEOS層318所界定的圖案中打開該TaN層316。在一實施例中，能以34mT至46mT之範圍中的壓力、於255W至345W之範圍中的高頻電力、在150W至200W之範圍中的低頻電力、及於38℃至52℃之範圍中的溫度施行該第三TaN層316蝕刻製程。在一此實施例中，可使用於170sccm至230sccm之流動速率範圍的Ar、在43sccm至58sccm之流動速率的S4F6、及於10sccm至14sccm之流動速率的BCl3之組合作為蝕刻氣體化學物質。一般技藝者會認知到另外的實施例，包括可取決於該應用或目標處理結果所使用之替代氣體組合或處理參數範圍。 In one embodiment, the third TaN layer 316 may be etched according to the process of FIG. 3E. In this embodiment, the TaN layer 316 may be opened in a pattern defined by the TEOS layer 318 . In one embodiment, pressure in the range of 34mT to 46mT, high frequency power in the range of 255W to 345W, low frequency power in the range of 150W to 200W, and in the range of 38°C to 52°C The etching process of the third TaN layer 316 is performed at a temperature of 100 ℃. In one such embodiment, a combination of Ar at a flow rate range of 170 seem to 230 seem, S4F6 at a flow rate of 43 seem to 58 seem, and BCl at a flow rate of 10 seem to 14 seem can be used as the etching gas chemistry substance. Those of ordinary skill will recognize additional embodiments, including alternative gas combinations or process parameter ranges that may be used depending on the application or target process results.

雖然參考在該第三TaN層316上所施行的製程敘述本實施例，一般技藝者會認知到所述製程係同樣可適用於TaN之其他層，包括該第一TaN層302及該第二TaN層306。實際上，在各種結構或應用中，所述實施例於處理TaN中可為有用的。再者，可與除TaN之外的物質一起使用同等製程， 在此該等材料表現出類似之蝕刻輪廓並對該等蝕刻氣體中的添加劑之回應類似。 Although the present embodiment is described with reference to the process performed on the third TaN layer 316, those skilled in the art will recognize that the process is also applicable to other layers of TaN, including the first TaN layer 302 and the second TaN layer layer 306 . Indeed, in various structures or applications, the described embodiments may be useful in processing TaN. Furthermore, the same process can be used with substances other than TaN, Here the materials exhibit similar etch profiles and respond similarly to the additives in the etch gases.

圖4A說明用於蝕刻例如第三TaN層316之TaN材料以用於形成圖案化特徵部402的基線製程。在一實施例中，該圖案化特徵部402可包括該第三TaN層316的圖案化部份。於另一實施例中，該圖案化特徵部402可包括該TEOS層318之一部份。在所述實施例中，包括SF6的電漿蝕刻氣體係使用於蝕刻該第三TaN層316。在此實施例中，SF6及TaN之反應並不會提供充分的側壁鈍化，以防止該第三TaN層316相對於該TEOS層318之底部蝕刻。於此實施例中，該TaN可被各向同性地蝕刻至使該等下伏層(例如該含金屬堆疊308)圖案化到可能損壞或實質降級的程度。因此，圖4A之製程可能不足以用於某些應用或可能減少整體產物生產量。 FIG. 4A illustrates a baseline process for etching TaN material, such as third TaN layer 316 , for forming patterned features 402 . In one embodiment, the patterned features 402 may include patterned portions of the third TaN layer 316 . In another embodiment, the patterned features 402 may include a portion of the TEOS layer 318 . In the described embodiment, a plasma etch gas system including SF 6 is used to etch the third TaN layer 316 . In this embodiment, the reaction of SF 6 and TaN does not provide sufficient sidewall passivation to prevent bottom etching of the third TaN layer 316 relative to the TEOS layer 318 . In this embodiment, the TaN can be isotropically etched to such an extent that the underlying layers (eg, the metal-containing stack 308 ) are patterned to the extent that they may be damaged or substantially degraded. Therefore, the process of FIG. 4A may be insufficient for some applications or may reduce overall product throughput.

圖4B的實施例包括在該蝕刻氣體化學物質中添加BCl3。於此實施例中，該硼可與TaN中的氮反應，以在該TaN層之側壁上產生氮化硼(BN)鈍化層404。該氮化硼(BN)可鈍化該TaN層，從而藉由減慢沿著該等側壁的第三TaN層316之蝕刻來減少該第三TaN層316的頸縮。 The embodiment of Figure 4B includes adding BCl3 to the etch gas chemistry. In this embodiment, the boron can react with nitrogen in the TaN to produce a boron nitride (BN) passivation layer 404 on the sidewalls of the TaN layer. The boron nitride (BN) can passivate the TaN layer, thereby reducing necking of the third TaN layer 316 by slowing the etching of the third TaN layer 316 along the sidewalls.

圖4C之實施例說明替代實施例，在此HBr氣體係加至該電漿氣體化學物質中。於此實施例中，來自該HBr的氫(H)可與來自SF6的氟(F)結合以減少該電漿中之F自由基。減少該等F自由基可降低該第三TaN層316的側壁之蝕刻速率。再者，來自HBr的溴(Br)可與來自TaN之鉭(Ta)結合以在該第三TaN層316的側壁上產生溴化鉭(TaBr)鈍化層406。 The embodiment of FIG. 4C illustrates an alternative embodiment, where the HBr gas system is added to the plasma gas chemistry. In this example, hydrogen (H) from the HBr can combine with fluorine (F) from SF6 to reduce F radicals in the plasma. Reducing the F radicals can reduce the etch rate of the sidewalls of the third TaN layer 316 . Furthermore, bromine (Br) from HBr can be combined with tantalum (Ta) from TaN to create a tantalum bromide (TaBr) passivation layer 406 on the sidewalls of the third TaN layer 316 .

圖5係尺寸圖，說明根據關於圖4A所敘述之基線製程在基板502上所形成的圖案化特徵部402之一實施例的截面之尺寸。該基板502係類似於圖4A中的堆疊308之含金屬薄膜。在一實施例中，所得到的圖案化特徵部402具有45-65nm之基底寬度、35-55nm的頸部寬度、和45-65nm之帽蓋寬 度。該圖案化特徵部402另包括TaN層，其高度為80-100nm，且總高度為100-120nm。 5 is a dimension drawing illustrating the dimensions of the cross-section of one embodiment of patterned features 402 formed on substrate 502 according to the baseline process described with respect to FIG. 4A. The substrate 502 is a metal-containing film similar to stack 308 in Figure 4A. In one embodiment, the resulting patterned features 402 have a substrate width of 45-65 nm, a neck width of 35-55 nm, and a cap width of 45-65 nm Spend. The patterned features 402 additionally include a TaN layer having a height of 80-100 nm and an overall height of 100-120 nm.

於圖5的實施例中，該蝕刻製程可為在34mT至46mT的範圍中之壓力、255W至345W的範圍中之高頻功率、150W至230W的範圍中之低頻功率、及在38℃至52℃的範圍中之溫度下施行。於一個此實施例中，可使用在170sccm至230sccm之流動速率範圍的Ar、及於43sccm至58sccm之流動速率的六氟化硫(SF6)之組合作為蝕刻氣體化學物質。 In the embodiment of FIG. 5, the etch process may be pressure in the range of 34mT to 46mT, high frequency power in the range of 255W to 345W, low frequency power in the range of 150W to 230W, and at 38°C to 52°C. Executed at a temperature in the range of °C. In one such embodiment, a combination of Ar at a flow rate range of 170 seem to 230 seem, and sulfur hexafluoride ( SF6 ) at a flow rate of 43 seem to 58 seem can be used as the etching gas chemistry.

作為比較，圖6A-6F說明在基板502上所形成的圖案化特徵部402之截面。於各種實施例中，可在各種流動速率範圍下將額外的氣體添加至該蝕刻化學物質中。例如，可將BCl3、HBr、CH4、CHF3等添加至該蝕刻化學物質中。 6A-6F illustrate cross-sections of patterned features 402 formed on substrate 502, by way of comparison. In various embodiments, additional gases may be added to the etch chemistry at various flow rate ranges. For example, BCl3 , HBr, CH4 , CHF3 , etc. can be added to the etch chemistry.

圖6A說明使用以下製程形成圖案化特徵部402的結果，該製程包括於10sccm至14sccm的流動速率範圍下將BCl3添加至該蝕刻化學物質而用於85%之蝕刻製程。在沒有該額外的BCl3之情況下施行剩餘的15%以回蝕刻該BN鈍化層404。圖6B的結果係使用包括在該整個TaN蝕刻期間將BCl3添加至該蝕刻化學物質之製程所產生。這兩個結果顯示該BN鈍化層404在該TaN上的累積，且兩個結果顯示在圖案化之後改善的第三TaN層316之截面尺寸。 6A illustrates the results of forming patterned features 402 using a process that includes adding BCl3 to the etch chemistry at a flow rate range of 10 seem to 14 seem for an 85% etch process. The remaining 15% is performed without the additional BCl 3 to etch back the BN passivation layer 404 . The results of Figure 6B were generated using a process that included adding BCl3 to the etch chemistry throughout the TaN etch. The two results show the accumulation of the BN passivation layer 404 on the TaN, and the two results show the improved cross-sectional dimension of the third TaN layer 316 after patterning.

圖6C顯示製程的結果，該製程包括於10sccm至14sccm之流動速率範圍將HBr氣體添加至該蝕刻化學物質而用於85%的蝕刻製程。在沒有額外的HBr之情況下施行剩餘的15%以回蝕刻該TaBr鈍化層406。所得到之圖案化特徵部402具有45-65nm的基底寬度、35-55nm之頸部寬度、和35-55nm的帽蓋寬度，具有80-100nm之TaN層高度，且總特徵部高度為100-120nm。此結果顯示在該基線製程上的改進，而沒有像BCl3之實施例那樣多 的側壁鈍化材料之累積。使用HBr的實施例具有不將額外之氯(Cl)導入該處理室110的額外益處，因為已知Cl係腐蝕劑。 Figure 6C shows the results of a process that included adding HBr gas to the etch chemistry at a flow rate range of 10 seem to 14 seem for an 85% etch process. The remaining 15% is performed to etch back the TaBr passivation layer 406 without additional HBr. The resulting patterned features 402 had a substrate width of 45-65 nm, a neck width of 35-55 nm, and a cap width of 35-55 nm, a TaN layer height of 80-100 nm, and a total feature height of 100- 120nm. This result shows an improvement over the baseline process without the accumulation of as much sidewall passivation material as the BCl3 example. Embodiments using HBr have the added benefit of not introducing additional chlorine (Cl) into the process chamber 110 since Cl-based etchants are known.

在圖6D-6F中說明額外實施例之結果。圖6D說明一實施例，在此於10sccm至14sccm流動速率的氟仿(CHF3)係添加至該蝕刻氣體化學物質而用於85%之蝕刻時期。圖6E說明一實施例的結果，在此甲烷(CH4)係添加至該蝕刻氣體化學物質而用於85%之蝕刻時期。兩個實施例顯示對該TaN側壁鈍化的重要控制。 Results of additional embodiments are illustrated in Figures 6D-6F. Figure 6D illustrates an embodiment where fluoroform (CHF3 ) at a flow rate of 10 seem to 14 seem is added to the etch gas chemistry for an etch period of 85%. Figure 6E illustrates the results of an embodiment where methane ( CH4 ) was added to the etch gas chemistry for an 85% etch period. Two examples show important control over the passivation of the TaN sidewalls.

圖6F顯示該基線製程之實施例的結果，在此於該基板夾具120的溫度係在該蝕刻製程期間由40℃減少至20℃。溫度之減少顯示該TaN/TEOS選擇性的進一步改良，如此包括溫度及壓力之額外處理參數的控制可使用於該等TaN側壁之鈍化。 Figure 6F shows the results of an embodiment of the baseline process, where the temperature in the substrate holder 120 was reduced from 40°C to 20°C during the etch process. The reduction in temperature shows a further improvement in the TaN/TEOS selectivity, so control of additional process parameters including temperature and pressure can be used for passivation of the TaN sidewalls.

圖7A-7C說明用於圖案化TaN的方法之實驗結果的截面圖。圖7A說明藉由在30℃將BCl3鈍化氣體之12sccm添加至該電漿化學物質所施行的方法之結果。圖7B說明藉由在45℃將BCl3鈍化氣體的12sccm添加至該電漿化學物質所施行之方法的結果。圖7C說明藉由在45℃及在60mT之壓力下將BCl3鈍化氣體的12sccm添加至該電漿化學物質所施行之方法的結果。雖然每一結果係比該基線製程更好，但是從這些結果可清楚地看出，控制該處理室110內之溫度和壓力可控制該等結果，從而滿足該等目標處理結果。目標處理結果的範例可包括該圖案化特徵部402之臨界尺寸、該第三TaN層316的直立壁面上之鈍化層累積量、該TEOS帽蓋的尺寸和形狀與類似者等。 7A-7C illustrate cross-sectional views of experimental results of a method for patterning TaN. Figure 7A illustrates the results of a method performed by adding 12 seem of BCl3 passivation gas to the plasma chemistry at 30°C. Figure 7B illustrates the results of a method performed by adding 12 seem of BCl3 passivation gas to the plasma chemistry at 45°C. Figure 7C illustrates the results of a method performed by adding 12 seem of BCl3 passivation gas to the plasma chemistry at 45°C and a pressure of 60 mT. While each result is better than the baseline process, it is clear from these results that controlling the temperature and pressure within the process chamber 110 can control the results to meet the target process results. Examples of target process results may include the critical dimensions of the patterned features 402, the passivation layer buildup on the upstanding walls of the third TaN layer 316, the size and shape of the TEOS cap, and the like.

圖8A-8B說明將HBr作為鈍化氣體添加至該蝕刻化學物質所施行之圖案化TaN的方法之實驗結果的截面圖。圖8A說明在45℃和40mT之壓力下將50sccm的SF6與12sccm之HBr結合的結果。圖8B說明在45℃和 40mT之壓力下將50sccm的SF6與24sccm之HBr結合的結果。如所說明，變動該蝕刻化學物質中之鈍化氣體的濃度也可調節該結果。如此，同樣可控制氣體之濃度以滿足一或多個目標處理結果。 8A-8B illustrate cross-sectional views of experimental results of a method of patterning TaN performed by adding HBr as a passivation gas to the etch chemistry. Figure 8A illustrates the results of combining 50 seem of SF6 with 12 seem of HBr at 45°C and a pressure of 40 mT. Figure 8B illustrates the results of combining 50 seem of SF6 with 24 seem of HBr at 45°C and a pressure of 40 mT. As noted, varying the concentration of the passivating gas in the etch chemistry can also adjust the results. As such, the concentration of the gas can also be controlled to meet one or more target process results.

雖然已在此中敘述特定的處理參數，以能夠用於產生類似於圖6A-8B中所示之結果的配方之實施例，一般技藝者會認知到，可在範圍內控制所敘述的參數以達成目標處理結果。例如，該鈍化氣體之流動速率可為在1-50sccm或12-24sccm的範圍內。實際上，取決於裝置和系統要求，在一些實施例中可使用更大之流動速率。另外，操作壓力可為於1-100mT或34至60mT的範圍內。在一些實施例中也可使用更高之壓力，這取決於裝置和系統要求。類似地，溫度可控制在攝氏30-60度的範圍內。一般技藝者會認知到，取決於裝置和系統要求，可使用更高或更低之溫度、例如於攝氏1-100度的範圍內。實際上，取決於裝置和系統要求，可使用多種溫度。 Although specific processing parameters have been described herein to enable embodiments of recipes that can be used to produce results similar to those shown in Figures 6A-8B, those of ordinary skill will recognize that the parameters described can be controlled within a range to Achieving target processing results. For example, the flow rate of the passivation gas may be in the range of 1-50 seem or 12-24 seem. Indeed, depending on device and system requirements, larger flow rates may be used in some embodiments. Additionally, the operating pressure may be in the range of 1-100 mT or 34 to 60 mT. Higher pressures may also be used in some embodiments, depending on device and system requirements. Similarly, the temperature can be controlled in the range of 30-60 degrees Celsius. Those of ordinary skill will recognize that, depending on device and system requirements, higher or lower temperatures may be used, eg, in the range of 1-100 degrees Celsius. In practice, a variety of temperatures can be used depending on the device and system requirements.

額外優點及修改對於那些熟諳此技術領域者將輕易地顯現。因此，本發明在更廣泛之態樣中係不限於該特定細節、代表性設備和方法、及所顯示和敘述的說明性範例。據此，可在不偏離一般發明構思範圍之情況下由此等細節偏離。 Additional advantages and modifications will readily appear to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details, representative apparatus and method, and illustrative examples shown and described. Accordingly, departures may be made from these details without departing from the scope of the general inventive concept.

100‧‧‧蝕刻和鈍化處理系統 100‧‧‧Etching and Passivation Processing Systems

110‧‧‧處理室 110‧‧‧Processing Room

120‧‧‧基板夾具 120‧‧‧Substrate fixture

122‧‧‧電極 122‧‧‧Electrode

125‧‧‧晶圓 125‧‧‧Wafer

126‧‧‧背側氣體供給系統 126‧‧‧Backside gas supply system

128‧‧‧靜電夾持系統 128‧‧‧Electrostatic clamping system

130‧‧‧RF產生器 130‧‧‧RF generator

131‧‧‧偏壓信號控制器 131‧‧‧Bias Signal Controller

132‧‧‧阻抗匹配網路 132‧‧‧Impedance matching network

140‧‧‧氣體分配系統 140‧‧‧Gas distribution system

145‧‧‧處理區域 145‧‧‧Processing area

150‧‧‧真空泵送系統 150‧‧‧Vacuum Pumping System

155‧‧‧來源控制器 155‧‧‧Source Controller

170‧‧‧上電極 170‧‧‧Top electrode

172‧‧‧RF產生器 172‧‧‧RF generator

174‧‧‧阻抗匹配網路 174‧‧‧Impedance matching network

190‧‧‧電源 190‧‧‧Power

Claims (16)

一種用於處理基板的方法，包含：承納包含氮化鉭(TaN)層之基板；蝕刻該基板，以暴露該TaN層的至少一部份；施行鈍化製程，以減少該TaN層之橫側蝕刻；及蝕刻該TaN層，以在其中形成特徵部；其中控制該鈍化製程以滿足一或多個目標鈍化結果，其中該鈍化製程及蝕刻該TaN層之製程係反覆執行，以滿足鈍化目標，且其中施行該鈍化製程另包含減少由用於蝕刻該TaN層所使用之六氟化硫(SF6)氣體所形成的電漿中之氟(F)自由基，並且將溴化氫(HBr)加至該SF6氣體，來自該HBr之氫減少該SF6電漿中的F自由基數目。 A method for processing a substrate, comprising: receiving a substrate comprising a tantalum nitride (TaN) layer; etching the substrate to expose at least a portion of the TaN layer; and performing a passivation process to reduce lateral sides of the TaN layer etching; and etching the TaN layer to form features therein; wherein the passivation process is controlled to meet one or more target passivation results, wherein the passivation process and the process of etching the TaN layer are iteratively performed to meet the passivation target, and wherein performing the passivation process further includes reducing fluorine (F) radicals in the plasma formed by the sulfur hexafluoride (SF 6 ) gas used for etching the TaN layer, and converting hydrogen bromide (HBr) Added to the SF6 gas, hydrogen from the HBr reduces the number of F radicals in the SF6 plasma. 如申請專利範圍第1項之用於處理基板的方法，其中施行該鈍化製程係與蝕刻該TaN層同時地施行。 The method for treating a substrate as claimed in claim 1, wherein the passivation process is performed simultaneously with the etching of the TaN layer. 如申請專利範圍第1項之用於處理基板的方法，其中控制該鈍化製程另包含控制該鈍化氣體之流動速率。 The method for processing a substrate as claimed in claim 1 of the claimed scope, wherein controlling the passivation process further comprises controlling the flow rate of the passivation gas. 如申請專利範圍第3項之用於處理基板的方法，其中該鈍化氣體之流動速率係在1-50sccm的範圍或於12-24sccm之範圍中。 The method for treating a substrate as claimed in claim 3, wherein the flow rate of the passivation gas is in the range of 1-50 sccm or in the range of 12-24 sccm. 如申請專利範圍第1項之用於處理基板的方法，其中控制該鈍化製程另包含控制處理室內之壓力。 The method for processing a substrate as claimed in claim 1 of the claimed scope, wherein controlling the passivation process further includes controlling the pressure in the processing chamber. 如申請專利範圍第5項之用於處理基板的方法，其中該壓力係在1-100mT之範圍中或於34-60mT的範圍中。 The method for processing a substrate as claimed in claim 5, wherein the pressure is in the range of 1-100 mT or in the range of 34-60 mT. 如申請專利範圍第1項之用於處理基板的方法，其中控制該鈍化製程另包含控制處理室內之溫度。 The method for processing a substrate as claimed in claim 1 of the claimed scope, wherein controlling the passivation process further includes controlling the temperature in the processing chamber. 如申請專利範圍第7項之用於處理基板的方法，其中該溫度係於攝氏30-60度之範圍中。 The method for processing a substrate as claimed in claim 7, wherein the temperature is in the range of 30-60 degrees Celsius. 一種用於處理基板的方法，該方法包含：承納包含氮化鉭(TaN)層之基板；蝕刻該基板，以暴露該TaN層的至少一部份；利用包含溴化氫(HBr)之鈍化氣體施行鈍化製程以減少該TaN層之橫側蝕刻，並且減少由用於蝕刻該TaN層所使用之六氟化硫(SF6)氣體所形成的電漿中之氟(F)自由基，其中來自該HBr之氫減少該SF6氣體所形成的電漿中的氟(F)自由基數目；以及利用該六氟化硫(SF6)氣體蝕刻該TaN層，以在其中形成特徵部，其中控制該鈍化製程以滿足一或多個目標鈍化結果。 A method for processing a substrate, the method comprising: receiving a substrate comprising a tantalum nitride (TaN) layer; etching the substrate to expose at least a portion of the TaN layer; utilizing passivation comprising hydrogen bromide (HBr) The gas is subjected to a passivation process to reduce lateral etching of the TaN layer and to reduce fluorine (F) radicals in the plasma formed by the sulfur hexafluoride (SF 6 ) gas used to etch the TaN layer, wherein hydrogen from the HBr reduces the number of fluorine (F) radicals in the plasma formed by the SF6 gas; and etching the TaN layer with the sulfur hexafluoride ( SF6 ) gas to form features therein, wherein The passivation process is controlled to meet one or more target passivation results. 如申請專利範圍第9項之用於處理基板的方法，其中施行該鈍化製程係與蝕刻該TaN層同時地施行。 The method for processing a substrate as claimed in claim 9, wherein the passivation process is performed simultaneously with the etching of the TaN layer. 如申請專利範圍第9項之用於處理基板的方法，其中控制該鈍化製程另包含控制該鈍化氣體之流動速率。 The method of claim 9 for processing a substrate, wherein controlling the passivation process further comprises controlling the flow rate of the passivation gas. 如申請專利範圍第11項之用於處理基板的方法，其中該鈍化氣體之流動速率係在1-50sccm的範圍或於12-24sccm之範圍中。 The method for treating a substrate as claimed in claim 11, wherein the flow rate of the passivation gas is in the range of 1-50 sccm or in the range of 12-24 sccm. 如申請專利範圍第9項之用於處理基板的方法，其中控制該鈍化製程另包含控制處理室內之壓力。 The method for processing a substrate as claimed in claim 9 of the claimed scope, wherein controlling the passivation process further includes controlling the pressure in the processing chamber. 如申請專利範圍第13項之用於處理基板的方法，其中該壓力係在1-100mT之範圍中或於34-60mT的範圍中。 The method for processing a substrate as claimed in claim 13, wherein the pressure is in the range of 1-100 mT or in the range of 34-60 mT. 如申請專利範圍第9項之用於處理基板的方法，其中控制該鈍化製程另包含控制處理室內之溫度。 The method for processing a substrate as claimed in claim 9 of the claimed scope, wherein controlling the passivation process further includes controlling the temperature in the processing chamber. 如申請專利範圍第15項之用於處理基板的方法，其中該溫度係於攝氏30-60度之範圍中。The method for processing a substrate as claimed in claim 15, wherein the temperature is in the range of 30-60 degrees Celsius.
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