TWI760885B - High-frequency noise signal filtering method and digital chip thereof - Google Patents

Abstract

The present invention relates a high-frequency noise signal filtering method which determining a pole number (N) and a cut-off frequency (w_c) in an analog low-pass filter transfer function (H_a(s)), and finding out an accurate pole (p_k) in the analog low-pass filter transfer function (H_a(s)) based on calculating the pole number (N) and the cut-off frequency (w_c), then obtaining the analog low-pass filter transfer function (H_a(s)) based on calculating the accurate pole (p_k). Thereafter, utilizing a pulse invariant conversion formula to calculate a digital filter transfer function (H(z)) relative to the analog low-pass filter transfer function (H_a(s)). A difference equation is calculated according to an inverse Z conversion, and the low-pass filter is set according to the difference equation. Design a high-frequency noise filtering method that filtering high-frequency noise and simplifying the control system architecture in the prior art thereby.

Description

High frequency noise filtering method and digital chip

The present invention relates to a high-frequency noise filtering technology, in particular to a high-frequency noise filtering method that can filter out high-frequency noise and simplify the structure of a traditional control system.

With the rapid development of electronic technology, 3C household appliances are becoming more and more popular, and the design and manufacture of these 3C household appliances are inseparable from the power supply, including the electroplating industry, which must also use direct current. The most commonly used component is switching power supply. However, although switching power supply has high efficiency and small size, its shortcomings are extremely obvious. Because switching power supply has switching frequency, it has a strong source of circuit interference, which makes many circuit systems. It is easy to be interfered by the switching power supply and affect the normal work.

In the application, if the circuit of the switching power supply is treated with anti-interference, this better circuit can be applied to various common circuit devices to improve the efficiency of the circuit. However, the interference noise is usually All are high-frequency, so in the traditional switch power controller, there are often many high-frequency noises entering the digital controller, especially the more high-power DC inverter, the more obvious this phenomenon is.

In recent years, Field Programmable Gate Array (FPGA) chips have been widely used in industrial control, mobile phones and artificial intelligence deep learning technologies Because it can operate in parallel, and the speed is more than twice that of the general central processing unit (Central Processing Unit, CPU), and the internal programming is very flexible, a complete functional program can be built in a stack, and the FPGA is based on It is designed with hardware description language, many functions can be written in one chip, and there is no need to use a large number of analog components to design, so in principle, using FPGA chip to design digital control system has higher resistance than analog component design. disturbance phenomenon.

However, when the control signal enters the digital controller, if it is mixed with high-frequency noise, the control law will be invalid, and the system will be disordered. As shown in FIG. 1 , the structure of the control system of the prior art is usually composed of a low-pass filter 10 , an analog digital conversion element 11 and a digital control chip 12 . After the continuous control signal of high-frequency noise is subjected to a filtering operation, the filtered control signal is transmitted to the analog-to-digital conversion element 11 for analog-to-digital conversion operation, and finally the digital control chip 12 receives the control signal. However, after the control signal is converted by the analog digital conversion element 11, it is easy to carry other noises, so that the digital control chip 12 may still carry other high-frequency noises when it receives the control signal. The control structure of the technology can only be achieved by three pieces of hardware, which is a waste of cost.

Therefore, there is an urgent need for a technology that can effectively filter out high-frequency noise and simplify the structure of the traditional control system, thereby improving the problems existing in the prior art.

The purpose of the present invention is to provide a differential equation to set the low-pass filter, so that the low-pass filter can be set in the digital chip, and the two can work together. In this way, when the control signal is output by the analog digital device, the high-frequency noise can be filtered out by the low-pass filter first, and then the digital chip performs the related control operation, so as to effectively filter out the high-frequency noise and be able to The purpose of simplifying the traditional control system architecture in order to improve the problems of the previous technology.

In order to achieve the purpose disclosed above, the present invention provides a method for filtering high-frequency noise, comprising: defining the highest frequency of the passband region in the specification of a low-pass filter as the passband cutoff frequency (w _p ), The lowest frequency in the stop-band region is the stop-band cutoff frequency (w _s ), the attenuation rate of the pass-band region is the pass-band ripple (A _p ), and the attenuation rate of the stop-band region is the stop-band ripple (A _s ); A pole number (N) and a cut-off frequency (w _c ) in the transfer function (H _a (s)) of the analog low-pass filter; according to the pole number (N) and the cut-off frequency (w _c ) to obtain A definite pole (p _k ) in the analog low-pass filter transfer function (H _a (s)); the analog low-pass filter transfer function (H _a (s)) is calculated from the definite pole (p _k ) ; Calculate the analog low-pass filter transfer function (H _a (s)) using a pulse-invariant conversion formula to obtain a digital filter relative to the analog low-pass filter transfer function (H _a (s)) transfer function (H(z)); calculate a differential equation of the digital filter transfer function (H(z)) according to an inverse Z transformation; and set the low-pass filter according to the differential equation.

Preferably, the number of poles (N) is calculated according to the following formula:

係為大於x的最小整數。 where in the above formula

is the smallest integer greater than x.

Preferably, the cutoff frequency (w _c ) is calculated according to the following formula:

Preferably, the exact pole (p _k ) is calculated according to the following formula:

The constant K is 2N-1.

Preferably, the analog low-pass filter transfer function (H _a (s)) is calculated according to the following formula:

Preferably, the pulse-invariant conversion formula is z= ^esT .

Preferably, the digital filter transfer function (H(z)) is calculated according to the following formula:

where Y(z) is the output of the filter and X(z) is the input of the filter.

Preferably, the inverse Z transform calculates the difference equation according to the following formula:

Another object of the present invention is to provide a technology for disposing a low-pass filter in a digital chip and enabling the two to work together. In this way, when the control signal is output by the analog digital device, the high-frequency noise can be filtered out by the low-pass filter first, and then the digital chip performs the related control operation, so as to effectively filter out the high-frequency noise and be able to The purpose of simplifying the traditional control system architecture in order to improve the problems of the previous technology.

In order to achieve another object disclosed above, the present invention provides a digital chip for performing the above-mentioned method for filtering high-frequency noise, comprising: a signal receiver configured to convert components from an analog digital converter receiving a signal with at least one high-frequency noise; a low-pass filter coupled to the signal receiver, the low-pass filter removes the high-frequency noise in the signal, and outputs the filtered signal ; and a processor coupled to the low-pass filter to receive and process the control signal.

In order to make the above-mentioned objects, features and advantages of the present invention more clearly understood, the following detailed description is given in conjunction with the specific embodiments listed in the drawings.

10: Low pass filter

11: Analog-to-digital conversion components

12: Digital control chip

20: low pass filter

30: Digital Chip

31: Signal receiver

32: Processor

40: Analog to Digital Converter

A _p : passband ripple

A _s : stopband ripple

w _p : passband cutoff frequency

_ws : stopband cutoff frequency

S101~S107: Step flow

Fig. 1 is a schematic diagram of the control system structure of the prior art; Fig. 2 is a flow chart of the steps of the present invention; Fig. 3 is a schematic diagram of the response specification of the analog low-pass filter of the present invention; Fig. 4 is a low-pass filter of the present invention Figure 5 is a schematic diagram of the structure of the control system of the present invention.

The advantages, features, and technical means of achieving the present invention will be more easily understood by being described in more detail with reference to the exemplary embodiments and the accompanying drawings, and the present invention may be implemented in different forms, so it should not be construed as the present invention. It is limited only to the embodiments set forth herein. On the contrary, to those of ordinary skill in the art, the provided embodiments will make the present disclosure more thorough, complete and complete to convey the scope of the present invention, and the present invention will only be Defined by the appended claims.

Additionally, the terms "comprising" and/or "comprising" refer to the presence of stated features, regions, integers, steps, operations, elements and/or components, but do not exclude one or more other features, regions, integers, steps, operations , elements, components and/or the presence or addition of combinations thereof.

In order to facilitate your reviewers to understand the content of the present invention and the effects that can be achieved, the specific embodiments listed in the drawings are described in detail as follows: Please refer to FIG. 2 to FIG. 4 , which are the steps of the present invention. Flow chart, schematic diagram of the response specification of an analog low-pass filter, and a schematic diagram of the output waveform of the low-pass filter. As shown in the figure, the main If a method for filtering high frequency noise is provided, a low-pass filter 20 can be set by using a differential equation, so that the low-pass filter 20 can be set in a digital chip 30, and the two can work together. Thus, the difference equation is mainly derived through the following design steps:

S101: First, according to the response specification of the analog low-pass filter (as shown in Figure 4), define the highest frequency in the passband region as the passband cutoff frequency (w _p ), and the lowest frequency in the stopband region as The stop-band cutoff frequency (w _s ), the attenuation rate in the pass-band region is the pass-band ripple (A _p ), and the attenuation rate in the stop-band region is the stop-band ripple (A _s ).

S102: Determine a pole number (N) and a cutoff frequency (w _c ) in the transfer function (H _a (s)) of the analog low-pass filter according to formula (1) and formula (2).

S103: According to the number of poles (N) and the cut-off frequency (w _c ), obtain a certain pole (p _k ) in the transfer function (H _a (s)) of the analog low-pass filter by formula (3) . Among them, the constant K is 2N-1.

S104: Then, the analog low-pass filter transfer function (H _a (s)) is calculated by formula (4) according to the exact pole (p _k ).

S105: Calculate the transfer function (H _a (s)) of the analog low-pass filter by using a pulse-invariant conversion formula (z=e ^sT ) to obtain the following formula (5) and the transfer function of the analog low-pass filter (H _a (s)) versus a digital filter transfer function (H(z)).

S106: Calculate a differential equation of the digital filter transfer function (H(z)) according to an inverse Z transformation (the following formula (6)).

S107: Finally, the low-pass filter 20 can be set according to the differential equation.

In practice, assuming that the sampling frequency is 1KHz, the pass-band cut-off frequency (w _p ) is 20 Hz, and the stop-band cut-off frequency (w _s ) is 100 Hz, select the least order to design, the pass-band ripple (A _p ) It is 1db, and the stopband ripple (A _s ) is 80db. The filter design and analysis tool (FDATool) completes the low voltage according to the set values of these specifications and the steps and formulas mentioned above. The design work of the pass filter 20 is performed, and the digitized differential equation is set to the low-pass filter 20 of this specification, so as to be converted into an analog link (Simulink) model, if a signal sin waveform higher than 100Hz is set, The upper and lower amplitude is 1, the frequency is (2×π×200) rad/sce, and a low-frequency constant 2 is added. At the same time, it enters the low-pass filter 20, and the output waveform will be as shown in Figure 5. When the control signal passes through The waveform output by the low-pass filter 20 can be clearly seen that the sin wave is filtered out at 0.1 second, and only the output of the low-frequency constant 2 is left, so it can be understood that the present invention uses the low-pass filter 20 to filter out the output. When integrated on the digital chip 30, the effect of filtering out high frequency noise and simplifying the structure of the traditional control system can be achieved.

Please refer to FIG. 5 again, which is a schematic diagram of the structure of the control system of the present invention. As shown in the figure, when the present invention utilizes the low-pass filter 20 to be integrated on the digital chip 30 (eg, a Field Programmable Gate Array (FPGA) chip), the digital chip 30 is mainly composed of from one After the analog-to-digital converter 40 receives a control signal, the low-pass filter 20 first performs a filtering operation on the control signal, and then the digital chip 30 performs subsequent signal processing operations.

Thus, in order to achieve the above functions, the digital chip 30 at least includes a signal receiver 31 , the low-pass filter 20 and a processor 32 , wherein the signal receiver 20 mainly receives a control from the analog digital converter 40 . signal; the low-pass filter 20 is coupled to the signal receiver 20 to perform related filtering operations for the control signal; and the processor 32 is coupled to the low-pass filter 20 to receive the filter that has completed the filtering operation. control signal, and perform related processing operations according to the signal stored in the control signal.

Therefore, the low-pass filter 20 set by the differential equation of the present invention can be integrated on the digital chip 30 to receive the control signal output from the analog-to-digital converter 40, and then perform the correlation of filtering and processing. Operation.

What is disclosed in this case is a preferred embodiment, and any partial changes or modifications that originate from the technical ideas of this case and are easily inferred by those who are familiar with the art are within the scope of the patent right of this case.

To sum up, in terms of purpose, means and efficacy, this case is showing its technical characteristics that are completely different from those of the prior art, and its first invention is suitable for practical use, and it also meets the requirements of a patent for invention. Granting a patent as soon as possible will benefit the society, and it will be a real sense of virtue.

S101~S107: Step flow

Claims (8)

A digital chip for performing a method of high frequency noise filtering, comprising: a signal receiver configured to receive a control signal having at least one high frequency noise from an analog digital conversion element; a low a pass filter coupled to the signal receiver, the low pass filter removes the high frequency noise in the control signal and outputs the filtered control signal; and a processor coupled to the low pass a filter to receive and process the control signal; wherein, the high-frequency noise filtering method includes: defining the highest frequency of the pass-band region in the specification of the low-pass filter as the pass-band cutoff frequency (w _p ), the stop-band region The lowest frequency is the stop-band cutoff frequency (w _s ), the attenuation rate of the pass-band region is the pass-band ripple (A _p ), and the attenuation rate of the stop-band region is the stop-band ripple (A _s ); A number of poles (N) and a cut-off frequency (w _c ) in the filter transfer function (H _a (s)); according to the number of poles (N) and the cut-off frequency (w _c ), the analog low a definite pole (p _k ) in the transfer function (H _{a (s)) of the pass filter; the analog low-pass filter transfer function (H a (} s)) is calculated according to the definite pole (p _k ); using a The pulse-invariant transfer formula calculates the analog low-pass filter transfer function (H _a (s)) to obtain _a digital filter transfer function ( H(z)); calculate a differential equation of the digital filter transfer function (H(z)) according to an inverse Z transformation; and set the low-pass filter according to the differential equation. The digital chip of claim 1, wherein the number of poles (N) is calculated according to the following formula:

where in the above formula

is the smallest integer greater than x. The digital chip of claim 1, wherein the cutoff frequency (w _c ) is calculated according to the following formula:

The digital chip of claim 1, wherein the true pole (p _k ) is calculated according to the following formula:

The constant K is 2N-1. The digital chip of claim 1, wherein the analog low-pass filter transfer function (H _a (s)) is calculated according to the following formula:

The digital chip of claim 1, wherein the pulse-invariant conversion formula is z= ^esT . The digital chip of claim 1, wherein the digital filter transfer function (H(z)) is calculated according to the following formula:

where Y(z) is the output of the filter and X(z) is the input of the filter. The digital chip of claim 1, wherein the inverse Z transformation is calculated according to the following formula:

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