TWI759690B - Flyback converter with fixed on-time and the control method thereof - Google Patents

Flyback converter with fixed on-time and the control method thereof Download PDF

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TWI759690B
TWI759690B TW109105317A TW109105317A TWI759690B TW I759690 B TWI759690 B TW I759690B TW 109105317 A TW109105317 A TW 109105317A TW 109105317 A TW109105317 A TW 109105317A TW I759690 B TWI759690 B TW I759690B
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terminal
voltage
module
flyback converter
output
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TW202133536A (en
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鄭榮霈
許鴻達
張湘忠
于岳平
陳佑民
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英屬開曼群島商萬國半導體(開曼)股份有限公司
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The invention discloses a flyback converter with a fixed on-time and a control method thereof. When the flyback converter is in the switch-on phase, according to the gate voltage of the gate switch and the input voltage of the flyback converter, the primary side controller of the transformer primary side is used to perform corresponding processing to obtain a second control signals, through which the gate switch is controlled to open, so that the flyback converter enters the switch-off phase; when the flyback converter is in the switch-off phase, the secondary side controller of the transformer secondary sends a first control signal to the primary-side controller according to the output voltage and output current of the secondary side, thereby controlling the gate switch to be turned on, so that the flyback converter enters the switch-on stage. The invention has the beneficial effects of reducing calculation complexity and eliminating the need to set a blanking time, so that the flyback converter can be applied to a scenario with a high switching frequency.

Description

一種固定導通時間的反激式轉換器及控制方法A fixed on-time flyback converter and control method

本發明涉及轉換電路技術領域,尤其涉及一種固定導通時間控制的反激式轉換器及控制方法。 The present invention relates to the technical field of conversion circuits, and in particular, to a flyback converter with fixed on-time control and a control method.

反激式轉換器(Flyback Converter)屬於開關電源中的一種,反激式轉換器可以在輸入級和輸出級之間提供絕緣隔離,因此被廣泛應用在交流轉直流(AC/DC)的電流切換場景中。 The flyback converter is a kind of switching power supply. The flyback converter can provide insulation isolation between the input stage and the output stage, so it is widely used in the current switching of alternating current to direct current (AC/DC). in the scene.

反激式轉換器的工作過程主要分為兩個階段,即開關閉合導通階段和開關斷開階段。 The working process of the flyback converter is mainly divided into two stages, that is, the switch-on phase and the switch-off phase.

在開關閉合導通階段,反激式轉換器的變壓器初級側的初級線圈(Primary Coil)被直接連接在輸入電壓上,初級線圈中的電流和變壓器磁芯中的磁場增加,在磁芯中儲存能量。此時在變壓器次級側的次級線圈(Secondary Coil)中產生的電壓是反向的,因此使得二極管處于反偏狀態而不能導通。此時,由次級線圈側的電容向負載提供電壓和電流。 During the switch-on phase, the primary coil (Primary Coil) on the primary side of the transformer of the flyback converter is directly connected to the input voltage, the current in the primary coil and the magnetic field in the transformer core increase, and energy is stored in the core . At this time, the voltage generated in the secondary coil (Secondary Coil) of the secondary side of the transformer is reversed, so that the diode is in a reverse biased state and cannot be turned on. At this time, voltage and current are supplied to the load from the capacitor on the secondary coil side.

在開關斷開階段,初級線圈中的電流為0,同時磁芯中的磁場開始下降。此時在次級線圈上感應出正向電壓,次級線圈側的二極管處于正偏狀態而 被導通,導通的電流流入次級線圈側的電容和負載中,也就是磁芯中存儲的能量被轉移至電容和負載中。 During the switch-off phase, the current in the primary coil is zero and the magnetic field in the core starts to drop. At this time, a forward voltage is induced on the secondary coil, and the diode on the secondary coil side is in a forward biased state. When it is turned on, the turned-on current flows into the capacitor and the load on the secondary coil side, that is, the energy stored in the magnetic core is transferred to the capacitor and the load.

上述兩個階段循環執行,從而構成了反激式轉換器的整個工作過程。 The above two stages are executed cyclically, thus constituting the whole working process of the flyback converter.

現有技術中,應用于AC/DC場景中的反激式轉換器,其結構通常如圖1中所述,初級側控制器1(Primary Controller)主要負責控制柵極開關的導通和斷開。次級側控制器2(Secondary Controller)主要負責導通時間TON的計算以及導通/斷開指令的發送,初級側控制器和次級側控制器之間通過隔離器3(Isolator)傳輸信號。在如圖1中所示的電路中,次級側控制器2通過一路線路向初級側控制器1傳輸開關導通的指令信號,以及通過另一路線路向初級側控制器1傳輸開關斷開的指令信號。 In the prior art, the structure of a flyback converter applied in an AC/DC scenario is generally as shown in FIG. 1 , and a primary controller 1 (Primary Controller) is mainly responsible for controlling the turn-on and turn-off of the gate switch. The secondary side controller 2 (Secondary Controller) is mainly responsible for the calculation of the on-time TON and the sending of the on/off command. The primary side controller and the secondary side controller transmit signals through the isolator 3 (Isolator). In the circuit shown in FIG. 1 , the secondary-side controller 2 transmits a switch-on command signal to the primary-side controller 1 through one line, and transmits a switch-off command to the primary-side controller 1 through another line Signal.

基于上述工作過程,此類反激式轉換器的導通時間的控制方式存在明顯的缺陷:首先,由于所有的指令計算和發送均由次級側控制器2完成,次級側控制器2很難直接檢測到初級側的輸入電壓等相關信息,這會提升次級側控制器2的計算複雜度,並且次級側控制器2需要透過電阻連接至次級線圈來檢測初級側的輸入電壓等相關信息,但是這個電阻與次級側控制器2的引腳的寄生電容呈現RC時間延遲的效應,從而影響到系統中的同步整流器中的檢測信號的波形,進而使得同步整流器延遲導通,降低同步整流器的效率。美國專利US9577543B2公開了一種固定導通時間的隔離式轉換器,該轉換器采用次級側控制器來控制整個轉換器的開關導通時間,其中同樣存在有此類缺陷。 Based on the above working process, the control method of the on-time of such a flyback converter has obvious defects: First, since all command calculation and transmission are completed by the secondary-side controller 2, it is difficult for the secondary-side controller 2 to The input voltage and other related information on the primary side are directly detected, which will increase the computational complexity of the secondary side controller 2, and the secondary side controller 2 needs to be connected to the secondary coil through a resistor to detect the input voltage and other related information on the primary side. , but this resistance and the parasitic capacitance of the pin of the secondary-side controller 2 present the effect of RC time delay, which affects the waveform of the detection signal in the synchronous rectifier in the system, thereby delaying the conduction of the synchronous rectifier and reducing the synchronous rectifier. efficiency. US Patent US9577543B2 discloses an isolated converter with a fixed on-time, the converter uses a secondary-side controller to control the on-time of the switch of the entire converter, which also has such defects.

其次,由于次級側控制器2計算之後再將開關指令發送至初級側控制器1,這不可避免地會出現傳輸過程中的信號誤差,因此在此類反激式轉換器中 需要額外設置開關導通/斷開的消隱時間(Blanking Time)來排除傳輸錯誤導致的錯誤的開關指令,這使得此類反激式轉換器無法應用于高開關頻率的場景中。美國專利US9755529B2公開了一種反激式轉換器,該轉換器采用次級側控制器來控制整個轉換器的開關導通時間,其中同樣存在有此類缺陷。 Secondly, since the switching command is sent to the primary side controller 1 after the calculation by the secondary side controller 2, there will inevitably be signal errors in the transmission process, so in this type of flyback converter It is necessary to additionally set the blanking time (Blanking Time) of switch on/off to exclude wrong switching commands caused by transmission errors, which makes this type of flyback converter unsuitable for high switching frequency scenarios. US Patent US9755529B2 discloses a flyback converter, which uses a secondary side controller to control the switching on-time of the entire converter, which also has such defects.

根據現有技術中存在的上述問題,現提供一種固定導通時間的反激式轉換器及控制方法的技術方案,旨在采用初級側控制器實現導通時間的計算和控制過程,降低計算複雜度的同時不需要再設置開關導通/斷開的消隱時間,使得反激式轉換器能夠適用于高開關頻率的場景中。 According to the above problems existing in the prior art, a technical solution of a flyback converter with a fixed on-time and a control method is provided, which aims to use a primary-side controller to realize the calculation and control process of the on-time, so as to reduce the computational complexity while reducing the computational complexity. There is no need to set the switch on/off blanking time, making the flyback converter suitable for high switching frequency scenarios.

上述技術方案具體包括:一種固定導通時間的反激式轉換器,該反激式轉換器的變壓器初級側的初級線圈的一端連接該反激式轉換器的輸入端,另一端連接一柵極開關的汲極,該柵極開關的一柵極連接一初級側控制器,該柵極開關作為該反激式轉換器的開關;該反激式轉換器的變壓器次級側的次級線圈的一端經一二極管連接該反激式轉換器的輸出端,另一端連接一次級側的參考地電位,一次級側控制器耦合到該變壓器次級側並根據該反激式轉換器的輸出端的輸出產生一第一控制信號;該初級側控制器通過一隔離器與該次級側控制器連接;其中,該初級側控制器包括:接收單元,通過該隔離器與該次級側控制器連接,並通過該隔離器 接收該次級側控制器產生的該第一控制信號,該接收單元輸出該第一控制信號作為導通觸發信號;驅動單元,耦合接收該第一控制信號,並輸出一閘極控制信號控制該閘極開關導通;第一控制單元,接收該驅動單元輸出的該閘極控制信號,並在一固定導通時間後,輸出一第二控制信號耦合到該驅動單元,作為斷開出發信號,以觸發該驅動單元輸出一閘極控制信號控制該閘極開關斷開。 The above technical solution specifically includes: a fixed on-time flyback converter, one end of the primary coil on the primary side of the transformer of the flyback converter is connected to the input end of the flyback converter, and the other end is connected to a gate switch The drain of the gate switch, a gate of the gate switch is connected to a primary side controller, the gate switch is used as the switch of the flyback converter; one end of the secondary coil on the secondary side of the transformer of the flyback converter The output terminal of the flyback converter is connected through a diode, and the other terminal is connected to the reference ground potential of the primary side. The primary side controller is coupled to the secondary side of the transformer and generates according to the output of the output terminal of the flyback converter. a first control signal; the primary-side controller is connected to the secondary-side controller through an isolator; wherein the primary-side controller includes: a receiving unit, connected to the secondary-side controller through the isolator, and through the isolator Receive the first control signal generated by the secondary side controller, the receiving unit outputs the first control signal as a turn-on trigger signal; the driving unit is coupled to receive the first control signal, and outputs a gate control signal to control the gate The pole switch is turned on; the first control unit receives the gate control signal output by the drive unit, and after a fixed turn-on time, outputs a second control signal coupled to the drive unit as a disconnect start signal to trigger the The drive unit outputs a gate control signal to control the gate switch to be turned off.

優選的,該反激式轉換器,其中,該第一控制單元的第一輸入端連接一第一電壓端,該第一控制單元的第二輸入端連接該閘極開關的閘極,該第一控制單元根據該第一電壓端的第一電壓以及該閘極開關的閘極電壓處理得到該第二控制信號,該第一電壓端的第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關。 Preferably, in the flyback converter, the first input terminal of the first control unit is connected to a first voltage terminal, the second input terminal of the first control unit is connected to the gate of the gate switch, and the first input terminal of the first control unit is connected to the gate of the gate switch. A control unit processes and obtains the second control signal according to the first voltage of the first voltage terminal and the gate voltage of the gate switch, and the first voltage of the first voltage terminal is equal to the input voltage of the input terminal of the flyback converter. proportionally related.

優選的,該反激式轉換器,其中,該初級側控制器還包括一觸發器,該第一控制單元的輸出端連接該觸發器的置零端,該接收單元的輸出端連接該觸發器的置位端,該觸發器的輸出端通過該驅動單元連接至該閘極開關的閘極;當該接收單元向該觸發器的置位端輸出該第一控制信號時,該驅動單元驅動該閘極開關導通;以及當該第一控制單元向該觸發器的置零端輸出該第二控制信號時,該驅動單元驅動該閘極開關斷開;當該閘極開關導通時,該第一控制單元根據該第一電壓處理得到並輸出該第二控制信號;以及當該閘極開關斷開時,該第一控制單元不輸出該第二控制信號。 Preferably, in the flyback converter, the primary side controller further includes a trigger, the output end of the first control unit is connected to the zero-setting end of the trigger, and the output end of the receiving unit is connected to the trigger The setting terminal of the trigger, the output terminal of the trigger is connected to the gate of the gate switch through the driving unit; when the receiving unit outputs the first control signal to the setting terminal of the trigger, the driving unit drives the The gate switch is turned on; and when the first control unit outputs the second control signal to the zero-setting terminal of the flip-flop, the drive unit drives the gate switch to turn off; when the gate switch is turned on, the first The control unit processes and outputs the second control signal according to the first voltage; and when the gate switch is turned off, the first control unit does not output the second control signal.

優選的,該反激式轉換器,其中,該反激式轉換器工作于斷續模式下;該第一控制單元進一步包括:第一放大模組,該第一放大模組的輸入端連接該第一電壓端,該第一放大模組的輸出端通過一第一節點連接一第一比較器的正相輸入端,該第一放大模組用于將流經該第一放大模組的電流或電壓放大一第一預定倍數輸出;第一場效應管,該第一場效應管的閘極通過一反向器連接該閘極開關的閘極,該第一場效應管的汲極通過該第一節點連接該第一比較器的正相輸入端,該第一場效應管的源極接地;第一電容,該第一電容的一端通過該第一節點連接該第一比較器的正相輸入端,另一端接地;第一參考端,該第一參考端連接該第一比較器的反相輸入端,用于提供一第一參考電壓;該第一比較器的輸出端連接該第一控制單元的輸出端;當該第一比較器的正相輸入端的電壓值大于該第一參考電壓時,該第一比較器的輸出端輸出該第二控制信號。 Preferably, the flyback converter, wherein the flyback converter operates in discontinuous mode; the first control unit further comprises: a first amplifying module, the input end of the first amplifying module is connected to the a first voltage terminal, the output terminal of the first amplifying module is connected to a non-inverting input terminal of a first comparator through a first node, and the first amplifying module is used to convert the current flowing through the first amplifying module Or the voltage is amplified by a first predetermined multiple output; the first field effect transistor, the gate of the first field effect transistor is connected to the gate of the gate switch through an inverter, and the drain of the first field effect transistor passes through the The first node is connected to the non-inverting input terminal of the first comparator, and the source of the first field effect transistor is grounded; the first capacitor, one end of the first capacitor is connected to the non-inverting phase of the first comparator through the first node an input terminal, the other terminal is grounded; a first reference terminal, the first reference terminal is connected to the inverting input terminal of the first comparator for providing a first reference voltage; the output terminal of the first comparator is connected to the first reference terminal The output end of the control unit; when the voltage value of the non-inverting input end of the first comparator is greater than the first reference voltage, the output end of the first comparator outputs the second control signal.

優選的,該反激式轉換器,其中,該反激式轉換器工作于連續模式下;該第一控制單元進一步包括:第一放大模組,該第一放大模組的輸入端連接該第一電壓端,該第一放大模組的輸出端通過一第二節點連接一第一比較器的正相輸入端,該第一放大模組用于將流經該第一放大模組的電流或電壓放大一第一預定倍數輸出; 第一場效應管,該第一場效應管的閘極通過一反向器連接該閘極開關的閘極,該第一場效應管的汲極通過該第二節點連接該第一比較器的正相輸入端,該第一場效應管的源極接地;第一電容,該第一電容的一端通過該第二節點連接該第一比較器的正相輸入端,另一端接地;第一參考端,該第一參考端連接該第一比較器的反相輸入端,用于提供一第一參考電壓;參考模組,該參考模組的輸入端連接一設置有預定電壓值的設定電壓端,該參考模組的輸出端通過該第二節點連接該第一比較器的正相輸入端,該參考模組用于根據輸入至該參考模組的電壓進行放大處理後輸出;該第一比較器的輸出端連接該第一控制單元的輸出端;當該第一比較器的正相輸入端的電壓值大于該第一參考電壓時,該第一比較器的輸出端輸出該第二控制信號。 Preferably, in the flyback converter, the flyback converter operates in a continuous mode; the first control unit further comprises: a first amplifying module, the input end of the first amplifying module is connected to the first amplifying module a voltage terminal, the output terminal of the first amplifying module is connected to the non-inverting input terminal of a first comparator through a second node, and the first amplifying module is used to convert the current flowing through the first amplifying module or amplifying the voltage and outputting a first predetermined multiple; The first field effect transistor, the gate of the first field effect transistor is connected to the gate of the gate switch through an inverter, and the drain of the first field effect transistor is connected to the first comparator through the second node. a non-inverting input terminal, the source of the first field effect transistor is grounded; a first capacitor, one end of the first capacitor is connected to the non-inverting input terminal of the first comparator through the second node, and the other end is grounded; the first reference terminal, the first reference terminal is connected to the inverting input terminal of the first comparator for providing a first reference voltage; reference module, the input terminal of the reference module is connected to a set voltage terminal with a predetermined voltage value , the output end of the reference module is connected to the non-inverting input end of the first comparator through the second node, the reference module is used for amplifying the voltage input to the reference module and then output; the first comparison The output terminal of the comparator is connected to the output terminal of the first control unit; when the voltage value of the non-inverting input terminal of the first comparator is greater than the first reference voltage, the output terminal of the first comparator outputs the second control signal.

優選的,該反激式轉換器,其中,該設定電壓端包括一參考電阻和一設定電流端,分別連接至該參考模組的輸入端;該參考電阻具有一預定阻值,該設定電流端具有一預定的輸入電流;該參考模組包括:放大器,該放大器的輸入端作為該參考模組的輸入端,該放大器的輸出端通過該第二節點連接該第一比較器,該放大器用于按照一第二預定倍數對該設定電壓端輸出的電壓進行放大處理後輸出。 Preferably, in the flyback converter, the voltage setting terminal includes a reference resistor and a setting current terminal, which are respectively connected to the input terminal of the reference module; the reference resistor has a predetermined resistance value, and the setting current terminal There is a predetermined input current; the reference module includes: an amplifier, the input end of the amplifier is used as the input end of the reference module, the output end of the amplifier is connected to the first comparator through the second node, and the amplifier is used for The voltage output from the set voltage terminal is amplified according to a second predetermined multiple and then output.

優選的,該反激式轉換器,其中,該設定電壓端包括一參考電阻和一設定電流端,分別連接至該參考模組的輸入端; 在該設定電流端和該參考模組的輸入端之間設置一開關,該開關初始處于閉合導通狀態,當設置好該設定電流端的輸入電流後,斷開該開關;該參考模組進一步包括:數位類比轉換器,該數位類比轉換器的輸入端作為該參考模組的輸入端,在斷開該開關後,該數位類比轉換器用于鎖住該設定電流端傳遞的輸入電壓;放大器,該放大器的輸入端連接該數位類比轉換器的輸出端,該放大器的輸出端通過該第二節點連接該第一比較器,該放大器用于按照一第二預定倍數對該設定電壓端輸出的電壓進行放大處理後輸出。 Preferably, in the flyback converter, the voltage setting terminal includes a reference resistor and a current setting terminal, which are respectively connected to the input terminal of the reference module; A switch is set between the set current terminal and the input terminal of the reference module, and the switch is initially in a closed conduction state. When the input current of the set current terminal is set, the switch is turned off; the reference module further includes: A digital-to-analog converter, the input terminal of the digital-to-analog converter is used as the input terminal of the reference module, after the switch is turned off, the digital-to-analog converter is used to lock the input voltage transmitted by the set current terminal; Amplifier, the amplifier The input end of the amplifier is connected to the output end of the digital-to-analog converter, the output end of the amplifier is connected to the first comparator through the second node, and the amplifier is used to amplify the voltage output by the set voltage end according to a second predetermined multiple output after processing.

優選的,該反激式轉換器,其中,該第一電壓端通過一第一電阻連接一輔助線圈,該輔助線圈與該初級線圈具有一預定的匝數比,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關。 Preferably, in the flyback converter, the first voltage terminal is connected to an auxiliary coil through a first resistor, and the auxiliary coil and the primary coil have a predetermined turns ratio, so that the first voltage and the primary coil have a predetermined turns ratio. The input voltage at the input of the flyback converter is proportionally related.

優選的,該反激式轉換器,其中,該第一電壓端和該第一電阻之間具有一連接節點;該反激式轉換器還包括一第二電阻,該第二電阻連接在該連接節點與接地端之間。 Preferably, in the flyback converter, there is a connection node between the first voltage terminal and the first resistor; the flyback converter further includes a second resistor connected to the connection between the node and ground.

優選的,該反激式轉換器,其中,該第一電壓端通過一第一電阻接入該反激式轉換器的輸入端,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關;該第一電壓端和該第一電阻之間具有一連接節點;該反激式轉換器還包括一第二電阻,該第二電阻連接在該連接節點與接地端之間。 Preferably, in the flyback converter, the first voltage terminal is connected to the input terminal of the flyback converter through a first resistor, so that the first voltage and the input terminal of the flyback converter are The input voltage is proportionally related; there is a connection node between the first voltage terminal and the first resistor; the flyback converter further includes a second resistor, the second resistor is connected between the connection node and the ground terminal .

優選的,該反激式轉換器,其中,該反激式轉換器能夠工作于斷續模式下,也能夠工作于連續模式下;則該第一控制單元進一步包括:第一控制模組,該第一控制模組的輸入端連接該第一電壓端;第二控制模組,該第二控制模組的輸入端連接該第一電壓端;判斷模組,該判斷模組的兩個輸入端分別連接該第一控制模組的輸出端以及該第二控制模組的輸出端,該判斷模組的輸出端作為該第一控制單元的輸出端;當該第一控制模組或者該第二控制模組輸出一預定信號時,該判斷模組輸出該第二控制信號。 Preferably, in the flyback converter, wherein the flyback converter can work in discontinuous mode and can also work in continuous mode; then the first control unit further comprises: a first control module, the The input end of the first control module is connected to the first voltage end; the second control module, the input end of the second control module is connected to the first voltage end; the judgment module, the two input ends of the judgment module The output end of the first control module and the output end of the second control module are respectively connected, and the output end of the judgment module is used as the output end of the first control unit; when the first control module or the second control module When the control module outputs a predetermined signal, the judgment module outputs the second control signal.

優選的,該反激式轉換器,其中,該第一控制模組包括:第一放大模組,該第一放大模組的輸入端連接該第一電壓端,該第一放大模組的輸出端通過一第一節點連接一第一比較器的正相輸入端,該第一放大模組用于將流經該第一放大模組的電流或電壓放大一第一預定倍數輸出;第一場效應管,該第一場效應管的閘極通過一反向器連接該閘極開關的閘極,該第一場效應管的汲極通過該第一節點連接該第一比較器的正相輸入端,該第一場效應管的源極接地;第一電容,該第一電容的一端通過該第一節點連接該第一比較器的正相輸入端,另一端接地;第一參考端,該第一參考端連接該第一比較器的反相輸入端,用于提供一第一參考電壓;該第一比較器的輸出端連接該判斷模組的輸入端; 當該第一比較器的正相輸入端的電壓值大于該第一參考電壓時,該第一比較器的輸出端輸出該預定信號。 Preferably, in the flyback converter, the first control module includes: a first amplification module, the input end of the first amplification module is connected to the first voltage end, and the output of the first amplification module The terminal is connected to the non-inverting input terminal of a first comparator through a first node, and the first amplifying module is used to amplify the current or voltage flowing through the first amplifying module by a first predetermined multiple and output; the first field effect transistor, the gate of the first FET is connected to the gate of the gate switch through an inverter, and the drain of the first FET is connected to the non-inverting input of the first comparator through the first node terminal, the source of the first FET is grounded; a first capacitor, one end of the first capacitor is connected to the non-inverting input terminal of the first comparator through the first node, and the other terminal is grounded; the first reference terminal, the The first reference terminal is connected to the inverting input terminal of the first comparator for providing a first reference voltage; the output terminal of the first comparator is connected to the input terminal of the judging module; When the voltage value of the non-inverting input terminal of the first comparator is greater than the first reference voltage, the output terminal of the first comparator outputs the predetermined signal.

優選的,該反激式轉換器,其中,該第二控制模組包括:第二放大模組,該第二放大模組的輸入端連接該第一電壓端,該第二放大模組的輸出端通過一第二節點連接一第二比較器的正相輸入端,該第二放大模組用于將流經該第二放大模組的電流或電壓放大一第三預定倍數輸出;第二場效應管,該第二場效應管的閘極通過一反向器連接該閘極開關的閘極,該第二場效應管的汲極通過該第二節點連接該第二比較器的正相輸入端,該第二場效應管的源極接地;第二電容,該第二電容的一端通過該第二節點連接該第二比較器的正相輸入端,另一端接地;第二參考端,該第二參考端連接該第二比較器的反相輸入端,用于提供一第二參考電壓;參考模組,該參考模組的輸入端連接一設置有預定電壓值的設定電壓端,該參考模組的輸出端通過該第二節點連接該第二比較器的正相輸入端,該參考模組用于根據輸入至該參考模組的電壓進行放大處理後輸出;該第二比較器的輸出端連接該判斷模組的輸入端;當該第二比較器的正相輸入端的電壓值大于該第二參考電壓時,該第二比較器的輸出端輸出該預定信號。 Preferably, in the flyback converter, the second control module includes: a second amplification module, the input end of the second amplification module is connected to the first voltage end, and the output of the second amplification module The terminal is connected to the non-inverting input terminal of a second comparator through a second node, and the second amplifying module is used to amplify the current or voltage flowing through the second amplifying module by a third predetermined multiple and output; the second field effect transistor, the gate of the second FET is connected to the gate of the gate switch through an inverter, and the drain of the second FET is connected to the non-inverting input of the second comparator through the second node terminal, the source of the second FET is grounded; the second capacitor, one end of the second capacitor is connected to the non-inverting input terminal of the second comparator through the second node, and the other end is grounded; the second reference terminal, the The second reference terminal is connected to the inverting input terminal of the second comparator for providing a second reference voltage; the reference module, the input terminal of the reference module is connected to a set voltage terminal with a predetermined voltage value, the reference The output end of the module is connected to the non-inverting input end of the second comparator through the second node, and the reference module is used for amplifying and outputting the voltage input to the reference module; the output of the second comparator The terminal is connected to the input terminal of the judging module; when the voltage value of the non-inverting input terminal of the second comparator is greater than the second reference voltage, the output terminal of the second comparator outputs the predetermined signal.

優選的,該反激式轉換器,其中,該設定電壓端包括一參考電阻和一設定電流端,分別連接至該參考模組的輸入端;該參考電阻具有一預定阻值,該設定電流端具有一預定的輸入電流; 該參考模組包括:放大器,該放大器的輸入端作為該參考模組的輸入端,該放大器的輸出端通過該第二節點連接該第二比較器,該放大器用于按照一第二預定倍數對該設定電壓端輸出的電壓進行放大處理後輸出。 Preferably, in the flyback converter, the voltage setting terminal includes a reference resistor and a setting current terminal, which are respectively connected to the input terminal of the reference module; the reference resistor has a predetermined resistance value, and the setting current terminal has a predetermined input current; The reference module includes: an amplifier, the input end of the amplifier is used as the input end of the reference module, the output end of the amplifier is connected to the second comparator through the second node, and the amplifier is used for pairing according to a second predetermined multiple The voltage output from the set voltage terminal is amplified and output.

優選的,該反激式轉換器,其中,該設定電壓端包括一參考電阻和一設定電流端,分別連接至該參考模組的輸入端;在該設定電流端和該參考模組的輸入端之間設置一開關,該開關初始處于閉合導通狀態,當設置好該設定電流端的輸入電流後,斷開該開關;該參考模組進一步包括:數位類比轉換器,該數位類比轉換器的輸入端作為該參考模組的輸入端,在斷開該開關後,該數位類比轉換器用于鎖住該設定電流端傳遞的輸入電壓;放大器,該放大器的輸入端連接該數位類比轉換器的輸出端,該放大器的輸出端通過該第二節點連接該第二比較器,該放大器用于按照一第二預定倍數對該設定電壓端輸出的電壓進行放大處理後輸出。 Preferably, in the flyback converter, the voltage setting terminal includes a reference resistor and a setting current terminal, which are respectively connected to the input terminal of the reference module; the setting current terminal and the input terminal of the reference module A switch is set between them, and the switch is initially in a closed conduction state. When the input current of the set current terminal is set, the switch is turned off; the reference module further includes: a digital-to-analog converter, an input terminal of the digital-to-analog converter As the input terminal of the reference module, after the switch is turned off, the digital-to-analog converter is used to lock the input voltage transmitted by the set current terminal; the amplifier, the input terminal of the amplifier is connected to the output terminal of the digital-to-analog converter, The output end of the amplifier is connected to the second comparator through the second node, and the amplifier is used for amplifying the voltage output by the set voltage end according to a second predetermined multiple and then outputting the output.

優選的,該反激式轉換器,其中,該第一電壓端通過一第一電阻連接一輔助線圈,該輔助線圈與該初級線圈具有一預定的匝數比,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關;該第一電壓端還通過一第三電阻連接一輔助線圈,該輔助線圈與該初級線圈具有一預定的匝數比,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關。 Preferably, in the flyback converter, the first voltage terminal is connected to an auxiliary coil through a first resistor, and the auxiliary coil and the primary coil have a predetermined turns ratio, so that the first voltage and the primary coil have a predetermined turns ratio. The input voltage of the input terminal of the flyback converter is proportionally related; the first voltage terminal is also connected to an auxiliary coil through a third resistor, and the auxiliary coil and the primary coil have a predetermined turns ratio, so that the first voltage The voltage is proportional to the input voltage at the input of the flyback converter.

優選的,該反激式轉換器,其中,該第一電壓端和該第一電阻之間 具有一第一連接節點;該反激式轉換器還包括一第二電阻,該第二電阻連接在該第一連接節點與接地端之間;該第一電壓端和該第三電阻之間具有一第二連接節點;該反激式轉換器還包括一第四電阻,該第四電阻連接在該第二連接節點與接地端之間。 Preferably, in the flyback converter, between the first voltage terminal and the first resistor has a first connection node; the flyback converter also includes a second resistor, the second resistor is connected between the first connection node and the ground terminal; there is a connection between the first voltage terminal and the third resistor a second connection node; the flyback converter further includes a fourth resistor connected between the second connection node and the ground terminal.

優選的,該反激式轉換器,其中,該第一電壓端通過一第一電阻接入該反激式轉換器的輸入端,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關;該第一電壓端和該第一電阻之間具有一第一連接節點;該反激式轉換器還包括一第二電阻,該第二電阻連接在該第一連接節點與接地端之間;該第一電壓端還通過一第三電阻接入該反激式轉換器的輸入端,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關;該第一電壓端和該第三電阻之間具有一第二連接節點;該反激式轉換器還包括一第四電阻,該第四電阻連接在該第二連接節點與接地端之間。 Preferably, in the flyback converter, the first voltage terminal is connected to the input terminal of the flyback converter through a first resistor, so that the first voltage and the input terminal of the flyback converter are The input voltage is proportionally related; there is a first connection node between the first voltage terminal and the first resistor; the flyback converter further includes a second resistor, the second resistor is connected between the first connection node and the between the ground terminals; the first voltage terminal is also connected to the input terminal of the flyback converter through a third resistor, so that the first voltage is proportional to the input voltage of the input terminal of the flyback converter; There is a second connection node between the first voltage terminal and the third resistor; the flyback converter further includes a fourth resistor connected between the second connection node and the ground terminal.

優選的,該反激式轉換器,其中,該次級側控制器進一步包括:第二控制單元,該第二控制單元的第一輸入端用于檢測該次級線圈的輸出電壓,該第二控制單元的第二輸入端用于檢測該次級線圈的輸出電流,該第二控制單元用于根據該次級線圈的輸出電壓和輸出電流處理得到該第一控制信號並輸出; 傳輸單元,該傳輸單元的輸入端連接該第二控制單元的輸出端,該傳輸單元的輸出端連接該隔離器,該傳輸單元用于將該第二控制單元輸出的該第一控制信號通過該隔離器發送至該初級側控制器中的該接收單元。 Preferably, in the flyback converter, the secondary side controller further comprises: a second control unit, the first input end of the second control unit is used to detect the output voltage of the secondary coil, the second control unit The second input end of the control unit is used to detect the output current of the secondary coil, and the second control unit is used to process and output the first control signal according to the output voltage and output current of the secondary coil; a transmission unit, the input end of the transmission unit is connected to the output end of the second control unit, the output end of the transmission unit is connected to the isolator, the transmission unit is used for the first control signal output by the second control unit to pass through the The isolator sends to the receiving unit in the primary side controller.

一種反激式轉換器的固定導通時間的控制方法,其中,應用于上述的反激式轉換器;該控制方法包括:該次級側控制器檢測次級線圈的輸出回路並產生一第一控制信號,該次級側控制器通過該隔離器將該第一控制信號發送至該接收單元,該接收單元將該第一控制信號發送至該觸發器的置位端,該驅動單元根據該觸發器輸出的信號驅動該閘極開關導通;當該閘極開關被導通後,該第一控制單元根據該第一電壓端的第一電壓以及該閘極開關的閘極電壓處理得到該第二控制信號並發送至該觸發器的置零端,該驅動單元根據該觸發器輸出的信號驅動該閘極開關斷開;該控制方法循環執行,從而以固定導通時間來控制該反激式轉換器的運行狀態。 A control method for a fixed on-time of a flyback converter, which is applied to the above flyback converter; the control method comprises: the secondary side controller detects the output loop of the secondary coil and generates a first control signal, the secondary-side controller sends the first control signal to the receiving unit through the isolator, the receiving unit sends the first control signal to the set terminal of the flip-flop, the driving unit according to the flip-flop The output signal drives the gate switch to be turned on; when the gate switch is turned on, the first control unit obtains the second control signal according to the first voltage of the first voltage terminal and the gate voltage of the gate switch It is sent to the zero-setting terminal of the flip-flop, and the driving unit drives the gate switch to turn off according to the signal output by the flip-flop; the control method is executed cyclically, so as to control the operating state of the flyback converter with a fixed on-time .

上述技術方案的有益效果為: The beneficial effects of the above technical solutions are:

1)采用初級側控制器執行反激式轉換器的導通時間的計算和控制過程,便于獲取輸入電壓等相關信息,降低了計算複雜度,減少了初級側控制器和次級側控制器之間的傳輸線路連接,也不會影響到系統中的同步整流器的檢測。 1) The primary-side controller is used to perform the calculation and control process of the on-time of the flyback converter, which is convenient to obtain relevant information such as input voltage, reduces the computational complexity, and reduces the amount of time between the primary-side controller and the secondary-side controller. The transmission line connection will not affect the detection of the synchronous rectifier in the system.

2)采用初級側控制器執行反激式轉換器的導通時間的計算和控制過程,不需要擔心傳輸錯誤導致的錯誤的開關指令的問題,因此不需要在系統中 設置開關導通/斷開的消隱時間,使得反激式轉換器能夠適用于高開關頻率的場景中。 2) The primary side controller is used to perform the calculation and control process of the on-time of the flyback converter, and there is no need to worry about the problem of wrong switching commands caused by transmission errors, so there is no need to use the system in the system. Setting the switch on/off blanking time makes the flyback converter suitable for high switching frequency scenarios.

1:初級側控制器1 1: Primary side controller 1

2:次級側控制器 2: Secondary side controller

3:隔離器 3: Isolator

A1:控制單元 A1: Control unit

A2:接收單元 A2: Receiving unit

A3:驅動單元 A3: Drive unit

A4:觸發器 A4: Trigger

B1:第二控制單元 B1: Second control unit

B2:傳輸單元 B2: Transmission unit

FB:第一輸入端 FB: the first input terminal

CSP:第二輸入端 CSP: the second input

A:初級側控制器 A: Primary side controller

B:次級側控制器 B: Secondary side controller

C:輸出端連接隔離器 C: The output terminal is connected to the isolator

E:判斷模組 E: Judgment module

P:初級線圈 P: Primary coil

S:次級線圈 S: Secondary coil

AUX:輔助線圈 AUX: auxiliary coil

D1:第一節點 D1: The first node

D2:第二節點 D2: second node

COM1:第一比較器 COM1: first comparator

COM2:第二比較器 COM2: Second comparator

Mirror 1:第一放大模組 Mirror 1: The first amplification module

C1:第一電容 C1: first capacitor

C2:第二電容 C2: second capacitor

R1:第一電阻 R1: first resistor

R2:第二電阻 R2: Second resistor

R3:第三電阻 R3: the third resistor

R4:第四電阻 R4: Fourth resistor

Ref1:第一參考端 Ref1: The first reference terminal

Ref2:設定電流端 Ref2: set current terminal

Ref3:第二參考端 Ref3: The second reference terminal

RSET:參考電阻 R SET : Reference resistance

VAUX:第一電壓 V AUX : first voltage

VIN:輸入電壓 V IN : Input voltage

VDD:外部電壓 VDD: External voltage

IDMAG:去磁電流 I DMAG : Demagnetization current

TON_END:第二控制信號 TON_END: The second control signal

gm:放大器 gm: amplifier

VRSET:輸入電壓 V RSET : Input voltage

ISET:輸入電流 I SET : Input current

VREF_ON2:第一參考電壓 V REF_ON2 : the first reference voltage

DAC:數位類比轉換器 DAC: Digital to Analog Converter

Converter 1:第一放大模組 Converter 1: The first amplification module

Converter 2:第二放大模組 Converter 2: The second amplification module

Q1:第一場效應管 Q1: The first FET

Q2:第二場效應管 Q2: Second FET

S1:開關 S1: switch

GATE:閘極控制信號 GATE: gate control signal

圖1是現有技術中的反激式轉換器的電路示意圖;圖2是本發明中的反激式轉換器的總體電路框圖;圖3-4是本發明的實施例一中,反激式轉換器的電路示意圖;圖5-6是本發明的實施例二中,反激式轉換器的電路示意圖;圖7是本發明的實施例三中,反激式轉換器的電路示意圖;圖8-9是本發明的實施例四中,反激式轉換器的電路示意圖;圖10是本發明的實施例五中,反激式轉換器的電路示意圖;圖11是本發明的實施例六中,反激式轉換器的電路示意圖;圖12-13是本發明的實施例七中,反激式轉換器的電路示意圖;圖14是本發明的實施例八中,反激式轉換器的電路示意圖;圖15-16是本發明的實施例九中,反激式轉換器的電路示意圖;圖17是本發明的實施例十中,反激式轉換器的電路示意圖;圖18是本發明的實施例十一中,反激式轉換器的控制方法的示意圖。 1 is a schematic circuit diagram of a flyback converter in the prior art; FIG. 2 is an overall circuit block diagram of a flyback converter in the present invention; Schematic circuit diagram of the converter; Figures 5-6 are schematic circuit diagrams of a flyback converter in Embodiment 2 of the present invention; Figure 7 is a schematic circuit diagram of a flyback converter in Embodiment 3 of the present invention; Figure 8 -9 is the circuit diagram of the flyback converter in the fourth embodiment of the present invention; FIG. 10 is the circuit diagram of the flyback converter in the fifth embodiment of the present invention; FIG. 11 is the sixth embodiment of the present invention. , a schematic circuit diagram of a flyback converter; Figures 12-13 are schematic circuit diagrams of a flyback converter in Embodiment 7 of the present invention; Figure 14 is a circuit diagram of a flyback converter in Embodiment 8 of the present invention Schematic diagram; Figures 15-16 are schematic circuit diagrams of a flyback converter in Embodiment 9 of the present invention; Figure 17 is a schematic circuit diagram of a flyback converter in Embodiment 10 of the present invention; In the eleventh embodiment, a schematic diagram of a control method of a flyback converter.

下面將結合本發明實施例中的附圖,對本發明實施例中的技術方案進行清楚、完整地描述,顯然,所描述的實施例僅僅是本發明一部分實施例, 而不是全部的實施例。基于本發明中的實施例,本領域普通技術人員在沒有作出創造性勞動的前提下所獲得的所有其他實施例,都屬於本發明保護的範圍。 The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention. not all examples. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present invention.

需要說明的是,在不衝突的情況下,本發明中的實施例及實施例中的特徵可以相互組合。 It should be noted that the embodiments of the present invention and the features of the embodiments may be combined with each other under the condition of no conflict.

下面結合附圖和具體實施例對本發明作進一步說明,但不作為本發明的限定。 The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but it is not intended to limit the present invention.

本發明中,基于現有技術中存在的上述問題,現提供一種固定導通時間的反激式轉換器,該反激式轉換器的大體電路框架如圖2中所示,該反激式轉換器的變壓器初級側的初級線圈P的一端連接反激式轉換器的輸入端VIN,另一端通過一閘極開關G接地。閘極開關的一閘極連接一初級側控制器A的輸出端,接收初級側控制器A輸出的閘極控制信號(GATE),控制閘極開關G作為該反激式轉換器開關的導通和斷開。反激式轉換器的變壓器次級側的次級線圈S的一端直接或經一二極管連接反激式轉換器的輸出端VO,另一端連接一次級側參考地電位。一次級側控制器B藕合到次級側以獲取該反激式轉換器的輸出信息,並產生一第一控制信號。其中初級側控制器A包括第一控制單元A1,接收單元A2和驅動單元A3。接收單元A2的一輸入端通過一隔離器C與次級側控制器B連接,並通過隔離器C接收次級側控制器B發送的第一控制信號;接收單元A2的一輸出端輸出第一控制信號並藕合到驅動單元A3,作為導通觸發信號(Trigger-on)以觸發驅動單元A3輸出閘極控制信號控制閘極開關G導通。初級側控制器A的第一控制單元A1同時接收驅動單元A3輸出的閘極導通信號,並在一固定導通時間TON之後,輸出一第二控制信號並藕合到驅動單元A3,作為斷開觸發信號(Trigger-off),以觸發驅動單元A3輸出閘極控制信號控制閘極開關G斷開。 In the present invention, based on the above problems existing in the prior art, a flyback converter with a fixed on-time is provided. The general circuit frame of the flyback converter is shown in FIG. 2 . One end of the primary coil P on the primary side of the transformer is connected to the input end V IN of the flyback converter, and the other end is grounded through a gate switch G. A gate of the gate switch is connected to the output terminal of a primary side controller A, receives the gate control signal (GATE) output by the primary side controller A, and controls the gate switch G as the on-and-off of the flyback converter switch. disconnect. One end of the secondary coil S on the secondary side of the transformer of the flyback converter is directly or via a diode connected to the output end VO of the flyback converter, and the other end is connected to the reference ground potential of the primary side. The primary side controller B is coupled to the secondary side to obtain the output information of the flyback converter and generate a first control signal. The primary side controller A includes a first control unit A1, a receiving unit A2 and a driving unit A3. An input end of the receiving unit A2 is connected to the secondary side controller B through an isolator C, and receives the first control signal sent by the secondary side controller B through the isolator C; an output end of the receiving unit A2 outputs the first control signal. The control signal is coupled to the drive unit A3 as a trigger-on signal (Trigger-on) to trigger the drive unit A3 to output a gate control signal to control the gate switch G to be turned on. The first control unit A1 of the primary side controller A simultaneously receives the gate turn-on signal output by the drive unit A3, and after a fixed turn-on time T ON , outputs a second control signal and is coupled to the drive unit A3 as an off-state signal. Turn on the trigger signal (Trigger-off) to trigger the drive unit A3 to output the gate control signal to control the gate switch G to be turned off.

進一步地,如圖3、5、9、12和15中所示,該初級側控制器A包括:第一控制單元A1,第一控制單元A1的第一輸入端連接一第一電壓端,第一控制單元A1的第二輸入端連接閘極開關G的閘極控制信號GATE,第一控制單元A1的輸出端連接一觸發器A4的置零端R。基于上述連接關係,第一控制單元A1根據第一電壓端輸入的第一電壓以及閘極開關的閘極電壓處理得到一第二控制信號並輸出至觸發器A4的置零端R,第一電壓端的第一電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關;接收單元A2,接收單元A2連接在隔離器C與觸發器A4的置位端S之間,用于將第一控制信號輸出至觸發器A4的置位端S;觸發器A4的輸出端Q通過一驅動單元A3連接至閘極開關G的閘極;當接收單元A2向觸發器A4的置位端S輸出第一控制信號時,驅動單元A3驅動閘極開關G導通,從而驅動反激式轉換器進入開關閉合導通階段;以及當第一控制單元A1向觸發器A4的置零端R輸出第二控制信號時,驅動單元A3驅動閘極開關G斷開,從而驅動反激式轉換器進入開關斷開階段;並且:當閘極開關G導通時,第一控制單元A1根據第一電壓處理得到並輸出第二控制信號;以及當閘極開關G斷開時,第一控制單元A1不輸出第二控制信號。 Further, as shown in FIGS. 3 , 5 , 9 , 12 and 15 , the primary side controller A includes: a first control unit A1 , the first input terminal of the first control unit A1 is connected to a first voltage terminal, the first control unit A1 The second input terminal of a control unit A1 is connected to the gate control signal GATE of the gate switch G, and the output terminal of the first control unit A1 is connected to the zero-setting terminal R of a flip-flop A4. Based on the above connection relationship, the first control unit A1 processes the first voltage input from the first voltage terminal and the gate voltage of the gate switch to obtain a second control signal and outputs it to the zero-setting terminal R of the flip-flop A4. The first voltage The first voltage of the terminal is proportional to the input voltage V IN of the input terminal of the flyback converter; the receiving unit A2, the receiving unit A2 is connected between the isolator C and the set terminal S of the flip-flop A4, for connecting the first The control signal is output to the set terminal S of the flip-flop A4; the output terminal Q of the flip-flop A4 is connected to the gate of the gate switch G through a driving unit A3; when the receiving unit A2 outputs the first output to the set terminal S of the flip-flop A4 When a control signal is applied, the driving unit A3 drives the gate switch G to conduct, thereby driving the flyback converter to enter the switch-on state; and when the first control unit A1 outputs the second control signal to the zero-setting terminal R of the flip-flop A4 , the driving unit A3 drives the gate switch G to be turned off, thereby driving the flyback converter to enter the switch-off stage; and: when the gate switch G is turned on, the first control unit A1 obtains and outputs the second voltage according to the first voltage processing. control signal; and when the gate switch G is turned off, the first control unit A1 does not output the second control signal.

具體地,基于上述描述,本發明中的反激式轉換器的工作原理為:當反激式轉換器處于開關閉合導通階段時,初級線圈P被直接連接在輸入電壓上的回路中,初級線圈P中的電流和變壓器磁芯中的磁場增加,在磁芯 中儲存能量。此時在次級線圈S中產生的電壓是反向的,因此使得次級線圈S側的二極管處于反偏狀態而不能導通。此時,由次級線圈S側的電容向負載提供電壓和電流。 Specifically, based on the above description, the working principle of the flyback converter in the present invention is as follows: when the flyback converter is in the switch-on phase, the primary coil P is directly connected to the loop of the input voltage, and the primary coil The current in P and the magnetic field in the transformer core increase, in the core store energy. At this time, the voltage generated in the secondary coil S is reversed, so that the diode on the side of the secondary coil S is in a reverse biased state and cannot be turned on. At this time, the voltage and current are supplied to the load from the capacitor on the S side of the secondary coil.

此時,第一控制單元A1能夠獲得來自第一電壓端的第一電壓以及來自閘極開關G的閘極電壓,因此可以通過電路進行一段時間TON的處理後輸出第二控制信號(高電平信號)至觸發器A4的置零端R,使得觸發器A4的輸出端Q輸出一低電平信號,經由驅動單元A3控制閘極開關G的閘極電壓拉低,從而使得閘極開關G被斷開,由此進入反激式轉換器的開關斷開階段。 At this time, the first control unit A1 can obtain the first voltage from the first voltage terminal and the gate voltage from the gate switch G, so it can output the second control signal (high level after a period of time T ON processing through the circuit) signal) to the zero-setting terminal R of the flip-flop A4, so that the output terminal Q of the flip-flop A4 outputs a low-level signal, and the gate voltage of the gate switch G is controlled to be pulled down through the driving unit A3, so that the gate switch G is off, thus entering the switch off phase of the flyback converter.

當反激式轉換器處于開關斷開階段時,流經閘極開關G的電流為0,同時磁芯中的磁場開始下降。此時在次級線圈S上感應出正向電壓,次級線圈S側的二極管處于正偏狀態而被導通,導通的電流流入次級線圈S側的電容和負載中,也就是磁芯中存儲的能量被轉移至電容和負載中。 When the flyback converter is in the switch-off phase, the current flowing through the gate switch G is zero and the magnetic field in the core starts to drop. At this time, a forward voltage is induced on the secondary coil S, the diode on the secondary coil S side is in a forward biased state and is turned on, and the conductive current flows into the capacitor and the load on the secondary coil S side, that is, the storage in the magnetic core. The energy is transferred to the capacitor and the load.

此時,第一控制單元A1無法獲得來自第一電壓端的第一電壓以及來自閘極開關G的閘極電壓,因此不會做電路處理。而由于次級線圈S側的二極管被導通,次級側控制器B能夠接收信號並通過隔離器C發送至初級側控制器A中的接收單元A2,該接收單元A2相應輸出第一控制信號(高電平信號)至觸發器A4的置位端S,使得觸發器A4的輸出端Q輸出一高電平信號,經由驅動單元A3控制閘極開關G的閘極電壓拉高,從而使得閘極開關G被導通,由此進入反激式轉換器的開關閉合導通階段。 At this time, the first control unit A1 cannot obtain the first voltage from the first voltage terminal and the gate voltage from the gate switch G, so no circuit processing is performed. And because the diode on the secondary coil S side is turned on, the secondary side controller B can receive the signal and send it to the receiving unit A2 in the primary side controller A through the isolator C, and the receiving unit A2 outputs the first control signal ( high-level signal) to the set terminal S of the flip-flop A4, so that the output terminal Q of the flip-flop A4 outputs a high-level signal, and the gate voltage of the gate switch G is controlled by the driving unit A3 to be pulled up, thereby making the gate The switch G is turned on, thereby entering the switch-on turn-on phase of the flyback converter.

上述兩個階段循環往復,從而構成本發明中反激式轉換器的工作過程。 The above-mentioned two stages are cycled and repeated, thereby constituting the working process of the flyback converter in the present invention.

本發明技術方案中,由于采用初級側的控制器來實現閘極開關的導 通時間計算和控制,初級側的輸入電壓等相關信息較容易被獲取,因此使得計算複雜度大大降低,不會對系統中的同步整流器的檢測造成影響。並且,將導通時間的計算過程放在初級側,避免了次級側計算並向初級側傳輸指令的過程,次級側控制器只需要向初級側控制器傳輸開關導通時的信號即可。這樣既節省了一個傳輸線路,又避免了傳輸誤差,不需要在系統中設置開關導通/斷開的消隱時間,從而使得本發明中的反激式轉換器能夠適用在高開關頻率的場景中,擴展了反激式轉換器的適用範圍。 In the technical solution of the present invention, since the controller on the primary side is used to realize the conduction of the gate switch Through time calculation and control, relevant information such as the input voltage of the primary side can be easily obtained, so the computational complexity is greatly reduced, and the detection of the synchronous rectifier in the system will not be affected. In addition, the calculation process of the on-time is placed on the primary side, avoiding the process of calculating and transmitting instructions on the secondary side to the primary side. The secondary side controller only needs to transmit the signal when the switch is on to the primary side controller. This not only saves a transmission line, but also avoids transmission errors, and does not need to set the blanking time of the switch on/off in the system, so that the flyback converter in the present invention can be applied to the scene of high switching frequency , extending the applicable range of the flyback converter.

下文中詳細描述本發明技術方案中的反激式轉換器的幾個具體實現方式。 Several specific implementations of the flyback converter in the technical solution of the present invention are described in detail below.

實施例一: Example 1:

本實施例中,如圖3中所示,反激式轉換器工作于斷續模式(Discontinuous Conduction Mode,DCM)下;則如圖4中所示,第一控制單元A1進一步包括:第一放大模組,第一放大模組的輸入端連接第一電壓端,第一放大模組的輸出端通過一第一節點D1連接一第一比較器COM1的正相輸入端,第一放大模組Mirror1用于將流經第一放大模組Mirror1的電流放大一第一預定倍數K後再輸出。 In this embodiment, as shown in FIG. 3 , the flyback converter operates in a discontinuous conduction mode (Discontinuous Conduction Mode, DCM); then as shown in FIG. 4 , the first control unit A1 further includes: a first amplifier module, the input end of the first amplifying module is connected to the first voltage end, the output end of the first amplifying module is connected to the non-inverting input end of a first comparator COM1 through a first node D1, the first amplifying module Mirror1 It is used to amplify the current flowing through the first amplifying module Mirror1 by a first predetermined multiple K before outputting.

第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關的閘極,第一場效應管Q1的汲極通過第一節點D1連接第一比較器COM1的正相輸入端,第一場效應管Q1的源極接地;第一電容C1,第一電容C1的一端通過第一節點D1連接第一比較器COM1的正相輸入端,另一端接地; 第一參考端Ref1,第一參考端Ref1連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓;第一比較器COM1的輸出端連接第一控制單元A1的輸出端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓時,第一比較器的輸出端輸出第二控制信號。 The first field effect transistor Q1, the gate of the first field effect transistor Q1 is connected to the gate of the gate switch through an inverter, and the drain electrode of the first field effect transistor Q1 is connected to the first comparator COM1 through the first node D1. The non-inverting input terminal, the source of the first field effect transistor Q1 is grounded; the first capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input terminal of the first comparator COM1 through the first node D1, and the other end is grounded; the first reference terminal Ref1, the first reference terminal Ref1 is connected to the inverting input terminal of the first comparator COM1 for providing a first reference voltage; the output terminal of the first comparator COM1 is connected to the output terminal of the first control unit A1; When the voltage value of the non-inverting input terminal of the first comparator COM1 is greater than the first reference voltage, the output terminal of the first comparator outputs the second control signal.

本實施例中,第一電壓端通過一第一電阻R1連接一輔助線圈AUX,輔助線圈AUX與初級線圈P之間具有一預定的匝數比,以使第一電壓VAUX與反激式轉換器的輸入端的輸入電壓VIN成比例相關。 In this embodiment, the first voltage terminal is connected to an auxiliary coil AUX through a first resistor R1, and the auxiliary coil AUX and the primary coil P have a predetermined turns ratio, so that the first voltage V AUX is converted to the flyback type is proportionally related to the input voltage VIN at the input of the device.

本實施例中,上述第一放大模組實際為一電流鏡Mirror1,該電流鏡Mirror1將輸入的電流放大一第一預定倍數K後輸出。該電流鏡Mirror1還接入一外部電壓VDD,在此不再贅述。 In this embodiment, the above-mentioned first amplifying module is actually a current mirror Mirror1 , and the current mirror Mirror1 amplifies the input current by a first predetermined multiple K and outputs it. The current mirror Mirror1 is also connected to an external voltage VDD, which is not repeated here.

具體地,本實施例中,當反激式轉換器處于開關閉合導通階段時,上述第一放大模組Mirror1接收到經由第一電壓端傳輸的去磁電流(IDMAG),該電流由一輔助繞組的電流檢測引腳檢測得到。隨後第一放大模組Mirror1將該去磁電流放大第一預定倍數K(K*IDMAG)後輸出至第一比較器COM1的正相輸入端,該第一預定倍數K為一固定數值,其可能的取值範圍可以為[0.001,0.1],優選地可以為0.01。 Specifically, in this embodiment, when the flyback converter is in the switch-on phase, the first amplifying module Mirror1 receives the demagnetizing current (I DMAG ) transmitted through the first voltage terminal, and the current is assisted by an auxiliary The current sense pins of the windings are detected. Then the first amplifying module Mirror1 amplifies the demagnetizing current by a first predetermined multiple K(K*I DMAG ) and outputs it to the non-inverting input terminal of the first comparator COM1. The first predetermined multiple K is a fixed value, which is The possible value range can be [0.001, 0.1], preferably 0.01.

相應地,上述第一參考端Ref1持續向第一比較器COM1的反相輸入端輸入一第一參考電壓,該第一參考電壓可能的取值範圍為[0.1V,5V],優選地可以為2V。 Correspondingly, the above-mentioned first reference terminal Ref1 continues to input a first reference voltage to the inverting input terminal of the first comparator COM1, and the possible value range of the first reference voltage is [0.1V, 5V], preferably can be 2V.

則第一比較器COM1持續比較其正相輸入端和反相輸入端輸入的信號,當正相輸入端的輸入信號高于反相輸入端的第一參考電壓時,第一比較器 COM1的輸出端輸出一高電平信號作為第二控制信號(TON_END)。 Then the first comparator COM1 continuously compares the signals input from the non-inverting input terminal and the inverting input terminal. When the input signal of the non-inverting input terminal is higher than the first reference voltage of the inverting input terminal, the first comparator COM1 The output terminal of COM1 outputs a high level signal as the second control signal (TON_END).

換言之,基于上述第一控制單元A1的電路構成以及信號處理過程,整個反激式轉換器的開關導通時間(TON)由K倍的去磁電流(K*IDMAG)、第一電容C1的電容值以及第一參考電壓決定,其推導過程如下:

Figure 109105317-A0305-02-0022-1
In other words, based on the circuit configuration and signal processing process of the first control unit A1, the switch-on time (TON) of the entire flyback converter is determined by K times the demagnetization current (K*I DMAG ), the capacitance of the first capacitor C1 value and the first reference voltage, the derivation process is as follows:
Figure 109105317-A0305-02-0022-1

I為K倍的去磁電流(K*IDMAG);C為第一電容C1的電容值;VREF_ON為第一參考電壓的電壓值;TON為反激式轉換器的開關導通時間。 I is K times the demagnetization current (K*I DMAG ); C is the capacitance value of the first capacitor C1; V REF_ON is the voltage value of the first reference voltage; T ON is the switch on time of the flyback converter.

經上述公式(1)推導可得:I˙TON=C˙VREF_ON ; (2) It can be derived from the above formula (1): I˙T ON =C˙V REF_ON ; (2)

由于第一電容C1的電容值C和第一參考電壓的電壓值VREF_ON均為固定值,因此等式右邊為固定值,這也就意味著等式左邊同樣為固定值。而K倍的去磁電流是根據VIN得到的,K為固定值,因此VIN˙TON同樣為固定值。 Since the capacitance value C of the first capacitor C1 and the voltage value V REF_ON of the first reference voltage are both fixed values, the right side of the equation is a fixed value, which means that the left side of the equation is also a fixed value. The demagnetizing current of K times is obtained according to VIN, and K is a fixed value, so V IN ˙T ON is also a fixed value.

而在DCM模式下,反激式轉換器的閘極開關的開關頻率可以由下式獲得:

Figure 109105317-A0305-02-0022-2
While in DCM mode, the switching frequency of the gate switch of the flyback converter can be obtained by:
Figure 109105317-A0305-02-0022-2

其中,fs用于表示閘極開關的開關頻率;Lm用于表示初級線圈的電感量;PO用于表示次級側的輸出功率,其與初級側的輸入電壓VIN相關; 基于VIN˙TON固定,則閘極開關的開關導通時間相當于輸入電壓VIN的變化而言是固定的,這也就意味著反激式轉換器的導通時間固定。 Among them, fs is used to represent the switching frequency of the gate switch; Lm is used to represent the inductance of the primary coil; PO is used to represent the output power of the secondary side, which is related to the input voltage VIN of the primary side; based on VIN ˙T ON is fixed, the on-time of the gate switch is fixed in terms of the change of the input voltage VIN, which means that the on-time of the flyback converter is fixed.

進一步地,本實施例中,上述第一電阻R1的電阻值可以經由下述公式確定:

Figure 109105317-A0305-02-0023-3
Further, in this embodiment, the resistance value of the first resistor R1 can be determined by the following formula:
Figure 109105317-A0305-02-0023-3

其中,NA用于表示輔助繞組AUX的繞組匝數;NP用于表示初級線圈P的繞組匝數;上述公式(4)的推導過程如下:首先,依據上述公式(3),開關導通時間TON可以通過下述公式處理得到:

Figure 109105317-A0305-02-0023-4
Among them, NA is used to represent the number of turns of the auxiliary winding AUX; NP is used to represent the number of turns of the primary coil P ; the derivation process of the above formula (4) is as follows: First, according to the above formula (3), the switch on time T ON can be processed by the following formula:
Figure 109105317-A0305-02-0023-4

而理論上的開關導通時間TON_Design由下述公式表示:

Figure 109105317-A0305-02-0023-5
The theoretical switch on-time T ON_Design is expressed by the following formula:
Figure 109105317-A0305-02-0023-5

其中,gain用于表示理論上的增益值。 Among them, gain is used to represent the theoretical gain value.

根據上述公式(5)和(6)推導可得(假設TON=TON_Design):

Figure 109105317-A0305-02-0023-6
According to the above formulas (5) and (6), it can be derived (assuming T ON=TON_Design ):
Figure 109105317-A0305-02-0023-6

同時,增益值gain又可以表示為:

Figure 109105317-A0305-02-0024-8
At the same time, the gain value gain can be expressed as:
Figure 109105317-A0305-02-0024-8

則結合上述公式(7)和(8)即可得到上述公式(4),由此確定第一電阻R1的電阻值。 Then, the above formula (4) can be obtained by combining the above formulas (7) and (8), thereby determining the resistance value of the first resistor R1.

可選地,本實施例中,仍然如圖4中所示,第一電壓端和第一電阻R1之間具有一連接節點DR;則反激式轉換器中還包括一第二電阻R2,第二電阻R2連接在連接節點DR與接地端之間。上述第二電阻R2可依據實際情況選擇性配置,在此不再贅述。 Optionally, in this embodiment, as shown in FIG. 4, there is a connection node DR between the first voltage terminal and the first resistor R1 ; then the flyback converter further includes a second resistor R2, The second resistor R2 is connected between the connection node DR and the ground. The above-mentioned second resistor R2 can be selectively configured according to the actual situation, and details are not repeated here.

實施例二: Embodiment 2:

本實施例中,如圖5所示,反激式轉換器工作于DCM模式下;則如圖6中所示,第一控制單元A1進一步包括:第一放大模組Converter1,第一放大模組Converter1的輸入端連接第一電壓端(同時第一放大模組Converter1還接入一外部電壓VDD,在此不再贅述),第一放大模組Converter1的輸出端通過一第一節點D1連接一第一比較器COM1的正相輸入端,第一放大模組Converter1用于將輸入電壓放大一第一預定倍數K後再輸出;第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關的閘極,第一場效應管Q1的汲極通過第一節點D1連接第一比較器COM1的正相輸入端,第一場效應管Q1的源極接地;第一電容C1,第一電容C1的一端通過第一節點D1連接第一比較器COM1的正相輸入端,另一端接地; 第一參考端Ref1,第一參考端Ref1連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓;第一比較器COM1的輸出端連接第一控制單元A1的輸出端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓時,第一比較器的輸出端輸出第二控制信號。 In this embodiment, as shown in FIG. 5 , the flyback converter works in the DCM mode; as shown in FIG. 6 , the first control unit A1 further includes: a first amplifying module Converter1 , a first amplifying module The input terminal of Converter1 is connected to the first voltage terminal (at the same time, the first amplifier module Converter1 is also connected to an external voltage VDD, which will not be repeated here), and the output terminal of the first amplifier module Converter1 is connected to a first voltage terminal through a first node D1. A non-inverting input terminal of the comparator COM1, the first amplifying module Converter1 is used to amplify the input voltage by a first predetermined multiple K before outputting; the first field effect transistor Q1, the gate of the first field effect transistor Q1 passes through a The inverter is connected to the gate of the gate switch, the drain of the first field effect transistor Q1 is connected to the non-inverting input terminal of the first comparator COM1 through the first node D1, and the source of the first field effect transistor Q1 is grounded; Capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input end of the first comparator COM1 through the first node D1, and the other end is grounded; the first reference terminal Ref1, the first reference terminal Ref1 is connected to the inverting input terminal of the first comparator COM1 for providing a first reference voltage; the output terminal of the first comparator COM1 is connected to the output terminal of the first control unit A1; When the voltage value of the non-inverting input terminal of the first comparator COM1 is greater than the first reference voltage, the output terminal of the first comparator outputs the second control signal.

第一電壓端通過一第一電阻R1接入反激式轉換器的輸入端,以使第一電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關;第一電壓端和第一電阻R1之間具有一連接節點DR;反激式轉換器還包括一第二電阻R2,第二電阻R2連接在連接節點DR與接地端之間。 The first voltage terminal is connected to the input terminal of the flyback converter through a first resistor R1, so that the first voltage is proportional to the input voltage V IN of the input terminal of the flyback converter; the first voltage terminal and the first There is a connection node DR between the resistors R1 ; the flyback converter further includes a second resistor R2, and the second resistor R2 is connected between the connection node DR and the ground terminal.

本實施例與實施例一的區別在于: The difference between this embodiment and the first embodiment is that:

1)第一電壓端所產生的第一電壓不再是由輔助繞組產生的與輸入電壓VIN成比例的電壓,而是直接檢測輸入電壓VIN,從而得到與輸入電壓VIN成比例相關的第一電壓VDET1) The first voltage generated by the first voltage terminal is no longer a voltage proportional to the input voltage V IN generated by the auxiliary winding, but directly detects the input voltage V IN , thereby obtaining a proportional relationship to the input voltage V IN . the first voltage V DET .

2)本實施例中的第一放大模組不再是電流鏡,而是電壓轉電流模組Converter1,其將第一電壓VDET轉換成一第一預定倍數K的並輸出。 2) The first amplifying module in this embodiment is no longer a current mirror, but a voltage-to-current module Converter1, which converts the first voltage V DET into a first predetermined multiple K and outputs it.

3)本實施例中的第一預定倍數K可以表示為:

Figure 109105317-A0305-02-0025-9
3) The first predetermined multiple K in this embodiment can be expressed as:
Figure 109105317-A0305-02-0025-9

其中,IOUTPUT表示第一放大模組的輸出電流;VINPUT表示第一放大模組的輸入電壓。 Wherein, I OUTPUT represents the output current of the first amplifying module; V INPUT represents the input voltage of the first amplifying module.

進一步地,上述第一預定倍數K的取值範圍可以為[0.1μA/V,100μA/V],優選地可以為2μA/V。 Further, the value range of the above-mentioned first predetermined multiple K may be [0.1 μA/V, 100 μA/V], preferably 2 μA/V.

4)本實施例中的第二電阻R2為必選的電路組件,第一電阻R1和第二電阻R2之間的阻值關係可以通過下述公式確定:

Figure 109105317-A0305-02-0026-10
4) The second resistor R2 in this embodiment is a necessary circuit component, and the resistance relationship between the first resistor R1 and the second resistor R2 can be determined by the following formula:
Figure 109105317-A0305-02-0026-10

其中,gain用于表示理論上的增益值;C用于表示第一電容C1的電阻值;VREF_ON用于表示第一參考電壓的電壓值;fs用于表示閘極開關的開關頻率;Lm用于表示初級線圈的電感量;PO用于表示次級側的輸出功率;R1用于表示第一電阻的電阻值;R2用于表示第二電阻的電阻值;K用于表示第一預設倍率,其計算公式如上述公式(9)所示。 Among them, gain is used to represent the theoretical gain value; C is used to represent the resistance value of the first capacitor C1; V REF_ON is used to represent the voltage value of the first reference voltage; f s is used to represent the switching frequency of the gate switch; L m is used to represent the inductance of the primary coil; PO is used to represent the output power of the secondary side; R1 is used to represent the resistance value of the first resistor; R2 is used to represent the resistance value of the second resistor; K is used to represent the first resistance value The calculation formula of the preset magnification is as shown in the above formula (9).

上述公式(10)的推導過程類似于上述公式(5)-(8),在此不再贅述。 The derivation process of the above formula (10) is similar to the above formulas (5)-(8), and will not be repeated here.

實施例三: Embodiment three:

本實施例中,反激式轉換器工作于連續模式(Continuous Conduction Mode,CCM)下,其大體電路框圖仍然如圖3中所示。 In this embodiment, the flyback converter operates in a continuous mode (Continuous Conduction Mode, CCM), and its general circuit block diagram is still as shown in FIG. 3 .

則如圖7中所示,第一控制單元A1進一步包括:第一放大模組,第一放大模組的輸入端連接第一電壓端,第一放大模組的輸出端通過一第二節點D2連接一第一比較器COM1的正相輸入端,第一放大模組用于將流經第一放大模組的電流放大一第一預定倍數K後再輸出,本實施例中,第一放大模組采用電流鏡Mirror1實現;第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關的閘極,第一場效應管Q1的汲極通過第二節點連接第一比較器的正相輸入端,第一場效應管Q1的源極接地;第一電容C1,第一電容C1的一端通過第二節點D2連接第一比較器COM1的正相輸入端,另一端接地;第一參考端Ref1,第一參考端Ref1連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓;參考模組,參考模組的輸入端連接一設置有預定電壓值的設定電壓端,參考模組的輸出端通過第二節點D2連接第一比較器COM1的正相輸入端,參考模組用于根據輸入至參考模組的電壓進行放大處理後輸出;第一比較器COM1的輸出端連接第一控制單元A1的輸出端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓時,第一比較器的輸出端輸出第二控制信號。 As shown in FIG. 7 , the first control unit A1 further includes: a first amplifying module, the input end of the first amplifying module is connected to the first voltage end, and the output end of the first amplifying module passes through a second node D2 It is connected to the non-inverting input terminal of a first comparator COM1, and the first amplifying module is used to amplify the current flowing through the first amplifying module by a first predetermined multiple K before outputting. In this embodiment, the first amplifying module The group is realized by the current mirror Mirror1; the first field effect transistor Q1, the gate of the first field effect transistor Q1 is connected to the gate of the gate switch through an inverter, and the drain of the first field effect transistor Q1 is connected through the second node. The non-inverting input terminal of the first comparator, the source of the first field effect transistor Q1 is grounded; the first capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input terminal of the first comparator COM1 through the second node D2, and the other One end is grounded; the first reference terminal Ref1, the first reference terminal Ref1 is connected to the inverting input terminal of the first comparator COM1 for providing a first reference voltage; the reference module, the input terminal of the reference module is connected to a predetermined The set voltage terminal of the voltage value, the output terminal of the reference module is connected to the non-inverting input terminal of the first comparator COM1 through the second node D2, and the reference module is used for amplifying and outputting the voltage input to the reference module; The output terminal of a comparator COM1 is connected to the output terminal of the first control unit A1; when the voltage value of the non-inverting input terminal of the first comparator COM1 is greater than the first reference voltage, the output terminal of the first comparator outputs a second control signal.

第一電壓端通過一第一電阻R1連接一輔助線圈AUX,輔助線圈AUX與初級線圈P之間具有一預定的匝數比,以使第一電壓VAUX與反激式轉換器的輸入端的輸入電壓VIN成比例相關。 The first voltage terminal is connected to an auxiliary coil AUX through a first resistor R1, and there is a predetermined turns ratio between the auxiliary coil AUX and the primary coil P, so that the first voltage V AUX is connected to the input of the input end of the flyback converter. The voltage V IN is proportionally related.

第一電壓端和第一電阻R1之間具有一連接節點DR; 反激式轉換器還包括一第二電阻R2,第二電阻R2連接在連接節點DR與接地端之間。 There is a connection node DR between the first voltage terminal and the first resistor R1 ; the flyback converter further includes a second resistor R2, and the second resistor R2 is connected between the connection node DR and the ground terminal.

本實施例中的第一放大模組同樣可以為電流鏡Mirror1,該電流鏡Mirror1的結構構成、工作方式以及第一預定倍數K的設置均可以參照實施例一,在此不再贅述。 The first amplifying module in this embodiment can also be a current mirror Mirror1 . The structure, working mode and setting of the first predetermined multiple K of the current mirror Mirror1 can be referred to in Embodiment 1, which will not be repeated here.

本實施例中的第一電壓端同樣檢測輔助線圈的繞組電壓並得到與反激式轉換器的輸入電壓VIN成比例的第一電壓VAUX,第一電壓端與輔助線圈、第一電阻R1和第二電阻R2的連接關係與實施例一相同,在此不再贅述。 In this embodiment, the first voltage terminal also detects the winding voltage of the auxiliary coil and obtains a first voltage V AUX proportional to the input voltage V IN of the flyback converter. The first voltage terminal is connected to the auxiliary coil and the first resistor R1 The connection relationship with the second resistor R2 is the same as that of the first embodiment, which is not repeated here.

本實施例中,第一電阻R1的阻值範圍可以為50kΩ-2MΩ。 In this embodiment, the resistance range of the first resistor R1 may be 50kΩ-2MΩ.

可選地,第二電阻R2可依據實際情況選擇性配置,在此不再贅述。 Optionally, the second resistor R2 can be selectively configured according to the actual situation, and details are not repeated here.

進一步地,本實施例中,仍然如圖7中所示,上述設定電壓端包括一參考電阻RSET和一設定電流端Ref2,分別連接至參考模組的輸入端;參考電阻RSET具有一預定阻值,設定電流端Ref2具有一預定的輸入電流ISET;則上述參考模組包括:放大器gm,放大器gm的輸入端作為參考模組的輸入端,放大器的輸出端通過第二節點D2連接第一比較器COM1,放大器gm用于按照一第二預定倍數M對設定電壓端輸出的電壓進行放大處理後輸出。 Further, in this embodiment, as shown in FIG. 7 , the above-mentioned voltage setting terminal includes a reference resistor R SET and a setting current terminal Ref2, which are respectively connected to the input terminals of the reference module; the reference resistor R SET has a predetermined value. The resistance value, the set current terminal Ref2 has a predetermined input current I SET ; then the above-mentioned reference module includes: an amplifier gm, the input terminal of the amplifier gm is used as the input terminal of the reference module, and the output terminal of the amplifier is connected through the second node D2. A comparator COM1 and an amplifier gm are used for amplifying the voltage output by the set voltage terminal according to a second predetermined multiple M and then outputting the output.

具體地,本實施例中,在上述實施例一的基礎上,添加了參考模組以及設定電壓端。設定電壓端通過設定輸入電流ISET以及RSET獲得一個參考的輸入電壓VRSET,再經過放大器gm的處理後放大第二預定倍數M倍形成M˙I SET 並輸出以參與比較。 Specifically, in this embodiment, on the basis of the above-mentioned first embodiment, a reference module and a voltage setting terminal are added. The voltage setting terminal obtains a reference input voltage V RSET by setting the input currents I SET and R SET , and after processing by the amplifier gm, it is amplified by a second predetermined multiple M times to form M ˙ I SET and output to participate in the comparison.

上述第二預定倍數M的取值範圍可以為[0.1μA/V,100μA/V],優選地可以為1μA/V。 The value range of the second predetermined multiple M may be [0.1 μA/V, 100 μA/V], preferably 1 μA/V.

上述設定電壓端輸出的用于參考的電壓VRSET的取值範圍可以為[0.1V,5V],優選地可以為0.65V。 The value range of the reference voltage V RSET output by the above-mentioned set voltage terminal may be [0.1V, 5V], preferably 0.65V.

上述參考電阻RSET的阻值範圍可以為0Ω-10kΩ。 The resistance value of the reference resistor R SET can be in the range of 0Ω-10kΩ.

則第一比較器COM1的正相輸入端的輸入信號由K˙I DMAG M˙VRSET 、第一電容C1的電容值C以及參考電壓VREF_ON來決定,其工作原理與上述實施例相同,即:當反激式轉換器處于開關閉合導通階段時,第一控制單元A1開始工作。當第一比較器COM1的正相輸入端的輸入信號大于反相輸入端的參考電壓VREF_ON,則第一比較器COM1的輸出端輸出第二控制信號(高電平信號),以控制閘極開關G斷開,反激式轉換器進入開關斷開階段。 Then the input signal of the non-inverting input terminal of the first comparator COM1 is determined by K˙I DMAG , M˙V R SET , the capacitance value C of the first capacitor C1 and the reference voltage VREF_ON, and its working principle is the same as the above-mentioned embodiment, that is, : When the flyback converter is in the switch-on phase, the first control unit A1 starts to work. When the input signal of the non-inverting input terminal of the first comparator COM1 is greater than the reference voltage V REF_ON of the inverting input terminal, the output terminal of the first comparator COM1 outputs a second control signal (high level signal) to control the gate switch G off, the flyback converter enters the switch off phase.

實施例四: Embodiment 4:

本實施例中,反激式轉換器工作于CCM模式下,其總體電路框圖如圖3中所示。 In this embodiment, the flyback converter operates in the CCM mode, and its overall circuit block diagram is shown in FIG. 3 .

則如圖8中所示,本實施例中的第一控制單元A1包括:第一放大模組,第一放大模組的輸入端連接第一電壓端,第一放大模組的輸出端通過一第二節點D2連接一第一比較器COM1的正相輸入端,第一放大模組用于將流經第一放大模組的電流放大一第一預定倍數輸出,本實施例中第一放大模組采用電流鏡Mirror1實現;第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關的閘極,第一場效應管Q1的汲極通過第二節點D2連接第一比較器COM1的正相輸入端,第一場效應管Q1的源極接地; 第一電容C1,第一電容C1的一端通過第二節點D2連接第一比較器COM1的正相輸入端,另一端接地;第一參考端Ref1,第一參考端連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓;參考模組,參考模組的輸入端連接一設置有預定電壓值的設定電壓端,參考模組的輸出端通過第二節點D2連接第一比較器COM1的正相輸入端,參考模組用于根據輸入至參考模組的電壓進行放大處理後輸出;第一比較器COM1的輸出端連接第一控制單元A1的輸出端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓VREF_ON時,第一比較器COM1的輸出端輸出第二控制信號。 As shown in FIG. 8 , the first control unit A1 in this embodiment includes: a first amplifying module, the input end of the first amplifying module is connected to the first voltage end, and the output end of the first amplifying module is connected through a The second node D2 is connected to a non-inverting input terminal of a first comparator COM1. The first amplifying module is used to amplify the current flowing through the first amplifying module by a first predetermined multiple and output. In this embodiment, the first amplifying module The group is realized by the current mirror Mirror1; the first field effect transistor Q1, the gate of the first field effect transistor Q1 is connected to the gate of the gate switch through an inverter, and the drain of the first field effect transistor Q1 passes through the second node D2 Connect to the non-inverting input terminal of the first comparator COM1, and the source of the first field effect transistor Q1 is grounded; The first capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input end of the first comparator COM1 through the second node D2, and the other end is grounded; the first reference end Ref1, the first reference end is connected to the inverse of the first comparator COM1. The phase input terminal is used to provide a first reference voltage; for the reference module, the input terminal of the reference module is connected to a set voltage terminal with a predetermined voltage value, and the output terminal of the reference module is connected to the first comparator through the second node D2 The non-inverting input terminal of the comparator COM1, the reference module is used to amplify and output the voltage input to the reference module; the output terminal of the first comparator COM1 is connected to the output terminal of the first control unit A1; when the first comparator When the voltage value of the non-inverting input terminal of COM1 is greater than the first reference voltage VREF_ON, the output terminal of the first comparator COM1 outputs the second control signal.

設定電壓端包括一參考電阻RSET和一設定電流端Ref2,分別連接至參考模組的輸入端;在設定電流端Ref2和參考模組的輸入端之間設置一開關S1,開關S1初始處于閉合導通狀態,當設置好設定電流端Ref2的輸入電流後,斷開開關S1;參考模組進一步包括:數位類比轉換器DAC,數位類比轉換器DAC的輸入端作為參考模組的輸入端,在斷開開關S1後,數位類比轉換器用于鎖住設定電流端Ref2傳遞的輸入電壓VRSET;放大器gm,放大器gm的輸入端連接數位類比轉換器DAC的輸出端,放大器gm的輸出端通過第二節點D2連接第一比較器COM1,放大器gm用于按照一第二預定倍數M對設定電壓端輸出的電壓VRSET進行放大處理後輸出。 The set voltage terminal includes a reference resistor R SET and a set current terminal Ref2, which are respectively connected to the input terminal of the reference module; a switch S1 is set between the set current terminal Ref2 and the input terminal of the reference module, and the switch S1 is initially closed In the on state, when the input current of the set current terminal Ref2 is set, the switch S1 is turned off; the reference module further includes: a digital-to-analog converter DAC, and the input end of the digital-to-analog converter DAC is used as the input end of the reference module. After the switch S1 is turned on, the digital-to-analog converter is used to lock the input voltage V RSET transmitted by the set current terminal Ref2; the amplifier gm, the input end of the amplifier gm is connected to the output end of the digital-to-analog converter DAC, and the output end of the amplifier gm passes through the second node D2 is connected to the first comparator COM1, and the amplifier gm is used for amplifying the voltage V RSET output by the set voltage terminal according to a second predetermined multiple M and then outputting it.

第一電壓端通過一第一電阻R1連接一輔助線圈AUX,輔助線圈AUX 與初級線圈P具有一預定的匝數比,以使第一電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關。 The first voltage terminal is connected to an auxiliary coil AUX through a first resistor R1. The auxiliary coil AUX and the primary coil P have a predetermined turns ratio, so that the first voltage is equal to the input voltage V IN of the input terminal of the flyback converter. proportionally related.

第一電壓端和第一電阻R1之間具有一連接節點DR;反激式轉換器還包括一第二電阻R2,第二電阻R2連接在連接節點DR與接地端之間。 There is a connection node DR between the first voltage terminal and the first resistor R1 ; the flyback converter further includes a second resistor R2, and the second resistor R2 is connected between the connection node DR and the ground terminal.

本實施例與實施例三的唯一區別在于在設定電壓端設置了一個開關S1。由此在實際的系統運行過程中可以將設定電壓端鎖住。具體原理為:首先閉合導通開關S1,並在設定電流端Ref2處設定輸入電流ISET。設定完成之後再將開關S1斷開,相應的輸入電壓就被鎖存在數位類比轉換器DAC中了。這樣做的好處在于,由于輸入電壓VRSET能夠被鎖存在數位類比轉換器DAC中,不再需要額外引出一個引腳來設置參考電阻RSET,該參考電阻RSET完全可以直接接入系統中原本就有的引腳(例如圖9中所示的情況)。 The only difference between this embodiment and the third embodiment is that a switch S1 is set at the voltage setting terminal. In this way, the set voltage terminal can be locked during the actual system operation. The specific principle is as follows: firstly, the conduction switch S1 is closed, and the input current I SET is set at the set current terminal Ref2 . After the setting is completed, the switch S1 is turned off, and the corresponding input voltage is latched in the digital-to-analog converter DAC. The advantage of this is that since the input voltage V RSET can be latched in the digital-to-analog converter DAC, it is no longer necessary to draw out an additional pin to set the reference resistor R SET , which can be directly connected to the original in the system. existing pins (such as the case shown in Figure 9).

本實施例中,其餘的電路結構以及運行原理和實施例三均相同,在此不再贅述。 In this embodiment, the remaining circuit structures and operating principles are the same as those in the third embodiment, and will not be repeated here.

實施例五: Embodiment 5:

本實施例中,反激式轉換器工作于CCM模式下,其總體電路框圖如圖5中所示。 In this embodiment, the flyback converter operates in the CCM mode, and its overall circuit block diagram is shown in FIG. 5 .

則如圖10中所示,該第一控制單元進一步包括:第一放大模組Converter1,第一放大模組Converter1的輸入端連接第一電壓端,第一放大模組Converter1的輸出端通過一第二節點D2連接一第一比較器COM1的正相輸入端,第一放大模組Converter1用于將輸入電壓放大一第一預定倍數K後輸出; 第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關的閘極,第一場效應管Q1的汲極通過第二節點D2連接第一比較器的正相輸入端,第一場效應管Q1的源極接地;第一電容C1,第一電容C1的一端通過第二節點D2連接第一比較器COM1的正相輸入端,另一端接地;第一參考端Ref1,第一參考端Ref1連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓VREF_ON;參考模組,參考模組的輸入端連接一設置有預定電壓值的設定電壓端,參考模組的輸出端通過第二節點D2連接第一比較器COM1的正相輸入端,參考模組用于根據輸入至參考模組的電壓進行放大處理後輸出;第一比較器COM1的輸出端連接第一控制單元A1的輸出端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓VREF_ON時,第一比較器COM1的輸出端輸出第二控制信號。 As shown in FIG. 10 , the first control unit further includes: a first amplifying module Converter1, the input end of the first amplifying module Converter1 is connected to the first voltage end, and the output end of the first amplifying module Converter1 is connected through a first The two nodes D2 are connected to the non-inverting input terminal of a first comparator COM1, and the first amplifying module Converter1 is used to amplify the input voltage by a first predetermined multiple K and output it; the first field effect transistor Q1, the first field effect transistor Q1 The gate of the first FET is connected to the gate of the gate switch through an inverter, the drain of the first FET Q1 is connected to the non-inverting input terminal of the first comparator through the second node D2, and the source of the first FET Q1 Ground; the first capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input end of the first comparator COM1 through the second node D2, and the other end is grounded; the first reference end Ref1, the first reference end Ref1 is connected to the first comparator The inverting input terminal of COM1 is used to provide a first reference voltage V REF_ON ; for the reference module, the input terminal of the reference module is connected to a set voltage terminal with a predetermined voltage value, and the output terminal of the reference module passes through the second node D2 is connected to the non-inverting input terminal of the first comparator COM1, and the reference module is used for amplifying and outputting according to the voltage input to the reference module; the output terminal of the first comparator COM1 is connected to the output terminal of the first control unit A1; When the voltage value of the non-inverting input terminal of the first comparator COM1 is greater than the first reference voltage VREF_ON, the output terminal of the first comparator COM1 outputs the second control signal.

設定電壓端包括一參考電阻RSET和一設定電流端Ref2,分別連接至參考模組的輸入端;參考電阻RSET具有一預定阻值,設定電流端Ref2具有一預定的輸入電流ISET;參考模組包括:放大器gm,放大器gm的輸入端作為參考模組的輸入端,放大器gm的輸出端通過第二節點D2連接第一比較器COM1,放大器gm用于按照一第二預定倍數M對設定電壓端輸出的電壓VRSET進行放大處理後輸出。 The voltage setting terminal includes a reference resistor R SET and a setting current terminal Ref2, which are respectively connected to the input terminal of the reference module; the reference resistor R SET has a predetermined resistance value, and the setting current terminal Ref2 has a predetermined input current I SET ; the reference The module includes: an amplifier gm, the input terminal of the amplifier gm is used as the input terminal of the reference module, the output terminal of the amplifier gm is connected to the first comparator COM1 through the second node D2, and the amplifier gm is used for setting according to a second predetermined multiple M. The voltage V RSET output from the voltage terminal is amplified and output.

第一電壓端通過一第一電阻R1接入反激式轉換器的輸入端,以使第 一電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關;第一電壓端和第一電阻R1之間具有一連接節點DR;反激式轉換器還包括一第二電阻R2,第二電阻R2連接在連接節點DR與接地端之間。 The first voltage terminal is connected to the input terminal of the flyback converter through a first resistor R1, so that the first voltage is proportional to the input voltage VIN of the input terminal of the flyback converter; the first voltage terminal and the first resistor There is a connection node DR between R1 ; the flyback converter further includes a second resistor R2, and the second resistor R2 is connected between the connection node DR and the ground terminal.

本實施例與上述實施例三的區別在于:本實施例中的第一電壓端不再由輔助線圈AUX提供輔助繞組電壓VAUX,而是直接檢測初級側的輸入電壓VIN以得到與輸入電壓VIN成比例相關的第一電壓,本實施例中的第二電阻R2是必選的電阻。並且,本實施例中的第一放大模組采用電壓轉電流模組Converter1實現。 The difference between this embodiment and the third embodiment above is that the first voltage terminal in this embodiment no longer provides the auxiliary winding voltage V AUX from the auxiliary coil AUX, but directly detects the input voltage V IN of the primary side to obtain the same voltage as the input voltage. VIN is proportional to the related first voltage, and the second resistor R2 in this embodiment is a mandatory resistor. Moreover, the first amplifying module in this embodiment is implemented by a voltage-to-current module Converter1.

換言之,將實施例二中的第一電壓端的結構設定與實施例三中的其餘結構設定進行結合能夠得到本實施例中的第一控制單元A1的電路結構。因此,本實施例中:第一電阻R1和第二電阻R2的阻值可以通過上述公式(10)確定。 In other words, the circuit structure of the first control unit A1 in this embodiment can be obtained by combining the structural setting of the first voltage terminal in the second embodiment with the remaining structural settings in the third embodiment. Therefore, in this embodiment, the resistance values of the first resistor R1 and the second resistor R2 can be determined by the above formula (10).

第一預定倍數K可以通過上述公式(9)確定,其取值範圍可以為[0.1μA/V,100μA/V],優選地可以為2μA/V。 The first predetermined multiple K can be determined by the above formula (9), and its value range can be [0.1 μA/V, 100 μA/V], preferably 2 μA/V.

參考電阻RSET的阻值與上述實施例三中相同。 The resistance value of the reference resistor R SET is the same as that in the third embodiment.

第二預定倍數M與上述實施例三中相同,其取值範圍可以為[0.1μA/V,100μA/V],優選地可以為1μA/V。 The second predetermined multiple M is the same as that in the above-mentioned third embodiment, and its value range may be [0.1 μA/V, 100 μA/V], preferably 1 μA/V.

上述第一控制單元A1的運行原理參照上述實施例二和實施例三實現,在此不再贅述。 The operation principle of the above-mentioned first control unit A1 is implemented with reference to the above-mentioned Embodiment 2 and Embodiment 3, and details are not described herein again.

實施例六: Embodiment 6:

本實施例中,反激式轉換器工作于CCM模式下,其總體電路框圖如 圖5中所示。 In this embodiment, the flyback converter works in the CCM mode, and its overall circuit block diagram is as follows shown in Figure 5.

則如圖11中所示,該第一控制單元進一步包括:第一放大模組Converter1,第一放大模組Converter1的輸入端連接第一電壓端,第一放大模組的輸出端通過一第二節點D2連接一第一比較器COM1的正相輸入端,第一放大模組Converter1用于將輸入電壓放大一第一預定倍數K後輸出;第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關的閘極,第一場效應管Q1的汲極通過第二節點D2連接第一比較器的正相輸入端,第一場效應管Q1的源極接地;第一電容C1,第一電容C1的一端通過第二節點D2連接第一比較器COM1的正相輸入端,另一端接地;第一參考端Ref1,第一參考端Ref1連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓VREF_ON;參考模組,參考模組的輸入端連接一設置有預定電壓值的設定電壓端,參考模組的輸出端通過第二節點D2連接第一比較器COM1的正相輸入端,參考模組用于根據輸入至參考模組的電壓進行放大處理後輸出;第一比較器COM1的輸出端連接第一控制單元A1的輸出端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓VREF_ON時,第一比較器COM1的輸出端輸出第二控制信號。 As shown in FIG. 11 , the first control unit further includes: a first amplifying module Converter1, the input end of the first amplifying module Converter1 is connected to the first voltage end, and the output end of the first amplifying module is connected through a second The node D2 is connected to a non-inverting input terminal of a first comparator COM1, and the first amplifying module Converter1 is used to amplify the input voltage by a first predetermined multiple K and output it; the first field effect transistor Q1, the first field effect transistor Q1 The gate is connected to the gate of the gate switch through an inverter, the drain of the first field effect transistor Q1 is connected to the non-inverting input terminal of the first comparator through the second node D2, and the source of the first field effect transistor Q1 is grounded ; The first capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input end of the first comparator COM1 through the second node D2, and the other end is grounded; the first reference end Ref1, the first reference end Ref1 is connected to the first comparator COM1 The inverting input terminal of the reference module is used to provide a first reference voltage V REF_ON ; for the reference module, the input terminal of the reference module is connected to a set voltage terminal with a predetermined voltage value, and the output terminal of the reference module passes through the second node D2 It is connected to the non-inverting input terminal of the first comparator COM1, and the reference module is used for amplifying and outputting according to the voltage input to the reference module; the output terminal of the first comparator COM1 is connected to the output terminal of the first control unit A1; when When the voltage value of the non-inverting input terminal of the first comparator COM1 is greater than the first reference voltage V REF_ON , the output terminal of the first comparator COM1 outputs the second control signal.

設定電壓端包括一參考電阻RSET和一設定電流端Ref2,分別連接至參考模組的輸入端;在設定電流端Ref2和參考模組的輸入端之間設置一開關S1,開關S1 初始處于閉合導通狀態,當設置好設定電流端Ref2的輸入電流ISET後,斷開開關S1;則參考模組進一步包括:數位類比轉換器DAC,數位類比轉換器DAC的輸入端作為參考模組的輸入端,在斷開開關S1後,數位類比轉換器DAC用于鎖住設定電流端Ref2傳遞的輸入電壓VRSET;放大器gm,放大器gm的輸入端連接數位類比轉換器DAC的輸出端,放大器gm的輸出端通過第二節點D2連接第一比較器COM1,放大器gm用于按照一第二預定倍數M對設定電壓端輸出的電壓VRSET進行放大處理後輸出。 The setting voltage terminal includes a reference resistor R SET and a setting current terminal Ref2, which are respectively connected to the input terminal of the reference module; a switch S1 is set between the setting current terminal Ref2 and the input terminal of the reference module, and the switch S1 is initially closed In the on state, when the input current I SET of the set current terminal Ref2 is set, the switch S1 is turned off; the reference module further includes: a digital-to-analog converter DAC, and the input end of the digital-to-analog converter DAC is used as the input end of the reference module , after disconnecting the switch S1, the digital-to-analog converter DAC is used to lock the input voltage V RSET transmitted by the set current terminal Ref2; the amplifier gm, the input end of the amplifier gm is connected to the output end of the digital-to-analog converter DAC, and the output of the amplifier gm The terminal is connected to the first comparator COM1 through the second node D2, and the amplifier gm is used for amplifying the voltage V RSET output by the set voltage terminal according to a second predetermined multiple M and then outputting it.

第一電壓端通過一第一電阻R1接入反激式轉換器的輸入端,以使第一電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關;第一電壓端和第一電阻R1之間具有一連接節點DR;反激式轉換器還包括一第二電阻R2,第二電阻R2連接在連接節點DR與接地端之間。 The first voltage terminal is connected to the input terminal of the flyback converter through a first resistor R1, so that the first voltage is proportional to the input voltage VIN of the input terminal of the flyback converter; the first voltage terminal and the first resistor There is a connection node DR between R1 ; the flyback converter further includes a second resistor R2, and the second resistor R2 is connected between the connection node DR and the ground terminal.

本實施例與上述實施例四的區別在于:本實施例中的第一電壓端不再由輔助線圈AUX提供輔助繞組電壓VAUX,而是直接檢測初級側的輸入電壓VIN以得到與輸入電壓VIN成比例相關的第一電壓,本實施例中的第二電阻R2是必選的電阻。並且,本實施例中的第一放大模組采用電壓轉電流模組Converter1實現。 The difference between this embodiment and the fourth embodiment above is that the first voltage terminal in this embodiment no longer provides the auxiliary winding voltage V AUX from the auxiliary coil AUX, but directly detects the input voltage V IN of the primary side to obtain the same voltage as the input voltage. V IN is proportional to the related first voltage, and the second resistor R2 in this embodiment is a mandatory resistor. Moreover, the first amplifying module in this embodiment is implemented by a voltage-to-current module Converter1.

換言之,將實施例二中的第一電壓端的結構設定與實施例三中的其餘結構設定進行結合能夠得到本實施例中的第一控制單元A1的電路結構。因此,本實施例中:第一電阻R1和第二電阻R2的阻值可以通過上述公式(10)確定。 In other words, the circuit structure of the first control unit A1 in this embodiment can be obtained by combining the structural setting of the first voltage terminal in the second embodiment with the remaining structural settings in the third embodiment. Therefore, in this embodiment, the resistance values of the first resistor R1 and the second resistor R2 can be determined by the above formula (10).

第一預定倍數K可以通過上述公式(9)確定,其取值範圍可以為[0.1μA/V,100μA/V],優選地可以為2μA/V。 The first predetermined multiple K can be determined by the above formula (9), and its value range can be [0.1 μA/V, 100 μA/V], preferably 2 μA/V.

參考電阻RSET的阻值與上述實施例三中相同。 The resistance value of the reference resistor R SET is the same as that in the third embodiment.

第二預定倍數M與上述實施例三中相同,其取值範圍可以為[0.1μA/V,100μA/V],優選地可以為1μA/V。 The second predetermined multiple M is the same as that in the above-mentioned third embodiment, and its value range may be [0.1 μA/V, 100 μA/V], preferably 1 μA/V.

上述第一控制單元A1的運行原理參照上述實施例二和實施例四實現,在此不再贅述。 The operation principle of the above-mentioned first control unit A1 is implemented with reference to the above-mentioned Embodiment 2 and Embodiment 4, and details are not described herein again.

上述實施例一至六具體闡述了反激式轉換器分別在DCM模式和CCM模式下的電路結構及其工作原理。具體而言,實施例一至二闡述了反激式轉換器在DCM模式下的電路結構及其工作原理,實施例三至六闡述了反激式轉換器在CCM模式下的電路結構及其工作原理。 The above-mentioned Embodiments 1 to 6 specifically describe the circuit structure and the working principle of the flyback converter in the DCM mode and the CCM mode, respectively. Specifically, Embodiments 1 to 2 describe the circuit structure and working principle of the flyback converter in DCM mode, and Embodiments 3 to 6 describe the circuit structure and working principle of the flyback converter in CCM mode .

下文中結合上述實施例一至六,通過四個實施例(實施例七至十)來闡述當反激式轉換器可同時支持DCM模式和CCM模式時的電路結構和工作原理。 The circuit structure and working principle when the flyback converter can support the DCM mode and the CCM mode at the same time are described below with reference to the above-mentioned first to sixth embodiments.

實施例七: Embodiment 7:

本實施例中,反激式轉換器能夠工作在DCM模式下,同樣也能夠工作在CCM模式下,即反激式轉換器同時支持DCM模式和CCM模式,其電路框圖如圖12中所示。 In this embodiment, the flyback converter can work in DCM mode as well as in CCM mode, that is, the flyback converter supports both DCM mode and CCM mode, and its circuit block diagram is shown in Figure 12 .

則如圖13中所示,上述第一控制單元A1具體包括:第一控制模組,第一控制模組的輸入端連接第一電壓端;第二控制模組,第二控制模組的輸入端連接第一電壓端;判斷模組E,判斷模組E的兩個輸入端分別連接第一控制模組的輸出 端以及第二控制模組的輸出端,判斷模組E的輸出端作為第一控制單元的輸出端;當第一控制模組或者第二控制模組輸出一預定信號時,判斷模組E輸出第二控制信號。 As shown in FIG. 13 , the above-mentioned first control unit A1 specifically includes: a first control module, the input end of the first control module is connected to the first voltage end; a second control module, the input of the second control module The terminal is connected to the first voltage terminal; the judgment module E, the two input terminals of the judgment module E are respectively connected to the output of the first control module terminal and the output terminal of the second control module, the output terminal of the judgment module E is used as the output terminal of the first control unit; when the first control module or the second control module outputs a predetermined signal, it is judged that the output terminal of the module E is output the second control signal.

進一步地,上述第一控制模組包括:第一放大模組,第一放大模組的輸入端連接第一電壓端,第一放大模組的輸出端通過一第一節點D1連接一第一比較器COM1的正相輸入端,第一放大模組用于將流經第一放大模組的電流放大一第一預定倍數K1輸出;第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關G的閘極,第一場效應管Q1的汲極通過第一節點D1連接第一比較器COM1的正相輸入端,第一場效應管Q1的源極接地;第一電容C1,第一電容C1的一端通過第一節點D1連接第一比較器COM1的正相輸入端,另一端接地;第一參考端Ref1,第一參考端Ref1連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓VREF_ON1;第一比較器COM1的輸出端連接判斷模組的輸入端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓VREF_ON1時,第一比較器COM1的輸出端輸出預定信號(高電平信號)。 Further, the above-mentioned first control module includes: a first amplification module, the input terminal of the first amplification module is connected to the first voltage terminal, and the output terminal of the first amplification module is connected to a first comparator through a first node D1 The non-inverting input terminal of the device COM1, the first amplifying module is used to amplify the current flowing through the first amplifying module by a first predetermined multiple K1 and output; the first field effect transistor Q1, the gate of the first field effect transistor Q1 The gate of the gate switch G is connected through an inverter, the drain of the first field effect transistor Q1 is connected to the non-inverting input terminal of the first comparator COM1 through the first node D1, and the source of the first field effect transistor Q1 is grounded ; The first capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input end of the first comparator COM1 through the first node D1, and the other end is grounded; the first reference end Ref1, the first reference end Ref1 is connected to the first comparator COM1 The inverting input terminal of the first comparator COM1 is used to provide a first reference voltage V REF_ON1 ; the output terminal of the first comparator COM1 is connected to the input terminal of the judgment module; when the voltage value of the non-inverting input terminal of the first comparator COM1 is greater than the first reference voltage When the voltage VREF_ON1 is used, the output terminal of the first comparator COM1 outputs a predetermined signal (high level signal).

第二控制模組包括:第二放大模組,第二放大模組的輸入端連接第一電壓端,第二放大模組的輸出端通過一第二節點D2連接一第二比較器COM2的正相輸入端,第二放大模組用于將流經第二放大模組的電流放大一第三預定倍數K2輸出; 第二場效應管Q2,第二場效應管Q2的閘極通過一反向器連接閘極開關G的閘極,第二場效應管Q2的汲極通過第二節點D2連接第二比較器COM2的正相輸入端,第二場效應管Q2的源極接地;第二電容C2,第二電容C2的一端通過第二節點D2連接第二比較器COM2的正相輸入端,另一端接地;第二參考端Ref3,第二參考端連接第二比較器COM2的反相輸入端,用于提供一第二參考電壓VREF_ON2;參考模組,參考模組的輸入端連接一設置有預定電壓值的設定電壓端,參考模組的輸出端通過第二節點D2連接第二比較器COM2的正相輸入端,參考模組用于根據輸入至參考模組的電壓進行放大處理後輸出;第二比較器COM2的輸出端連接判斷模組的輸入端;當第二比較器COM2的正相輸入端的電壓值大于第二參考電壓VREF_ON2時,第二比較器COM2的輸出端輸出預定信號。 The second control module includes: a second amplification module, the input terminal of the second amplification module is connected to the first voltage terminal, and the output terminal of the second amplification module is connected to the positive terminal of a second comparator COM2 through a second node D2 Phase input terminal, the second amplifying module is used to amplify the current flowing through the second amplifying module by a third predetermined multiple K2 and output; the second field effect transistor Q2, the gate of the second field effect transistor Q2 is reversed through a reverse The second FET Q2 is connected to the non-inverting input terminal of the second comparator COM2 through the second node D2, and the source of the second FET Q2 is grounded; the second capacitor C2, one end of the second capacitor C2 is connected to the non-inverting input end of the second comparator COM2 through the second node D2, and the other end is grounded; the second reference end Ref3, the second reference end is connected to the inverting input end of the second comparator COM2 , used to provide a second reference voltage V REF_ON2 ; reference module, the input end of the reference module is connected to a set voltage end provided with a predetermined voltage value, and the output end of the reference module is connected to the second comparator through the second node D2 The non-inverting input terminal of COM2, the reference module is used to amplify and output the voltage input to the reference module; the output terminal of the second comparator COM2 is connected to the input terminal of the judgment module; when the positive phase of the second comparator COM2 When the voltage value of the phase input terminal is greater than the second reference voltage V REF_ON2 , the output terminal of the second comparator COM2 outputs a predetermined signal.

設定電壓端包括一參考電阻RSET和一設定電流端Ref2,分別連接至參考模組的輸入端;參考電阻RSET具有一預定阻值,設定電流端Ref2具有一預定的輸入電流ISET;參考模組包括:放大器gm,放大器gm的輸入端作為參考模組的輸入端,放大器gm的輸出端通過第二節點D2連接第二比較器COM2,放大器gm用于按照一第二預定倍數M對設定電壓端輸出的電壓進行放大處理後輸出。 The voltage setting terminal includes a reference resistor RSET and a setting current terminal Ref2, which are respectively connected to the input terminals of the reference module; the reference resistor RSET has a predetermined resistance value, and the setting current terminal Ref2 has a predetermined input current ISET ; the reference module has a predetermined resistance value. The group includes: the amplifier gm, the input terminal of the amplifier gm is used as the input terminal of the reference module, the output terminal of the amplifier gm is connected to the second comparator COM2 through the second node D2, and the amplifier gm is used to set the voltage according to a second predetermined multiple M The voltage output from the terminal is amplified and output.

第一電壓端通過一第一電阻R1連接一輔助線圈AUX,輔助線圈AUX 與初級線圈P具有一預定的匝數比,以使第一電壓端輸入的電壓與反激式轉換器的輸入端的輸入電壓成比例相關;第一電壓端還通過一第三電阻R3連接上述輔助線圈AUX,輔助線圈AUX與初級線圈P具有一預定的匝數比,以使第一電壓端輸入的電壓與反激式轉換器的輸入端的輸入電壓成比例相關。 The first voltage terminal is connected to an auxiliary coil AUX through a first resistor R1, and the auxiliary coil AUX It has a predetermined turns ratio with the primary coil P, so that the input voltage of the first voltage terminal is proportional to the input voltage of the input terminal of the flyback converter; the first voltage terminal is also connected to the above auxiliary through a third resistor R3 The coil AUX, the auxiliary coil AUX and the primary coil P have a predetermined turns ratio, so that the voltage input at the first voltage terminal is proportional to the input voltage at the input terminal of the flyback converter.

第一電壓端和第一電阻R1之間具有一第一連接節點DR1;反激式轉換器還包括一第二電阻R2,第二電阻R2連接在第一連接節點DR1與接地端之間;第一電壓端和第三電阻R3之間具有一第二連接節點DR2;反激式轉換器還包括一第四電阻R4,第四電阻R4連接在第二連接節點DR2與接地端之間。 There is a first connection node DR1 between the first voltage terminal and the first resistor R1 ; the flyback converter further includes a second resistor R2, the second resistor R2 is connected between the first connection node DR1 and the ground terminal There is a second connection node DR2 between the first voltage terminal and the third resistor R3 ; the flyback converter also includes a fourth resistor R4, the fourth resistor R4 is connected between the second connection node DR2 and the ground terminal between.

具體地,本實施例中,上述第一放大模組采用電流鏡Mirror1實現,該電流鏡Mirror1放大的第一預定倍數K1可被設定為一個固定值。同樣地,上述第二放大模組采用電流鏡Mirror2實現,該電流鏡Mirror2放大的第三預定倍數K2可被設定為一個固定值。上述K1和K2的取值範圍均可以為[0.001,0.1],優選地可以為0.01。 Specifically, in this embodiment, the above-mentioned first amplifying module is implemented by using a current mirror Mirror1, and the first predetermined multiple K1 of the current mirror Mirror1 magnification can be set to a fixed value. Likewise, the above-mentioned second amplifying module is implemented by using the current mirror Mirror2, and the third predetermined multiple K2 of the current mirror Mirror2 magnification can be set to a fixed value. The value ranges of the above K1 and K2 can both be [0.001, 0.1], preferably 0.01.

本實施例中,第一電阻R1的阻值可以通過上述公式(4)確定,其中的K以K1替代,C用于表示第一電容C1的電容值,VREF_ON以VREF_ON1替代。第二電阻R2為可選的設置方案,且不限定其阻值大小。 In this embodiment, the resistance value of the first resistor R1 can be determined by the above formula (4), where K is replaced by K1, C is used to represent the capacitance value of the first capacitor C1, and V REF_ON is replaced by V REF_ON1 . The second resistor R2 is an optional setting solution, and its resistance value is not limited.

本實施例中,第三電阻R3的阻值與上述實施例三中相同,第四電阻R4為可選的設置方案,且不限定其阻值大小。 In this embodiment, the resistance value of the third resistor R3 is the same as that in the above-mentioned third embodiment, and the fourth resistor R4 is an optional setting scheme, and its resistance value is not limited.

本實施例中,上述第二預定倍數M的取值與上述實施例三中相同, 其取值範圍可以為[0.1μA/V,100μA/V],優選地可以為1μA/V。 In this embodiment, the value of the above-mentioned second predetermined multiple M is the same as that in the above-mentioned third embodiment, Its value range can be [0.1 μA/V, 100 μA/V], preferably 1 μA/V.

本實施例中,上述設定電壓端的VRSET的取值範圍可以為[0.1V,5V],優選地可以為0.65V。 In this embodiment, the value range of V RSET of the above-mentioned voltage setting terminal may be [0.1V, 5V], preferably 0.65V.

上述參考電阻RSET的阻值與上述實施例三中相同。 The resistance value of the above-mentioned reference resistor R SET is the same as that in the above-mentioned third embodiment.

上述判斷模組E實際為一個或閘電路模組,當該或閘電路模組的兩個輸入端其中之一輸入高電平信號時,該或閘電路模組的輸出端輸出第二控制信號(高電平信號)。該或閘電路模組的結構可以采用現有的或閘電路來實現,在此不再贅述。 The above judgment module E is actually an OR gate circuit module. When one of the two input ends of the OR gate circuit module inputs a high-level signal, the output end of the OR gate circuit module outputs a second control signal (high level signal). The structure of the OR-gate circuit module can be implemented by using an existing OR-gate circuit, which will not be repeated here.

則本實施例中,針對第一控制模組而言,當反激式轉換器進入開關閉合導通階段時,第一放大模組Mirror1根據檢測輔助線圈AUX的電壓VAUX得到的去磁電流IDMAG1放大K1倍之後形成K1*IDMAG1並送入第一比較器COM1的正相輸入端。同時第一比較器COM1的反相輸入端連接第一參考端Ref1以輸入第一參考電壓VREF_ON1。若第一比較器COM1的正相輸入端的輸入信號大于其反相輸入端的輸入信號,則第一比較器COM1輸出預定信號,也即高電平信號。 In this embodiment, for the first control module, when the flyback converter enters the switch-on phase, the first amplifying module Mirror1 obtains the demagnetizing current I DMAG1 according to the voltage V AUX of the detection auxiliary coil AUX. After being amplified by K1 times, K1*I DMAG1 is formed and sent to the non-inverting input terminal of the first comparator COM1. Meanwhile, the inverting input terminal of the first comparator COM1 is connected to the first reference terminal Ref1 to input the first reference voltage V REF_ON1 . If the input signal of the non-inverting input terminal of the first comparator COM1 is greater than the input signal of the inverting input terminal thereof, the first comparator COM1 outputs a predetermined signal, that is, a high-level signal.

針對第二控制模組而言,當反激式轉換器進入開關閉合導通階段時,第二放大模組Mirror2根據檢測輔助線圈AUX的電壓VAUX得到的去磁電流IDMAG2放大K2倍之後形成K2*IDMAG2並送入第二比較器COM2的正相輸入端,同時參考模組gm將來自設定電壓端的設定電壓VRSET放大M倍後形成M*VRSET並送入第二比較器COM2的正相輸入端。第二比較器COM2的反相輸入端連接第二參考端Ref3以輸入第一參考電壓VREF_ON2。若第二比較器COM2的正相輸入端的輸入信號大于其反相輸入端的輸入信號,則第二比較器COM2輸出預定信號,也即高電平信號。 For the second control module, when the flyback converter enters the switch-on state, the second amplifying module Mirror2 amplifies the demagnetizing current I DMAG2 obtained by detecting the voltage V AUX of the auxiliary coil AUX by a factor of K2 and then forms K2 *I DMAG2 is sent to the non-inverting input terminal of the second comparator COM2, while the reference module gm amplifies the set voltage V RSET from the set voltage terminal by M times to form M*V RSET and sends it to the positive phase of the second comparator COM2 phase input. The inverting input terminal of the second comparator COM2 is connected to the second reference terminal Ref3 to input the first reference voltage V REF_ON2 . If the input signal of the non-inverting input terminal of the second comparator COM2 is greater than the input signal of the inverting input terminal thereof, the second comparator COM2 outputs a predetermined signal, that is, a high-level signal.

則當第一控制模組或者第二控制模組輸出預定信號時,判斷模組E輸出第二控制信號,以驅動閘極開關G斷開,反激式轉換器進入開關斷開階段。 Then, when the first control module or the second control module outputs the predetermined signal, the judgment module E outputs the second control signal to drive the gate switch G off, and the flyback converter enters the switch off stage.

實施例八: Embodiment 8:

本實施例中,反激式轉換器能夠工作在DCM模式下,同樣也能夠工作在CCM模式下,即反激式轉換器同時支持DCM模式和CCM模式,其電路框圖如圖12中所示。 In this embodiment, the flyback converter can work in DCM mode as well as in CCM mode, that is, the flyback converter supports both DCM mode and CCM mode, and its circuit block diagram is shown in Figure 12 .

則如圖14中所示,上述第一控制單元A1具體包括:第一控制模組,第一控制模組的輸入端連接第一電壓端;第二控制模組,第二控制模組的輸入端連接第一電壓端;判斷模組E,判斷模組E的兩個輸入端分別連接第一控制模組的輸出端以及第二控制模組的輸出端,判斷模組E的輸出端作為第一控制單元的輸出端;當第一控制模組或者第二控制模組輸出一預定信號時,判斷模組E輸出第二控制信號。 As shown in FIG. 14, the above-mentioned first control unit A1 specifically includes: a first control module, the input terminal of the first control module is connected to the first voltage terminal; a second control module, the input terminal of the second control module The terminal is connected to the first voltage terminal; the judgment module E, the two input ends of the judgment module E are respectively connected to the output end of the first control module and the output end of the second control module, and the output end of the judgment module E is used as the first control module. An output end of the control unit; when the first control module or the second control module outputs a predetermined signal, the judgment module E outputs the second control signal.

第一控制模組包括:第一放大模組,第一放大模組的輸入端連接第一電壓端,第一放大模組的輸出端通過一第一節點D1連接一第一比較器COM1的正相輸入端,第一放大模組用于將輸入電流IDMAG1放大一第一預定倍數K1輸出,該第一放大模組可以采用電流鏡Mirror1實現;第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關G的閘極,第一場效應管Q1的汲極通過第一節點D1連接第一比較器COM1的正相輸入端,第一場效應管Q1的源極接地; 第一電容C1,第一電容C1的一端通過第一節點D1連接第一比較器COM1的正相輸入端,另一端接地;第一參考端Ref1,第一參考端連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓VREF_ON1;第一比較器COM1的輸出端連接判斷模組E的輸入端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓VREF_ON1時,第一比較器COM1的輸出端輸出預定信號。 The first control module includes: a first amplifying module, the input end of the first amplifying module is connected to the first voltage end, and the output end of the first amplifying module is connected to a positive terminal of a first comparator COM1 through a first node D1. At the phase input end, the first amplifying module is used to amplify the input current I DMAG1 by a first predetermined multiple K1 and output, the first amplifying module can be realized by using a current mirror Mirror1; the first field effect transistor Q1, the first field effect transistor The gate of Q1 is connected to the gate of the gate switch G through an inverter, the drain of the first field effect transistor Q1 is connected to the non-inverting input terminal of the first comparator COM1 through the first node D1, and the first field effect transistor Q1 The source is grounded; the first capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input end of the first comparator COM1 through the first node D1, and the other end is grounded; the first reference end Ref1, the first reference end is connected to the first The inverting input terminal of the comparator COM1 is used to provide a first reference voltage V REF_ON1 ; the output terminal of the first comparator COM1 is connected to the input terminal of the judgment module E; when the voltage value of the non-inverting input terminal of the first comparator COM1 When greater than the first reference voltage V REF_ON1 , the output terminal of the first comparator COM1 outputs a predetermined signal.

第二控制模組包括:第二放大模組,第二放大模組的輸入端連接第一電壓端,第二放大模組的輸出端通過一第二節點D2連接一第二比較器COM2的正相輸入端,第二放大模組用于將輸入電流IDMAG2放大一第三預定倍數K2輸出,第二放大模組可以采用電流鏡Mirror2實現;第二場效應管Q2,第二場效應管Q2的閘極通過一反向器連接閘極開關G的閘極,第二場效應管Q2的汲極通過第二節點D2連接第二比較器COM2的正相輸入端,第二場效應管Q2的源極接地;第二電容C2,第二電容C2的一端通過第二節點D2連接第二比較器COM2的正相輸入端,另一端接地;第二參考端Ref3,第二參考端Ref3連接第二比較器COM2的反相輸入端,用于提供一第二參考電壓VREF_ON2;參考模組,參考模組的輸入端連接一設置有預定電壓值的設定電壓端,參考模組的輸出端通過第二節點D2連接第二比較器COM2的正相輸入端,參考模組用于根據輸入至參考模組的電壓進行放大處理後輸出; 第二比較器COM2的輸出端連接判斷模組E的輸入端;當第二比較器COM2的正相輸入端的電壓值大于第二參考電壓VREF_ON2時,第二比較器COM2的輸出端輸出預定信號。 The second control module includes: a second amplification module, the input terminal of the second amplification module is connected to the first voltage terminal, and the output terminal of the second amplification module is connected to the positive terminal of a second comparator COM2 through a second node D2 Phase input terminal, the second amplifying module is used to amplify the input current I DMAG2 by a third predetermined multiple K2 and output, the second amplifying module can be realized by the current mirror Mirror2; the second field effect transistor Q2, the second field effect transistor Q2 The gate of the gate is connected to the gate of the gate switch G through an inverter, and the drain of the second field effect transistor Q2 is connected to the non-inverting input terminal of the second comparator COM2 through the second node D2. The source is grounded; the second capacitor C2, one end of the second capacitor C2 is connected to the non-inverting input end of the second comparator COM2 through the second node D2, and the other end is grounded; the second reference end Ref3, the second reference end Ref3 is connected to the second The inverting input end of the comparator COM2 is used to provide a second reference voltage V REF_ON2 ; the reference module, the input end of the reference module is connected to a set voltage end provided with a predetermined voltage value, and the output end of the reference module passes through the The two nodes D2 are connected to the non-inverting input terminal of the second comparator COM2, and the reference module is used for amplifying and outputting the voltage input to the reference module; the output terminal of the second comparator COM2 is connected to the input terminal of the judgment module E ; When the voltage value of the non-inverting input terminal of the second comparator COM2 is greater than the second reference voltage V REF_ON2 , the output terminal of the second comparator COM2 outputs a predetermined signal.

設定電壓端包括一參考電阻RSET和一設定電流端Ref2,分別連接至參考模組的輸入端;在設定電流端Ref2和參考模組RSET的輸入端之間設置一開關S1,開關S1初始處于閉合導通狀態,當設置好設定電流端Ref2的輸入電流ISET後,斷開開關;參考模組進一步包括:數位類比轉換器DAC,數位類比轉換器DAC的輸入端作為參考模組的輸入端,在斷開開關S1後,數位類比轉換器DAC用于鎖住設定電流端Ref2傳遞的輸入電壓VRSET;放大器gm,放大器gm的輸入端連接數位類比轉換器DAC的輸出端,放大器gm的輸出端通過第二節點D2連接第二比較器COM2,放大器gm用于按照一第二預定倍數M對設定電壓端輸出的電壓VRSET進行放大處理後輸出。 The set voltage terminal includes a reference resistor R SET and a set current terminal Ref2, which are respectively connected to the input terminal of the reference module; a switch S1 is set between the set current terminal Ref2 and the input terminal of the reference module R SET , and the switch S1 is initially In the closed conduction state, when the input current I SET of the set current terminal Ref2 is set, the switch is turned off; the reference module further includes: a digital-to-analog converter DAC, and the input end of the digital-to-analog converter DAC is used as the input end of the reference module , after disconnecting the switch S1, the digital-to-analog converter DAC is used to lock the input voltage V RSET transmitted by the set current terminal Ref2; the amplifier gm, the input end of the amplifier gm is connected to the output end of the digital-to-analog converter DAC, and the output of the amplifier gm The terminal is connected to the second comparator COM2 through the second node D2, and the amplifier gm is used for amplifying the voltage V RSET output by the set voltage terminal according to a second predetermined multiple M and then outputting it.

第一電壓端通過一第一電阻R1連接一輔助線圈AUX,輔助線圈AUX與初級線圈P具有一預定的匝數比,以使第一電壓端輸入的電壓與反激式轉換器的輸入端的輸入電壓成比例相關;第一電壓端還通過一第三電阻R3連接一輔助線圈AUX,輔助線圈AUX與初級線圈P具有一預定的匝數比,以使第一電壓端輸入的電壓與反激式轉換器的輸入端的輸入電壓成比例相關。 The first voltage terminal is connected to an auxiliary coil AUX through a first resistor R1, and the auxiliary coil AUX and the primary coil P have a predetermined turns ratio, so that the voltage input from the first voltage terminal is equal to the input terminal of the flyback converter. The voltage is proportional and related; the first voltage terminal is also connected to an auxiliary coil AUX through a third resistor R3, and the auxiliary coil AUX and the primary coil P have a predetermined turns ratio, so that the voltage input from the first voltage terminal is related to the flyback type. The input voltage at the input of the converter is proportionally related.

第一電壓端和第一電阻R1之間具有一第一連接節點DR1; 反激式轉換器還包括一第二電阻R2,第二電阻R2連接在第一連接節點DR1與接地端之間;第一電壓端和第三電阻R3之間具有一第二連接節點DR2;反激式轉換器還包括一第四電阻R4,第四電阻R4連接在第二連接節點DR2與接地端之間。 There is a first connection node DR1 between the first voltage terminal and the first resistor R1 ; the flyback converter further includes a second resistor R2, the second resistor R2 is connected between the first connection node DR1 and the ground terminal There is a second connection node DR2 between the first voltage terminal and the third resistor R3 ; the flyback converter also includes a fourth resistor R4, the fourth resistor R4 is connected between the second connection node DR2 and the ground terminal between.

本實施例與實施例七的唯一區別在于在設定電壓端設置一開關S1,在設定電流端Ref2設定好電流ISET後將該開關S1斷開,從而使得數位類比轉換器DAC能夠鎖住輸入電壓VRSET。該過程具體可以參照上述實施例四和實施例六,在此不再贅述。 The only difference between this embodiment and the seventh embodiment is that a switch S1 is set at the voltage setting terminal, and the switch S1 is turned off after the current I SET is set at the setting current terminal Ref2, so that the digital-to-analog converter DAC can lock the input voltage V RSET . For details of this process, reference may be made to the foregoing Embodiment 4 and Embodiment 6, and details are not described herein again.

本實施例中的其餘運行原理可參照實施例七,在此不再贅述。 For other operating principles in this embodiment, reference may be made to Embodiment 7, and details are not described herein again.

實施例九: Embodiment 9:

本實施例中,反激式轉換器能夠工作在DCM模式下,同樣也能夠工作在CCM模式下,即反激式轉換器同時支持DCM模式和CCM模式,其電路框圖如圖15中所示。 In this embodiment, the flyback converter can work in DCM mode as well as in CCM mode, that is, the flyback converter supports both DCM mode and CCM mode, and its circuit block diagram is shown in Figure 15 .

則本實施例中,如圖16中所示,上述第一控制單元A1具體包括:第一控制模組,第一控制模組的輸入端連接第一電壓端;第二控制模組,第二控制模組的輸入端連接第一電壓端;判斷模組E,判斷模組E的兩個輸入端分別連接第一控制模組的輸出端以及第二控制模組的輸出端,判斷模組E的輸出端作為第一控制單元的輸出端;當第一控制模組或者第二控制模組輸出一預定信號時,判斷模組E輸出第一控制信號。 In this embodiment, as shown in FIG. 16 , the above-mentioned first control unit A1 specifically includes: a first control module, the input end of the first control module is connected to the first voltage end; The input end of the control module is connected to the first voltage end; for judging module E, the two input ends of judging module E are respectively connected to the output end of the first control module and the output end of the second control module, and judging module E The output terminal of E is used as the output terminal of the first control unit; when the first control module or the second control module outputs a predetermined signal, the judgment module E outputs the first control signal.

第一控制模組包括:第一放大模組Converter1,第一放大模組Converter1的輸入端連接第一電壓端,第一放大模組Converter1的輸出端通過一第一節點D1連接一第一比較器的正相輸入端,第一放大模組Converter1用于將輸入電壓放大一第一預定倍數K1輸出,本實施例中第一放大模組采用第一電壓轉電流模組Converter1實現,K1的確定方式可以參照上述公式(9),其取值範圍可以為[0.1μA/V,100μA/V],優選地可以為2μA/V;第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關的閘極,第一場效應管Q1的汲極通過第一節點D1連接第一比較器COM1的正相輸入端,第一場效應管Q1的源極接地;第一電容C1,第一電容C1的一端通過第一節點D1連接第一比較器COM1的正相輸入端,另一端接地;第一參考端Ref1,第一參考端Ref1連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓VREF_ON1;第一比較器COM1的輸出端連接判斷模組E的輸入端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓VREF_ON1時,第一比較器COM1的輸出端輸出預定信號。 The first control module includes: a first amplifying module Converter1, an input end of the first amplifying module Converter1 is connected to a first voltage end, an output end of the first amplifying module Converter1 is connected to a first comparator through a first node D1 The non-inverting input terminal of the first amplifying module Converter1 is used to amplify the input voltage by a first predetermined multiple K1 and output. In this embodiment, the first amplifying module is realized by the first voltage-to-current module Converter1, and the determination method of K1 Can refer to the above formula (9), the value range can be [0.1μA/V, 100μA/V], preferably 2μA/V; the first field effect transistor Q1, the gate of the first field effect transistor Q1 passes through An inverter is connected to the gate of the gate switch, the drain of the first field effect transistor Q1 is connected to the non-inverting input terminal of the first comparator COM1 through the first node D1, and the source of the first field effect transistor Q1 is grounded; A capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input end of the first comparator COM1 through the first node D1, and the other end is grounded; the first reference end Ref1, the first reference end Ref1 is connected to the inverting input end of the first comparator COM1 The phase input terminal is used to provide a first reference voltage V REF_ON1 ; the output terminal of the first comparator COM1 is connected to the input terminal of the judgment module E; when the voltage value of the non-phase input terminal of the first comparator COM1 is greater than the first reference voltage When V REF_ON1 , the output terminal of the first comparator COM1 outputs a predetermined signal.

第二控制模組包括:第二放大模組Converter2,第二放大模組Converter2的輸入端連接第一電壓端,第二放大模組Converter2的輸出端通過一第二節點D2連接一第二比較器COM2的正相輸入端,第二放大模組Converter2用于將輸入電壓放大一第三預定倍數K2輸出,K2的確定方式可以參照上述公式(9),其取值範圍可以為 [0.1μA/V,100μA/V],優選地可以為2μA/V;第二場效應管Q2,第二場效應管Q2的閘極通過一反向器連接閘極開關的閘極,第二場效應管Q2的汲極通過第二節點D2連接第二比較器COM2的正相輸入端,第二場效應管Q2的源極接地;第二電容C2,第二電容C2的一端通過第二節點D2連接第二比較器COM2的正相輸入端,另一端接地;第二參考端Ref3,第二參考端Ref3連接第二比較器COM2的反相輸入端,用于提供一第二參考電壓VREF_ON2;參考模組,參考模組的輸入端連接一設置有預定電壓值的設定電壓端,參考模組的輸出端通過第二節點D2連接第二比較器COM2的正相輸入端,參考模組用于根據輸入至參考模組的電壓進行放大處理後輸出;第二比較器COM2的輸出端連接判斷模組E的輸入端;當第二比較器COM2的正相輸入端的電壓值大于第二參考電壓VREF_ON2時,第二比較器的輸出端輸出預定信號。 The second control module includes: a second amplification module Converter2, the input terminal of the second amplification module Converter2 is connected to the first voltage terminal, and the output terminal of the second amplification module Converter2 is connected to a second comparator through a second node D2 The non-inverting input terminal of COM2, the second amplifying module Converter2 is used to amplify the input voltage by a third predetermined multiple K2 and output, the determination method of K2 can refer to the above formula (9), and its value range can be [0.1μA/V ,100μA/V], preferably 2μA/V; the second field effect transistor Q2, the gate of the second field effect transistor Q2 is connected to the gate of the gate switch through an inverter, and the gate of the second field effect transistor Q2 The drain is connected to the non-inverting input terminal of the second comparator COM2 through the second node D2, and the source of the second field effect transistor Q2 is grounded; the second capacitor C2, one end of the second capacitor C2 is connected to the second comparator through the second node D2 The non-inverting input terminal of the comparator COM2, the other terminal is grounded; the second reference terminal Ref3, the second reference terminal Ref3 is connected to the inverting input terminal of the second comparator COM2, for providing a second reference voltage V REF_ON2 ; the reference module, The input terminal of the reference module is connected to a set voltage terminal with a predetermined voltage value, and the output terminal of the reference module is connected to the non-inverting input terminal of the second comparator COM2 through the second node D2. The voltage of the module is amplified and output; the output end of the second comparator COM2 is connected to the input end of the judgment module E; when the voltage value of the non-inverting input end of the second comparator COM2 is greater than the second reference voltage V REF_ON2 , the first The output terminals of the two comparators output a predetermined signal.

設定電壓端包括一參考電阻RSET和一設定電流端Ref2,分別連接至參考模組的輸入端;參考電阻RSET具有一預定阻值,設定電流端Ref2具有一預定的輸入電流ISET;參考模組包括:放大器gm,放大器gm的輸入端作為參考模組的輸入端,放大器gm的輸出端通過第二節點D2連接第二比較器COM2,放大器gm用于按照一第二預定倍數M對設定電壓端輸出的電壓VRSET進行放大處理後輸出。 The voltage setting terminal includes a reference resistor R SET and a setting current terminal Ref2, which are respectively connected to the input terminal of the reference module; the reference resistor R SET has a predetermined resistance value, and the setting current terminal Ref2 has a predetermined input current I SET ; the reference The module includes: an amplifier gm, the input terminal of the amplifier gm is used as the input terminal of the reference module, the output terminal of the amplifier gm is connected to the second comparator COM2 through the second node D2, and the amplifier gm is used for setting according to a second predetermined multiple M. The voltage V RSET output from the voltage terminal is amplified and output.

第一電壓端通過一第一電阻R1接入反激式轉換器的輸入端,以使第一電壓端輸入的電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關;第一電壓端和第一電阻R1之間具有一第一連接節點DR1;反激式轉換器還包括一第二電阻R2,第二電阻R2連接在第一連接節點DR1與接地端之間;第一電壓端還通過一第三電阻R3接入反激式轉換器的輸入端,以使第一電壓端輸入的電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關;第一電壓端和第三電阻R3之間具有一第二連接節點DR2;反激式轉換器還包括一第四電阻R4,第四電阻R4連接在第二連接節點DR2與接地端之間。 The first voltage terminal is connected to the input terminal of the flyback converter through a first resistor R1, so that the input voltage of the first voltage terminal is proportional to the input voltage V IN of the input terminal of the flyback converter; the first voltage There is a first connection node DR1 between the terminal and the first resistor R1 ; the flyback converter also includes a second resistor R2, the second resistor R2 is connected between the first connection node DR1 and the ground terminal; the first voltage The terminal is also connected to the input terminal of the flyback converter through a third resistor R3, so that the voltage input by the first voltage terminal is proportional to the input voltage V IN of the input terminal of the flyback converter; the first voltage terminal and There is a second connection node DR2 between the third resistors R3 ; the flyback converter further includes a fourth resistor R4, and the fourth resistor R4 is connected between the second connection node DR2 and the ground.

具體地,本實施例與上述實施例七的區別在于: Specifically, the difference between this embodiment and the above-mentioned seventh embodiment is:

1)第一電壓端所產生的輸入電壓不再是由輔助繞組AUX產生的與輸入電壓VIN成比例的電壓,而是直接檢測輸入電壓VIN,從而得到與輸入電壓VIN成比例相關的電壓VDET1和VDET21) The input voltage generated by the first voltage terminal is no longer a voltage proportional to the input voltage VIN generated by the auxiliary winding AUX, but directly detects the input voltage VIN, thereby obtaining a voltage V DET1 proportional to the input voltage VIN and V DET2 .

2)本實施例中的第一放大模組和第二放大模組不再是電流鏡,而是電壓轉電流模組Converter1和Converter2,其將電壓VDET轉換成一第一預定倍數K的電流K˙VDET2) The first amplifying module and the second amplifying module in this embodiment are no longer current mirrors, but voltage-to-current modules Converter1 and Converter2, which convert the voltage VDET into a current K˙ of a first predetermined multiple K V DET .

3)本實施例中的第一預定倍數K1和第三預定倍數K2可以采用上述公式(9)來確定(采用K1和K2來替代K)。 3) The first predetermined multiple K1 and the third predetermined multiple K2 in this embodiment can be determined by using the above formula (9) (K1 and K2 are used instead of K).

4)本實施例中的第二電阻R2為必選的電路組件,第一電阻R1和第二電阻R2之間的阻值關係可以通過上述公式(10)確定,此時公式(10)中的C表示第一電容C1的電容值,采用VREF_ON1替代VREF_ON,以及采用K1替代K。 4) The second resistor R2 in this embodiment is a necessary circuit component, and the resistance relationship between the first resistor R1 and the second resistor R2 can be determined by the above formula (10). C represents the capacitance value of the first capacitor C1, V REF_ON1 is used instead of V REF_ON , and K1 is used instead of K.

同樣地,本實施例中的第四電阻為必選的電路組件,第三電阻R3和第四電阻R4之間的阻值關係可以通過上述公式(10)確定,此時公式(10)中的C表示第一電容C2的電容值,采用VREF_ON2替代VREF_ON,以及采用K2替代K。 Similarly, the fourth resistor in this embodiment is a necessary circuit component, and the resistance relationship between the third resistor R3 and the fourth resistor R4 can be determined by the above formula (10), in this case, in formula (10) C represents the capacitance value of the first capacitor C2, V REF_ON2 is used instead of V REF_ON , and K2 is used instead of K.

本實施例中,上述第一控制單元A1的其餘運行原理和結構設置可參照上述實施例七進行,在此不再贅述。 In this embodiment, the remaining operation principles and structural settings of the above-mentioned first control unit A1 can be performed with reference to the above-mentioned seventh embodiment, which will not be repeated here.

實施例十: Embodiment ten:

本實施例中,反激式轉換器能夠工作在DCM模式下,同樣也能夠工作在CCM模式下,即反激式轉換器同時支持DCM模式和CCM模式,其電路框圖如圖15中所示。 In this embodiment, the flyback converter can work in DCM mode as well as in CCM mode, that is, the flyback converter supports both DCM mode and CCM mode, and its circuit block diagram is shown in Figure 15 .

則如圖17中所示,上述第一控制單元A1具體包括:第一控制模組,第一控制模組的輸入端連接第一電壓端;第二控制模組,第二控制模組的輸入端連接第一電壓端;判斷模組E,判斷模組E的兩個輸入端分別連接第一控制模組的輸出端以及第二控制模組的輸出端,判斷模組的輸出端作為第一控制單元的輸出端;當第一控制模組或者第二控制模組輸出一預定信號時,判斷模組輸出第一控制信號。 As shown in FIG. 17, the above-mentioned first control unit A1 specifically includes: a first control module, the input end of the first control module is connected to the first voltage end; a second control module, the input of the second control module The terminal is connected to the first voltage terminal; the judgment module E, the two input ends of the judgment module E are respectively connected to the output end of the first control module and the output end of the second control module, and the output end of the judgment module is used as the first control module. The output end of the control unit; when the first control module or the second control module outputs a predetermined signal, the judgment module outputs the first control signal.

第一控制模組包括:第一控制模組,第一控制模組的輸入端連接第一電壓端;第二控制模組,第二控制模組的輸入端連接第一電壓端;判斷模組E,判斷模組E的兩個輸入端分別連接第一控制模組的輸出端以及第二控制模組的輸出端,判斷模組E的輸出端作為第一控制單元的輸出端; 當第一控制模組或者第二控制模組輸出一預定信號時,判斷模組E輸出第一控制信號。 The first control module includes: a first control module, the input end of the first control module is connected to the first voltage end; the second control module, the input end of the second control module is connected to the first voltage end; the judgment module E, the two input ends of the judgment module E are respectively connected to the output end of the first control module and the output end of the second control module, and the output end of the judgment module E is used as the output end of the first control unit; When the first control module or the second control module outputs a predetermined signal, the judgment module E outputs the first control signal.

第一控制模組包括:第一放大模組Converter1,第一放大模組Converter1的輸入端連接第一電壓端,第一放大模組Converter1的輸出端通過一第一節點D1連接一第一比較器的正相輸入端,第一放大模組Converter1用于將輸入電壓放大一第一預定倍數K1輸出,本實施例中第一放大模組采用第一電壓轉電流模組Converter1實現,K1的確定方式可以參照上述公式(9),其取值範圍可以為[0.1μA/V,100μA/V],優選地可以為2μA/V;第一場效應管Q1,第一場效應管Q1的閘極通過一反向器連接閘極開關的閘極,第一場效應管Q1的汲極通過第一節點D1連接第一比較器COM1的正相輸入端,第一場效應管Q1的源極接地;第一電容C1,第一電容C1的一端通過第一節點D1連接第一比較器COM1的正相輸入端,另一端接地;第一參考端Ref1,第一參考端Ref1連接第一比較器COM1的反相輸入端,用于提供一第一參考電壓VREF_ON1;第一比較器COM1的輸出端連接判斷模組E的輸入端;當第一比較器COM1的正相輸入端的電壓值大于第一參考電壓VREF_ON1時,第一比較器COM1的輸出端輸出預定信號。 The first control module includes: a first amplifying module Converter1, an input end of the first amplifying module Converter1 is connected to a first voltage end, an output end of the first amplifying module Converter1 is connected to a first comparator through a first node D1 The non-inverting input terminal of the first amplifying module Converter1 is used to amplify the input voltage by a first predetermined multiple K1 and output. In this embodiment, the first amplifying module is realized by the first voltage-to-current module Converter1, and the determination method of K1 Can refer to the above formula (9), the value range can be [0.1μA/V, 100μA/V], preferably 2μA/V; the first field effect transistor Q1, the gate of the first field effect transistor Q1 passes through An inverter is connected to the gate of the gate switch, the drain of the first field effect transistor Q1 is connected to the non-inverting input terminal of the first comparator COM1 through the first node D1, and the source of the first field effect transistor Q1 is grounded; A capacitor C1, one end of the first capacitor C1 is connected to the non-inverting input end of the first comparator COM1 through the first node D1, and the other end is grounded; the first reference end Ref1, the first reference end Ref1 is connected to the inverting input end of the first comparator COM1 The phase input terminal is used to provide a first reference voltage V REF_ON1 ; the output terminal of the first comparator COM1 is connected to the input terminal of the judgment module E; when the voltage value of the non-phase input terminal of the first comparator COM1 is greater than the first reference voltage When V REF_ON1 , the output terminal of the first comparator COM1 outputs a predetermined signal.

第二控制模組包括:第二放大模組Converter2,第二放大模組Converter2的輸入端連接第一電壓端,第二放大模組Converter2的輸出端通過一第二節點D2連接一第二比較 器COM2的正相輸入端,第二放大模組Converter2用于將輸入電壓放大一第三預定倍數K2輸出,K2的確定方式可以參照上述公式(9),其取值範圍可以為[0.1μA/V,100μA/V],優選地可以為2μA/V;第二場效應管Q2,第二場效應管Q2的閘極通過一反向器連接閘極開關的閘極,第二場效應管Q2的汲極通過第二節點D2連接第二比較器COM2的正相輸入端,第二場效應管Q2的源極接地;第二電容C2,第二電容C2的一端通過第二節點D2連接第二比較器COM2的正相輸入端,另一端接地;第二參考端Ref3,第二參考端Ref3連接第二比較器COM2的反相輸入端,用于提供一第二參考電壓VREF_ON2;參考模組,參考模組的輸入端連接一設置有預定電壓值的設定電壓端,參考模組的輸出端通過第二節點D2連接第二比較器COM2的正相輸入端,參考模組用于根據輸入至參考模組的電壓進行放大處理後輸出;第二比較器COM2的輸出端連接判斷模組E的輸入端;當第二比較器COM2的正相輸入端的電壓值大于第二參考電壓VREF_ON2時,第二比較器的輸出端輸出預定信號。 The second control module includes: a second amplification module Converter2, the input terminal of the second amplification module Converter2 is connected to the first voltage terminal, and the output terminal of the second amplification module Converter2 is connected to a second comparator through a second node D2 The non-inverting input terminal of COM2, the second amplifying module Converter2 is used to amplify the input voltage by a third predetermined multiple K2 and output, the determination method of K2 can refer to the above formula (9), and its value range can be [0.1μA/V ,100μA/V], preferably 2μA/V; the second field effect transistor Q2, the gate of the second field effect transistor Q2 is connected to the gate of the gate switch through an inverter, and the gate of the second field effect transistor Q2 The drain is connected to the non-inverting input terminal of the second comparator COM2 through the second node D2, and the source of the second field effect transistor Q2 is grounded; the second capacitor C2, one end of the second capacitor C2 is connected to the second comparator through the second node D2 The non-inverting input terminal of the comparator COM2, the other terminal is grounded; the second reference terminal Ref3, the second reference terminal Ref3 is connected to the inverting input terminal of the second comparator COM2, for providing a second reference voltage V REF_ON2 ; the reference module, The input terminal of the reference module is connected to a set voltage terminal with a predetermined voltage value, and the output terminal of the reference module is connected to the non-inverting input terminal of the second comparator COM2 through the second node D2. The voltage of the module is amplified and output; the output end of the second comparator COM2 is connected to the input end of the judgment module E; when the voltage value of the non-inverting input end of the second comparator COM2 is greater than the second reference voltage V REF_ON2 , the first The output terminals of the two comparators output a predetermined signal.

設定電壓端包括一參考電阻RSET和一設定電流端Ref2,分別連接至參考模組的輸入端;在設定電流端Ref2和參考模組的輸入端之間設置一開關S1,開關S1初始處于閉合導通狀態,當設置好設定電流端Ref2的輸入電流ISET後,斷開開關S1;參考模組進一步包括: 數位類比轉換器DAC,數位類比轉換器的輸入端作為參考模組的輸入端,在斷開開關S1後,數位類比轉換器DAC用于鎖住設定電流端Ref2傳遞的輸入電壓VRSET;放大器gm,放大器gm的輸入端連接數位類比轉換器DAC的輸出端,放大器gm的輸出端通過第二節點D2連接第二比較器COM2,放大器gm用于按照一第二預定倍數M對設定電壓端輸出的電壓VRSET進行放大處理後輸出。 The set voltage terminal includes a reference resistor R SET and a set current terminal Ref2, which are respectively connected to the input terminal of the reference module; a switch S1 is set between the set current terminal Ref2 and the input terminal of the reference module, and the switch S1 is initially closed In the conduction state, when the input current I SET of the set current terminal Ref2 is set, the switch S1 is turned off; the reference module further includes: a digital-to-analog converter DAC, the input end of the digital-to-analog converter is used as the input end of the reference module, and the reference module further includes: After the switch S1 is turned off, the digital-to-analog converter DAC is used to lock the input voltage V RSET transmitted by the set current terminal Ref2; the input terminal of the amplifier gm is connected to the output terminal of the digital-to-analog converter DAC, and the output terminal of the amplifier gm passes through The second node D2 is connected to the second comparator COM2, and the amplifier gm is used for amplifying the voltage V RSET output by the setting voltage terminal according to a second predetermined multiple M and then outputting it.

第一電壓端通過一第一電阻R1接入反激式轉換器的輸入端,以使第一電壓端的電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關;第一電壓端和第一電阻R1之間具有一第一連接節點DR1;反激式轉換器還包括一第二電阻R2,第二電阻R2連接在第一連接節點DR1與接地端之間;第一電壓端還通過一第三電阻R3接入反激式轉換器的輸入端,以使第一電壓端的電壓與反激式轉換器的輸入端的輸入電壓VIN成比例相關;第一電壓端和第三電阻R3之間具有一第二連接節點DR2;反激式轉換器還包括一第四電阻R4,第四電阻R4連接在第二連接節點DR2與接地端之間。 The first voltage terminal is connected to the input terminal of the flyback converter through a first resistor R1, so that the voltage of the first voltage terminal is proportional to the input voltage V IN of the input terminal of the flyback converter; the first voltage terminal and the There is a first connection node DR1 between the first resistors R1 ; the flyback converter further includes a second resistor R2, the second resistor R2 is connected between the first connection node DR1 and the ground terminal; the first voltage terminal It is also connected to the input terminal of the flyback converter through a third resistor R3, so that the voltage of the first voltage terminal is proportional to the input voltage V IN of the input terminal of the flyback converter; the first voltage terminal and the third resistor There is a second connection node DR2 between R3 ; the flyback converter further includes a fourth resistor R4, and the fourth resistor R4 is connected between the second connection node DR2 and the ground terminal.

本實施例與上述實施例九的區別僅在于:在設定電壓端設置一開關S1,在設定電流端Ref2設定好電流ISET後將該開關S1斷開,從而使得數位類比轉換器DAC能夠鎖住輸入電壓VRSET。該過程具體可以參照上述實施例四和實施例六,在此不再贅述。 The difference between this embodiment and the above-mentioned ninth embodiment is only that a switch S1 is set at the voltage setting terminal, and the switch S1 is turned off after the current I SET is set at the setting current terminal Ref2, so that the digital-to-analog converter DAC can be locked Input voltage VRSET . For details of this process, reference may be made to the foregoing Embodiment 4 and Embodiment 6, and details are not described herein again.

本實施例中的其餘運行原理可參照實施例九,在此不再贅述。 For other operating principles in this embodiment, reference may be made to Embodiment 9, which will not be repeated here.

除了以上述實施例一至實施例十為示例進行闡述的初級側控制器A 之外,本發明中的反激式轉換器中的次級側控制器B具體如圖3、5、9、12和15中所示,包括:第二控制單元B1,第二控制單元B1的第一輸入端FB用于檢測次級線圈的輸出電壓,第二控制單元B1的第二輸入端CSP用于檢測次級線圈的輸出電流,第二控制單元B1用于根據次級線圈的輸出電壓和輸出電流處理得到第一控制信號並輸出;傳輸單元B2,傳輸單元B2的輸入端連接第二控制單元B1的輸出端,傳輸單元B2的輸出端連接隔離器C,傳輸單元B2用于將第二控制單元B1輸出的第一控制信號通過隔離器C發送至初級側控制器中的接收單元A2。 Except for the primary-side controller A described by taking the above-mentioned first to tenth embodiments as examples In addition, the secondary side controller B in the flyback converter in the present invention is specifically shown in FIGS. 3 , 5 , 9 , 12 and 15 , and includes: a second control unit B1 , a The first input terminal FB is used to detect the output voltage of the secondary coil, the second input terminal CSP of the second control unit B1 is used to detect the output current of the secondary coil, and the second control unit B1 is used to detect the output voltage of the secondary coil according to the output voltage of the secondary coil. and output current processing to obtain the first control signal and output; transmission unit B2, the input end of the transmission unit B2 is connected to the output end of the second control unit B1, the output end of the transmission unit B2 is connected to the isolator C, and the transmission unit B2 is used to The first control signal output by the second control unit B1 is sent to the receiving unit A2 in the primary side controller through the isolator C.

具體地,本發明中,當反激式轉換器處于開關斷開階段時,次級側的二極管被導通,此時第二控制單元B1通過其第一輸入端FB和第二輸入端CSP能夠檢測得到來自次級側的輸出電壓和輸出電流。隨後第二控制單元B1根據檢測得到的輸出電壓和輸出電流向傳輸單元B2輸出一第一控制信號,傳輸單元B2將該第一控制信號通過隔離器C發送給初級側控制器A中的接收單元A2,以供初級側的驅動單元A3導通閘極開關G,從而使得反激式轉換器進入開關導通階段。 Specifically, in the present invention, when the flyback converter is in the switch-off phase, the diode on the secondary side is turned on, and at this time, the second control unit B1 can detect through its first input terminal FB and second input terminal CSP. Get the output voltage and output current from the secondary side. Then the second control unit B1 outputs a first control signal to the transmission unit B2 according to the detected output voltage and output current, and the transmission unit B2 sends the first control signal to the receiving unit in the primary side controller A through the isolator C A2, for the driving unit A3 on the primary side to turn on the gate switch G, so that the flyback converter enters the switch-on phase.

綜上,本發明技術方案中,采用初級側控制器執行反激式轉換器的導通時間的計算和控制過程,便于獲取輸入電壓等相關信息,降低了計算複雜度,減少了初級側控制器和次級側控制器之間的傳輸線路連接,也不會影響到系統中的同步整流器的檢測。同時,采用初級側控制器執行反激式轉換器的導通時間的計算和控制過程,不需要擔心傳輸誤差問題,因此不需要在系統中設置開關導通/斷開的消隱時間,使得反激式轉換器能夠適用于高開關頻率的場景中。因此本發明中的反激式轉換器相對于現有技術中的相關結構具有更好的電 路性能。 To sum up, in the technical solution of the present invention, the primary side controller is used to perform the calculation and control process of the on-time of the flyback converter, which facilitates the acquisition of relevant information such as the input voltage, reduces the computational complexity, and reduces the number of Transmission line connections between secondary-side controllers also do not affect the detection of synchronous rectifiers in the system. At the same time, the primary-side controller is used to perform the calculation and control process of the on-time of the flyback converter, and there is no need to worry about the problem of transmission error, so there is no need to set the blanking time of switch on/off in the system, so that the flyback The converter can be used in high switching frequency scenarios. Therefore, the flyback converter in the present invention has better electrical performance than the related structures in the prior art. road performance.

本發明的較佳的實施例中,基于上文中該的反激式轉換器,還提供一種反激式轉換器的控制方法,具體如圖18中所示,包括:當反激式轉換器處于開關斷開階段時,次級側控制器B檢測次級線圈S的輸出回路並產生一第一控制信號(高電平信號),次級側控制器B通過隔離器C將第一控制信號發送至接收單元A2,接收單元A2將第一控制信號作為導通觸發信號(Trigger-on)發送至觸發器A4的置位端S,驅動單元A3根據觸發器A4的輸出端Q輸出的信號(高電平信號)驅動閘極開關導通,從而進入反激式轉換器的開關導通階段。 In a preferred embodiment of the present invention, based on the flyback converter described above, a control method for a flyback converter is also provided, as shown in FIG. 18 , including: when the flyback converter is in a When the switch is off, the secondary side controller B detects the output loop of the secondary coil S and generates a first control signal (high level signal), and the secondary side controller B sends the first control signal through the isolator C To the receiving unit A2, the receiving unit A2 sends the first control signal as a trigger signal (Trigger-on) to the set terminal S of the flip-flop A4, and the driving unit A3 outputs the signal (high power) according to the output terminal Q of the flip-flop A4. A flat signal) drives the gate switch to conduct, thus entering the switch-on phase of the flyback converter.

當閘極開關被導通後,第一控制單元A1根據第一電壓端的第一電壓以及閘極開關G的閘極電壓GATE處理得到第二控制信號(高電平信號)作為斷開觸發信號(Trigger-off)並發送至觸發器A4的置零端R,驅動單元A3根據觸發器A4的輸出端Q輸出的信號驅動閘極開關G斷開,從而進入反激式轉換器的開關斷開階段;上述控制方法循環執行(開關導通階段和開關斷開階段交替出現),從而以固定導通時間來控制反激式轉換器的運行狀態。 After the gate switch is turned on, the first control unit A1 processes and obtains the second control signal (high level signal) according to the first voltage of the first voltage terminal and the gate voltage GATE of the gate switch G as the disconnection trigger signal (Trigger -off) and sent to the zero-setting terminal R of the flip-flop A4, the drive unit A3 drives the gate switch G to disconnect according to the signal output by the output terminal Q of the flip-flop A4, thereby entering the switch-off stage of the flyback converter; The above-described control method is performed cyclically (switch-on phases and switch-off phases alternate), so as to control the operating state of the flyback converter with a fixed on-time.

本發明的上述描述以及附圖18中,為了便于理解,均將反激式轉換器處于開關斷開階段作為整個控制方法的起始點,在實際運行過程中上述控制方法為一個循環執行的過程,起始點僅在于系統初始化並開始運行之時,並不在于任何開關斷開階段或者開關導通階段。 In the above description of the present invention and FIG. 18, for ease of understanding, the flyback converter is in the switch-off phase as the starting point of the entire control method. In the actual operation process, the above control method is a cyclic execution process. , the starting point is only when the system is initialized and starts running, not during any switch-off phase or switch-on phase.

以上該僅為本發明較佳的實施例,並非因此限制本發明的實施方式及保護範圍,對于本領域技術人員而言,應當能夠意識到凡運用本發明說明書 及圖示內容所作出的等同替換和顯而易見的變化所得到的方案,均應當包含在本發明的保護範圍內。 The above are only preferred embodiments of the present invention, and are not intended to limit the embodiments and protection scope of the present invention. Those skilled in the art should be able to realize that any application of the description of the present invention The solutions obtained by the equivalent replacements and obvious changes made to the contents of the drawings and drawings shall be included in the protection scope of the present invention.

A1:控制單元A1: Control unit

A2:接收單元A2: Receiving unit

A3:驅動單元A3: Drive unit

B1:第二控制單元B1: Second control unit

B2:傳輸單元B2: Transmission unit

FB:第一輸入端FB: the first input terminal

CSP:第二輸入端CSP: the second input

A:初級側控制器A: Primary side controller

B:次級側控制器B: Secondary side controller

C:輸出端連接隔離器C: The output terminal is connected to the isolator

P:初級線圈P: Primary coil

S:次級線圈S: Secondary coil

GATE:閘極控制信號GATE: gate control signal

Claims (20)

一種固定導通時間的反激式轉換器,其中該反激式轉換器的變壓器初級側的初級線圈的一端連接該反激式轉換器的輸入端,另一端連接一閘極開關的汲極,該閘極開關的一閘極連接一初級側控制器,該閘極開關作為該反激式轉換器的開關;該反激式轉換器的變壓器次級側的次級線圈的一端經一二極體連接該反激式轉換器的輸出端,另一端連接一次級側的參考地電位,一次級側控制器耦合到該變壓器次級側並根據該反激式轉換器的輸出端的輸出產生一第一控制信號;該初級側控制器通過一隔離器與該次級側控制器連接;其中,該初級側控制器包括:接收單元,通過該隔離器與該次級側控制器連接,並通過該隔離器接收該次級側控制器產生的該第一控制信號,該接收單元輸出該第一控制信號作為導通觸發信號;一驅動單元,耦合接收該第一控制信號,並輸出一閘極控制信號控制該閘極開關導通;一第一控制單元,接收該驅動單元輸出的該閘極控制信號,並在一固定導通時間之後,輸出一第二控制信號耦合到該驅動單元,作為斷開觸發信號,觸發該驅動單元輸出一閘極控制信號控制該閘極開關斷開。 A flyback converter with fixed on-time, wherein one end of the primary coil on the primary side of the transformer of the flyback converter is connected to the input end of the flyback converter, and the other end is connected to the drain of a gate switch, the A gate of the gate switch is connected to a primary side controller, and the gate switch is used as the switch of the flyback converter; one end of the secondary coil on the secondary side of the transformer of the flyback converter is connected through a diode The output end of the flyback converter is connected, and the other end is connected to the reference ground potential of the primary side. The primary side controller is coupled to the secondary side of the transformer and generates a first one according to the output of the output end of the flyback converter control signal; the primary side controller is connected with the secondary side controller through an isolator; wherein, the primary side controller includes: a receiving unit, connected with the secondary side controller through the isolator, and through the isolation The receiver receives the first control signal generated by the secondary side controller, and the receiving unit outputs the first control signal as a turn-on trigger signal; a driving unit is coupled to receive the first control signal, and outputs a gate control signal to control The gate switch is turned on; a first control unit receives the gate control signal output by the drive unit, and after a fixed turn-on time, outputs a second control signal coupled to the drive unit as a disconnect trigger signal, Trigger the drive unit to output a gate control signal to control the gate switch to turn off. 如申請專利範圍第1項所述之反激式轉換器,其中該第一控制單元的第一輸入端連接一第一電壓端,該第一控制單元的第二輸入端連接該閘極開關的閘極,該第一控制單元根據該第一電壓端的第一電壓以及該閘極開關的 閘極電壓處理得到該第二控制信號,該第一電壓端的第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關。 The flyback converter as described in claim 1, wherein the first input terminal of the first control unit is connected to a first voltage terminal, and the second input terminal of the first control unit is connected to the gate switch gate, the first control unit according to the first voltage of the first voltage terminal and the gate switch The gate voltage is processed to obtain the second control signal, and the first voltage of the first voltage terminal is proportional to the input voltage of the input terminal of the flyback converter. 如申請專利範圍第2項所述之反激式轉換器,其中該初級側控制器還包括一觸發器,該第一控制單元的輸出端連接該觸發器的置零端,該接收單元的輸出端連接該觸發器的置位端,該觸發器的輸出端通過該驅動單元連接至該閘極開關的閘極;當該接收單元向該觸發器的置位端輸出該第一控制信號時,該驅動單元驅動該閘極開關導通;以及當該第一控制單元向該觸發器的置零端輸出該第二控制信號時,該驅動單元驅動該閘極開關斷開;當該閘極開關導通時,該第一控制單元根據該第一電壓處理得到並輸出該第二控制信號;以及當該閘極開關斷開時,該第一控制單元不輸出該第二控制信號。 The flyback converter as described in claim 2, wherein the primary side controller further comprises a flip-flop, the output terminal of the first control unit is connected to the zero-setting terminal of the flip-flop, and the output terminal of the receiving unit is connected to the zero-setting terminal of the flip-flop. The terminal is connected to the set terminal of the trigger, and the output terminal of the trigger is connected to the gate of the gate switch through the drive unit; when the receiving unit outputs the first control signal to the set terminal of the trigger, The driving unit drives the gate switch to turn on; and when the first control unit outputs the second control signal to the zero-setting terminal of the flip-flop, the driving unit drives the gate switch to turn off; when the gate switch turns on When , the first control unit obtains and outputs the second control signal according to the first voltage; and when the gate switch is turned off, the first control unit does not output the second control signal. 如申請專利範圍第3項所述之反激式轉換器,其中該反激式轉換器工作於斷續模式下;該第一控制單元進一步包括:第一放大模組,該第一放大模組的輸入端連接該第一電壓端,該第一放大模組的輸出端通過一第一節點連接一第一比較器的正相輸入端,該第一放大模組用於將流經該第一放大模組的電流或電壓放大一第一預定倍數輸出;第一場效應管,該第一場效應管的閘極通過一反向器連接該閘極開關的閘極,該第一場效應管的汲極通過該第一節點連接該第一比較器的正相輸入端,該第一場效應管的源極接地; 第一電容,該第一電容的一端通過該第一節點連接該第一比較器的正相輸入端,另一端接地;第一參考端,該第一參考端連接該第一比較器的反相輸入端,用於提供一第一參考電壓;該第一比較器的輸出端連接該第一控制單元的輸出端;當該第一比較器的正相輸入端的電壓值大於該第一參考電壓時,該第一比較器的輸出端輸出該第二控制信號。 The flyback converter as described in claim 3, wherein the flyback converter operates in a discontinuous mode; the first control unit further comprises: a first amplifying module, the first amplifying module The input terminal of the amplifier is connected to the first voltage terminal, the output terminal of the first amplifier module is connected to the non-inverting input terminal of a first comparator through a first node, and the first amplifier module is used to The current or voltage of the amplifying module is amplified by a first predetermined multiple and output; the first field effect transistor, the gate of the first field effect transistor is connected to the gate of the gate switch through an inverter, the first field effect transistor The drain electrode is connected to the non-inverting input terminal of the first comparator through the first node, and the source electrode of the first field effect transistor is grounded; a first capacitor, one end of the first capacitor is connected to the non-inverting input end of the first comparator through the first node, and the other end is grounded; a first reference end, the first reference end is connected to the inverting phase of the first comparator The input terminal is used to provide a first reference voltage; the output terminal of the first comparator is connected to the output terminal of the first control unit; when the voltage value of the non-inverting input terminal of the first comparator is greater than the first reference voltage , the output end of the first comparator outputs the second control signal. 如申請專利範圍第3項所述之反激式轉換器,其中該反激式轉換器工作於連續模式下;該第一控制單元進一步包括:第一放大模組,該第一放大模組的輸入端連接該第一電壓端,該第一放大模組的輸出端通過一第二節點連接一第一比較器的正相輸入端,該第一放大模組用於將流經該第一放大模組的電流放大一第一預定倍數輸出;第一場效應管,該第一場效應管的閘極通過一反向器連接該閘極開關的閘極,該第一場效應管的汲極通過該第二節點連接該第一比較器的正相輸入端,該第一場效應管的源極接地;第一電容,該第一電容的一端通過該第二節點連接該第一比較器的正相輸入端,另一端接地;第一參考端,該第一參考端連接該第一比較器的反相輸入端,用於提供一第一參考電壓;參考模組,該參考模組的輸入端連接一設置有預定電壓值的設定電壓端,該參考模組的輸出端通過該第二節點連接該第一比較器的正相輸入端,該參考模組用於根據輸入至該參考模組的電壓進行放大處理後輸出; 該第一比較器的輸出端連接該第一控制單元的輸出端;當該第一比較器的正相輸入端的電壓值大於該第一參考電壓時,該第一比較器的輸出端輸出該第二控制信號。 The flyback converter according to claim 3, wherein the flyback converter operates in a continuous mode; the first control unit further comprises: a first amplifying module, wherein the first amplifying module has a The input terminal is connected to the first voltage terminal, the output terminal of the first amplifier module is connected to the non-inverting input terminal of a first comparator through a second node, and the first amplifier module is used to The current of the module is amplified by a first predetermined multiple and output; the first field effect transistor, the gate of the first field effect transistor is connected to the gate of the gate switch through an inverter, and the drain of the first field effect transistor The non-inverting input terminal of the first comparator is connected through the second node, and the source of the first field effect transistor is grounded; the first capacitor, one end of the first capacitor is connected to the first comparator through the second node. a non-inverting input terminal, the other terminal is grounded; a first reference terminal, the first reference terminal is connected to the inverting input terminal of the first comparator for providing a first reference voltage; a reference module, the input of the reference module The terminal is connected to a set voltage terminal with a predetermined voltage value, the output terminal of the reference module is connected to the non-inverting input terminal of the first comparator through the second node, and the reference module is used for inputting to the reference module according to the input terminal. The voltage is amplified and output; The output end of the first comparator is connected to the output end of the first control unit; when the voltage value of the non-inverting input end of the first comparator is greater than the first reference voltage, the output end of the first comparator outputs the first Two control signals. 如申請專利範圍第5項所述之反激式轉換器,其中該設定電壓端包括一參考電阻和一設定電流端,分別連接至該參考模組的輸入端;該參考電阻具有一預定阻值,該設定電流端具有一預定的輸入電流;該參考模組包括:放大器,該放大器的輸入端作為該參考模組的輸入端,該放大器的輸出端通過該第二節點連接該第一比較器,該放大器用於按照一第二預定倍數對該設定電壓端輸出的電壓進行放大處理後輸出。 The flyback converter as described in claim 5, wherein the voltage setting terminal comprises a reference resistor and a setting current terminal, which are respectively connected to the input terminal of the reference module; the reference resistor has a predetermined resistance value , the set current terminal has a predetermined input current; the reference module includes: an amplifier, the input terminal of the amplifier is used as the input terminal of the reference module, and the output terminal of the amplifier is connected to the first comparator through the second node , the amplifier is used for amplifying the voltage output by the set voltage terminal according to a second predetermined multiple and then outputting the output. 如申請專利範圍第5項所述之反激式轉換器,其中該設定電壓端包括一參考電阻和一設定電流端,分別連接至該參考模組的輸入端;在該設定電流端和該參考模組的輸入端之間設置一開關,該開關初始處於閉合狀態,當設置好該設定電流端的輸入電流後,斷開該開關;該參考模組進一步包括:數位類比轉換器,該數位類比轉換器的輸入端作為該參考模組的輸入端,在斷開該開關後,該數位類比轉換器用於鎖住該設定電流端傳遞的輸入電壓;放大器,該放大器的輸入端連接該數位類比轉換器的輸出端,該放大器的輸出端通過該第二節點連接該第一比較器,該放大器用於按照一第二預定倍數對該設定電壓端輸出的電壓進行放大處理後輸出。 The flyback converter as described in claim 5, wherein the voltage setting terminal includes a reference resistor and a setting current terminal, which are respectively connected to the input terminal of the reference module; A switch is set between the input terminals of the module, and the switch is initially in a closed state. When the input current of the set current terminal is set, the switch is turned off; the reference module further includes: a digital-to-analog converter, the digital-to-analog converter The input terminal of the amplifier is used as the input terminal of the reference module. After the switch is turned off, the digital-analog converter is used to lock the input voltage transmitted by the set current terminal; the amplifier, the input terminal of the amplifier is connected to the digital-analog converter. The output end of the amplifier is connected to the first comparator through the second node, and the amplifier is used for amplifying the voltage output by the set voltage end according to a second predetermined multiple and then outputting it. 如申請專利範圍第4項或第5項所述之反激式轉換器,其中該第一電壓端通過一第一電阻連接一輔助線圈,該輔助線圈與該初級線圈具有一預 定的匝數比,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關。 The flyback converter as described in claim 4 or claim 5, wherein the first voltage terminal is connected to an auxiliary coil through a first resistor, and the auxiliary coil and the primary coil have a predetermined A turns ratio is determined so that the first voltage is proportional to the input voltage at the input of the flyback converter. 如申請專利範圍第8項所述之反激式轉換器,其中該第一電壓端和該第一電阻之間具有一連接節點;該反激式轉換器還包括一第二電阻,該第二電阻連接在該連接節點與接地端之間。 The flyback converter as described in claim 8, wherein there is a connection node between the first voltage terminal and the first resistor; the flyback converter further comprises a second resistor, the second resistor A resistor is connected between the connection node and ground. 如申請專利範圍第4項或第5項所述之反激式轉換器,其中該第一電壓端通過一第一電阻接入該反激式轉換器的輸入端,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關;該第一電壓端和該第一電阻之間具有一連接節點;該反激式轉換器還包括一第二電阻,該第二電阻連接在該連接節點與接地端之間。 The flyback converter as described in claim 4 or item 5, wherein the first voltage terminal is connected to the input terminal of the flyback converter through a first resistor, so that the first voltage and the The input voltage of the input terminal of the flyback converter is proportionally related; there is a connection node between the first voltage terminal and the first resistor; the flyback converter further includes a second resistor connected to the second resistor between the connection node and ground. 如申請專利範圍第3項所述之反激式轉換器,其中該反激式轉換器能夠工作於斷續模式下,也能夠工作於連續模式下;該第一控制單元進一步包括:第一控制模組,該第一控制模組的輸入端連接該第一電壓端;第二控制模組,該第二控制模組的輸入端連接該第一電壓端;判斷模組,該判斷模組的兩個輸入端分別連接該第一控制模組的輸出端以及該第二控制模組的輸出端,該判斷模組的輸出端作為該第一控制單元的輸出端;當該第一控制模組或者該第二控制模組輸出一預定信號時,該判斷模組輸出該第二控制信號。 The flyback converter as described in claim 3, wherein the flyback converter can work in discontinuous mode or continuous mode; the first control unit further comprises: a first control unit module, the input end of the first control module is connected to the first voltage end; the second control module, the input end of the second control module is connected to the first voltage end; the judgment module, the The two input ends are respectively connected to the output end of the first control module and the output end of the second control module, and the output end of the judgment module is used as the output end of the first control unit; when the first control module Or when the second control module outputs a predetermined signal, the judgment module outputs the second control signal. 如申請專利範圍第11項所述之反激式轉換器,其中該第一控制模組包括:第一放大模組,該第一放大模組的輸入端連接該第一電壓端,該第一放大模組的輸出端通過一第一節點連接一第一比較器的正相輸入端,該第一放大模組用於流經該第一放大模組的電流放大一第一預定倍數輸出;第一場效應管,該第一場效應管的閘極通過一反向器連接該閘極開關的閘極,該第一場效應管的汲極通過該第一節點連接該第一比較器的正相輸入端,該第一場效應管的源極接地;第一電容,該第一電容的一端通過該第一節點連接該第一比較器的正相輸入端,另一端接地;第一參考端,該第一參考端連接該第一比較器的反相輸入端,用於提供一第一參考電壓;該第一比較器的輸出端連接該判斷模組的輸入端;當該第一比較器的正相輸入端的電壓值大於該第一參考電壓時,該第一比較器的輸出端輸出該預定信號。 The flyback converter as described in claim 11, wherein the first control module comprises: a first amplifying module, an input end of the first amplifying module is connected to the first voltage end, the first The output end of the amplifying module is connected to the non-inverting input end of a first comparator through a first node, and the first amplifying module is used for amplifying the current flowing through the first amplifying module to a first predetermined multiple output; the first A field effect transistor, the gate of the first field effect transistor is connected to the gate of the gate switch through an inverter, and the drain of the first field effect transistor is connected to the positive pole of the first comparator through the first node a phase input terminal, the source of the first field effect transistor is grounded; a first capacitor, one end of the first capacitor is connected to the non-inverting input terminal of the first comparator through the first node, and the other terminal is grounded; a first reference terminal , the first reference terminal is connected to the inverting input terminal of the first comparator for providing a first reference voltage; the output terminal of the first comparator is connected to the input terminal of the judgment module; when the first comparator When the voltage value of the non-inverting input terminal of the first comparator is greater than the first reference voltage, the output terminal of the first comparator outputs the predetermined signal. 如申請專利範圍第11項所述之反激式轉換器,其中該第二控制模組包括:第二放大模組,該第二放大模組的輸入端連接該第一電壓端,該第二放大模組的輸出端通過一第二節點連接一第二比較器的正相輸入端,該第二放大模組用於將流經該第二放大模組的電流放大一第三預定倍數輸出;第二場效應管,該第二場效應管的閘極通過一反向器連接該閘極開關的閘極,該第二場效應管的汲極通過該第二節點連接該第二比較器的正相輸入端, 該第二場效應管的源極接地;第二電容,該第二電容的一端通過該第二節點連接該第二比較器的正相輸入端,另一端接地;第二參考端,該第二參考端連接該第二比較器的反相輸入端,用於提供一第二參考電壓;參考模組,該參考模組的輸入端連接一設置有預定電壓值的設定電壓端,該參考模組的輸出端通過該第二節點連接該第二比較器的正相輸入端,該參考模組用於根據輸入至該參考模組的電壓進行放大處理後輸出;該第二比較器的輸出端連接該判斷模組的輸入端;當該第二比較器的正相輸入端的電壓值大於該第二參考電壓時,該第二比較器的輸出端輸出該預定信號。 The flyback converter as claimed in claim 11, wherein the second control module comprises: a second amplifying module, the input end of the second amplifying module is connected to the first voltage end, the second amplifying module The output end of the amplifying module is connected to the non-inverting input end of a second comparator through a second node, and the second amplifying module is used to amplify the current flowing through the second amplifying module by a third predetermined multiple and output; The second field effect transistor, the gate of the second field effect transistor is connected to the gate of the gate switch through an inverter, and the drain of the second field effect transistor is connected to the second comparator through the second node. non-inverting input, The source of the second field effect transistor is grounded; the second capacitor, one end of the second capacitor is connected to the non-inverting input end of the second comparator through the second node, and the other end is grounded; the second reference end, the second The reference terminal is connected to the inverting input terminal of the second comparator for providing a second reference voltage; the reference module, the input terminal of the reference module is connected to a set voltage terminal with a predetermined voltage value, the reference module The output terminal of the second comparator is connected to the non-inverting input terminal of the second comparator through the second node, and the reference module is used for amplifying the output according to the voltage input to the reference module; the output terminal of the second comparator is connected to The input terminal of the judging module; when the voltage value of the non-inverting input terminal of the second comparator is greater than the second reference voltage, the output terminal of the second comparator outputs the predetermined signal. 如申請專利範圍第13項所述之反激式轉換器,其中該設定電壓端包括一參考電阻和一設定電流端,分別連接至該參考模組的輸入端;該參考電阻具有一預定阻值,該設定電流端具有一預定的輸入電流;該參考模組包括:放大器,該放大器的輸入端作為該參考模組的輸入端,該放大器的輸出端通過該第二節點連接該第二比較器,該放大器用於按照一第二預定倍數對該設定電壓端輸出的電壓進行放大處理後輸出。 The flyback converter as described in claim 13, wherein the voltage setting terminal comprises a reference resistor and a setting current terminal, which are respectively connected to the input terminals of the reference module; the reference resistor has a predetermined resistance value , the set current terminal has a predetermined input current; the reference module includes: an amplifier, the input terminal of the amplifier is used as the input terminal of the reference module, and the output terminal of the amplifier is connected to the second comparator through the second node , the amplifier is used for amplifying the voltage output by the set voltage terminal according to a second predetermined multiple and then outputting the output. 如申請專利範圍第13項所述之反激式轉換器,其中該設定電壓端包括一參考電阻和一設定電流端,分別連接至該參考模組的輸入端;在該設定電流端和該參考模組的輸入端之間設置一開關,該開關初始處於閉合狀態,當設置好該設定電流端的輸入電流後,斷開該開關; 該參考模組進一步包括:數位類比轉換器,該數位類比轉換器的輸入端作為該參考模組的輸入端,在斷開該開關後,該數位類比轉換器用於鎖住該設定電流端傳遞的輸入電壓;放大器,該放大器的輸入端連接該數位類比轉換器的輸出端,該放大器的輸出端通過該第二節點連接該第二比較器,該放大器用於按照一第二預定倍數對該設定電壓端輸出的電壓進行放大處理後輸出。 The flyback converter as described in claim 13, wherein the voltage setting terminal includes a reference resistor and a setting current terminal, which are respectively connected to the input terminal of the reference module; the setting current terminal and the reference A switch is set between the input terminals of the module, the switch is initially closed, and the switch is turned off after the input current of the set current terminal is set; The reference module further includes: a digital-to-analog converter, the input terminal of the digital-to-analog converter is used as the input terminal of the reference module, and after the switch is turned off, the digital-to-analog converter is used to lock the set current terminal. Input voltage; amplifier, the input end of the amplifier is connected to the output end of the digital-to-analog converter, the output end of the amplifier is connected to the second comparator through the second node, the amplifier is used for setting the setting according to a second predetermined multiple The voltage output from the voltage terminal is amplified and output. 如申請專利範圍第11項所述之反激式轉換器,其中該第一電壓端通過一第一電阻連接一輔助線圈,該輔助線圈與該初級線圈具有一預定的匝數比,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關;該第一電壓端還通過一第三電阻連接一輔助線圈,該輔助線圈與該初級線圈具有一預定的匝數比,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關。 The flyback converter of claim 11, wherein the first voltage terminal is connected to an auxiliary coil through a first resistor, and the auxiliary coil and the primary coil have a predetermined turns ratio, so that the The first voltage is proportional to the input voltage of the input terminal of the flyback converter; the first voltage terminal is also connected to an auxiliary coil through a third resistor, and the auxiliary coil and the primary coil have a predetermined turns ratio, so that the first voltage is proportional to the input voltage at the input of the flyback converter. 如申請專利範圍第16項所述之反激式轉換器,其中該第一電壓端和該第一電阻之間具有一第一連接節點;該反激式轉換器還包括一第二電阻,該第二電阻連接在該第一連接節點與接地端之間;該第一電壓端和該第三電阻之間具有一第二連接節點;該反激式轉換器還包括一第四電阻,該第四電阻連接在該第二連接節點與接地端之間。 The flyback converter of claim 16, wherein there is a first connection node between the first voltage terminal and the first resistor; the flyback converter further comprises a second resistor, the The second resistor is connected between the first connection node and the ground terminal; there is a second connection node between the first voltage terminal and the third resistor; the flyback converter further includes a fourth resistor, the first Four resistors are connected between the second connection node and the ground terminal. 如申請專利範圍第11項所述之反激式轉換器,其中該第一電壓端通過一第一電阻接入該反激式轉換器的輸入端,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關; 該第一電壓端和該第一電阻之間具有一第一連接節點;該反激式轉換器還包括一第二電阻,該第二電阻連接在該第一連接節點與接地端之間;該第一電壓端還通過一第三電阻接入該反激式轉換器的輸入端,以使該第一電壓與該反激式轉換器的輸入端的輸入電壓成比例相關;該第一電壓端和該第三電阻之間具有一第二連接節點;該反激式轉換器還包括一第四電阻,該第四電阻連接在該第二連接節點與接地端之間。 The flyback converter as described in claim 11, wherein the first voltage terminal is connected to the input terminal of the flyback converter through a first resistor, so that the first voltage is connected to the flyback converter The input voltage at the input of the converter is proportionally related; There is a first connection node between the first voltage terminal and the first resistor; the flyback converter further includes a second resistor connected between the first connection node and the ground terminal; the The first voltage terminal is also connected to the input terminal of the flyback converter through a third resistor, so that the first voltage is proportional to the input voltage of the input terminal of the flyback converter; the first voltage terminal and the There is a second connection node between the third resistors; the flyback converter further includes a fourth resistor connected between the second connection node and the ground. 如申請專利範圍第3項所述之反激式轉換器,其中該次級側控制器進一步包括:第二控制單元,該第二控制單元的第一輸入端用於檢測該次級線圈的輸出電壓,該第二控制單元的第二輸入端用於檢測該次級線圈的輸出電流,該第二控制單元用於根據該次級線圈的輸出電壓和輸出電流處理得到該第一控制信號並輸出;傳輸單元,該傳輸單元的輸入端連接該第二控制單元的輸出端,該傳輸單元的輸出端連接該隔離器,該傳輸單元用於將該第二控制單元輸出的該第一控制信號通過該隔離器發送至該初級側控制器中的該接收單元。 The flyback converter as described in claim 3, wherein the secondary side controller further comprises: a second control unit, the first input of the second control unit is used to detect the output of the secondary coil voltage, the second input end of the second control unit is used to detect the output current of the secondary coil, and the second control unit is used to process and output the first control signal according to the output voltage and output current of the secondary coil ; a transmission unit, the input end of the transmission unit is connected to the output end of the second control unit, the output end of the transmission unit is connected to the isolator, the transmission unit is used for the first control signal output by the second control unit to pass through The isolator sends to the receiving unit in the primary side controller. 一種反激式轉換器的固定導通時間的控制方法,應用於如申請專利範圍第1項至第19項中任一項所述之反激式轉換器,其中,該控制方法包括:該次級側控制器根據該反激式轉換器的輸出端的輸出產生一第一控制信號,該次級側控制器通過該隔離器將該第一控制信號發送至該接收單元,以供 該接收單元輸出該第一控制信號作為該導通觸發信號,該驅動單元根據該第一控制信號輸出一閘極控制信號控制該閘極開關導通;當該閘極開關被導通後,經過一固定導通時間後,該第一控制單元輸出一第二控制信號作為斷開觸發信號,該驅動單元根據該第二控制信號控制該閘極開關斷開;該控制方法循環執行,從而以固定導通時間來控制該反激式轉換器的運行狀態。 A control method for a fixed on-time of a flyback converter, which is applied to the flyback converter as described in any one of the claims 1 to 19, wherein the control method includes: the secondary The side controller generates a first control signal according to the output of the output terminal of the flyback converter, and the secondary side controller sends the first control signal to the receiving unit through the isolator for The receiving unit outputs the first control signal as the turn-on trigger signal, and the drive unit outputs a gate control signal according to the first control signal to control the gate switch to turn on; when the gate switch is turned on, after a fixed turn-on After time, the first control unit outputs a second control signal as a disconnect trigger signal, and the drive unit controls the gate switch to disconnect according to the second control signal. The operating state of the flyback converter.
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