TWI757122B - Field-effect-diode photo detector - Google Patents

Abstract

A field-effect-diode (FED) photo detector is used to generate a photocurrent when the device is illuminated and a bias voltage is applied. The FED photo detector includes a gate electrode, an insulating layer and a channel layer formed on the gate electrode, first and second electrodes formed on the channel layer, and a connecting member. An electric connection is made between the gate electrode and the first electrode or between the gate electrode and the second electrode, so that a dual-end field-effect-diode device is formed. When the bias voltage is applied to the first electrode with the second electrode grounded and the channel layer is illuminated, the photocurrent is generated. Note that the application of photo detector based FED uses only a single bias voltage, while conventional photo detector based on three-terminal thin-film transistor (TFT) usually needs two biases, thus the measuring circuit for the present invention is simplified and the manufacturing cost is reduced. Furthermore, the instability of the tum-on voltage drift encountered by conventional TFT could be avoided, and the stability of the photoresponsivity and the photosensitivity can be improved.

Description

Field effect diode light sensing semiconductor device

The present invention relates to a semiconductor element, in particular to a field effect diode light sensing semiconductor element.

At present, the semiconductor components used in the photo-sensing device mainly include a photo-sensing diode and a photo-sensing transistor.

The photo-sensing diode, for example: a typical photo-diode UV photo sensor, generally adopts the photocurrent mode of reverse bias voltage. The electric field is built in the depletion region, and when the UV light is irradiated, the active The electron-hole pair generated in the depletion region (the range between the depletion region and its left and right minority carrier diffusion lengths) is separated (holes are driven to the p-type semiconductor side, and electrons are driven to the n-type semiconductor side) to generate photocurrent. However, conventional photodiode UV light sensors using a pin structure in which an intrinsic layer is sandwiched between a p-type semiconductor and an n-type semiconductor layer require a relatively thick intrinsic layer (or low-concentration layer) , the epitaxial cost is higher. Therefore, although the p-i-n structure of the photodiode UV light sensor operated with cumulative breakdown can obtain relatively high UV light responsivity and sensitivity However, it has to face the cost of high epitaxy cost, low operating speed, low stability and high noise. However, if it is a photodiode UV sensor made of amorphous oxide semiconductor materials, since most of the amorphous oxide wide-bandgap semiconductors often have high defect density, it is not easy to do impurity doping, resulting in It is difficult to obtain hetero-type semiconductors (for example, ZnO-based semiconductors are n-type, and the fabrication technology of p-type ZnO-based semiconductors is not yet feasible).

Therefore, in order to avoid the above problems, currently in the application of UV light detection, amorphous oxide-based photodiode UV light sensors with Schottky contacts or heterojunctions are used. However, the former is limited by the difficulty of obtaining an appropriate work function and transparent Schottky metal, and often leads to excessive dark current due to insufficient height of the diffusion barrier; Due to the problem of band offset, the currently available photodiode UV light sensors still need to be improved.

On the other hand, the photo-sensing transistor includes a gate, a dielectric layer disposed on the gate, a semiconductor channel layer disposed on the dielectric layer, and two spaced apart from each other in the semiconductor channel The drain electrode and the source electrode on the layer are a photo-sensing transistor. The channel carrier concentration of the semiconductor channel layer will greatly increase and reduce the threshold voltage (represented by V _th ) when illuminated, so that two different predetermined biases can be applied to the gate electrode and the drain electrode respectively. When pressed, a photo-induced current is generated. Therefore, the current photo-sensing transistor needs to use dual power supplies to supply the predetermined bias voltages.

Referring to FIG. 1, it is the gate voltage (gate voltage, represented by V _G ) and drain current (drain current, represented by I) of the photo-sensing transistor with a predetermined bias voltage applied to the drain electrode. _D represents the transfer characteristic curve of ). Among them, the minimum value of the drain current (ID ) that is not illuminated is defined as a _{dark current (represented by I Dark )} , and the corresponding gate voltage is defined as a turn-on voltage, It is represented by V _on ). In addition, when the photo-sensing transistor receives light and applies a predetermined bias voltage with the value of the turn-on voltage (V _on ) to the gate, the corresponding drain current (I _D ) and the dark current (I _Dark ) A difference between is the ratio between a photo-current (photo-current, expressed by _IL ) and input power (input power, expressed by P _in ), which is defined as a photoresponsivity (photoresponsivity, expressed by R _ph ) represents it), and the ratio between the photocurrent (I _L ) and the dark current (I _Dark ) is defined as a photosensitivity (represented by S _ph ).

However, under the condition that the current photo-sensing transistor is operated with a predetermined bias voltage and illumination for a long time, it is affected by the defects of the semiconductor channel layer, the dielectric layer and the interface between them, which will make the photo-sensing transistor. The relationship curve between the gate voltage and the drain current (ID ) shifts to the left or right (as shown by arrow _A ), causing the turn-on voltage (V _on ) to change accordingly, and the photo-sensing voltage is derived. The problem of instability of the photoresponsivity (R _ph ) and photosensitivity (S _ph ) of the crystal.

In order to solve the above problem, a detection circuit for detecting the turn-on voltage (V _on ) needs to be used, resulting in a relatively high degree of complexity of circuit design.

Therefore, at present, the photo-sensing transistor needs to be supplied with dual power supplies respectively. The bias voltage of the gate electrode and the drain electrode and the use of the detection circuit to dynamically detect the turn-on voltage result in relatively high cost of using the current photo-sensing transistor.

Therefore, the object of the present invention is to provide a field effect diode light sensing semiconductor device which can overcome at least one disadvantage of the prior art.

Therefore, the field-effect diode light-sensing semiconductor element of the present invention is suitable for generating a light-induced current when a bias voltage is applied and illuminated, and the field-effect diode light-sensing semiconductor element comprises a gate electrode, A dielectric layer, a channel layer, a first electrode, a second electrode, and a connection line.

The dielectric layer is formed on the gate electrode.

The channel layer is made of a semiconductor material and is formed on the dielectric layer spaced apart from the gate electrode.

The first electrode is formed on the channel layer.

The second electrode and the first electrode are formed on the channel layer spaced apart from each other.

The connecting wire is made of conductive material and electrically connects the first electrode and the gate electrode, or electrically connects the second electrode and the gate electrode.

When the bias voltage is applied to the first electrode and the channel layer is illuminated, the channel layer can generate the light sensing between the first electrode and the second electrode (ground) should current.

The effect of the present invention is that the field effect diode photo-sensing semiconductor device utilizes the connecting wire to electrically connect the first electrode and the gate electrode, or the design that the connecting wire electrically connects the second electrode and the gate electrode , which is a double-ended element. Therefore, when using the field-effect diode photo-sensing semiconductor device, only a single bias voltage needs to be applied, and it is not necessary to apply different bias voltages to the drain electrode and the gate electrode respectively as in a conventional photo-sensing transistor. There is no need to use a detection circuit to detect a turn-on voltage, the operation is simple, and the setting cost and complexity of using the field effect diode light-sensing semiconductor device are greatly reduced, and the current turn-on voltage drift under dark current is solved. Instability problem, and thus improve the photoresponsivity and photosensitivity stability.

3: Substrate

4: Gate electrode

21: The first connection surface

22: Second connection surface

3: Dielectric layer

4: channel layer

41: First surface

42: Second Surface

5: The first electrode

51: The first buffer layer

52: the first metal electrode layer

6: The second electrode

61: Second buffer layer

62: second metal electrode layer

7: Connection surface

81: The first mask

82: Second mask

83: Third mask

84: first photoresist layer

85: The first predetermined position

86: Fourth mask

87: Second photoresist layer

88: Second predetermined location

W: width

L: length

Other features and effects of the present invention will be clearly presented in the embodiments with reference to the drawings, wherein: FIG. 1 is a diagram showing the relationship between gate bias and drain current, illustrating a conventional photo-sensing transistor. The drain current of unilluminated and illuminated, and a turn-on voltage corresponding to a dark current will drift left and right; FIG. 2 is a cross-sectional schematic diagram illustrating a first implementation of the field effect diode light-sensing semiconductor device of the present invention Example; FIG. 3 is a three-dimensional schematic diagram illustrating the first embodiment; 4 to 6 are schematic cross-sectional flow charts illustrating the manufacturing method of the first embodiment; FIG. 7 is a schematic cross-sectional view illustrating a second embodiment of the field effect diode light-sensing semiconductor device of the present invention; FIG. 8 is a diagram showing the relationship between a bias voltage and a drain current when the first embodiment is taken as a specific example 1 and is a forward field effect diode (F-FED) when not illuminated; FIG. 9 is a Taking the second embodiment as a specific example 2 and a reverse field effect diode (B-FED), the relationship between the bias voltage and the drain current when not illuminated; FIG. 10 is the specific example 1. The relationship between the predetermined bias voltage and the drain current when not illuminated and illuminated by light of different wavelengths; FIG. 11 is the transition of gate bias voltage and drain current when the comparative example is not illuminated and illuminated by light of different wavelengths Characteristic graph; Fig. 12 is the transfer characteristic graph of gate bias and drain current of the comparative example after the negative bias stress test of 0, 10, 100 and 1000 seconds respectively; Fig. 13 is the comparison Example The transfer characteristic curves of gate bias voltage and drain current after 0, 10, 100 and 1000 seconds of positive bias stress test respectively; The relationship between the bias voltage and the drain current after the negative bias stress test for 1000 seconds; Figure 15 shows the specific example 1 after the positive bias stress test for 0, 10, 100 and 1000 seconds respectively. The relationship diagram of the bias voltage and the drain current; 16 is a graph showing the relationship between the bias stress test time and the drain current of the comparative example and the specific example 1; After the comparative example and the specific example 1 are respectively subjected to the negative bias stress test for 10, 100 and 1000 seconds, the photoresponsivity change between the comparative example and the specific example 1 without the bias stress test; and FIG. 18 is a A graph showing the relationship between the negative bias stress test time and the change of light sensitivity, illustrating the comparison between the comparative example and the specific example 1 after the negative bias stress test for 10, 100, and 1000 seconds, respectively, and the comparison without the bias stress test. The amount of light sensitivity change between the example and the specific example 1.

Before the present invention is described in detail, it should be noted that in the following description, similar elements are designated by the same reference numerals.

Referring to FIG. 2 and FIG. 3 , a first embodiment of the field effect diode photo-sensing semiconductor device of the present invention is suitable for generating a photo-induced current when a bias voltage is applied and illuminated. The field effect diode light sensing semiconductor device includes a substrate 1, a gate electrode 2 formed on the substrate 1, a dielectric layer 3 formed on the gate electrode 2, a dielectric layer 3 formed on the dielectric The channel layer 4 on the layer 3 , a first electrode 5 and a second electrode 6 formed on the channel layer 4 , and a connection line 7 .

The substrate 1 is a plate-shaped base material, and is made of silicon dioxide, for example but not limited to. The material of the substrate 1 can be determined according to the material and the formation method of the gate electrode 2 . In other variations of this embodiment, the substrate 1 can also be a circuit board.

The gate electrode 2 is a thin film made of conductive material and formed on the substrate 1 . The gate electrode 2 has a first connection surface 21 opposite to the substrate 1 , and a second connection surface 22 in the same direction as the first connection surface 21 . In this embodiment, the gate electrode 2 is made of titanium (Ti). In other variations of this embodiment, the gate electrode 2 may be, but not limited to, a heavily doped n- or p-type silicon substrate, a flexible metal substrate, or a transparent conductive metal oxide.

The dielectric layer 3 is a thin film made of a dielectric material and is formed on the first connection surface 21 of the gate electrode 2 , and the second connection surface 22 of the gate electrode 2 is exposed to the dielectric material. electrical layer 3. The dielectric layer 3 can be selected from HfSiO-based, _SiO2 -based, AlO3 _- based, _HfO2 -based, ZrO2 _- based, _Ta2O5 -based, _{La2O3 -} based, _{TiO2 -} based, and a combination of the above Made of material. In this embodiment, the dielectric layer 3 is made of Hf _x Si _(1-x) O, where 0<x<1; more specifically, the dielectric layer 3 is made of Hf _0.82 Si _0.18 O.

The channel layer 4 is made of semiconductor material and is a semiconductor thin film, and is formed on the dielectric layer 3 spaced apart from the gate electrode 2 . The channel layer 4 has a first surface 41 connected to the dielectric layer 3 and a surface opposite to the dielectric layer 3 And the second surface 42 as a light-receiving surface. The channel layer 4 can be selected from an n-type semiconductor material, a p-type semiconductor material, and a single-layer structure or a multi-layer structure formed by a combination of the above two materials. Has light-responsive properties. In this embodiment, the channel layer 4 is made of indium gallium zinc oxide (IGZO) semiconductor material, and is an n-type semiconductor material.

The first electrode 5 is connected to the channel layer 4 and spaced apart from the dielectric layer 3 for forming an ohmic contact with the channel layer 4 . In this embodiment, the first electrode 5 has a first buffer layer 51 formed directly on the second surface 42 of the channel layer 4 as a tunneling layer, and a first buffer layer 51 formed directly on the first buffer layer 51 on the first metal electrode layer 52 . In this embodiment, the material of the first metal electrode layer 52 may be metal or a transparent metal oxide material. The transparent metal oxide material is, for example, but not limited to, indium tin oxide (ITO for short) or fluorine-doped tin oxide (FTO for short). In this embodiment, the first metal electrode layer 52 is made of titanium. The first buffer layer 51 includes aluminum-doped zinc oxide.

The second electrode 6 is connected to the channel layer 4 and spaced apart from the dielectric layer 3 for forming an ohmic contact with the channel layer 4 , and is spaced apart from the first electrode 5 . In this embodiment, the shape of the second electrode 6 is substantially the same as that of the first electrode 5 , so the second electrode 6 also has a second surface 42 formed directly on the channel layer 4 as a tunnel layer of the second buffer layer 61, and a layer formed directly on the second buffer layer Second metal electrode layer 62 on 61 . The second metal electrode layer 62 can be made of metal or the transparent metal oxide material. In this embodiment, the second metal electrode layer 62 is made of titanium. The second buffer layer 61 includes aluminum doped zinc oxide.

The connection line 7 is made of a conductive material and electrically connects the first metal electrode layer 52 of the first electrode 5 and the gate electrode 2 . The connection line 7 is a metal layer body made of titanium metal and formed directly on the first metal electrode layer 52 and the second connection surface 22 of the gate electrode 2 . Alternatively, the connecting wire 7 can also be made of other metals.

It should be noted that, since ohmic contact can be formed between the first electrode 5 and the channel layer 4 and between the second electrode 6 and the channel layer 4, according to the material of the channel layer 4 (for example: yes For sensing light with relatively long wavelength), the first buffer layer 51 and the second buffer layer 61 can also be omitted, and the first metal electrode layer 52 and the connecting wire 7 can be integrally formed.

In addition, the substrate 1 can be a circuit board (not shown in the figure) on which the gate electrode 2 is arranged, and the connecting wire 7 can be a wire for soldering (not shown in the figure), as long as the electrical connection is made The first electrode 5 and the gate electrode 2 are sufficient.

Referring to FIGS. 4 to 6 , the fabrication method of the field-effect diode light-sensing semiconductor device mainly uses electron beam evaporation technology to form the gate electrode 2 on the substrate 1 (as shown in FIG. 2 ) first; Then in a chamber filled with argon gas, using a co-sputtering technique, a hafnium dioxide (HfO ₂ ) target and a silicon (Si) target are used on the gate electrode 2 opposite to the substrate 1 A portion of one surface forms the dielectric layer 3 . In the process of forming the dielectric layer 3 , a first mask 81 is used to correspondingly shield the area of the surface of the gate electrode 2 that does not need to form the dielectric layer 3 . After that, annealing was performed at a temperature of 600° C. in an oxygen atmosphere for 10 minutes.

Then, in a chamber filled with argon gas, the channel is formed on a surface of the dielectric layer 3 opposite to the gate electrode 2 with an indium gallium zinc oxide (IGZO) target using a sputtering technique Layer 4. And in the process of forming the channel layer 4, a second mask 82 is used to correspondingly shield the area of the dielectric layer 3 and the gate electrode 2 where the channel layer 4 does not need to be formed, and then in a nitrogen atmosphere at a temperature of 300°C Anneal for 10 minutes.

Next, using a yellow light lithography technique, among the exposed surfaces of the gate electrode 2, the dielectric layer 3 and the channel layer 4, it is not necessary to form the regions of the first electrode 5 and the second electrode 6, A third photomask 83 is used to form a first photoresist layer 84 hardened by yellow light development to define the first electrode 5 and the second photoresist on the second surface 42 of the channel layer 4 . A first predetermined position 85 of the electrode 6 .

Then, the first buffer layer 51 and the second buffer layer 61 are formed on the first predetermined position 85 of the channel layer 4 by using a radio frequency sputtering technique in a chamber filled with argon gas; and then the electron beam is used By evaporation technology, the first metal electrode layer 52 and the second metal electrode layer 62 are formed on the first buffer layer 51 and the second buffer layer 61 respectively; then, the first photoresist layer 84 is removed.

Continue, using the yellow light lithography technology, in the gate electrode 2, the dielectric Layer 3, the channel layer 4, the exposed surface of the first electrode 5 and the second electrode 6 in the area that does not need to form the connection line 7, cooperate with a fourth mask 86 to form a yellow light development. The hardened second photoresist layer 87 is used to define a second predetermined position 88 of the connection line 7 on the second connection surface 22 of the gate electrode 2 .

Finally, using the electron beam evaporation technique, the connection line 7 is formed on the second predetermined position 88 of the second photoresist layer 87 exposed outside the gate electrode 2 and the first electrode 5; then, the connection line 7 is removed. The second photoresist layer 87 completes the fabrication of the field effect diode light sensing semiconductor device.

Referring to FIG. 3 , when using the field effect diode light-sensing semiconductor element to sense light, a bias voltage is applied to the first electrode 5 , that is, the voltage of the first electrode 5 compared to the second electrode 6 The difference is the bias voltage, and the light is irradiated to the light-receiving surface of the channel layer 4 , so that the channel layer 4 can generate the photo-induced current between the first electrode 5 and the second electrode 6 .

The wavelength of light irradiated on the channel layer 4 is determined according to the band gap of the channel layer 4 . In this embodiment, the indium gallium zinc oxide (IGZO) semiconductor material of the channel layer 4 is the n-type semiconductor material, and is used to generate electron-hole pairs when irradiated with ultraviolet light. In other variations of this embodiment, the material of the channel layer 4 can also be made of a semiconductor material with a relatively low energy gap for sensing visible light or infrared light.

In more detail, since the channel layer 4 is made of n-type semiconductor material, the present invention is a photo-sensing field effect transistor with a fully depleted majority carrier of n-type, wherein the first electrode 5 is used as a photosensitive field effect transistor. A drain, the second electrode 6 serves as a source. When the connection line 7 connects the gate electrode 2 and the first electrode 5, when the bias voltage is applied to the first electrode 5, it means that the bias voltage is applied to the gate electrode 2 and the drain electrode at the same time, And the voltage difference between the gate electrode 2 and the drain electrode is zero. When the bias voltage is greater than 0 volts and increases, with the increase of the drain voltage, the channel layer 4 enters the electron accumulation state from the partially depleted state through the non-depleted state, so that a drain current (I _D ) is turned on. of high current. When the bias voltage is less than 0 volts and decreases, with the decrease of the drain voltage, the depletion degree of the channel layer 4 increases, so that the field effect diode photo-sensing semiconductor device is in a cut-off state. state, the drain current ( _ID ) is mainly the leakage current of the gate electrode 2 . Therefore, the field effect diode light-sensing semiconductor device has the forward rectification characteristics similar to a conventional pn diode, so it can be used as a forward field effect diode (F-FED) ).

Referring to FIG. 7 , it is a second embodiment of the field effect diode light-sensing semiconductor device of the present invention. The second embodiment is similar to the first embodiment, and the difference lies in that the connecting wire 7 is electrically connected to the first embodiment. The second electrode 6 and the gate electrode 2 are not connected between the first electrode 5 and the gate electrode 2 .

It should be noted that, the second buffer layer 61 can also be omitted, and the connecting wire 7 and the second electrode 6 are integrally formed.

When using the second embodiment, the bias voltage is applied to the first electrode 5, That is, the voltage difference between the first electrode 5 and the second electrode 6 is the bias voltage, and the light is also irradiated on the channel layer 4, and the channel layer 4 is generated between the first electrode 5 and the second electrode 5. This photo-induced current between electrodes 6 .

More specifically, in the above case, the first electrode 5 is also used as the drain electrode, and the second electrode 6 is used as the source electrode, which means that the bias voltage is applied to the drain electrode, and the gate electrode 2 and the The voltage difference between the sources is zero. When the bias voltage is greater than 0 volts and increases, the depletion degree of the channel layer 4 increases until the field effect diode photo-sensing semiconductor device is in the cut-off state, at this time, the drain electrode The current ( _ID ) is mainly the leakage current of the gate electrode 2 . When the bias voltage is less than 0 volts and decreases, the channel layer 4 enters an electron accumulation state from a partially depleted state, so that the drain current (I _D ) is a high current in an on state. Therefore, the field effect diode photo-sensing semiconductor device has reverse bias rectification characteristics opposite to that of the conventional pn diode, and can be used as a reverse field effect diode (represented by B-FED). Of).

Using the connecting wire 7 of the present invention to electrically connect the first electrode 5 and the gate electrode 2 or electrically connect the second electrode 6 and the gate electrode 2, only the bias voltage needs to be applied to the first electrode 5, According to the material of the channel layer 4, light in a specific wavelength range can be sensed. Compared with the need to apply a plurality of different bias values in operation, and set to dynamically measure the turn-on voltage (V The traditional photo-sensing transistor of the detection circuit of _on ) is relatively simple to use, and effectively simplifies the circuit and reduces the setting cost.

Furthermore, since the on-current of the field effect diode photo-sensing semiconductor element is controlled by the majority carrier through the stacking state of the channel layer 4, rather than the minority carrier effect, it has a relatively high current rectification ratio and reaction speed. On the other hand, since a dark current of the field effect diode photo-sensing semiconductor element that is not illuminated and is a reverse bias current is mainly determined by the gate leakage current, the dark current is also relatively stable, which can effectively improve the light response Degree (R _ph ) and photosensitivity (S _ph ) stability.

Measurement results

Referring to FIG. 2 , FIG. 3 , and FIG. 7 , the structure of a specific example 1 and a specific example 2 of the field effect diode light-sensing semiconductor device will be described below.

The structure of the specific example 1 is the first embodiment, and the structure of the specific example 2 is the second embodiment. In the specific example 1 and the specific example 2, the equivalent oxide thickness (Equivalent Oxide Thickness, represented by EOT) of the dielectric layer 3 is about 10 nm, and the dielectric constant is about 21.4. The thickness of the channel layer 4 is 30 nm. The thicknesses of the first buffer layer 51 and the second buffer layer 61 are both 25 nm, and the thicknesses of the first metal electrode layer 52 and the second metal electrode layer 62 are both 200 nm. A channel formed by the channel layer 4 between the first electrode 5 and the second electrode 6 has a width W of 200 μm and a length L of 20 μm.

Referring to FIG. 2 and FIG. 8 , FIG. 8 shows the relationship between the bias voltage and the drain current (ID ) when the bias voltage is applied to the first electrode 5 of the specific example 1 but the specific example 1 is not _illuminated . This specific example 1 in this state is used as F-FED. Referring to FIG. 7 and FIG. 9 , it is the relationship between the bias voltage and the drain current ( _ID ) when the bias voltage is applied to the first electrode 5 of the embodiment 2 but the embodiment 2 is not illuminated. This specific example 2 in this state is used as B-FED. It can be seen from Figure 8 and Figure 9 that F-FED and B-FED have symmetrical rectification characteristics.

Referring to FIG. 2 and FIG. 10 , the relationship between the bias voltage and the drain current (ID ) of applying the bias voltage to the first electrode 5 of the specific example 1 and _irradiating the channel layer 4 with light of different wavelengths is shown.

」表示所照光線的波長為310nm，記號「

」表示所照光線的波長為275nm。又，已照光的汲極電流(I_D)也就是該光感應電流。由圖10可以得知，該具體例1在受到波長範圍在400nm以下的光線照射時，其I-V特性曲線與未照光的I-V特性曲線不同，表示本具體例1確實能作為一場效二極體紫外光感測半導體元件。 In FIG. 10, the horizontal axis is the bias voltage applied to the first electrode 5, the symbol "□" represents no light, the symbol "○" represents the wavelength of the irradiated light is 630 nm, and the symbol "△" represents the irradiated light. The wavelength is 530nm, the symbol "◇" indicates that the wavelength of the illuminated light is 400nm, the symbol "▽" indicates that the wavelength of the illuminated light is 365nm, and the symbol "

” indicates that the wavelength of the irradiated light is 310 nm, and the symbol “

” indicates that the wavelength of the irradiated light is 275nm. In addition, the drain current ( _ID ) of the irradiated light is also the photo-induced current. It can be seen from FIG. 10 that when the specific example 1 is irradiated with light with a wavelength range below 400 nm, its IV characteristic curve is different from the IV characteristic curve of no light, indicating that the specific example 1 can indeed be used as a field effect diode ultraviolet. Light-sensing semiconductor elements.

」表示所照光線的波長為310nm，記號「

」表示所照光線的波長為275nm。又，已照光的汲極電流(I_D)也就是該光感應電流。由圖11可以得知，該比較例受到波長範圍在400nm以下的光線照射時，其轉移特性曲線與未照光的轉移特性曲線不同，表示該比較例為一紫外光感測電晶體。 Referring to FIG. 11 , when a fixed bias voltage of 4V is applied to the drain electrode of a comparative example, and a channel layer of the comparative example is irradiated with light of different wavelengths, the gate bias (V _G ) affects the drain electrode Transfer characteristic curve of the pole current ( _ID ). The difference between the comparative example and the specific example 1 is that the comparative example does not have the connecting wire. The symbol "□" indicates no light, the symbol "○" indicates that the wavelength of the irradiated light is 630 nm, the symbol "△" indicates that the wavelength of the illuminated light is 530 nm, the symbol "◇" indicates that the wavelength of the illuminated light is 400 nm, and the symbol "▽" ” indicates that the wavelength of the irradiated light is 365 nm, and the symbol “

” indicates that the wavelength of the irradiated light is 310 nm, and the symbol “

” indicates that the wavelength of the irradiated light is 275nm. In addition, the drain current ( _ID ) of the irradiated light is also the photo-induced current. As can be seen from FIG. 11 , when the comparative example is irradiated with light with a wavelength range below 400 nm, its transfer characteristic curve is different from that without light, indicating that the comparative example is an ultraviolet light sensing transistor.

Referring to FIG. 12 to FIG. 15 , FIG. 12 to FIG. 15 are respectively a negative bias stress (referred to as NBS) and a positive bias of the conventional photo-sensing transistor of the comparative example and the specific example 1 of the present invention. Compression stress (positive bias stress, expressed in PBS) after testing the device characteristics measurement results. A bias stress test is mainly to first apply a fixed bias voltage to the gate of the device for a predetermined time, and then measure the device characteristics. Since it is necessary to perform the negative bias stress test for different predetermined times and the positive bias stress test for different predetermined times, it is necessary to prepare a plurality of the comparative examples and a plurality of the specific examples.

Specifically, in the negative bias stress test of the comparative examples, the source electrodes and drain electrodes of several of the comparative examples are grounded first, and the gate electrodes of the comparative examples are respectively applied with a value of - The predetermined time for different bias voltages of 4V, the predetermined time is 0, 10, 100 and 1000 seconds respectively, and is a plurality of comparative examples tested by negative bias stress, wherein, the comparative example of negative bias stress test for 0 seconds That is, it is not under negative bias stress. After that, a bias voltage of 4V was applied to the drain electrode of the comparative example tested by the negative bias stress test, and the gate bias voltage (V _G ) of the comparative example tested by the negative bias stress test was measured. ) versus drain current ( _ID ) transfer characteristic curve (see Figure 12).

In the forward bias stress test of the comparative example, the remaining source electrodes and drain electrodes of the comparative example are grounded first, and a bias voltage of 4V is applied to the gate electrodes of the comparative example respectively. Different predetermined times, the predetermined times are 0, 10, 100 and 1000 seconds, respectively, and are a plurality of comparative examples that have been tested by positive bias stress. Bias stress, which is the same as the comparative example in which the negative bias stress test was performed for 0 seconds. Afterwards, a bias voltage of 4V was applied to the drain electrode of the comparative example tested by the positive bias stress test, and the gate bias voltage (V _G ) of the comparative example tested by the positive bias stress test was measured. ) versus drain current ( _ID ) transfer characteristics (see Figure 13).

Referring to FIG. 2 , on the other hand, the negative bias stress test of the specific example 1 is mainly a step of first performing the negative bias stress test similar to the comparative example on several of the specific examples 1, and The gate electrodes 4 were respectively applied with bias voltages with a value of -4V for 0, 10, 100 and 1000 seconds to obtain a plurality of specific examples 1 tested by negative bias stress. Since the specific example 1 is a double-terminal field effect diode element, applying a bias voltage to the gate electrode 4 is equivalent to applying a bias voltage to the first electrode 5 . After that, the IV characteristic curve relationship of the bias voltage applied to the first electrode to the drain current (ID) of the specific example 1 _subjected to the negative bias stress test is measured again (as shown in FIG. 14 ). In the forward bias stress test of the specific example 1, the steps of the forward bias stress test similar to the comparative example are firstly performed on the remaining parts of the specific example 1, and then the gate electrodes 4 are respectively applied. The values of 4V were biased for 0, 10, 100 and 1000 seconds, which became a number of specific examples 1 that were tested by positive bias stress. Then, the IV characteristic curve of the bias voltage applied to the first electrode and the drain current (ID ) of the specific example 1 _subjected to the positive bias stress test is measured again (as shown in FIG. 15 ).

Therefore, FIG. 12 is the transfer characteristic curve of the comparative example after the negative bias (-4V) stress test for 0, 10, 100 and 1000 seconds, respectively, and FIG. The transfer characteristic curve after 1000 seconds of positive bias (4V) stress test, Figure 14 shows the IV characteristics of the specific example 1 after 0, 10, 100 and 1000 seconds of negative bias (-4V) stress test respectively Curve, Figure 15 is the IV characteristic curve of the specific example 1 after the positive bias (4V) stress test for 0, 10, 100 and 1000 seconds, respectively. In Figs. 12 to 15, the mark "□" indicates that the stress test time is 0 seconds, the mark "○" indicates that the stress test time is 10 seconds, the mark "△" indicates that the stress test time is 100 seconds, and the mark "▽" indicates the stress The test time is 1000 seconds.

Referring to FIG. 16, it is the relationship between the time of applying the bias stress and the drain current (ID) of the comparative example tested by positive and negative bias stress and the specific example 1 _tested by positive and negative bias stress As shown in the figure, the drain current (ID) of the comparative example subjected to the positive and negative bias stress tests is when the drain voltage (V _D ) is a constant voltage of 4V, and the gate voltage ( _{V G )} is not subjected to the stress test. The turn-on voltage (V _on ) of the comparative example was measured as a constant voltage. The drain current (ID ) of the specific example 1 _subjected to the positive and negative bias stress tests is measured when the bias voltage of the first electrode 5 is a constant voltage of -1.5V. The symbol "■" represents the relationship between the negative bias stress (NBS) test time and the drain current (ID) of the comparative example, and the symbol "□" represents the negative bias stress ( _NBS ) test of the specific example 1. The relationship diagram between time and drain current ( _ID ), the symbol “●” represents the relationship between the time and drain current (ID ) when the comparative example was subjected to the forward bias stress ( _PBS ) test, and the symbol “○” represents the The relationship between the test time of positive bias stress ( _PBS ) and the drain current (ID ) is described in the specific example 1.

As can be seen from FIG. 16 , under the negative bias stress ( _NBS ) test of the comparative example and the specific example 1, after different bias stress test times, the variation of the drain current (ID ) is higher than that of the positive bias Severe under compressive stress (PBS) test. This measurement result can be attributed to the fact that during the negative bias stress (NBS) test, the threshold voltage (V _th ) moves toward the negative voltage direction, and approaches the turn-on voltage (V _on ) before the stress test, resulting in a rather severe The sub-threshold current changes; while in the positive bias stress (PBS) test, the threshold voltage (V _th ) moves to the positive voltage direction, the current change is mainly dominated by the gate leakage current, and the correlation with the threshold voltage (V _th ) low, so the drain current (I _D ) varies less. Since the general photo-sensing transistor and photo-sensing diode are in a negative bias stress (NBS) state in standby mode, the drain current (I _D ) change under the negative bias stress (NBS) test should be used focus for discussion. After different bias stress test times, the variation of the drain current (ID) of the comparative example after the negative bias stress ( _NBS ) test is about two orders of magnitude. In contrast, the specific example 1 is relatively stable. . This measurement result is attributed to the fact that the off current (off current, expressed as I _off ) of the specific example 1 is dominated by the gate leakage current, which has a low dependence on the threshold voltage (V _th ) and thus the drain current ( _ID ) The amount of change is small. Therefore, the measurement result in FIG. 16 confirms that the field effect diode light sensing semiconductor device of the present invention has good reliability and can indeed obtain relatively stable dark current.

Referring to FIG. 17 and FIG. 18, in FIG. 17, the symbol "□" represents the specific example 1 after the negative bias stress (NBS) test was performed for 10, 100 and 1000 seconds and the negative bias stress (NBS) test was not performed. The amount of change in light responsivity (R _ph ) between the specific example 1, the symbol "○" represents the negative bias stress (NBS) test after 10, 100 and 1000 seconds of the comparative example and no negative bias stress. (NBS) Variation in photoresponsivity (R _ph ) between comparative examples tested. In FIG. 18, the symbol "□" represents the difference between the specific example 1 after the negative bias stress (NBS) test for 10, 100 and 1000 seconds and the specific example 1 without the negative bias stress (NBS) test. The amount of light sensitivity (S _ph ) change, the symbol "○" represents the comparison between the comparative example after 10, 100 and 1000 seconds of negative bias stress (NBS) test and the comparative example without negative bias stress (NBS) test The amount of change in light sensitivity (S _ph ) from time to time. During the measurement process, the light wavelength of the irradiated measurement ultraviolet light is 365 nm. It can be seen from the measurement results in Fig. 17 and Fig. 18 that the light responsivity (R _ph ) and light sensitivity (S _ph ) of the specific example 1 tested by negative bias stress (NBS) are relatively stable because of small changes, indicating that the The invention of the field effect diode light-sensing semiconductor element can indeed achieve relatively stable light responsivity (R _ph ) and light sensitivity (S _ph ).

To sum up, the field effect diode photo-sensing semiconductor device of the present invention utilizes the connecting wire 7 to electrically connect the first electrode 5 and the gate electrode 2 or electrically connect the second electrode 6 and the gate electrode 2 The design can be used under a single bias voltage. In addition to being easy to operate, it is not necessary to set up a detection circuit to detect the turn-on voltage (V _on ) as in the traditional photo-sensing transistor, which greatly simplifies the circuit design. The current problem of unstable drift of the turn-on voltage (V _on ) under dark current (I _dark ) is avoided, and the stability of the light responsivity (R _ph ) and light sensitivity (S _ph ) is effectively improved, thereby improving the reliability of the device. It can be avoided, so the object of the present invention can indeed be achieved.

However, the above are only examples of the present invention, and should not limit the scope of the present invention. All simple equivalent changes and modifications made according to the scope of the application for patent of the present invention and the contents of the patent specification are still within the scope of the present invention. within the scope of the invention patent.

1: Substrate

2: Gate electrode

21: The first connection surface

22: Second connection surface

3: Dielectric layer

4: channel layer

41: First surface

42: Second Surface

5: The first electrode

51: The first buffer layer

52: the first metal electrode layer

6: The second electrode

61: Second buffer layer

62: second metal electrode layer

7: Connection surface

Claims (7)

A field-effect diode light-sensing semiconductor element is suitable for generating a light-induced current when a bias voltage is applied and illuminated, the field-effect diode light-sensing semiconductor element comprises: a gate electrode; an intermediate an electrical layer, formed on the gate electrode; a channel layer, made of a semiconductor material, and formed on the dielectric layer spaced apart from the gate electrode; a first electrode, formed directly on the channel layer a second electrode, which is directly formed on the channel layer at a distance from the first electrode; and a connecting line, which is made of conductive material and electrically connects the first electrode and the gate electrode, or is electrically connected The second electrode and the gate electrode, when the bias voltage is applied to the first electrode and the channel layer is illuminated, the channel layer can generate the photo-induced current between the first electrode and the second electrode . The field-effect diode light-sensing semiconductor device according to claim 1, wherein the connecting wire electrically connects the gate electrode and the first electrode, and the first electrode and the connecting wire are integrally formed. The field-effect diode light-sensing semiconductor device according to claim 1, wherein the connecting wire electrically connects the gate electrode and the second electrode, and the second electrode and the connecting wire are integrally formed. The field-effect diode light-sensing semiconductor device according to claim 1, further comprising a substrate on which the gate electrode is disposed. The field-effect diode light-sensing semiconductor device according to claim 4, wherein the connecting wire is a wire. The field effect diode photo-sensing semiconductor device according to claim 1, wherein the channel layer is selected from an n-type semiconductor material, a p-type semiconductor material, and a combination of the above two materials. a single-layer structure or a multi-layer structure. The field-effect diode light-sensing semiconductor element according to claim 1, wherein the dielectric layer is selected from the group consisting of HfSiO-based, _SiO2 -based, AlO3-based, _{HfO2 -} based, ZrO2 _- based, Ta2O _- based ₅ -based, La ₂ O ₃ -based, TiO ₂ -based, and a combination of the above are made of materials.

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