TWI750898B - A method of semiconductor processing and an apparatus for semiconductor processing - Google Patents

Abstract

A method of semiconductor processing including the following steps is provided: providing a semiconductor substrate with opposite active surface and back surface; forming an adhesive layer on the active surface of the semiconductor substrate, wherein the adhesive layer includes a first area and a second area surrounding the first area; performing a semi-curing step on the second area of the adhesive layer; and removing the adhesive layer after the semi-curing step is performed on the second area of the adhesive layer.

Description

Semiconductor processing method and semiconductor processing tool

The present invention relates to a semiconductor processing method and a semiconductor processing tool, and in particular, to a method for semi-curing an adhesive layer on the active surface of a semiconductor substrate and a corresponding tool.

In a semiconductor manufacturing process, an active surface (or crystal plane) is often temporarily protected by an adhesive tape. However, if the adhesive layer of the tape oozes out or leaks, it may reduce the protection of the active surface, and thus the yield and/or throughput of the process.

The present invention provides a semiconductor processing method and a semiconductor processing tool, which can improve the yield and/or throughput of the semiconductor process.

The semiconductor processing tool of the present invention is suitable for semi-curing the adhesive layer on the active surface of the semiconductor substrate. The semiconductor processing tool includes a light-shielding portion and a light-guiding portion. The light guide portion surrounds the light shielding portion. The size of the shading portion is smaller than that of the semiconductor size of the bulk substrate.

The semiconductor processing tool of the present invention is suitable for cutting and/or semi-curing the adhesive layer on the active surface of the semiconductor substrate. The tools for semiconductor processing include blades, light guides and light shielding layers. The light guide material is located on the blade. The light shielding layer is located on the light guide material.

In an embodiment of the present invention, the cutting surface of the blade protrudes from the light guide material and the light shielding layer.

The semiconductor processing method of the present invention includes the following steps: providing a semiconductor substrate having opposite active surfaces and a back surface; forming an adhesive layer on the active surface of the semiconductor substrate, wherein the adhesive layer includes a first area and a first area surrounding the first area. second zone; performing a semi-curing step on the second zone of the adhesive layer; and removing the adhesive layer after performing the semi-curing step on the second zone of the adhesive layer.

In one embodiment of the present invention, the semiconductor processing method further includes the following steps: after the semi-curing step is performed on the second area of the adhesive layer, an illuminating step is performed on the first area and the second area of the adhesive layer to remove the adhesive layer. Adhesive layer.

In one embodiment of the present invention, the semiconductor processing method further includes the following steps: after the semi-curing step is performed on the second area of the adhesive layer, and before the curing step is performed on the first area and the second area of the adhesive layer, Wet processing of semiconductor substrates.

In one embodiment of the present invention, the wet process includes wetting or flowing the semiconductor substrate and the adhesive layer in a liquid.

In an embodiment of the present invention, the semi-curing step of the second area of the adhesive layer is to use a first light with a first energy density to irradiate the first area and the second area of the adhesive layer. The step of illuminating the region is performed by a second light having a second energy density, and the first energy density is smaller than the second energy density.

In an embodiment of the present invention, the ratio of the first energy density to the second energy density ranges from 0.1% to 10%.

In an embodiment of the present invention, the semiconductor processing method further includes the following step: cutting a part of the adhesive layer protruding from the semiconductor substrate when the semi-curing step is performed on the second region of the adhesive layer.

Based on the above, in a step or process, the adhesive layer can protect the components or wires on the active surface of the semiconductor substrate by the aforementioned semiconductor processing method. In addition, through the semi-cured second region of the adhesive layer, the yield and/or throughput can be correspondingly improved. In addition, in the aforementioned semiconductor processing method, the use of corresponding tools can improve the yield and/or throughput of the semiconductor process.

100, 200: tools

101: Shading part

101W: Dimensions

102: Light guide part

201: shading layer

202: Light guide material

203: Blade

204: Cut Noodles

510: Substrate

520: Adhesive layer

521a: District 1

522a, 522b: Second District

522W: width

700: Semiconductor substrate

701: Active side

702: Back

700W: Dimensions

Lb, Lc: light

S1, S2, S3, S4, S5, S6, S7, S8: Steps

FIG. 1 is a partial schematic flow chart of a semiconductor processing method according to an embodiment of the present invention.

2A to 2D are schematic side views of a method of semiconductor processing according to an embodiment of the present invention.

3 is a schematic perspective view of a semiconductor processing method according to an embodiment of the present invention.

FIG. 4 is a schematic diagram of a method of semiconductor processing according to another embodiment of the present invention. Schematic side view.

Some embodiments are listed below and described in detail with the accompanying drawings, but the provided embodiments are not intended to limit the scope of the present invention. In addition, the drawings are for illustrative purposes only and are not drawn in full scale. In order to facilitate understanding, the same elements in the following description will be denoted by the same symbols. In addition, the terms such as "including" and "having" used in the text are all open-ended terms; that is, including but not limited to. In addition, terms such as "substantially", "substantially", "about" and the like used in the text may include an acceptable tolerance range. Moreover, the directional terms mentioned in the text, such as "up", "down", etc., are only used to refer to the direction of the drawings. Accordingly, the directional terms used are intended to illustrate rather than limit the present invention.

FIG. 1 is a partial schematic flow chart of a semiconductor processing method according to an embodiment of the present invention. 2A to 2D are schematic side views of a method of semiconductor processing according to an embodiment of the present invention. 3 is a schematic perspective view of a semiconductor processing method according to an embodiment of the present invention.

In this embodiment, the semiconductor processing method may be a part of a semiconductor (eg, integrated circuit (IC)) process.

Referring to FIG. 1 , in step S1 , a semiconductor substrate 700 (marked in FIG. 2A ) is provided. The semiconductor substrate 700 has an active surface 701 (indicated in FIG. 2A ) and a back surface 702 (indicated in FIG. 2A ). The active surface 701 is opposite to the rear active surface 702 .

In this embodiment, the semiconductor substrate 700 may include a silicon wafer, but the present invention is not limited thereto.

In this embodiment, the active surface 701 of the semiconductor substrate 700 may include active elements (eg, transistors), passive elements (eg, capacitors, resistors or inductors) formed by common semiconductor processes, and/or corresponding Wires (eg, interconnects), but the invention is not limited thereto.

Referring to FIG. 1 , in one embodiment, step S2 may be selectively performed according to requirements. In other words, the present invention does not limit that step S2 needs or does not need to be performed.

For example, step S2 may include placing the aforementioned semiconductor substrate 700 on a suitable platform or carrier to facilitate subsequent steps, but the invention is not limited thereto.

For another example, step S2 may include a corresponding transmission step, but the present invention is not limited thereto.

Referring to FIG. 1 and FIG. 2A , in step S3 , an adhesive layer 520 is formed on the active surface 701 of the semiconductor substrate 700 . The adhesive layer 520 includes a first region 521a and a second region 522a. In a top-view state (ie, viewed from a direction facing the active surface 701 of the semiconductor substrate 700 ), the second region 522 a surrounds the first region 521 a.

In step S3, the curing degree of the second region 522a is substantially the same as that of the first region 521a, and/or the viscosity of the second region 522a is substantially the same as that of the first region 521a.

In this embodiment, the adhesive layer 520 may be coated on the substrate 510 first. Then, by making the adhesive layer 520 face the active surface 701 of the semiconductor substrate 700 , the substrate 510 and the adhesive layer 520 coated thereon can comprehensively cover the active surface 701 of the semiconductor substrate 700 . In one embodiment, the sheet formed by the adhesive layer 520 and the substrate 510 may be referred to as a laminate sheet, but the invention is not limited thereto. In one embodiment, the aforementioned sheet (ie, the laminate) may further include a release layer (not shown).

In one embodiment, the material of the substrate 510 may include polyene (eg, polyethylene, polypropylene or derivatives thereof) or other suitable light-transmitting polymer materials.

In one embodiment, the material of the adhesive layer 520 may include a release agent, an acrylic adhesive and a photoinitiator. In one embodiment, the adhesiveness of the adhesive layer 520 may decrease relatively as the curing degree increases. For example, the composition of the adhesive layer 520 can be cross-linked (eg, imidized, but not limited) to a corresponding degree by means of light or heating, and the curing degree of the adhesive layer 520 can be increased. , and the adhesiveness of the adhesive layer 520 is relatively reduced.

Referring to FIG. 1 , in an embodiment, step S4 may be selectively performed according to requirements. In other words, the present invention does not limit that step S4 needs or does not need to be performed.

For example, step S4 may include grinding the back surface 702 of the semiconductor substrate 700, but the present invention is not limited thereto.

For another example, step S4 may include cutting a part of the adhesive layer 520 and/or the substrate 510 protruding from the semiconductor substrate 700 by a blade, so that the edges of the adhesive layer 520 and/or the substrate 510 are substantially aligned with the semiconductor substrate 700 The edges are cut flush, but the present invention does not limited to this.

For another example, step S4 may include a corresponding transmission step, but the present invention is not limited thereto.

Referring to FIG. 1 , FIG. 2B and FIG. 3 , in step S5 , a semi-curing step is performed on the second region 522 b of the adhesive layer 520 (ie, a semi-cured second region 522 b is formed).

In this embodiment, a semi-curing step can be performed on the adhesive layer 520 on the active surface 701 of the semiconductor substrate 700 by a semiconductor processing tool (hereinafter referred to as a tool) 100 . The fixture 100 includes a light shielding portion 101 and a light guiding portion 102 . The light guide portion 102 surrounds the light shielding portion 101 . The size 101W (eg, diameter) of the light shielding portion 101 is smaller than the size 700W (eg, diameter) of the semiconductor substrate 700 . In this way, light can be guided into the light guide portion 102 of the tool 100, and then, the corresponding light Lb emitted from the light guide portion 102 to the second area 522 of the adhesive layer 520 can cause the second area 522b of the adhesive layer 520 to be half-discharged. cured. That is to say, through the aforementioned semi-curing step, the curing degree of the second region 522b can be made greater than that of the first region 521a, and the viscosity of the second region 522b can be made smaller than that of the first region 521a.

In a possible embodiment, a similar tool can be formed by the shading portion 101 . That is, similar fixtures may not have other light guide portions similar to light guide portion 102 . Compared with the aforementioned jig (eg, the jig having no light guide portion in diameter), the jig 100 with the light guide portion 102 can provide more uniform reaction energy.

In this embodiment, the light Lb emitted from the light guide portion 102 to the second region 522 of the adhesive layer 520 may include ultraviolet light. The second region 522 of the adhesive layer 520 can be Semi-cured in a manner similar to photo-curing. In one embodiment, the wavelength range of the aforementioned ultraviolet light is approximately 320 nanometers (nm) to 400 nanometers. In one embodiment, the wavelength range of the aforementioned ultraviolet light is substantially between 350 nm and 360 nm. In one embodiment, the wavelength of the aforementioned ultraviolet light is substantially 355 nm.

In this embodiment, the energy density of the aforementioned ultraviolet light is about 0.1-100 millijoules/square centimeter (mJ/cm ² ).

If the energy density of the aforementioned ultraviolet light is too low (for example, the energy density is less than 0.1 mJ/cm ² ), the degree of curing may be correspondingly too low, and the adhesive layer may be easily self-curing in the subsequent steps. area flows out.

If the energy density of the aforementioned ultraviolet light is too high (for example, the energy density is greater than 100 mJ/cm ² ), the viscosity may be reduced due to the correspondingly high curing degree, and the liquid may penetrate.

In one embodiment, the energy density of the aforementioned ultraviolet light is approximately 30˜50 mJ/cm ² . Ultraviolet light with an energy density of 30-50 mJ/cm ² has a better process window.

In this embodiment, the width 522W of the semi-cured second region 522b is substantially between 0.5 millimeters (millimeter; mm) to 5 millimeters.

In a possible embodiment, the light Lb emitted from the light guide portion 102 to the second region 522 of the adhesive layer 520 may include infrared light. The second region 522 of the adhesive layer 520 may be semi-cured in a manner similar to thermal curing. Due to the wave nature of light, it is also feasible to add ultraviolet light to infrared light for manufacturing.

Referring to FIG. 1, in an embodiment, according to requirements, the Go to step S6. In other words, the present invention does not limit that step S6 needs or does not need to be performed.

For example, step S6 may include grinding the back surface 702 of the semiconductor substrate 700, but the present invention is not limited thereto.

For another example, step S6 may include a corresponding transmission step, but the present invention is not limited thereto.

In one embodiment, step S6 may include performing a wet process on the semiconductor substrate 700 . For example, step S6 may include soaking or flowing the semiconductor substrate 700 and the adhesive layer 520 (including the uncured first region 521 a and the semi-cured second region 522 b ) into a liquid. The aforementioned liquid includes, for example, an etching liquid or a cleaning liquid, but the present invention is not limited thereto. In this way, the adhesive layer 520 can protect the components or wires located on the active surface 701 of the semiconductor substrate 700 during the wet process of the semiconductor substrate 700 . In addition, the semi-cured second area 522b of the adhesive layer 520 can reduce the outflow of the adhesive layer, and the semi-cured second area 522b still has a considerable adhesive force. In this way, the yield and/or throughput of the semiconductor process can be improved. In one embodiment, the use of infrared thermal curing can increase the adhesion of the second region 522b during attachment, thereby reducing the penetration of the liquid used in the aforementioned wet process.

1 and FIG. 2C, in step S7, the first area 521c and the second area 522c of the adhesive layer 520 are illuminated with light Lc (ie, the first area 521c and the second area 522c after being illuminated are formed) .

In this embodiment, the adhesive layer 520 on the active surface 701 of the semiconductor substrate 700 can be irradiated comprehensively by ultraviolet light (ie, the adhesive layer 520 is irradiated). the first area 521c and the second area 522c), so that the adhesive force of the adhesive layer 520 is reduced (eg, it is almost completely photocured or partially carbonized). In one embodiment, the wavelength range of the aforementioned ultraviolet light is substantially between 320 nm and 400 nm. In one embodiment, the wavelength range of the aforementioned ultraviolet light is substantially between 350 nm and 360 nm. In one embodiment, the wavelength of the aforementioned ultraviolet light is substantially 355 nm.

In this embodiment, the energy density of the light ray Lb (indicated in FIG. 2B ) in step S5 is smaller than the energy density of the light ray Lc (indicated in FIG. 2C ) in step S7 . In this embodiment, the ratio of the energy density of the light Lb in step S5 to the energy density of the light Lc in step S7 is between 0.1% and 10%. For example, the energy density of the light Lc in step S7 is approximately 70-2000 mJ/cm ² .

Referring to FIG. 1 and FIG. 2D , in step S8 , the adhesive layer 520 is removed. For example, after step S7, the adhesive force of the adhesive layer 520 is reduced. In this way, the adhesive layer 520 or the corresponding substrate 510 can be easily separated from the active surface 701 of the semiconductor substrate 700 by peeling.

4 is a schematic side view of a method of semiconductor processing according to another embodiment of the present invention. The semiconductor processing method of the present embodiment is similar to the semiconductor processing method of the previous embodiment, and similar components or steps are denoted by the same reference numerals, and have similar functions, materials or methods, and descriptions are omitted.

Referring to FIG. 1 and FIG. 3 , in step S5 , a semi-curing step is performed on the second region 522 of the adhesive layer 520 .

In this embodiment, the adhesive layer 520 located on the active surface 701 of the semiconductor substrate 700 can be affixed by a semiconductor processing tool (hereinafter referred to as a tool) 200 . A semi-curing step is performed. The tool 200 includes a blade 203 , a light guide material 202 and a light shielding layer 201 . The light guide material 202 is located on the blade 203 . The light shielding layer 201 is located on the light guide material 202 .

In one possible example, similar fabrications may not have other light guides similar to light guide 202 . Compared with the aforementioned jig (eg, the jig without the light guide material in diameter), the jig 200 with the light guide material 202 can receive light more uniformly.

In this embodiment, anything suitable for cutting the adhesive layer 520 and/or the substrate 510 can be used as the blade 203 . In other words, the form of the blade 203 is not limited by FIG. 3 .

In this embodiment, the light shielding layer 201 can reflect the corresponding light, but the present invention is not limited thereto.

In this embodiment, the cut surface 204 of the blade 203 protrudes from the light guide material 202 and the light shielding layer 201 .

In this embodiment, when cutting the adhesive layer 520 and/or the substrate 510, any possible, possible or suitable (but not limited to) touching the surface of the adhesive layer 520 and/or the substrate 510 can be a blade Section 204 of 203. That is, when the adhesive layer 520 and/or the substrate 510 are cut by the blade 203 , the light guide material 202 and the light shielding layer 201 will not substantially touch the adhesive layer 520 and/or the substrate 510 .

In this embodiment, the part of the adhesive layer 520 and/or the substrate 510 protruding from the semiconductor substrate 700 can be cut by the blade 203 , so that the edges of the adhesive layer 520 and/or the substrate 510 are substantially aligned with the edge of the semiconductor substrate 700 . Trim the edges. In addition, when the part of the adhesive layer 520 and/or the base material 510 protruding from the semiconductor substrate 700 is cut by the blade 203 , the adhesive layer 520 located on the active surface 701 of the semiconductor substrate 700 can be semi-solidified ization steps. That is, the manufacturing tool 200 may be suitable for cutting and/or semi-curing the adhesive layer 520 on the active surface 701 of the semiconductor substrate 700 . In some embodiments, through the use of the tool 200, the corresponding throughput can be improved.

In this embodiment, if the corresponding light (eg, the light Lb shown in FIG. 1B ) is derived when the tool 200 circles around the semiconductor substrate 700 , then a ring-shaped second light can be formed correspondingly. Zone 522b.

In the foregoing description, all regions or partial regions of the adhesive layer may have corresponding states (eg, uncured state, semi-cured state or cured state, but not limited) in different steps.

To sum up, in one step or process, the adhesive layer can protect the components or wires on the active surface of the semiconductor substrate by the aforementioned semiconductor processing method. In addition, through the semi-cured second region of the adhesive layer, the yield and/or throughput can be correspondingly improved. In addition, in the aforementioned semiconductor processing method, the use of corresponding tools can improve the yield and/or throughput of the semiconductor process.

S1, S2, S3, S4, S5, S6, S7, S8: Steps

Claims (10)

A semiconductor processing tool is suitable for semi-curing an adhesive layer on an active surface of a semiconductor substrate, and the semiconductor processing tool includes: a light shielding part; and a light guiding part surrounding the light shielding part, wherein the The size of the light shielding portion is smaller than that of the semiconductor substrate. A semiconductor processing tool, suitable for cutting and/or semi-curing an adhesive layer located on an active surface of a semiconductor substrate, and the semiconductor processing tool comprises: a blade; a light guide material, located on the blade ; and a light shielding layer, located on the light guide material. The semiconductor processing tool according to claim 2, wherein the cutting surface of the blade protrudes from the light guide material and the light shielding layer. A method of semiconductor processing, comprising: providing a semiconductor substrate having opposite active surfaces and a back surface; forming an adhesive layer on the active surface of the semiconductor substrate, wherein the adhesive layer includes a first area and surrounds the first area A second area of a first area; performing a semi-curing step on the second area of the adhesive layer; and removing the adhesive layer after performing the semi-curing step on the second area of the adhesive layer. The method for semiconductor processing according to claim 4, further comprising: After the semi-curing step is performed on the second area of the adhesive layer, an illuminating step is performed on the first area and the second area of the adhesive layer to remove the adhesive layer. The semiconductor processing method according to claim 5, further comprising: after performing the semi-curing step on the second area of the adhesive layer, A wet process is performed on the semiconductor substrate before the curing step is performed in the second region. The method for semiconductor processing according to claim 6, wherein the wet process comprises wetting or flowing the semiconductor substrate and the adhesive layer into a liquid. The method for semiconductor processing according to claim 5, wherein: performing the semi-curing step on the second region of the adhesive layer is by means of a first light having a first energy density; The first area and the second area perform the illuminating step by using a second light having a second energy density; and the first energy density is smaller than the second energy density. The method of semiconductor processing of claim 8, wherein the ratio of the first energy density to the second energy density is between 0.1% and 10%. The semiconductor processing method according to claim 4, further comprising: when performing the semi-curing step on the second region of the adhesive layer, cutting a part of the adhesive layer protruding from the semiconductor substrate.

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