TWI750862B - Capacitive ultrasound transducer and manufacturing method thereof - Google Patents

Abstract

A capacitive ultrasound transducer including a substrate, a bottom electrode, an oscillating membrane, an top electrode, at least two sealing holes and a cavity is provided. The bottom electrode is located on the substrate. The oscillating membrane is located on the bottom electrode. The top electrode is located between the bottom electrode and the oscillating membrane. The at least two sealing holes are located on both sides of the top electrode. The cavity is located on the substrate and below the top electrode and between the bottom electrode, the top electrode and the at least two sealing holes. A manufacturing method of capacitive ultrasound transducer is also provided.

Description

Capacitive ultrasonic transducer and method of making the same

The present invention relates to a transducer and a manufacturing method thereof, and in particular, to a capacitive ultrasonic transducer and a manufacturing method thereof.

Generally speaking, in a capacitive ultrasonic transducer, a working voltage needs to be given so that the oscillating membrane can oscillate back and forth, and the distance between the upper electrode and the lower electrode directly affects the aforementioned working voltage. For example, when the distance between the upper electrode and the lower electrode is long, the required operating voltage will be higher, resulting in the need for high voltage circuit design. Therefore, the upper electrode and the lower electrode of the capacitive ultrasonic transducer The design of the relative position is extremely important.

The invention provides a capacitive ultrasonic transducer and a manufacturing method thereof, which can reduce the working voltage and have the advantages of low energy consumption and power saving.

A capacitive ultrasonic transducer of the present invention includes a lower electrode, an oscillating membrane, an upper electrode, at least two sealed holes and a cavity. The lower electrode is on the substrate. The oscillatory membrane is located on the lower electrode. The upper electrode is located between the lower electrode and the oscillating membrane. At least two sealing holes are located on both sides of the upper electrode. The cavity is located on the substrate and below the upper electrode, and is between the lower electrode, the upper electrode and at least two sealing holes.

A manufacturing method of a capacitive ultrasonic transducer of the present invention at least includes the following steps. A lower electrode is formed on the substrate. A sacrificial layer is formed on the lower electrode. An upper electrode is formed on the sacrificial layer. A vibrating film is formed on the upper electrode. At least two etching openings are formed in the oscillation film, wherein the at least two etching openings are located on both sides of the upper electrode and expose part of the sacrificial layer. An etching process is performed to remove the sacrificial layer through the at least two etching openings. At least two sealing holes are formed in the at least two etching openings, wherein the at least two sealing holes extend into the space partially replacing the sacrificial layer, so as to form a cavity under the upper electrode.

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.

Various embodiments of the present invention will be disclosed in the drawings below. For the sake of clarity, many practical details will be described together in the following description. It should be understood, however, that these practical details should not be taken to limit the invention. That is, in some embodiments of the invention, these practical details are unnecessary. In addition, for the purpose of simplifying the drawings, some well-known structures and elements are omitted from the drawings or shown in a simple schematic manner.

Throughout the specification, the same reference numbers refer to the same or similar elements. In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Other elements may also be present between the element and the other element. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no other elements interposed therebetween. As used herein, "connected" may refer to a physical and/or electrical connection. Furthermore, when two elements are "electrically connected" or "coupled" to each other, other elements may exist between the two elements.

The terminology used herein is for the purpose of describing particular embodiments of the present invention only, and not for the purpose of limiting the present invention. For example, "a," "an," and "the" as used herein do not limit the singular or plural form of the elements. As used herein, "or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will also be understood that, when used in this specification, the terms "comprising" or "comprising" specify the stated feature, region, integer, step, operation, presence of an element and/or part, but not excluding one or more other features , region, whole, step, operation, element, part and/or the presence or addition of a combination thereof.

Furthermore, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe one element's relationship to another element, as shown in the figures. It should be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one of the figures is turned over, other elements described as being on the "lower" side of the element would then be oriented on the "upper" side of the element. Thus, the exemplary term "lower" may include an orientation of "lower" and "upper" depending on the particular orientation of the figures. Similarly, if the device in one of the figures is turned over, other elements described as "below" or "beneath" elements would then be oriented "above" the other elements. Thus, the exemplary terms "below" or "beneath" can encompass both an orientation of above and below.

As used herein, "about" or "substantially" includes the stated value and the average value within an acceptable deviation of the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the error associated with the measurement. A specific amount (ie, the limit of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, as used herein, "about" or "substantially" may be used to select a more acceptable range of variation or standard deviation depending on optical properties, etching properties, or other properties, and not one standard deviation may apply to all properties.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed as having meanings consistent with their meanings in the context of the related art and the present invention, and are not to be construed as idealized or excessive Formal meaning, unless expressly defined as such herein.

1A to 1H are partial cross-sectional views of a capacitive ultrasonic transducer at different stages of a manufacturing process according to an embodiment of the present invention. In this embodiment, the manufacturing method of the capacitive ultrasonic transducer 100 may include the following steps.

Referring to FIG. 1A , a lower electrode 120 is formed on the substrate 110 . The material of the substrate 110 may be glass, silicon wafer, or other suitable substrate materials. The material of the lower electrode 120 may be a conductive material. For example, the material of the lower electrode 120 may be titanium (Ti), aluminum (Al) or a combination thereof. Further, the lower electrode 120 is a conductive material composed of titanium/aluminum/titanium, but the present invention is not limited thereto, the material of the lower electrode 120 may be any suitable conductive material, and the lower electrode 120 may be made of an electrochemical deposition method. , sputtering deposition method, thermal evaporation deposition method, electron beam evaporation deposition method or other suitable methods are formed on the substrate 110 .

In some embodiments, the lower electrode 120 may be formed on the substrate 110 comprehensively, in other words, the size of the lower electrode 120 and the size of the substrate 110 may be substantially the same, but the invention is not limited thereto.

Referring to FIG. 1B , in this embodiment, an insulating layer 130 can be selectively formed on the lower electrode 120 to reduce the short circuit caused by contact between the lower electrode 130 and other conductive elements when the capacitive ultrasonic transducer 100 is operated. probability, but the present invention is not limited to this. The material of the insulating layer 130 can be silicon nitride (SiN _x ), silicon _{oxide (SiO x} ), hafnium dioxide (HfO ₂ ) or other suitable insulating materials, and is formed by, for example, a deposition process, but the present invention is not limited to this. The deposition process may be, for example, by chemical vapor deposition (CVD), physical vapor deposition (PVD), or some other suitable deposition process.

In some embodiments, the insulating layer 130 may be completely formed on the lower electrode 120 , in other words, the size of the insulating layer 130 , the size of the lower electrode 120 and the substrate 110 may be substantially the same, but the invention is not limited thereto .

Referring to FIG. 1C , a sacrificial layer 140 is formed on the lower electrode 120 for forming a cavity required subsequently. The material of the sacrificial layer 140 may be a metal material. For example, the material of the sacrificial layer 140 is copper or molybdenum, but the present invention is not limited to this. A sputtering deposition method, thermal evaporation deposition method, electron beam evaporation deposition method or other suitable methods are formed on the lower electrode 120 .

In some embodiments, a sacrificial material (not shown) may be comprehensively formed on the lower electrode 120 first, and then the sacrificial material is patterned through a lithography etching process to form the sacrificial layer 140 , wherein the size of the sacrificial layer 140 is It may be smaller than the size of the lower electrode 120, but the present invention is not limited thereto. The etching process is, for example, a wet etching process.

In this embodiment, the insulating layer 130 may be located between the lower electrode 120 and the sacrificial layer 140 . In other words, the lower electrode 120 , the insulating layer 130 and the sacrificial layer 140 may be sequentially stacked on the substrate 110 .

Referring to FIG. 1D , an upper electrode 150 is formed on the sacrificial layer 140 . The material of the upper electrode 150 may be titanium (Ti), aluminum (Al), or a combination thereof. Further, the upper electrode 150 is a conductive material composed of titanium/aluminum/titanium, but the present invention is not limited thereto. The material of the upper electrode 150 can be any suitable conductive material, and can be formed by electrochemical deposition, sputtering Deposition method, thermal evaporation deposition method, electron beam evaporation deposition method or other suitable methods are formed on the sacrificial layer 140 .

In some embodiments, the conductive material may be comprehensively formed on the sacrificial layer 140 first, and then the conductive material is patterned through a lithography etching process to form the upper electrode 150 , but the invention is not limited thereto. The etching process is, for example, a dry etching process.

In some embodiments, the size of the patterned upper electrode 150 may be different from the size of the sacrificial layer 140 . For example, the size of the upper electrode 150 may be smaller than that of the sacrificial layer 140, but the present invention is not limited thereto.

In some embodiments, the upper electrode 150 may be in direct contact with the sacrificial layer 140, but the present invention is not limited thereto.

Referring to FIG. 1E , an oscillation film 160 is formed on the upper electrode 150 . The material of the oscillation membrane 160 may be a thin film material. For example, the material of the oscillation film 160 is silicon nitride (SiN _x ), silicon _{oxide (SiO x} ) or other suitable thin film materials, and the oscillation film 160 can be formed by chemical vapor deposition (CVD) or other suitable methods formed on the upper electrode 150 .

In some embodiments, the oscillation membrane 160 may not include Piezoelectric material, but the present invention is not limited thereto.

In some embodiments, the oscillation film 160 may cover the upper electrode 150 , in other words, the top surface of the oscillation film 160 may be higher than the top surface of the upper electrode 150 , but the present invention is not limited thereto.

Referring to FIG. 1F , at least two etching openings (such as the first etching opening 162 and the second etching opening 164 shown in FIG. 1F ) are formed in the oscillation film 160 , wherein the first etching opening 162 and the second etching opening 164 are located above Both sides of the electrode 150 are exposed and part of the sacrificial layer 140 is exposed, so the first etching opening 162 and the second etching opening 164 can be used to remove the sacrificial layer 140 .

In some embodiments, the oscillation film 160 may be patterned by a lithography etching process to form the first etching opening 162 and the second etching opening 164, but the invention is not limited thereto.

In this embodiment, after the first etching opening 162 and the second etching opening 164 are formed, the oscillation film 160 can well cover the sidewall 150s of the upper electrode 150 , in other words, the first etching opening 162 and the second etching opening 162 are formed. The opening 164 is not removed to the upper electrode 150, but the present invention is not limited thereto.

In some embodiments, the first etching opening 162 and the second etching opening 164 may be located at the edge 140e of the sacrificial layer 140, but the invention is not limited thereto.

It should be noted that, although only two etching openings are shown in FIG. 1F , the present invention does not limit the number of etching openings, as long as the etching openings can be used to remove the sacrificial layer 140 , it falls within the protection scope of the present invention.

Referring to FIG. 1G , an etching process is performed to remove the sacrificial layer 140 through the first etching opening 162 and the second etching opening 164 . In other words, the etchant in the etching process can pass through the first etching opening 162 and the second etching opening 164 to reach the sacrificial layer 140 to etch the sacrificial layer 140 .

In this embodiment, the sacrificial layer 140 and the upper electrode 150 may have different etching rates, and the etching rate ratio of the sacrificial layer 140 and the upper electrode 150 may be at least ten times greater to reduce the etching rate to the upper electrode 150 during the etching process. chance. For example, in one embodiment, the etchant in the etching process is cupric acid, the material of the sacrificial layer 140 is copper, and the material of the upper electrode 150 is molybdenum or molybdenum/tantalum alloy, which can reduce the amount of etching to the upper electrode during the etching process. 150 chance.

Further, it is preferred that the etching solution only removes the sacrificial layer 140 and hardly removes the upper electrode 150 during the etching process, in other words, the removal rate is almost 0%. For example, in one embodiment, when the etchant in the etching process is cupric acid, the material of the sacrificial layer 140 is copper, and the material of the upper electrode 150 is titanium, the etchant only removes the sacrificial layer 140 , but hardly any The upper electrode 150 will be removed. However, the present invention is not limited to this. In another embodiment, when the etchant in the etching process is aluminate, the material of the sacrificial layer 140 is molybdenum, and the material of the upper electrode 150 is titanium, the etchant will only remove the sacrificial layer. 140, with little removal of the upper electrode 150.

It should be noted that the etchant, the sacrificial layer 140 and the upper electrode 150 of the present invention are not limited to the above-mentioned combinations, and can be adjusted according to actual design requirements.

In this embodiment, since the oscillation film 160 can cover the sidewall 150s of the upper electrode 150, the oscillation film 160 can further protect the upper electrode 150 from etching during the etching process, but the invention is not limited thereto.

In the present embodiment, the first etching opening 162 and the second etching opening 164 may communicate with the space that replaces the sacrificial layer 140 to form a communication space 166 , wherein the communication space 166 may expose the bottom surface 150 b of the upper electrode 150 and part of the oscillating membrane 160 , but the present invention is not limited to this.

Referring to FIG. 1H , at least two sealing holes (the first sealing hole 172 and the second sealing hole 174 as shown in FIG. 1H ) are formed in the first etching opening 162 and the second etching opening 164 , wherein the first sealing hole 172 The second sealing hole 174 extends into the space partially replacing the sacrificial layer 140 to form a cavity C1 below the upper electrode 150 , and the cavity C1 is between the lower electrode 120 , the upper electrode 150 , the first sealing hole 172 and the first sealing hole 172 . Between the two sealing holes 174 , in other words, the first sealing hole 172 and the second sealing hole 174 are formed in a part of the communication space 166 , and the cavity C1 can be regarded as the remaining part of the communication space 166 .

In this embodiment, the cavity C1 may be between the lower electrode 120 , the upper electrode 150 , the oscillating membrane 160 , the first sealing hole 172 and the second sealing hole 174 , but the invention is not limited thereto.

The materials of the first sealing hole 172 and the second sealing hole 174 can be silicon nitride (SiN _x ), silicon _{oxide (SiO x} ) or other suitable insulating materials, and are formed by deposition process, for example, but the present invention is not limited to this.

After the above process, the fabrication of the capacitive ultrasonic transducer 100 of this embodiment can be substantially completed. In this embodiment, the capacitive ultrasonic transducer 100 includes a substrate 110 , a lower electrode 120 , an oscillating membrane 160 , an upper electrode 150 , at least two sealing holes 172 and 174 and a cavity C1 . The lower electrode 120 is located on the substrate 110 . The oscillation film 160 is located on the lower electrode 120 . The upper electrode 150 is located between the lower electrode 120 and the oscillation film 160 . At least two sealing holes 172 and 174 are located on both sides of the upper electrode 150 . The cavity C1 is located on the substrate 110 and below the upper electrode 150 , and is between the lower electrode 120 , the upper electrode 150 and the at least two sealing holes 172 and 174 .

Since the capacitive ultrasonic transducer forms electrostatic adsorption by applying a working voltage to the upper electrode and the lower electrode, the oscillating membrane can oscillate back and forth, and the distance between the upper electrode and the lower electrode will be positively correlated with the aforementioned working voltage. In other words, the greater the distance between the upper electrode and the lower electrode, the greater the operating voltage. Therefore, the capacitive ultrasonic transducer 100 of this embodiment is designed such that the upper electrode 150 is located between the lower electrode 120 and the oscillating membrane 160 space, the cavity C1 is located on the substrate 110 and below the upper electrode 150 and between the lower electrode 120, the upper electrode and at least two sealing holes (the first sealing hole 172 and the second sealing hole 174), which can effectively shorten the upper The distance between the electrode 150 and the lower electrode 120 reduces its operating voltage and has the advantages of low energy consumption and power saving. Further, in the capacitive ultrasonic transducer 100 of the present embodiment, the upper electrode 150 is first formed on the sacrificial layer 140 and then the oscillation film 160 is formed. Formed below the upper electrode 150, the distance between the upper electrode 150 and the lower electrode 120 is effectively shortened, the operating voltage thereof is reduced, and the advantages of low energy consumption and power saving are provided.

In some embodiments, the material of the oscillation membrane 160 and the material of the first sealing hole 172 and the second sealing hole 174 may be substantially the same, such as silicon nitride, but the invention is not limited thereto. Here, since the oscillating film 160 and the first sealing hole 172 and the second sealing hole 174 are formed in different processes, there may be an interface between the oscillating film 160 and the first sealing hole 172 and the second sealing hole 174 . However, the present invention is not limited to this.

In this embodiment, the insulating layer 130 may be located between the lower electrode 120 and the upper electrode 150, wherein the cavity C1 may be located above the insulating layer 130, in other words, the cavity C1 may be at least composed of the insulating layer 130, the upper electrode 150 is defined by the first sealing hole 172 and the second sealing hole 174 , so the insulating layer 130 can separate the lower electrode 120 from the upper electrode 150 to prevent the upper electrode 150 from coming into contact with the oscillation membrane 160 in the cavity C1 The case of forming a short circuit to the lower electrode 120 occurs, but the present invention is not limited thereto.

In some embodiments, the thickness 130T of the insulating layer 130 may be smaller than the thickness 160T of the oscillating film 160 to ensure that the distance between the lower electrode 120 and the upper electrode 150 can indeed be shortened with the insulating layer 130 , but The present invention is not limited to this. Here, the thickness 160T of the oscillation film 160 may be defined as the maximum thickness of the oscillation film 160 .

In this embodiment, the capacitive ultrasonic transducer 100 may further selectively form a protective layer 180 on the oscillating membrane 160 , the first sealing hole 172 and the second sealing hole 174 to protect the capacitive ultrasonic transducer 100. Improve the performance of the capacitive ultrasonic transducer 100, but the present invention is not limited thereto. The material of the protective layer 180 can be silicon nitride (SiN _x ), silicon _{oxide (SiO x} ), parylene (Parylene) or other suitable passivation materials, and is formed by, for example, a deposition process, but the present invention is not limited to this.

In some embodiments, the material of the oscillation film 160 , the material of the first sealing hole 172 and the second sealing hole 174 and the material of the protective layer 180 may be substantially the same, such as silicon nitride, but the invention is not limited thereto. Here, since the oscillating film 160 , the first sealing hole 172 , the second sealing hole 174 and the protective layer 180 are formed in different processes, the oscillating film 160 , the first sealing hole 172 , the second sealing hole 174 and the protective layer 180 may have an interface, but the present invention is not limited to this.

In this embodiment, the size of the upper electrode 150 may be smaller than the size of the cavity C1, but the present invention is not limited thereto.

In some embodiments, the structure of the above-mentioned embodiments may be one of the active units (unit-cell) included in the capacitive ultrasonic transducer, and the capacitive ultrasonic transducer may include a plurality of the above-mentioned active units and share the same a lower electrode, but the present invention is not limited thereto.

FIG. 1I is a partial top view of the capacitive ultrasonic transducer of FIG. 1H . Referring to FIG. 1I , the cavity C1 of the capacitive ultrasonic transducer 100 of the present embodiment may include an active portion C11 and an etched channel portion C12 connecting the active portion C11 with the first sealing hole 172 and the second sealing hole 174 , wherein The active portion C11 may be the active area of the capacitive ultrasonic transducer 100 . In addition, in a top view, the active portion C11 may have a larger width W1, and the etching channel portion C12 may have a smaller width W2.

Further, in this embodiment, the contour of the active portion C11 may correspond to the contour of the central portion 150c of the upper electrode 150, such as the rectangular contour shown in FIG. 1I, but the present invention is not limited thereto. In addition, the size of the active portion C11 may be larger than the size of the central portion 150c of the upper electrode 150. In other words, the orthographic projection of the active portion C11 on the substrate 110 may be larger than the orthographic projection of the central portion 150c1 on the substrate 110, but the present invention Not limited to this.

It must be noted here that the following embodiments use the element numbers and parts of the above-mentioned embodiments, wherein the same or similar numbers are used to represent the same or similar elements, and the description of the same technical content is omitted, and the description of the omitted part is omitted. Reference may be made to the foregoing embodiments, and detailed descriptions in the following embodiments will not be repeated.

2A is a partial cross-sectional view of a capacitive ultrasonic transducer according to another embodiment of the present invention. 2B is a partial top view of the capacitive ultrasonic transducer of FIG. 2A. Referring to FIGS. 2A and 2B , compared with the capacitive ultrasonic transducer 100 , the cavity C2 of the capacitive ultrasonic transducer 200 of the present embodiment may include an active portion C21 and a connection between the active portion C21 and the first The etching channel portion C22 of the sealing hole 172 and the second sealing hole 174, wherein the size of the active portion C21 may be smaller than the size of the central portion 250c of the upper electrode 250, in other words, the orthographic projection of the central portion 250c on the substrate 110 may be It is larger than the orthographic projection of the active portion C21 on the substrate 110, but the present invention is not limited thereto.

3A to 3E are partial cross-sectional views of a capacitive ultrasonic transducer at different stages of a manufacturing process according to yet another embodiment of the present invention.

Referring to FIG. 3A , similar to FIG. 1D , the size of the patterned upper electrode 350 of the capacitive ultrasonic transducer 300 of the present embodiment may be substantially the same as the size of the sacrificial layer 140 .

Referring to FIG. 3B , similar to FIG. 1E , the oscillation film 160 is formed on the upper electrode 350 .

Referring to FIG. 3C , similar to FIG. 1F , at least two etching openings (the first etching opening 362 and the second etching opening 364 shown in FIG. 3C ) are formed in the oscillation film 160 , wherein the first etching opening 362 and the second etching opening are The etching openings 364 are located on both sides of the upper electrode 350 and expose part of the sacrificial layer 140 , so the first etching openings 362 and the second etching openings 364 can be used to remove the sacrificial layer 140 .

Further, in this embodiment, when the first etching opening 362 and the second etching opening 364 are formed, part of the upper electrode 350 is removed to expose the sidewall 350s of the upper electrode 350 , but the invention is not limited thereto.

Referring to FIG. 3D , similar to FIG. 1G , an etching process is performed to remove the sacrificial layer 140 through the first etching opening 362 and the second etching opening 364 . In this embodiment, the first etching opening 362 and the second etching opening 364 may communicate with the space that replaces the sacrificial layer 140 to form a communication space 366 , wherein the communication space 366 may expose the bottom surface 350 b of the upper electrode 350 and the space between the upper electrode 350 and the upper electrode 350 . The side wall 350s and part of the oscillation film 160, but the present invention is not limited thereto.

Please refer to FIG. 3E , similar to FIG. 1H , at least two sealing holes (the first sealing hole 372 and the second sealing hole 374 shown in FIG. 1H ) are formed in the first etching opening 362 and the second etching opening 364 , wherein The first sealing hole 372 and the second sealing hole 374 extend into the space partially replacing the sacrificial layer 140 to form a cavity C3 below the upper electrode 350 , and the cavity C3 may be only between the lower electrode 120 and the upper electrode 350 Between the first sealing hole 172 and the second sealing hole 174 , in other words, the first sealing hole 172 and the second sealing hole 174 are formed in the part of the communication space 366 , and the cavity C3 can be regarded as the remainder of the communication space 366 part.

In this embodiment, the first sealing hole 372 and the second sealing hole 374 may be in direct contact with the upper electrode 350 , but the invention is not limited thereto. In addition, the size of the upper electrode 350 may be equal to the size of the cavity C3, but the present invention is not limited thereto.

It should be noted that the size described in the foregoing embodiments may be defined as the size of the orthographic projection area on the horizontal plane.

Based on the above, the capacitive ultrasonic transducer of the present invention is designed such that the upper electrode is located between the lower electrode and the oscillating membrane, and the cavity is located on the substrate and below the upper electrode and between the lower electrode, the upper electrode and at least two sealing holes. Therefore, the distance between the upper electrode and the lower electrode can be effectively shortened, the operating voltage thereof can be reduced, and the advantages of low energy consumption and power saving can be obtained. Further, in the capacitive ultrasonic transducer of the present invention, the upper electrode is first formed on the sacrificial layer, and then the oscillation film is formed, and the cavity can be reliably formed under the upper electrode by the process method of hollowing out the sacrificial layer, It effectively shortens the distance between the upper electrode and the lower electrode, reduces its working voltage, and has the advantages of low energy consumption and power saving.

Although the present invention has been disclosed above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.

100, 200, 300: Capacitive ultrasonic transducers 110: Substrate 120: Lower electrode 130: Insulation layer 130T, 160T: Thickness 140: Sacrificial Layer 140e: Edge 150, 250, 350: Upper electrode 150b, 350b: Bottom 150c, 250c: Center part 150s, 350s: Sidewall 160: Oscillating Membrane 162, 164, 362, 364: Etched openings 166, 366: Connected spaces 172, 174, 372, 374: Sealing holes 180: protective layer C1, C2, C3: cavity C11, C21: Active part C12, C22: Etch the channel part W1, W2: width

1A to 1H are partial cross-sectional views of a capacitive ultrasonic transducer at different stages of a manufacturing process according to an embodiment of the present invention. FIG. 1I is a partial top view of the capacitive ultrasonic transducer of FIG. 1H . 2A is a partial cross-sectional view of a capacitive ultrasonic transducer according to another embodiment of the present invention. 2B is a partial top view of the capacitive ultrasonic transducer of FIG. 2A. 3A to 3E are partial cross-sectional views of a capacitive ultrasonic transducer at different stages of a manufacturing process according to yet another embodiment of the present invention. In particular, for the sake of clarity, FIG. 1I and FIG. 2B only illustrate the upper electrode, the cavity and the insulating layer, and the remaining film layers and elements are omitted.

100: Capacitive Ultrasonic Transducer

110: Substrate

120: Lower electrode

130: Insulation layer

130T, 160T: Thickness

150: Upper electrode

160: Oscillating Membrane

172, 174: Sealing holes

180: protective layer

C1: cavity

Claims (11)

A capacitive ultrasonic transducer, comprising: a lower electrode, located on a substrate; an oscillating membrane, located on the lower electrode; an upper electrode, located between the lower electrode and the oscillating membrane; at least two sealing holes, located on the two sides of the upper electrode; and a cavity, located on the substrate and below the upper electrode, between the lower electrode, the upper electrode and the at least two sealing holes, and the cavity The cavity exposes the upper electrode. The capacitive ultrasonic transducer of claim 1, further comprising an insulating layer located between the lower electrode and the upper electrode, wherein the cavity is located above the insulating layer. The capacitive ultrasonic transducer of claim 2, wherein the cavity is at least defined by the insulating layer, the upper electrode, and the at least two sealing holes. The capacitive ultrasonic transducer of claim 2, wherein the thickness of the insulating layer is smaller than the thickness of the oscillating membrane. The capacitive ultrasonic transducer of claim 1, wherein the oscillating membrane covers the sidewall of the upper electrode. The capacitive ultrasonic transducer according to claim 1, further comprising a protective layer located on the oscillating membrane and the at least two sealed holes, wherein: the material of the oscillating membrane and the at least two sealed holes are The materials are the same; or the materials of the oscillating membrane, the materials of the at least two sealing holes are the same as those of the protective layer. Materials are the same. The capacitive ultrasonic transducer of claim 1, wherein the size of the upper electrode is less than or equal to the size of the cavity. A manufacturing method of a capacitive ultrasonic transducer, comprising: forming a lower electrode on a substrate; forming a sacrificial layer on the lower electrode; forming an upper electrode on the sacrificial layer; forming an oscillation film on the upper electrode ; forming at least two etching openings in the oscillation film, wherein the at least two etching openings are located on both sides of the upper electrode and exposing a part of the sacrificial layer; performing an etching process to pass the at least two etching openings removing the sacrificial layer; and forming at least two sealing holes in the at least two etched openings, wherein the at least two sealing holes extend into the space partially replacing the sacrificial layer to be formed below the upper electrode A cavity, and the cavity exposes the upper electrode. The method for manufacturing a capacitive ultrasonic transducer according to claim 8, wherein an etching rate ratio of the sacrificial layer to the upper electrode is at least ten times greater. The method for manufacturing a capacitive ultrasonic transducer according to claim 8, wherein: the etching solution for the etching process is cupric acid, the material of the sacrificial layer is copper, and the material of the upper electrode is titanium; Or the etching solution of the etching process is aluminate, the material of the sacrificial layer is molybdenum, and The material of the upper electrode is titanium. The method for manufacturing a capacitive ultrasonic transducer according to claim 8, further comprising forming an insulating layer between the lower electrode and the sacrificial layer.

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