TWI750154B - Systems and methods for tuning an impedance matching network in a step-wise fashion - Google Patents

Abstract

Systems and methods for tuning an impedance matching network in a step-wise fashion are described. By tuning the impedance matching network in a step-wise fashion instead of directly to achieve optimum values of a radio frequency (RF) and a combined variable capacitance, processing of a wafer using the tuned optimal values becomes feasible.

Description

System and method for stepwise adjustment of impedance matching network

The present invention relates to systems and methods for adjusting impedance matching networks in a stepwise manner.

The plasma system is used to control the plasma process. The plasma system includes multiple radio frequency (RF) sources, an impedance matching member, and a plasma reactor. A workpiece is placed inside the plasma chamber, and plasma is generated within the plasma chamber to process the workpiece. It is important to treat the work pieces in a similar or uniform manner. In order to treat the workpiece in a similar or uniform manner, it is important to adjust the RF source and impedance matching components.

This is the context in which the embodiments described in this disclosure arise.

Embodiments of the present disclosure provide apparatus, methods, and computer programs for adjusting an impedance matching network in a stepwise manner. It should be understood that embodiments of the present invention can be implemented in various ways (eg, processes, apparatus, systems, hardware, or methods on computer-readable media). Several embodiments are described below.

A plasma tool has a radio frequency (RF) matching network tuning algorithm. The plasma tool has one or two RF generators, and each RF generator is connected to a 50 ohm coaxial RF cable. The RF cables are connected to an impedance matching network, which is connected to the plasma chamber via RF transmission lines. The RF generators are designed to operate with a load impedance of 50+0j ohms or close to 50+0j ohms. One purpose of the impedance matching network is to convert the load impedance of plasma chambers and RF transmission lines, which are typically not near 50+0j ohms, to 50+0j ohms or near 50+0j ohms. The target impedance at or near 50+0j ohms has two parts: the real part, which should be at or near 50 ohms; and the imaginary part, which should be at or near 0 ohms. Thus, the branch circuit connected to the impedance matching network of one of the two RF generators has two variable elements. The two variable elements include a motor driven variable capacitor and a variable RF frequency output from the one of the RF generators.

The variable capacitance is preset in the recipe and is not changed during recipe steps. Variable capacitance is changed by editing recipes. The variable RF frequency is controlled by a process running inside the RF generator. The process operates according to the voltage reflection coefficient. If the reflection coefficient is high relative to the threshold, the process increases or decreases the RF frequency and, in this way, changes the RF frequency in one direction or the other based on the reflection coefficient. The sensor in the RF generator detects the reflected voltage using a narrowband filter, and detects a portion of the reflected voltage at the fundamental frequency, where there may be undetected large reflected wave amplitudes at the intermodulation frequency. A matching network model for an impedance matching network is used when the following inputs (e.g. RF power, values of variable capacitance and variable RF frequency, and measurements of RF load impedance at the output of the RF generator, etc. ) is the predicted RF voltage, current and phase between the RF voltage and the current or load impedance at the output of the impedance matching network when provided as input to the matching network model. The matching network model is extended to predict the RF voltage and current between the output of the impedance matching network and the chuck. In various embodiments, the matching network model includes a series of modules having the same form, as described in US Patent Application Serial No. 14/245,803.

In some embodiments, the load impedance at the output of the RF generator is propagated forward through the matching network model to calculate the load impedance from the variable capacitance and variable RF frequency at the output of the matching network model, while at the output of the matching network model the load impedance is calculated from the variable capacitance and the variable RF frequency. The load impedance at the output is then propagated back to determine the optimum value for the variable capacitance and variable RF frequency. Once the optimum values are determined, the RF generator and impedance matching network are adjusted to achieve optimum values for the variable capacitance and RF variable frequency. The variable RF frequency can be changed more rapidly to achieve the optimum value of the variable RF frequency than changing the variable capacitance to achieve the optimum value of the variable capacitance. For example, the variable RF frequency is changed on the order of microseconds compared to changing the variable capacitance on the order of seconds. Therefore, it is difficult to directly set the RF generator to operate at the optimum value of the variable RF frequency and the impedance matching network to operate at the optimum value of the variable capacitance. In order to adjust the impedance matching network, instead of adjusting the impedance matching network to achieve the optimum value of the variable capacitor and adjusting the RF generator to achieve the optimum value of the variable RF frequency, the impedance matching network is adjusted in steps to A step variable capacitance value is generated instead of an optimal value for the variable capacitance, and a local optimal value for the variable RF frequency of the step variable capacitance is calculated. For example, the impedance matching network is adjusted to have a variable capacitance value in the direction of the optimum value of the variable capacitance, and a local optimum for the variable RF frequency determined for the variable capacitance value. In this way, the optimum value of the variable capacitance and the optimum value of the variable RF frequency are achieved, rather than directly reaching the optimum value of the variable capacitance and the optimum value of the variable RF frequency.

Some of the advantages of the systems and methods described herein include the application of stepwise adjustment of the variable capacitance of the impedance matching network. In this stepwise manner, the local optimum of the variable RF frequency of the minimum value of the reflection coefficient at the input of the matching network model is calculated for the step value of the variable capacitor. The step value is then incremented, and another value of the variable RF frequency where the reflection coefficient is the minimum value at the input to the matching network model is calculated for the incremental step value of the variable capacitance. The step value is incremented until the optimum value of the variable capacitance is reached. It is difficult to achieve the optimum value for the variable capacitance and at the same time the optimum value for the variable RF frequency directly from the value at which the impedance matching network is operating. This is because it is difficult to control more than one variable capacitor of the impedance matching network at the same speed as the RF generator. By using this stepping method, optimum values of variable capacitance and RF frequency are achieved.

Other embodiments will become apparent from the following detailed description taken in conjunction with the accompanying drawings.

The following embodiments describe systems and methods for adjusting an impedance matching network in a stepwise fashion. It should be understood that embodiments of the invention may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail in order not to unnecessarily obscure embodiments of the invention.

FIG. 1 is a diagram of one embodiment of a plasma system 100 to illustrate the use of matching network model 102 to generate load impedance ZL1. Plasma system 100 includes radio frequency (RF) generator 104 , impedance matching network 106 , and plasma chamber 108 . The plasma system 100 includes a host computer system 110 , a drive assembly 112 , and one or more connection mechanisms 114 .

The plasma chamber 108 includes the upper electrode 116 , the chuck 118 , and the wafer W. The upper electrode 116 faces the chuck 118 and is, for example, grounded, coupled to a reference voltage, coupled to zero voltage, coupled to a negative voltage, or the like. Examples of chucks 118 include electrostatic chucks (ESCs) and magnetic chucks. The lower electrode of the chuck 118 is made of metal, such as anodized aluminum, aluminum alloys, and the like. In various embodiments, the lower electrode of the chuck 118 is covered with a thin metal layer of ceramic. In addition, the upper electrode 116 is made of metal, such as aluminum, an alloy of aluminum, and the like. In some embodiments, the upper electrode 116 is made of silicon. The upper electrode 116 is located on the opposite side of the lower electrode of the chuck 118 and faces the lower electrode of the chuck 118 . Wafer W is placed on top surface 120 of chuck 118 for processing, such as depositing material on wafer W, or cleaning wafer W, or etching layers deposited on wafer W, or doping the wafer W, or implanting ions on wafer W, or creating a photolithographic pattern on wafer W, or etching wafer W, or sputtering wafer W, or a combination thereof.

In some embodiments, the plasma chamber 108 is formed using additional components, such as: an upper electrode extension surrounding the upper electrode 116, a lower electrode extension surrounding the lower electrode of the chuck 118, a connection between the upper electrode 116 and the upper electrode A dielectric ring between the electrode extensions, a dielectric ring between the lower electrode and the lower electrode extension, at the edge of the upper electrode 116 and the chuck 118 to surround an area within the plasma chamber 108 where the plasma is formed Limit rings, etc.

Impedance matching network 106 includes one or more circuit elements, such as one or more inductors, or one or more capacitors, or one or more resistors, or a combination of two or more, etc., which are coupled to each other. For example, the impedance matching network 106 includes a series circuit including an inductor coupled in series with a capacitor. Impedance matching network 106 further includes a shunt circuit connected to the series circuit. The shunt circuit includes a capacitor connected in series with an inductor. Impedance matching network 106 includes one or more capacitors, and the corresponding capacitances of the one or more capacitors (eg, all variable capacitors, etc.) are variable (eg, changed using drive components, etc.). Impedance matching network 106 includes one or more capacitors with fixed capacitances, such as capacitors that cannot be changed using driving component 112 . The combined variable capacitance value C1 of one or more variable capacitors of the impedance matching network 106 . For example, the respective opposing plates of the one or more variable capacitors are adjusted to be in fixed positions to set the variable capacitance C1. For illustration, the combined capacitance of two or more capacitors connected in parallel with each other is the sum of the capacitances of the capacitors. As another illustration, the combined capacitance of two or more capacitors connected in series with each other is the inverse of the sum of the inverses of the capacitances of the capacitors. An example of an impedance matching network 106 is provided in US Patent Application Serial No. 14/245,803.

The matching network model 102 is derived from a branch of the impedance matching network 106, eg, represents a branch of the impedance matching network 106, or the like. For example, when an x MHz RF generator is connected to a branch circuit of impedance matching network 106, matching network model 102 represents a computer-generated model of a circuit such as a branch circuit of impedance matching network 106, or the like. As another example, the number of circuit elements of matching network model 102 is not equal to the number of circuit elements of impedance matching network 106 . In some embodiments, the matching network model 102 has a smaller number of circuit elements than the number of circuit elements of the impedance matching network 106 . For illustration, matching network model 102 is a simplified form of the branch circuits of impedance matching network 106 . For further illustration, the variable capacitances of the plurality of variable capacitors of the branch circuits of the impedance matching network 106 are combined into a combined variable capacitance represented by one or more variable capacitance elements of the matching network model 102; the impedance matching network The fixed capacitances of the plurality of fixed capacitors of the branch circuit of 106 are combined into a combined fixed capacitance represented by one or more fixed capacitance elements of the matching network model 102; and/or the plurality of fixed inductances of the branch circuits of the impedance matching network 106 The inductances of the resistors are combined into a combined inductance represented by one or more inductive elements of matching network model 102; A fixed resistance represented by one or more resistive elements. To illustrate more, the capacitances of capacitors in series are combined by taking the reciprocal of each capacitance value to produce a plurality of reciprocal capacitance values, summing the reciprocal capacitance values to produce a reciprocal combined capacitance value, and then by A combined capacitance value is generated by taking the inverse of the reciprocal combined capacitance value. As another illustration, the inductances of a plurality of inductors connected in series are summed to produce a combined inductance, and the resistances of a plurality of resistors connected in series are combined to produce a combined resistance. All fixed capacitances of all fixed capacitors that are part of impedance matching network 106 are combined into a combined fixed capacitance of one or more fixed capacitance elements of matching network model 102 . Other examples of matching network models 102 are provided in US Patent Application Serial No. 14/245,803. Additionally, the manner in which a matching network model is generated from an impedance matching network is described in US Patent Application Serial No. 14/245,803.

In some embodiments, the matching network model 102 is generated from a schematic diagram for an impedance matching network 106 with three branches, one for each RF generator at x MHz, y MHz, and z MHz. The three branches are connected to each other at the output 140 of the impedance matching network 106 . The schematic initially contains several inductors and capacitors in various combinations. For one of the three branches considered independently, the matching network model 102 represents one of the three branches. Circuit elements are added to the matching network model 102 by means of input devices, examples of which are provided below. Examples of added circuit elements include: resistors not previously included in the schematic to account for power losses in the branches of the impedance matching network 106; inductors not previously included in the schematic to represent RF for various connections The inductance of the strip; and the capacitor, which was not previously included in the schematic, to represent the parasitic capacitance. In addition, some circuit elements are further added to the schematic diagram by means of input devices to represent the transmission line nature of the branches of the impedance matching network 106 due to the physical size of the impedance matching network 106 . For example, the unconvoluted length of the one or more inductors in a branch of the impedance matching network 106 is not negligible compared to the wavelength of the RF signal passed through the one or more inductors. To explain this result, an inductor in the schematic is divided into more than two inductors. Afterwards, some circuit elements are removed from the schematic by the input device to generate the matching network model 102 .

In various embodiments, the matching network model 102 and the branch circuits of the impedance matching network 106 have the same topology, eg, connections between circuit elements, number of circuit elements, and the like. For example, if the branch circuit of impedance matching network 106 includes a capacitor coupled in series with an inductor, then matching network model 102 includes a capacitor coupled in series with an inductor. In this example, the inductors of the branch circuits of impedance matching network 106 and the inductors of matching network model 102 have the same value, and the capacitors of the branch circuits of impedance matching network 106 and the capacitors of matching network model 102 have the same value. As another example, if the branch circuits of impedance matching network 106 include a capacitor coupled in parallel with an inductor, then matching network model 102 includes a capacitor coupled in parallel with an inductor. In this example, the inductors of the branch circuits of impedance matching network 106 and the inductors of matching network model 102 have the same value, and the capacitors of the branch circuits of impedance matching network 106 and the capacitors of matching network model 102 have the same value. As another example, the matching network model 102 has the same number and same type of circuit elements as the circuit elements of the impedance matching network 106, and the matching network model 102 and the impedance matching network 106 are between the circuit elements A connection is compared to a connection of the same type. Examples of types of circuit elements include resistors, inductors, and capacitors. Examples of types of connections include series, parallel, and the like.

Additionally, the RF generator 104 includes an RF power source 122 for generating RF signals. The RF generator 104 includes a sensor 124 connected to the output 126 of the RF generator 104, such as a complex impedance sensor, a complex current and voltage sensor, a complex reflection coefficient ( complex reflection coefficient) sensor, complex voltage sensor, complex current sensor, etc. The output 126 is connected via the RF cable 130 to the input 128 of the branch circuit of the impedance matching network 106 . Impedance matching network 106 is connected to plasma chamber 108 via RF transmission line 132, which includes an RF rod and an RF outer conductor surrounding the RF rod.

The drive component 112 includes a driver (eg, one or more transistors, etc.) and a motor, and the motor is connected to a variable capacitor of the impedance matching network 106 via the connection mechanism 114 . Examples of the connection mechanism 114 include more than one rod, or a plurality of rods connected to each other by gears, or the like. The connection mechanism 114 is connected to a variable capacitor of the impedance matching network 106 . For example, connection mechanism 114 is connected to a variable capacitor that is part of a branch circuit that is connected to RF generator 104 via input 128 .

It should be noted that where the impedance matching network 106 includes more than one variable capacitor in the branch circuit connected to the RF generator 104, the drive component 112 includes a separate motor for controlling the more than one variable capacitor, and Each motor is connected to a corresponding variable capacitor via a corresponding connection mechanism. In this example, the plurality of attachment mechanisms are referred to as attachment mechanisms 114 .

The RF generator 104 is an x megahertz (MHz) RF generator or a y MHz RF generator or a z MHz RF generator. In some embodiments, an example of an RF generator of x MHz includes a 2 MHz RF generator, an example of an RF generator of y MHz includes a 27 MHz RF generator, and an example of an RF generator of z MHz Contains a 60 MHz RF generator. In various embodiments, an example of an RF generator of x MHz includes a 400 kHz RF generator, an example of an RF generator of y MHz includes a 27 MHz RF generator, and an example of an RF generator of z MHz Contains a 60 MHz RF generator.

It should be noted that where two RF generators (eg, x and y MHz RF generators, etc.) are used within plasma system 100, one of the two RF generators is connected to input 128 and the The other of the RF generators is connected to the other input of the impedance matching network 106 . Similarly, where three RF generators (eg, x, y, and z MHz RF generators, etc.) are used within plasma system 100, the first of the RF generators is connected to input 128 , the second of the RF generators is connected to the second input of the impedance matching network 106 , and the third of the RF generators is connected to the third input of the impedance matching network 106 . Output 140 is connected to input 128 via a branch circuit of impedance matching network 106 . In embodiments where multiple RF generators are used, the output 140 is connected to the second input via a second branch of the impedance matching network 106 and the output 140 is connected via a third branch of the impedance matching network 106 A circuit is connected to the third input.

The host computer system 110 includes a processor 134 and a memory device 137 . Examples of host computer systems 110 include laptops, or desktops, or tablets, or smartphones, and the like. As used herein, a central processing unit (CPU), controller, application specific integrated circuit (ASIC), or programmable logic device (PLD) is used in place of a processor, and these terms are used interchangeably herein use. Examples of memory devices include read only memory (ROM), random access memory (RAM), hard disks, volatile memory, non-volatile memory, redundant array of storage disks, flash memory, etc. . Sensor 124 is connected to host computer system 110 via network cable 136 . Examples of network cables used herein are cables used to transmit data in series, or in parallel, or using the USB protocol or the like.

RF generator 104 operates at radio frequency RF1. For example, processor 134 provides a recipe including radio frequency RF1 and power values to RF generator 104 . The RF generator 104 receives the recipe via a network cable 138 connected to the RF generator 104 and the host computer system 110 , and the digital signal processor (DSP) of the RF generator 104 provides the recipe to the RF power supply 122 . The RF power source 122 generates an RF signal having the RF1 and power specified in the recipe.

Impedance matching network 106 is initialized to have combined variable capacitance C1. For example, the processor 134 sends signals to the drivers of the drive components 112 to generate more than one current signal. The one or more current signals are generated by the driver and sent to the corresponding one or more stators of the corresponding one or more motors of the drive assembly 112 . The corresponding one or more rotors of the drive assembly 112 are rotated to move the connection mechanism 114 to change the combined variable capacitance of the branch circuits of the impedance matching network 106 to C1. The branch circuit of the impedance matching network 106 with the combined variable capacitor C1 receives the RF signal with the radio frequency RF1 from the output 126 via the input 128 and the RF cable 130 and compares the impedance of the load connected to the impedance matching network 106 to the impedance of the load connected to the impedance matching network 106. The impedance of the source of the matching network 106 is matched to produce a modified signal, which is an RF signal. Examples of loads include plasma chamber 108 and RF transmission line 132 . Examples of sources include RF cable 130 and RF generator 104 . The modified signal is provided to the chuck 118 from the output 140 of the branch circuit of the impedance matching network 106 via the RF transmission line 132 . When the modified signal is provided to the chuck 118 in combination with one or more process gases (eg, oxygen-containing gas, fluorine-containing gas, etc.), plasma is generated or maintained in the gap between the chuck 118 and the upper electrode 116 .

When the RF signal with the radio frequency RF1 is generated and the impedance matching network 106 has the combined variable capacitor C1 , the sensor 124 senses the voltage reflection coefficient Γmi1 at the output 126 and via the network cable 136 the voltage reflection coefficient provided to processor 134 . An example of a voltage reflection coefficient includes the ratio of the power reflected from the plasma chamber 108 toward the RF generator 104 to the power supplied within the RF signal generated by the RF generator 104 . The processor 134 calculates the impedance Zmi1 from the voltage reflection coefficient Γmi1. For example, the processor 134 calculates the impedance Zmi1 by applying equation (1) Γmi1=(Zmi1−Zo)/(Zmi1+Zo), and solving to obtain Zmi1 , where Zo is the characteristic impedance of the RF transmission line 132 . The impedance Zo is provided to the processor 134 by an input device (eg, mouse, keyboard, stylus, keypad, button, touch screen, etc.) through an input/output interface (eg, serial interface, Parallel interface, Universal Serial Bus (USB) interface, etc.) are connected to the processor 134 . In some embodiments, sensor 124 measures impedance Zmi1 and provides this impedance Zmi1 to processor 134 via network cable 136 .

The impedance Zmi1 is applied by the processor 134 to the input 142 of the matching network model 102 and propagated forward by the matching network model 102 to calculate the load impedance ZL1 at the output 144 of the matching network model 102 . For example, impedance Zmi1 is propagated forward by processor 134 through one or more circuit elements of matching network model 102 to generate load impedance ZL1. For illustration, matching network model 102 is initialized to have radio frequency RF1. When the matching network model 102 includes a series combination of a resistive element, an inductive element, a fixed capacitive element, and a variable capacitive element, the processor 134 calculates the impedances Zmi1 , Zmi1 received at the input 142 of the matching network model 102 , The directional sum of the complex impedance across the resistive element, the complex impedance across the inductive element, the complex impedance across the variable capacitive element with variable capacitance C1, and the complex impedance across the fixed capacitive element sum) to generate the load impedance ZL1.

In some embodiments, the RF generator 104 operates in a continuous wave mode that is not a pulsed wave mode. For example, the RF generator 104 does not have pulse states S1 and S2, wherein all power values of the RF signal in state S2 are exclusive of the power values of the RF signal in state S2. The power value of state S2 is lower than the power value of state S1. As another example, in the continuous wave mode, at least one power value in state S1 overlaps at least one power value in state S2 to eliminate the difference between states S1 and S2 to generate one state.

In various embodiments, instead of measuring the voltage reflection coefficient at output 126 , the voltage reflection coefficient is measured at any point on RF cable 130 from output 126 (including output 126 ) to input 128 . For example, sensor 124 is connected to a point between RF power supply 122 and impedance matching network 106 to measure the voltage reflection coefficient.

FIG. 2 is a diagram of one embodiment of a matching network model 102 initialized to radio frequency RF1 and variable capacitor C1 to generate a voltage reflection coefficient Γi at input 142 . The processor 134 calculates, from the load impedance ZL1 and the matching network model 102, the radio frequency value RF _optimum and the combined variable capacitance value C _optimum 1 where the voltage reflection coefficient Γi is zero. For example, the processor 134 propagates the load impedance ZL1 back through the matching network model 102 to generate an input impedance Zi corresponding to a voltage reflection coefficient Γi having a value of zero at the input 142 . Backward propagation is the same as forward propagation, except that the direction of backward propagation is opposite to that of forward propagation. In some embodiments, the non-linear least squares optimization procedure is executed by the processor 134 to calculate the RF value RF _optimum and the combination variable with the voltage reflection coefficient Γi being zero from the load impedance ZL1 and the matching network model 102 The capacitance value C _optimum 1. In various embodiments, predetermined equations are applied by processor 134 to calculate from load impedance ZL1 and matching network model 102 the RF value RF _optimum and the combined variable capacitance value C _optimum 1 where the voltage reflection coefficient Γi is zero.

In addition, the processor 134 changes the radio frequency value applied to the matching network model 102 from RF _optimum 1@C1 to RF _optimumn @C1 and propagates the load impedance ZL1 backward to determine the radio frequency RF _optimum 1@ of the minimum voltage reflection coefficient Γi. C1, where n is an integer greater than 1. For example, when the matching network model 102 has the RF _optimum 1@C1, the processor 134 propagates the load impedance ZL1 backward through the matching network model 102 with the variable capacitance C1 to determine that the voltage reflection coefficient Γi has the first value . Furthermore, in this example, when the matching network model 102 has the RF _optimum 2@C1, the processor 134 propagates the load impedance ZL1 backward via the matching network model 102 with the variable capacitance C1 to determine that the voltage reflection coefficient Γi has second value. The processor 134 determines that the first value is the minimum value of the first and second values, so as to further determine the RF _optimum 1@C1 which is the radio frequency value at which the voltage reflection coefficient Γi is the minimum value. In some embodiments, a non-linear square optimization procedure is used to find the RF value RF _optimum 1@C1 where the voltage reflection coefficient Γi has a minimum value.

In various embodiments, the value of the radio frequency at which the voltage reflection coefficient is at a minimum is referred to herein as the favorable RF value.

In some embodiments, RF values are sometimes referred to herein as "parameter values." Additionally, capacitance is sometimes referred to herein as a "measurable factor."

FIG. 3 is a diagram of one embodiment of the plasma system 100 to illustrate the use of the capacitance value C _optimum 1 to generate the step combined variable capacitance value C _step 1 and the use of the value RF _optimum 1@C1 to match the network model 102 A load impedance ZL2 is produced at the output 144 of . The processor 134 modifies the recipe to include the RF value RF _optimum 1@C1 and provides the RF value RF _optimum 1@C1 to the RF generator 104 . Further, processor 134 determines the capacitance value of the variable _STEP 1 step C, the step-variable capacitance value C based _STEP 1 value C from the value C1 to the direction of the _optimum order of step 1. It should be noted that even if one or more capacitances of the corresponding one or more variable capacitors of impedance matching network 106 are modified to change from C1 toward C _optimum 1, the one or more variable capacitors are relative to the value of the RF signal generated by RF generator 104. Changes in RF frequency move slowly enough.

Instead of setting the combined variable capacitance of the impedance matching network 106 to a value of C _optimum 1 and instead of setting the RF generator 104 to generate an _{RF signal having a radio frequency RF optimum} , the processor 134 controls the driver assembly 112 such that the combination of the impedance matching network 106 The variable capacitance is set at the value C _step 1, and the RF generator 104 is controlled to operate at the radio frequency RF _optimum 1@C1. The time required for the impedance matching network 106 to reach the variable capacitance C _optimum 1 (eg, on the order of seconds, etc.) is longer than the time required for the RF generator 104 to generate the RF signal _{with the RF RF optimum.} For example, the RF generator 104 reaches the RF _optimum from the RF RF1 in microseconds. Therefore, it is difficult to directly reach the value C _optimum 1 from the value C1 and simultaneously reach the value RF _optimum from the value RF1 such that the voltage reflection coefficient at the output 126 of the RF generator 104 is zero. Therefore, the variable capacitance of the impedance matching network 106 is _{adjusted in a stepwise manner (eg, C step} 1, etc.) in the direction of the _{conventional variable capacitance C optimum 1 .}

For the radio frequency RF _optimum 1@C1 and the variable capacitor C _step 1, the RF generator 104 generates an _{RF signal with the radio frequency RF optimum} 1@C1, and the RF signal is passed through the impedance matching network 106 to generate a supply to the underside of the chuck 118 The modified signal of the electrode. When the RF generator 104 generates _{the RF signal with the RF optimum} 1@C1 and the combined variable capacitance system C _step 1, the sensor 124 measures the voltage reflection coefficient Γ at the output 126, and the processor 134, as described above The impedance Zmi1 is generated from the voltage reflection coefficient Γmi1 in the same way that the impedance Zmi2 is generated from the voltage reflection coefficient Γmi2. Furthermore, the impedance Zmi2 is propagated forward through the matching network model 102 in the same way that the load impedance ZL1 is generated at the output 144 from the impedance Zmi1 at the input 142 of the matching network model 102. A load impedance ZL2 is produced at the output 144 of 102 .

FIG. 4 is a diagram of one embodiment of a matching network model 102 set to RF _optimum 1@C1 and combined variable capacitance C _step 1 to generate a voltage reflection coefficient Γ at input 142 minimum value. For example, the processor 134 applies the RF _optimum 1@C1 and the combined variable capacitance C _step 1 to the matching network model 102 . As another example, the processor 134 sets the values of the parameters of the matching network model 102 to have the radio frequency value RF _optimum 1@C1 and the combined variable capacitance value C _step 1 .

In the same manner as described above for calculating the combined variable capacitance C _{optimum 1, the processor 134 calculates the combined variable capacitance value C optimum} 2 with a voltage reflection coefficient Γi of zero from the load impedance ZL2 and the matching network model 102. The RF processor 134 is applied to the value of the matching network model 102 from _RF optimum 1 1 @ C _step of changing _RF optimumn @C _step 1 and the backward propagation of the load impedance ZL2, to determine the minimum value of voltage reflection coefficient Γi based radio frequency _RF optimum 1@C _step 1, where n is an integer greater than 1. For example, when the matching network model 102 has the RF _optimum 1@C _step 1, the processor 134 propagates the impedance ZL2 backward through the matching network model 102 _{with the variable capacitance C step 1 to determine that the voltage reflection coefficient Γi has} first value. Furthermore, in this example, when the matching network model 102 has RF _optimum 2@C _step 1, the processor 134 _{propagates impedance ZL2 backwards via the matching network model 102 with variable capacitance C step} 1 to determine the voltage reflection The coefficient Γi has a second value. The processor 134 determines that the first value is the minimum value of the first and second values, so as to further determine the RF _optimum 1@C _step 1 is the radio frequency value at which the voltage reflection coefficient Γi is the minimum value.

FIG. 5 is a diagram of one embodiment of the plasma system 100 to illustrate the use of a capacitance value of C _optimum 2 to generate another step combined variable capacitance value of C _step 2, and a value of RF _optimum 1@C _step 1 to generate a load impedance ZL3. The processor 134 modifies the recipe to include the RF value RF _optimum 1@C _step 1 and provides the RF value RF _optimum 1@C _step 1 to the RF generator 104 . Further, processor 134 determines the step value of the variable capacitance C _step 2, the step-variable capacitance value C _step 2 based value from an additional step C _step 1 step 2 in the direction towards the _optimum value C. For example, among the variable capacitance values C _step 1, C _step 2, and C _optimum 2, the variable capacitance value C _step 2 is greater than the value C _step 1 and smaller than the value C _optimum 2, and the values C _step 2 and C _step 1 is greater than the value C1. As another example, among the variable capacitance values C _step 1, C _step 2, and C _optimum 2, the variable capacitance value C _step 2 is smaller than the value C _step 1 and greater than the value C _optimum 2, and the values C _step 1 and C optimum 2 are C _step 2 is less than the value C1.

Instead of setting the combined variable capacitance of the impedance matching network 106 at a value of C _optimum 2 and instead of setting the RF generator 104 to generate an _{RF signal with radio frequency RF optimum} , the processor 134 controls the drive assembly 112 to make the combination of the impedance matching network 106 The variable capacitance is set at the value C _step 2, and the RF generator 104 is controlled to operate at RF _optimum 1@C _step 1. For the radio frequency RF _optimum 1@C _step 1 and the variable capacitor C _step 2, the RF generator 104 generates an _{RF signal with the radio frequency RF optimum} 1@C _step 1, and the RF signal is passed through the impedance matching network 106 to generate a The modified signal of the electrode below the disk 118. For radio frequency RF _optimum 1@C _step 1 and variable capacitance C _step 2, the sensor 124 measures the voltage reflection coefficient Γmi3 at the output 126, and the processor 134 generates the same impedance Zmi1 from the voltage reflection coefficient Γmi1 In this way, the impedance Zmi3 is generated from the voltage reflection coefficient. Furthermore, the impedance Zmi3 is propagated forward through the matching network model 102 in the same way that the load impedance ZL1 is generated at the output 144 from the impedance Zmi1 at the input 142 of the matching network model 102. A load impedance ZL3 is produced at the output 144 of 102 .

In some embodiments, the radio frequency RF _optimum 1@C _step 1 is equal to the optimum radio frequency value RF _optimum , and _{the combined variable capacitance of C step} 2 is equal to the value C _optimum 2 . In these embodiments, the operations described below with reference to FIGS. 6 to 9 are not performed.

6 is a diagram of one embodiment of a matching network model 102 set to RF _optimum 1@C _step 1 and combined variable capacitance C _step 2 to generate a voltage reflection coefficient at input 142 The minimum value of Γi. In the same manner as described above for calculating the combined variable capacitance C _{optimum 1, the processor 134 calculates the combined variable capacitance value C optimum} 3 with zero voltage reflection coefficient Γi from the load impedance ZL3 and the matching network model 102 .

In addition, the processor 134 changes the RF value applied to the matching network model 102 from RF _optimum 1@C _step 2 to RF _optimumn @C _step 2 and propagates the load impedance ZL3 backward to determine the RF value of the minimum voltage reflection coefficient Γi RF _optimum 1@C _step 2, where n is an integer greater than 1. For example, when the matching network model 102 has RF _optimum 1@C _step 2, the processor 134 propagates the impedance ZL3 backward through the matching network model 102 with the combined variable capacitance C _{step 2 to determine the voltage reflection coefficient Γi} has the first value. Furthermore, in this example, when the matching network model 102 has RF _optimum 2@C _step 2, the processor 134 propagates impedance ZL3 backward through the matching network model 102 with the combined variable capacitance C _{step 2 to determine the voltage} The reflection coefficient Γi has a second value. The processor 134 determines that the first value is the minimum value of the first and second values, so as to further determine the RF _optimum 1@C _step 2 is the radio frequency value at which the voltage reflection coefficient Γi is the minimum value.

In some embodiments, _{any one of the capacitance values C optimum} 2 and C _optimum 3 is equal to the capacitance value C _optimum 1 where the voltage reflection coefficient Γi is zero.

FIG. 7 is a diagram of one embodiment of the plasma system 100 to illustrate the use of a capacitance value of C _optimum 3, and a use of a value of RF _optimum 1@C _step 2, to generate load impedance ZL4. The processor 134 modifies the recipe to include the RF value RF _optimum 1@C _step 2, and provides the RF value RF _optimum 1@C _step 2 to the RF generator 104. Further, processor 134 determines the step value of the variable capacitance C _step 3, the step-variable capacitance value C _step 3 lines from an additional value C _step 2 step 3 step in the direction towards the _optimum value C. For example, the value C _step 3 is the value C _optimum 3 . For further explanation, among the variable capacitance values C _step 1, C _step 2, and C _optimum 3, the variable capacitance value C _optimum 3 is greater than the value C _step 2, and the value C _step 2 is greater than the value C _step 1, and the The value C _step 1 is greater than the capacitance value C1. As another illustration, among the variable capacitance values C _step 1, C _step 2, and C _optimum 3, the variable capacitance value C _optimum 3 is smaller than the value C _step 2, and the value C _step 2 is smaller than the value C _step 1, And the value C _step 1 is smaller than the value C1.

The processor 134 controls the drive assembly 112 so that the combined variable capacitance of the impedance matching network 106 is _{set at a value of C optimum} 3 . Furthermore, instead of setting the RF generator 104 to generate an _{RF signal having the RF optimum} , the processor 134 controls the RF generator 104 to operate at the RF _optimum 1@C _step 2.

For the radio frequency RF _optimum 1@C _step 2 and the variable capacitance C _optimum 3, the RF generator 104 generates an _{RF signal with the radio frequency RF optimum} 1@C _step 2, and the RF signal is transmitted through the impedance matching network 106 to generate a The modified signal of the electrode below the disk 118. For radio frequency RF _optimum 1@C _step 2 and variable capacitance C _optimum 3, the sensor 124 measures the voltage reflection coefficient Γmi4 at the output 126, and the processor 134 is identical to the one generated by the impedance Zmi1 from the voltage reflection coefficient Γmi1 way, the impedance Zmi4 is generated from the voltage reflection coefficient Γmi4. Furthermore, the impedance Zmi4 is propagated forward through the matching network model 102 in the same way that the load impedance ZL1 is generated at the output 144 from the impedance Zmi1 at the input 142 of the matching network model 102 . A load impedance ZL4 is produced at the output 144 of 102 .

In some embodiments, the value RF _optimum 1@C _step 2 is equal to the radio frequency value RF _optimum . In these embodiments, the operations described below with reference to FIGS. 8 and 9 are not performed.

In various embodiments, each of the optimum values C _optimum 1, C _optimum 2, and C _optimum 3 are programmed and constrained in the processor 134 to calculate an optimum capacitance value within predetermined capacitance value boundaries obtained later. For example, the processor 134 is programmed to determine the optimum capacitance value C _optimum 1 in the manner described above with reference to FIG. 2, except that the capacitance value C _optimum 1 is between an upper predetermined limit and a lower predetermined limit. These predetermined boundaries are the same as the operating boundaries of one or more variable capacitors of impedance matching network 106 (FIG. 1). For example, one or more variable capacitors are physically inoperable outside these operational boundaries. As another example, the processor 134 is programmed to determine the optimum capacitance value C _optimum 2 in the manner described above with reference to FIG. 4, except that the capacitance value C _optimum 2 is between an upper predetermined limit and a lower predetermined limit. As yet another example, the processor 134 is programmed to determine the optimum capacitance value C _optimum 3 in the manner described above with reference to FIG. 6 , except that the capacitance value C _optimum 3 is between an upper predetermined limit and a lower predetermined limit.

In some embodiments, each of the values RF _optimum 1@C1, RF _optimum 1@C _step 1, RF _optimum 1@C _step 2, and RF _optimum 1@C _optimum is constrained when the processor 134 is programmed It is obtained after calculating an optimum RF value within predetermined limits. For example, the processor 134 is programmed to determine the RF value RF _optimum 1@C1 in the manner described above with reference to FIG. 2, except that the RF value RF _optimum 1@C1 is between an upper predetermined boundary and a lower predetermined boundary. These predetermined boundaries are the same as the operational boundaries of RF generator 104 (FIG. 1). For example, the RF generator 104 is physically inoperable outside the operational boundaries. As another example, the processor 134 is programmed to determine the RF value RF _optimum 1@C _step 1 in the manner described above with reference to FIG. 4, except that the RF value RF _optimum 1@C _step 1 is at the upper predetermined boundary and the lower predetermined boundary between the boundaries. As yet another example, the processor 134 is programmed to determine the optimum RF value RF _optimum 1@C _step 2 in the manner described above with reference to FIG. 6, except that the RF value RF _optimum 1@C _step 2 is at an upper predetermined boundary and the lower predetermined boundary. As another example, the processor 134 is programmed to determine the optimum RF value RF _optimum 1@C _optimum in the manner described above with reference to FIG. 8, except that the RF value RF _optimum 1@C _optimum is at the upper predetermined boundary and the lower predetermined boundary between the boundaries.

8 is a diagram of one embodiment of a matching network model 102 set to RF _optimum 1@C _step 2 and combined variable capacitance C _optimum 3 to generate a voltage reflection coefficient at input 142 The minimum value of Γi. The processor 134 changes the radio frequency value applied to the matching network model 102 from RF _optimum 1@C _optimum to RF _optimumn @C _optimum and propagates the load impedance ZL4 backwards, to determine the radio frequency RF _optimum 1@ of the minimum voltage reflection coefficient Γi system C _optimum , where n is an integer greater than 1. For example, when the matching network model has RF _optimum 1@C _step 2, the processor 134 propagates the load impedance ZL4 backward through the matching network model 102 _{with variable capacitance C optimum 3 to determine that the voltage reflection coefficient Γi has} first value. Furthermore, in this example, when the matching network model has RF _optimum 2@C _step 2, the processor 134 propagates the load impedance ZL4 backwards _{via the matching network model 102 with variable capacitance C optimum 3 to determine the voltage reflection} The coefficient Γi has a second value. The processor 134 determines that the first value is the minimum value of the first and second values, so as to further determine the RF _optimum 1@C _optimum is the radio frequency value at which the voltage reflection coefficient Γi is the minimum value.

In some embodiments, the value RF _optimum 1@C _optimum is equal to the value RF _optimum .

FIG. 9 is a diagram of one embodiment of plasma system 100 to illustrate processing of wafer W _{using capacitance values C optimum} 3 and using values RF _optimum 1@C _optimum. The processor 134 modifies the recipe to include the RF value RF _optimum 1@C _optimum and provides the RF value RF _optimum 1@C _optimum to the RF generator 104 . In addition, the processor 134 continues to control the drive assembly 112 so that the combined variable capacitance of the impedance matching network 106 is _{set at the value C optimum} 3 . Furthermore, instead of setting the RF generator 104 to generate an _{RF signal having a radio frequency RF optimum} , the processor 134 controls the RF generator 104 to operate at the radio frequency RF _optimum 1@C _optimum .

For the radio frequency RF _optimum 1@C _optimum and the variable capacitance C _optimum 3, the RF generator 104 generates an _{RF signal with the radio frequency RF optimum} 1@C _optimum , and the RF signal is transmitted through the impedance matching network 106 to generate a modified signal, The modified signal is provided to the lower electrode of the chuck 118 for processing the wafer W. In this way, instead of directly applying the radio frequency RF _optimum from the radio frequency RF1 and replacing directly applying the combined variable capacitance value C _optimum 1 from the combined variable capacitance value C1, the one-step mode is carried out as follows: First, the combined variable capacitance value C _step 1 is Apply with radio frequency RF _optimum 1@C1, then apply combined variable capacitance value C _step 1 and radio frequency RF _optimum 1@C1, then apply combined variable capacitance value C _step 2 and radio frequency RF _optimum 1@C _step 1, then apply Combine the variable capacitance value C _optimum 3 and the radio frequency RF _optimum 1@C _step 2, and finally apply the combined variable capacitance value C _optimum 3 and the radio frequency RF _optimum 1@C _optimum . For example, the application of the combined variable capacitance value C _optimum 3 and the radio frequency RF _optimum 1@C _step 2 precedes the application of the combined variable capacitance value C _optimum 3 and the radio frequency RF _optimum 1@C _optimum . In addition, the application of the combined variable capacitance value C _step 2 and the radio frequency RF _optimum 1@C _step 1 precedes the application of the combined variable capacitance value C _optimum 3 and the radio frequency RF _optimum 1@C _step 2. In addition, the application of the combined variable capacitance value C _step 1 and the radio frequency RF _optimum 1@C1 precedes the application of the combined variable capacitance value C _step 2 and the radio frequency RF _optimum 1@C _step 1.

In some embodiments, instead of directly applying the radio frequency RF _optimum from the radio frequency RF1 and instead of directly applying the combined variable capacitance value C _optimum 1 from the combined variable capacitance value C1, the step-by-step approach is performed as follows: first, the combined variable capacitance value C _step 1 is applied with the RF _optimum 1@C1 (see Figure 3), then the combined variable capacitance value C _step 2 and the RF _optimum 1@C _step 1 (see Figure 5) are applied, and then the combined variable capacitance value C is applied _optimum 3 and RF _optimum 1@C _step 2 (see Figure 7), and finally apply the combined variable capacitance value C _optimum 3 and RF _optimum 1@C _optimum (see Figure 9).

In some embodiments, instead of generating impedances (eg, impedance Zmi1 , etc.) from voltage reflection coefficients (eg, Γmi1 , Γmi2 , Γmi3 , Γmi4 , etc.) received from sensor 124 , processor 134 receives the voltage reflection coefficients for use in matching network models Corresponding load voltage reflection coefficient impedances (eg, ΓL1, ΓL2, ΓL3, ΓL4, etc.) are produced at the output 144 of 102 . There is no need to convert the voltage reflection coefficient to impedance and vice versa.

In various embodiments, instead of the matching network model 102, a combination of the matching network model 102 and the RF transmission model is used to change the capacitance of the impedance matching network 106 in a stepwise fashion as described herein. For example, the load impedances ZL1 , ZL2 , ZL3 , and ZL4 are calculated at the output of the RF transmission model rather than at the output 144 of the matching network model 102 . As another example, instead of the matching network model 102 used in Figures 2, 4, 6 and 8, both the matching network model 102 and the RF transmission model are used. The RF transmission model is connected in series with the output 144 of the matching network model 102 and is derived from the RF transmission line 132 in a similar manner as the matching network model 102 is derived from the impedance matching network 106 . For example, the RF transmission model has inductance, capacitance, and/or resistance derived from the inductance, capacitance, and/or resistance of the RF transmission line 132 . As another example, the capacitance of the RF transmission model matches the capacitance of RF transmission line 132 , the inductance of the RF transmission model matches the inductance of RF transmission line 132 , and the resistance of the RF transmission model matches the resistance of RF transmission line 132 .

In some embodiments, instead of matching network model 102, a combination of RF cable model, matching network model 102, and RF transmission model is used to change the capacitance of impedance matching network 106 in steps as described herein. For example, the load impedances ZL1 , ZL2 , ZL3 , and ZL4 are calculated at the output of the RF transmission model rather than at the output 144 of the matching network model 102 . As another example, instead of the matching network model 102 used in Figures 2, 4, 6, and 8, an RF cable model, matching network model 102, and RF transmission model are used. The RF cable model is connected in series with the input 142 of the matching network model 102 and is derived from the RF cable 130 in a similar manner as the matching network model 102 is derived from the impedance matching network 106 . For example, the RF cable model has inductance, capacitance, and/or resistance derived from the inductance, capacitance, and/or resistance of the RF cable 130 . As another example, the capacitance of the RF cable model matches the capacitance of RF cable 130 , the inductance of the RF cable model matches the inductance of RF cable 130 , and the resistance of the RF cable model matches the resistance of RF cable 130 .

FIG. 10 is one embodiment of a graph 1000 illustrating stepwise adjustment of the impedance matching network 106 and the RF generator 104. FIG. Graph 1000 plots the frequency of the RF signal generated by RF generator 104 versus the combined variable capacitance of impedance matching network 106 . The graph 1000 plots a representative contour of the voltage reflection coefficient Γ as a function of the combined variable capacitance of the impedance matching network 106 and the frequency of the RF signal generated by the RF generator 104 . Starting from point B, where the magnitude of the voltage reflection coefficient is approximately equal to 0.5, the matching network model 102 indicates that the optimal adjustment point is A, where the magnitude of Γ is approximately equal to zero and the resistance value at output 126 is 50 ohms (Figure 1). If the combined variable capacitance of impedance matching network 106 and the frequency of the RF signal generated by RF generator 104 are changed at the maximum achievable rate, before the slower variable capacitance of impedance matching network 106 has a chance to move , the frequency drops very quickly to a point C where the magnitude of the voltage reflection coefficient Γ is worse. In a step-wise adjustment, the combined variable capacitance of the impedance matching network 106 is changed from point B to point A, but through points D, E, and F, and the frequency of the RF signal is set for points D, E, and F. and each of the variable capacitances of F are adjusted. At each of points D, E, and F, the local optimum frequency of the RF signal for the smallest magnitude of the voltage reflection coefficient Γ is determined.

It should be understood that in some of the above-described embodiments, the RF signal is supplied to the lower electrode of the chuck 118 and the upper electrode 116 is grounded. In various embodiments, the RF signal is applied to the upper electrode 116 and the lower electrode of the chuck 118 is grounded.

The embodiments described herein may be implemented with various computer system configurations including hand-held hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers Wait. The embodiments described herein can also be practiced in distributed computing environments where tasks are performed by remote processing hardware units that are linked through a computer network.

In some embodiments, the controller is part of a system, which may be part of the above examples. The system includes semiconductor processing equipment including one or more processing tools, one or more chambers, one or more platforms for processing, and/or specific processing elements (wafer pedestals, gas flow systems, etc.). The system is integrated with electronic equipment for controlling the operation of the system before, during, and after processing of semiconductor wafers or substrates. Electronic devices are referred to as "controllers" that control various elements or subsections of the system. Depending on the processing needs and/or type of the system, the controller is programmed to control any of the processes disclosed herein, including: delivery of process gases, temperature settings (eg, heating and/or cooling), pressure settings, vacuum settings, power settings , RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, access to a tool and other transfer tools and/or crystals of load locks connected or interfaced with the system Circle transfer.

Broadly speaking, in various embodiments, a controller is defined as an electronic device having various integrated circuits, logic, memory, and/or software that receives commands, issues commands, controls operations, enables cleaning operations, enables terminals point measurement, etc. Integrated circuits include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as ASICs, PLDs, one or more microprocessors or microcontrollers that execute program instructions (eg, software). These program instructions are instructions that communicate with the controller in the form of various individual settings (or program files) that define the operating parameters for the execution of the process on the semiconductor wafer. In some embodiments, the operating parameters are part of a recipe defined by a process engineer for one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or wafers More than one processing step is completed during die fabrication.

In some embodiments, the controller is part of or coupled to a computer that is integrated with the system, coupled to the system, otherwise networked to the system, or a combination of the above. For example, the controller resides in the "cloud" or as a whole or part of the fab's host computer system, allowing remote access to wafer processing. The controller allows remote access to the system to monitor the current progress of manufacturing operations, review the history of past manufacturing operations, review trends or performance metrics from multiple manufacturing operations, to change parameters of the current process, to set after the current operation process steps, or start a new process.

In some embodiments, a remote computer (eg, a server) provides recipes to the system via a computer network, including a local area network or the Internet. The remote computer includes a user interface that allows entry or programming of parameters and/or settings, which are then passed from the remote computer to the system. In some examples, the controller receives instructions in a set form for processing the wafer. It should be understood that these settings are specific to the type of process to be performed on the wafer and the type of tool to interface or control the controller. Thus, as described above, the controllers are distributed, such as by including more than one distributed controller, linked together by a network and working toward a common purpose, such as the process of implementation described herein. An example of a distributed controller for these purposes includes one or more integrated circuits on a chamber, communicating with one or more integrated circuits at a remote location (such as at the platform level or as part of a remote computer), which combine to Control the process in the chamber.

Without limitation, in various embodiments, the system includes a plasma etch chamber, a deposition chamber, a spin-rinse chamber, a metal plating chamber, a cleaning chamber, a bevel etch chamber, a physical vapor deposition ( PVD) chambers, groups of chemical vapor deposition (CVD) chambers, atomic layer deposition (ALD) chambers, atomic layer etching (ALE) chambers, ion implantation chambers, orbital chambers, and associated or for semiconductors Any other semiconductor processing chamber in the fabrication and/or production of wafers.

It should be further noted that although the above operations are described with reference to parallel plate plasma chambers (eg, capacitively coupled plasma chambers, etc.), in some embodiments, the above operations may be applied to other types of plasma chambers, such as : Plasma chambers containing inductively coupled plasma (ICP) reactors, transformer coupled plasma (TCP) reactors, conductor tools, dielectric tools; plasma chambers containing electron cyclotron resonance (ECR) reactors, etc. For example: an x MHz RF generator, a y MHz RF generator, and a z MHz RF generator are coupled to inductors within the ICP plasma chamber.

As mentioned above, depending on the process operation to be performed by the tool, the controller communicates with: one or more other tool circuits or modules, other tool elements, group tools, other tool interfaces, adjacent tools, adjacent tools, located throughout the factory A tool, a host computer, another controller, or a tool for material transfer that carries containers of wafers to and from tool locations and/or load ends within a semiconductor fabrication facility.

After considering the above-described embodiments, it should be understood that some embodiments employ various computer-implementable operations involving data stored in computer systems. These computer-implemented operations are those that manipulate physical quantities.

Some embodiments also pertain to hardware units or devices for performing these operations. This device is specially constructed for special purpose computers. When defined as a special-purpose computer, the computer performs other processing, program execution, or common programs that are not part of the special-purpose computer, but is still capable of operating for the special-purpose use.

In some embodiments, the operations described herein are performed by a computer selectively activated or configured by one or more computer programs stored in computer memory or obtained over a computer network. When the data is obtained through a computer network, the data can be processed by other computers (eg cloud computing resources) on the computer network.

One or more of the embodiments described herein can also be fabricated as computer readable code on a non-transitory computer readable medium. The non-transitory computer-readable medium is any data storage hardware unit (eg, a memory device, etc.) that stores data that is later read by a computer system. Examples of non-transitory computer readable media include hard disks, network attached storage (NAS), ROM, RAM, compact disk ROM (CD-ROM), compact disk recordable (CD-R), compact disk read/write (CD-RW), magnetic tape, and other optical and non-optical data storage hardware units. In some embodiments, the non-transitory computer-readable medium comprises computer-readable physical media distributed across network-coupled computer systems such that computer-readable code is stored and executed in a distributed fashion.

Although some of the method operations described above are presented in a particular order, it should be understood that in various embodiments, other housekeeping operations are performed between the method operations, or the method operations are adjusted such that the operations occur At slightly different points in time, or in a system that allows the method operations to occur over various time intervals, or are performed in a different order than described above.

It should be further noted that, in one embodiment, one or more features from any of the above-described embodiments may be combined with one or more features of any other embodiment without departing from the scope of the various embodiments described in this disclosure.

Although the above-described embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. Accordingly, embodiments of the present invention are to be regarded as illustrative rather than restrictive, and such embodiments are not to be limited to the details provided herein, but may be added within the scope and equivalents of the appended claims Revise.

100‧‧‧Plasma System 102‧‧‧Matching Network Model 104‧‧‧Radio Frequency (RF) Generator 106‧‧‧Impedance Matching Network 108‧‧‧Plasma Chamber 110‧‧‧Host Computer System 112‧ ‧‧Drive Assembly 114‧‧‧Connecting Mechanism 116‧‧‧Top Electrode 118‧‧‧Chuck 120‧‧‧Top Surface 122‧‧‧RF Power Supply 124‧‧‧Sensor 126‧‧‧Output 128‧‧‧ Input 130‧‧‧RF Cable 132‧‧‧RF Transmission Line 134‧‧‧Processor 136‧‧‧Network Cable 137‧‧‧Memory Device 138‧‧‧Network Cable 140‧‧‧Output 142‧‧‧Input 144‧‧‧Output 1000‧‧‧map

Embodiments are understood by reference to the following description taken in conjunction with the accompanying drawings.

FIG. 1 is a diagram of one embodiment of a plasmonic system to illustrate the use of a matching network model to generate load impedance ZL1.

Figure 2 is a diagram of one embodiment of a matching network model initialized to radio frequency RF1 and variable capacitor C1 to generate reflection coefficients Γi at the input of the matching network model.

Figure 3 is a diagram of one embodiment of a plasma system to illustrate the use of capacitor C _optimum 1 to generate a step combined variable capacitance value C _step 1, and the use of value RF _optimum 1@C1 to generate load impedance ZL2.

FIG. 4 is a diagram of an embodiment of a matching network model set to RF _optimum 1@C1 and a combined variable capacitor C _step 1 to generate a reflection coefficient Γi at the input of the matching network model the minimum value of .

Figure 5 is a diagram of one embodiment of a plasma system to illustrate the use of capacitance values C _optimum 2 to generate another step combined variable capacitance value C _step 2, and the use of values RF _optimum 1@C _step 1 to generate load impedance ZL3 .

FIG. 6 is a diagram of an embodiment of a matching network model set to RF _optimum 1@C _step 1 and combined variable capacitance C _step 2 to generate reflections at the input of the matching network model Minimum value of coefficient Γi.

Figure 7 is a diagram of one embodiment of a plasma system to illustrate the use of a capacitance value of C _optimum 3, and a use of a value of RF _optimum 1@C _step 2, to generate load impedance ZL4.

FIG. 8 is a diagram of an embodiment of a matching network model set to RF _optimum 1@C _step 2 and combined variable capacitance C _optimum 3 to generate reflections at the input of the matching network model Minimum value of coefficient Γi.

FIG. 9 is a diagram of one embodiment of a plasma system to illustrate processing of wafer W _{using capacitance values C optimum} 3 and using values RF _optimum 1@C _optimum.

10 is one embodiment of a diagram illustrating stepwise adjustment of the impedance matching network and RF generator of the plasmonic system.

100‧‧‧Plasma System

102‧‧‧Matching Network Models

104‧‧‧Radio Frequency (RF) Generators

106‧‧‧Impedance matching network

108‧‧‧Plasma Chamber

110‧‧‧Host computer system

112‧‧‧Drive components

114‧‧‧Connection mechanism

116‧‧‧Top electrode

118‧‧‧Chuck

120‧‧‧Top surface

122‧‧‧RF Power

124‧‧‧Sensor

126‧‧‧output

128‧‧‧Input

130‧‧‧RF cable

132‧‧‧RF Transmission Line

134‧‧‧Processors

136‧‧‧Network Cable

137‧‧‧Memory Devices

138‧‧‧Network Cable

140‧‧‧output

142‧‧‧Input

144‧‧‧Output

Claims (26)

A method of adjusting an impedance matching network in a stepwise manner, comprising: when a radio frequency (RF) generator is operating at a first parameter value and the impedance matching network has a first variable measurable factor, receiving a first measured input voltage reflection coefficient value sensed at a point between an output of the RF generator and an input of the impedance matching network; based on the first measured input voltage reflection coefficient value, a a first input impedance value; initialize one or more models to have the first variable measurable factor and the first parameter value, wherein the one or more models include a matching network model of the impedance matching network; propagate the first The input impedance value is passed through the one or more models to output a first output impedance value, wherein the step of propagating the first input impedance value is when the one or more models have the first variable measurable factor and the first parameter value is performed when the first output impedance value and the one or more models are used to determine a calculated optimal parameter value and an optimal variable measurable value with a reflection coefficient of zero at an input of the one or more models factor; using the first output impedance value and the one or more models, determine a first optimal parameter value where the reflection coefficient at the input of the one or more models is the minimum value between a plurality of reflection coefficient values; operating the RF generator at the first optimum parameter value; and setting the impedance matching network to have a first step variable scalability factor, wherein the first step variable scalability factor is related to the The first variable scalability factor is relatively close to the optimal variable scalability factor, so that the impedance matching network is adjusted in the stepwise manner. The method for adjusting an impedance matching network in a stepwise manner as claimed in claim 1 of the claimed scope, further comprising: when the RF generator is operated at the first optimum parameter value and the impedance matching network is configured to have the receiving a second measured input voltage reflection coefficient value sensed at the point between the output of the RF generator and the input of the impedance matching network in a first step to the variable measurable factor; Determine a second input impedance value based on the second measured input voltage reflection coefficient value; set the one or more models to have the first step variable measurable factor and the first optimal parameter value; when the one When the above model has the first step variable measurable factor and the first optimal parameter value, use the one or more models to calculate a second output impedance value from the second input impedance value; use the second output impedance value and the one or more models, calculating a second optimal parameter value where the reflection coefficient at the input of the one or more models is the minimum value between a plurality of reflection coefficient values; at the second optimal parameter value operating the RF generator down; and setting the impedance matching network to have a second step variable scalability factor. The method for adjusting an impedance matching network in a step-by-step manner of claim 2, wherein the second optimal parameter value is equal to the calculated optimal parameter value. For example, the method for adjusting the impedance matching network in a step-by-step manner in item 2 of the scope of the patent application further includes: The output received at the RF generator and the a third measured input voltage reflection coefficient value sensed at the point between the inputs of the impedance matching network; determining a third input impedance value based on the third measured input voltage reflection coefficient value; setting the one The above model has the second step variable measurable factor and the second optimal parameter value; using the one or more models, calculates a third output impedance value from the third input impedance value; using the third output impedance values and the one or more models, calculating a third optimal parameter value where the reflection coefficient at the input of the one or more models is the minimum value between a plurality of reflection coefficient values; and at the third most Operate the RF generator at optimal parameter values. The method for adjusting the impedance matching network in a step-by-step manner as claimed in claim 4, wherein the third optimal parameter value is equal to the calculated optimal parameter value. The method for adjusting an impedance matching network in a step-by-step manner as claimed in claim 4, wherein the third optimal parameter value is different from the calculated optimal parameter value. The method of adjusting an impedance matching network in a stepwise manner as claimed in claim 1, wherein the first measured input voltage reflection coefficient value is obtained by a sensor coupled to the output of the RF generator Sensing. The method of stepwise adjusting an impedance matching network of claim 1, wherein the first output impedance value is added by propagating the first input impedance value forward through circuit elements of the one or more models calculate. The method for adjusting an impedance matching network in a step-by-step manner as claimed in claim 1, wherein the calculated optimal parameter values and the optimal variable scalability factor are determined by circuit elements passing through the one or more models The first output impedance value is propagated back and calculated to achieve the zero reflection coefficient. A system for adjusting an impedance matching network in a stepwise manner, comprising: a processor configured to operate when a radio frequency (RF) generator operates at a first parameter value and the impedance matching network has a first variable adjustable When measuring the factor, a first measured input voltage reflection coefficient value of a parameter sensed at a point between an output of the RF generator and an input of the impedance matching network is received, wherein the processor is constructed to determine a first input impedance value based on the first measured input voltage reflection coefficient value, wherein the processor is configured to initialize one or more models to have the first variable scalability factor and the first parameter value, wherein the one or more models comprise a model of the impedance matching network; and a memory device connected to the processor, wherein the memory device is configured to store the one or more models, wherein the processor is configured to propagate the first input impedance value through the one or more models to output a first output impedance value, wherein the processor is configured to output a first output impedance value when the one or more models have the first variable measurable factor and the first parameter value when propagating the first input impedance value, wherein the processor is configured to use the first output impedance value and the one or more models to determine a reflection at an input of the one or more models a calculated optimal parameter value with a coefficient of zero and an optimal variable measurable factor, wherein the processor is configured to use the first output impedance value and the one or more models to determine an optimal value between the one or more models The reflection coefficient at the input is a first optimal parameter value that is the minimum value between reflection coefficient values, wherein the processor is configured to operate the RF generator at the first optimal parameter value , wherein the processor is configured to set the impedance matching network to have a first step variable scalability factor, wherein the first step variable scalability factor and the first variable scalability factor The factor ratio is closer to the best variable measurable factor so that the impedance matching network is adjusted in the stepwise fashion. The system for adjusting an impedance matching network in a stepwise manner as claimed in claim 10, wherein the processor is configured such that when the RF generator is operating at the first optimum parameter value and the impedance matching network The circuit is configured to have the first step variable scalability factor to receive a second measured value sensed at the point between the output of the RF generator and the input of the impedance matching network Enter the voltage reflection coefficient value, wherein the processor is configured to determine a second input impedance value based on the second measured input voltage reflection coefficient value, wherein the processor is configured to set the one or more models to have the first step variable A measurement factor and the first optimal parameter value, wherein the processor is configured to use the first step variable measurement factor and the first optimal parameter value when the one or more models have the One or more models calculate a second output impedance value from the second input impedance value, wherein the processor is configured to use the second output impedance value and the one or more models to calculate the value at the input of the one or more models The reflection coefficient is a second optimal parameter value that is the minimum value between a plurality of reflection coefficient values, wherein the processor is configured to operate the RF generator at the second optimal parameter value, and wherein, The processor is configured to configure the impedance matching network to have a second step variable scalability factor. The system of step-wise adjustment of an impedance matching network of claim 11, wherein the processor is configured such that when the RF generator is operating at the second optimum parameter value and the impedance matching network The circuit is configured to have the second step variable measurable factor to receive a third measured value sensed at the point between the output of the RF generator and the input of the impedance matching network an input voltage reflection coefficient value, wherein the processor is configured to determine a third input impedance value based on the third measured input voltage reflection coefficient value, wherein the processor is configured to set the one or more models to have the second step-variable scalable factor and the second optimal parameter value, wherein the processor is configured to use the one or more models from the A third input impedance value calculates a third output impedance value, wherein the processor is configured to use the third output impedance value and the one or more models to calculate the reflection coefficient at the input of the one or more models at a third optimal parameter value of the smallest value between the plurality of reflection coefficient values, and wherein the processor is configured to operate the RF generator at the third optimal parameter value. The system for adjusting the impedance matching network in a stepwise manner as claimed in claim 12, wherein the third optimum parameter value is equal to the calculated optimum parameter value. The system for adjusting an impedance matching network in a stepwise manner as claimed in claim 12, wherein the third optimum parameter value is different from the calculated optimum parameter value. The system for adjusting an impedance matching network in a stepwise manner as claimed in claim 10, wherein the first measured input voltage reflection coefficient value is added by a sensor coupled to the output of the RF generator Sensing. A system for adjusting an impedance matching network in a stepwise manner, comprising: a radio frequency (RF) generator having an output; the impedance matching network connected to the output of the RF generator; a plasma chamber via an RF transmission line connected to the impedance matching network; and a processor coupled to the RF generator, wherein the processor is configured to, when the RF generator operates at a first parameter value and the impedance matching network has a first variable measurable factor, receiving a first measured input voltage reflection coefficient value sensed at a point between the output of the RF generator and an input of the impedance matching network, wherein the processor is configured to be based on the first measuring an input voltage reflection coefficient value to determine a first input impedance value, wherein the processor is configured to initialize one or more models to have the first variable scalability factor and the first parameter value, wherein the one or more The model includes a matching network model of the impedance matching network, wherein the processor is configured to propagate the first measured input impedance value through the one or more models to output a first output impedance value, wherein the processor is configured to propagate the first input impedance value when the one or more models have the first variable measurable factor and the first parameter value, wherein the processor is configured to use the first output impedance value and the first parameter value one or more models determining a calculated optimal parameter value and an optimal variable scalability factor with a reflection coefficient of zero at an input of the one or more models; wherein the processor is configured to use the first an output impedance value and the one or more models, determining a first optimal parameter value where the reflection coefficient at the input of the one or more models is the minimum value between a plurality of reflection coefficient values, wherein the processor is configured to operate the RF generator at the first optimum parameter value, wherein the processor is configured to set the impedance matching network to have a first step variable scalability factor, wherein the first step variable scalability factor and the first variable scalability factor The phase is closer to the optimal variable scalability factor, so that the impedance matching network is adjusted in the stepwise manner. The system of step-wise adjustment of an impedance matching network of claim 16, wherein the processor is configured such that when the RF generator is operating at the first optimum parameter value and the impedance matching network The circuit is configured to have the first step variable scalability factor to receive a second measured value sensed at the point between the output of the RF generator and the input of the impedance matching network an input voltage reflection coefficient value, wherein the processor is configured to determine a second input impedance value based on the second measured input voltage reflection coefficient value, wherein the processor is configured to set the one or more models to have the first a further variable scalability factor and the first optimal parameter value, wherein the processor is configured such that when the one or more models have the first step variable scalability factor and the first optimal parameter value When the parameter value is used, a second output impedance value is calculated from the second input impedance value using the one or more models, wherein the processor is configured to use the second output impedance value and the one or more models to calculate the one or more output impedance values. The reflection coefficient at the input to the model is a second optimal parameter value at the minimum value between reflection coefficient values, wherein the processor is configured to operate the RF at the second optimal parameter value generator, and Wherein, the processor is configured to set the impedance matching network to have a second step variable scalability factor. The system for adjusting an impedance matching network in a stepwise manner as claimed in claim 17, wherein the processor is configured such that when the RF generator is operating at the second optimum parameter value and the impedance matching network The circuit is configured to have the second step variable measurable factor to receive a third measured value sensed at the point between the output of the RF generator and the input of the impedance matching network an input voltage reflection coefficient value, wherein the processor is configured to determine a third input impedance value based on the third measured input voltage reflection coefficient value, wherein the processor is configured to set the one or more models to have the first A two-step variable measurable factor and the second optimal parameter value, wherein the processor is configured to calculate a third output impedance value from the third input impedance value using the one or more models, wherein the processing The device is configured to use the third output impedance value and the one or more models to calculate a third optimal parameter for which the reflection coefficient at the input of the one or more models is the minimum value between a plurality of reflection coefficient values value, and wherein the processor is configured to operate the RF generator at the third optimal parameter value. The system for adjusting the impedance matching network in a step-by-step manner as claimed in claim 18, wherein the third optimum parameter value is equal to the calculated optimum parameter value. The system for adjusting an impedance matching network in a stepwise manner as claimed in claim 18, wherein the third optimum parameter value is different from the calculated optimum parameter value. The system for stepwise adjustment of an impedance matching network of claim 17, wherein the first measured input voltage reflection coefficient value is added by a sensor coupled to the output of the RF generator Sensing. A controller comprising: a processor configured to obtain a first input associated with an output of a radio frequency (RF) generator when an impedance matching network operates at a first variable capacitance value voltage reflection coefficient value; based on the first input voltage reflection coefficient value, determine a first input impedance value; initialize a model to have the first variable capacitance value; when the model has the first variable capacitance value, propagate The first input impedance value is passed through the model to output a first output impedance value; using the first output impedance value and the model, it is determined that a reflection coefficient at an input of the model is the sum of the reflection coefficient values an optimal capacitance value with the minimum value between the two; and controlling the impedance matching network to adjust the first variable capacitance value stepwise to be closer to the optimal capacitance value; and a memory connected to the processing device. The controller of claim 22, wherein the first variable capacitance value is a combined capacitance of one or more variable capacitors of the impedance matching network, wherein the processor is connected to a driver system to control the one The above variable capacitor operates at the first variable capacitance value. The controller of claim 22, wherein the model is a computer model of the impedance matching network. The controller of claim 22, wherein in order to propagate the first input impedance value, the processor is configured to calculate the first input impedance value and one of more than one network element associated with the impedance matching network The directional sum of the above impedance values. The controller of claim 22, wherein the reflection coefficient at the input to the model is a voltage reflection coefficient, wherein the minimum value of the voltage reflection coefficient at the input to the model is a value of zero.

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