TWI747998B - Ion filter - Google Patents

Abstract

The present invention provides a method for using ion filtering to adjust the number of ions delivered to a substrate. The method comprising a process chamber being provided that is operatively connected to a plasma source. The substrate is provided on a substrate support that is provided within the process chamber. An electrical bias source is provided that is operatively connected to an aperture plate that is provided in the process chamber. The substrate on the substrate support is processed using a plasma generated using the plasma source. A variable bias voltage from the electrical bias source is applied to the aperture plate during the plasma processing of the substrate. The plasma processing of the substrate can further comprise exposing the substrate to a plasma time division multiplex process which alternates between deposition and etching on the substrate.

Description

Ion filter

The invention relates to the field of charged particle sources, including a plasma source for direct etching and deposition, a wide beam ion source for ion beam deposition and etching, and an electron source for surface adjustment.

Cross reference of related applications

This application claims the priority of the jointly-owned U.S. Provisional Patent Application No. 62/424,360 filed on November 18, 2016 entitled "Ion Filter" and is related to the provisional patent application. The patent application is incorporated herein by reference.

Plasma processing equipment used to etch silicon wafers and other substrates or deposit various materials on various substrates is very effective for the production of semiconductor devices and other related systems. In its basic form, the plasma is generated in the source zone by a suitable precursor gas to form positive ions, electrons and neutral radicals of the gas. On the wafer, for the etching process, more chemical etching mainly using the neutral radicals or more physical etching using accelerated ions may be required. In many cases, etching requires a combination of ions and neutral radicals.

Plasma can be generated by various means such as an inductively coupled plasma source (ICP), a capacitively coupled plasma source (CCP), a microwave plasma source, or an electron cyclotron resonance source (ECR). Under normal circumstances, the plasma generated to achieve the desired purpose does not have an ideal ratio of the number of ions to the number of chemically reactive radicals in order to achieve the most effective plasma processing of the wafer. Especially when it is required to become more intensified and etch materials at a faster rate, only increasing the gas flow to the plasma source and the power level for dissociating and ionizing the gas will result in a plasma relative to neutral free radicals. There are too many ions, and as the etching process progresses, the excess ions may cause damage to the structure being etched.

The above-mentioned problems have been solved to a certain extent by some individuals and groups in the past two decades, usually in a fairly simple way, providing sufficient ion number reduction for their purposes, but not in plasma processing equipment. Use flexibility to execute different processes at different times. Prior art methods have described the use of magnetic fields generated by permanent magnets or electromagnets to guide ions to the lossy surface between the plasma source and the wafer. These techniques rely on electron trapping on the magnetic field lines that later intersect the lossy surface. The locally generated electric field ensures that ions are also lost to the surface. The use of electromagnets increases the flexibility of the technique, as some adjustments can be made to the degree of ion loss. Magnet-based technology is limited in the pressure range that can be used, because as the pressure increases, the probability that electrons will not remain trapped on the magnetic field lines increases because they collide with neutral gas atoms or molecules and pass through them randomly. Cutscenes line. At pressures of 10 to 20 millitorr (mTorr), this technique becomes less effective. See, for example, Lea et al., U.S. Patent Publication (U.S. Patent Publication No. 2002/0185226).

The prior art more extensively describes the use of porous plates or grids that are usually made of metals compatible with plasma processes, such as aluminum or anodized aluminum. The grid or multi-well plate is placed across the processing chamber between the plasma source and the wafer. It relies on the high probability of ion and electron pairs being lost to the surface of the board and the sides of the holes in the contacts. Some neutral free radicals will be lost to the porous plate, but the possibility of loss is usually much smaller than the loss probability of ion/electron pairs. Therefore, the ratio of ion to neutral free radicals with the porous plate in the proper position is not The proportion of the board is reduced compared to the system. Some examples of prior art are Savas et al. (U.S. Patent No. 5,811,022); Lea et al. (U.S. Patent Publication No. 2002/0185226); Antonelli et al. (U.S. Patent No. 8,084,339); and Martinez et al. ( U.S. Patent No. 8,980,764).

If the transparency of the grid decreases, the ion loss will be greater. That is, the area of the hole is reduced compared to the entire area of the board. If the hole aspect ratio (depth divided by diameter) increases (for example, the plate is thicker and/or the hole diameter is smaller), the ion loss will also increase. As the aspect ratio of the hole increases, the charged material passing through the hole increases the possibility of contact with the sidewall of the hole and be lost. Antonelli et al. (US Patent No. 8,084,339) showed that as the plate thickness and hole diameter increase, typical ion losses are expected.

When the plasma source generates a ratio of the number of ions to the number of radicals that varies with the position of the ion source, the ratio of the number of ions to the number of radicals needs to be changed on the entire wafer, or vice versa to obtain the same or similar ions and free radicals on the entire wafer. The ratio of the number of bases, where the process needs to adjust the ratio of the number of ions to free radicals according to time, or both.

The prior art does not provide the benefits accompanying the present invention.

Therefore, the purpose of the present invention is to provide an improvement that overcomes the shortcomings of the prior art devices and makes a significant contribution to the advancement of the use of charged particle sources.

Another object of the present invention is to provide a method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; A substrate support is provided in the processing chamber; the substrate is provided on the substrate support; a plurality of electric bias sources are provided; an orifice plate is provided in the processing chamber, the orifice plate has a plurality of orifice plates Area, wherein at least two orifice plate areas of the plurality of orifice plate areas are operably connected to separate biases of the plurality of electrical bias voltage sources; the plasma source is used to generate plasma; Using the generated plasma to process the substrate on the substrate support; and during the plasma processing of the substrate, applying individual bias voltages from the plurality of electrical bias sources to all At least two hole regions among the plurality of hole regions.

Another object of the present invention is to provide a method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; A substrate support is provided in the processing chamber; the substrate is provided on the substrate support; a plurality of electrical bias sources are provided; a plurality of orifice plates are provided in the processing chamber, and the plurality of orifice plates At least one orifice plate of has a plurality of orifice plate areas, wherein at least two of the orifice plate areas of the plurality of orifice plate areas are operably connected to individual bias voltages of a plurality of electrical bias voltage sources; using the plasma source Generating plasma; using the generated plasma to process the substrate on the substrate support; and during the plasma processing of the substrate, applying individual bias voltages from the plurality of electrical bias sources To at least two orifice plate areas among the plurality of orifice plate areas.

Another object of the present invention is to provide a method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; A substrate support is provided in the processing chamber; the substrate is provided on the substrate support; an electric bias source is provided; an orifice plate is provided in the processing chamber, and the orifice plate is operatively connected to the The electric bias source; the plasma source is used to generate plasma; the generated plasma is used to process the substrate on the substrate support; and the variable bias voltage from the electric bias source Applied to the orifice plate, the bias voltage changes with time during the plasma treatment of the substrate.

Another object of the present invention is to provide a method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; A substrate support is provided in the processing chamber; the substrate is provided on the substrate support; an electric bias source is provided; a plurality of orifice plates are provided in the processing chamber, at least of the plurality of orifice plates One is operatively connected to the electrical bias source; uses the plasma source to generate plasma; uses the generated plasma to process the substrate on the substrate support; A variable bias voltage of the source is applied to at least one of the plurality of orifice plates, and the bias voltage changes with time during the plasma processing of the substrate.

Another object of the present invention is to provide a method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; A substrate support is provided in the processing chamber; the substrate is provided on the substrate support; a plurality of electric bias sources are provided; an orifice plate is provided in the processing chamber, the orifice plate has a plurality of orifice plates Area, wherein at least two orifice plate areas of the plurality of orifice plate areas are operably connected to the individual bias voltages of the plurality of electrical bias voltage sources; the plasma source is used to generate plasma; the generated all The plasma processes the substrate on the substrate support; and during the plasma processing of the substrate, individual bias voltages from the plurality of electrical bias sources are applied to the plurality of holes In at least two orifice plate areas in the plate area, at least one bias voltage changes with time during the plasma processing of the substrate.

Another object of the present invention is to provide a method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; A substrate support is provided in the processing chamber; the substrate is provided on the substrate support; a plurality of electric bias sources are provided; a plurality of orifice plates are provided in the processing chamber, the plurality of orifice plates At least one orifice plate in has a plurality of orifice plate regions, wherein at least two of the orifice plate regions in the plurality of orifice plate regions are operably connected to individual bias voltages of the plurality of electrical bias voltage sources; using the The plasma source generates plasma; the generated plasma is used to process the substrate on the substrate support; and during the plasma processing of the substrate, the Individual bias voltages are applied to at least two orifice plate regions of the plurality of orifice plate regions, and at least one bias voltage changes with time during the plasma processing of the substrate.

Another object of the present invention is to provide an ion filtration system, including: a processing chamber; a plasma source operably connected to the processing chamber; a substrate support member located in the processing chamber; a plurality of electrical biases Source; and an orifice plate in the processing chamber, the orifice plate having a plurality of orifice plate areas, wherein at least two orifice plate areas of the plurality of orifice plate areas are operably connected to the plurality of electrical The individual bias of the bias source.

The above summarizes some related objects of the present invention. These purposes should be interpreted as merely illustrating some of the more prominent features and applications of the present invention. Many other beneficial results can be obtained by applying the disclosed invention in a different manner or modifying the invention within the scope of the present disclosure. Therefore, in addition to the scope of the present invention defined by the patent application in conjunction with the accompanying drawings, by referring to the summary of the present invention and the detailed description of the preferred embodiments, other purposes and a more comprehensive understanding of the present invention can be obtained.

The invention described here provides greater control of the number of ions reaching the wafer than the basic design of the prior art. The invention described here is particularly suitable for Deep Reactive Ion Etching (DRIE), as it is usually applied by Robert of Germany. The "Bosch process" invented by Bosch employees, described in Laermer and Schilp's US Patent No. 5,498,312, excludes its use for other etching or deposition applications.

In the Bosch DRIE process, the features defined by the mask on the silicon surface are anisotropically etched through repeated cycles of etching and deposition processes. As the process goes through a cycle, in the deposition step, a passivation layer is deposited on all surfaces. At the beginning of the subsequent etching step (or generally defined as the first etching sub-step), the ions from the plasma are accelerated to the wafer and the passivating material is removed from the base of the feature to be etched. In the remaining etching step (or the second etching sub-step), the neutral radicals generated in the plasma are used to etch silicon isotropically. As the cycle repeats, the features defined by the mask are further etched into the silicon wafer. It is particularly important for the effective operation of the process that in the first etching substep, the ion flux is well defined according to multiple parameters, while in the second etching substep and the deposition step, the number of ions should be small , Because they have no significant contribution to any of these steps, and if the number is too large, it will reduce the etching selectivity of the mask, so that the mask is eroded too fast, and the feature has reached enough The depth of is previously defined horizontally.

Regarding the Bosch DRIE process, it is desirable to increase the orifice plate bias on the orifice plate or between the orifice plate or orifice plate portions, so as to reduce the number of ions reaching the wafer during the deposition step and the second etching substep and thus reduce the mask corrosion , Thereby increasing the selectivity of the masking process. During the first etching sub-step, the level of the orifice bias voltage will be reduced so that a sufficient number of ions can be accelerated to the wafer to achieve the required directional passivation removal. For ion filters that are divided into annular hole regions or other hole region geometries, the bias voltage applied to the drive orifice plate in each fan-shaped region can be changed appropriately to achieve a spread throughout the wafer during the first etching substep. The ion density is highly uniform, and the number of ions on the wafer during the second etching sub-step and the deposition step is also very small. If the ion filter is not divided into a plurality of annular hole regions, the time-varying bias voltage can still be applied in the manner described in the present invention for the Bosch DRIE process or the time-varying number of ions that need to reach the wafer. Any other manufacturing process.

Another feature of the present invention is to provide a method for adjusting the number of ions delivered to the substrate using ion filtration. The method includes providing a processing chamber operably connected to a plasma source. The substrate is set on a substrate support provided in the processing chamber. The substrate may further include a semiconductor wafer on an adhesive tape on the frame. Provide multiple sources of electrical bias. An orifice plate having a plurality of orifice plate areas is disposed in the processing chamber, wherein at least two orifice plate areas of the plurality of orifice plate areas are operably connected to individual bias voltages of a plurality of electrical bias voltage sources. The orifice plate may further include a plurality of holes. At least one of the plurality of orifice plate regions may further include a circular geometric shape. The plasma generated by the plasma source is used to process the substrate on the substrate support. During plasma processing of the substrate, individual bias voltages from a plurality of bias voltage sources are applied to at least two orifice plate regions among the plurality of orifice plate regions. During the plasma processing of the substrate, the orifice plate can be actively cooled for a period of time. During the plasma processing of the substrate, at least one orifice area of the plurality of orifice areas may be grounded for a period of time.

Another feature of the present invention is to provide a method for adjusting the number of ions delivered to the substrate using ion filtration. The method includes providing a processing chamber operably connected to a plasma source. The substrate is set on a substrate support provided in the processing chamber. The substrate may further include a semiconductor wafer on an adhesive tape on the frame. Provide multiple sources of electrical bias. A plurality of orifice plates are provided in the processing chamber, wherein at least one of the plurality of orifice plates has a plurality of orifice plate areas, and wherein at least two orifice plate areas of the plurality of orifice plate areas are operably connected to a plurality of electric biases Individual bias in the pressure source. At least one of the plurality of orifice plates may further include a plurality of holes. At least one of the plurality of orifice plate regions may further include a circular geometric shape. The plasma generated by the plasma source is used to process the substrate on the substrate support. During plasma processing of the substrate, individual bias voltages from a plurality of electrical bias sources are applied to at least two orifice plate regions among the plurality of orifice plate regions. During the plasma processing of the substrate, at least one orifice plate area among the plurality of orifice plate areas may be actively cooled for a period of time. During the plasma processing of the substrate, at least one orifice area of the plurality of orifice areas may be grounded for a period of time. During the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates may be positioned unevenly from at least one of the plurality of orifice plates. During plasma processing of the substrate, at least one of the plurality of orifice plates may be positioned non-parallel to at least one of the plurality of orifice plates.

Another feature of the present invention is to provide a method of adjusting the amount of ions delivered to the substrate using ion filtering. The method includes providing a processing chamber operably connected to a plasma source. The substrate is set on a substrate support provided in the processing chamber. The substrate may further include a semiconductor wafer on an adhesive tape on the frame. An electrical bias source is provided, and the electrical bias source is operatively connected to an orifice plate provided in the processing chamber. The orifice plate may further include a plurality of holes. The plasma generated by the plasma source is used to process the substrate on the substrate support. During plasma processing of the substrate, a variable bias voltage from an electrical bias source is applied to the orifice plate. During the plasma processing of the substrate, the orifice plate can be actively cooled for a period of time. During the plasma processing of the substrate, the orifice plate can be grounded for a period of time. The plasma processing of the substrate may also include a plasma time division multiplexing process in which the substrate is exposed to alternate between deposition and etching on the substrate.

Another feature of the present invention is to provide a method for adjusting the number of ions delivered to the substrate using ion filtration. The method includes providing a processing chamber operably connected to a plasma source. The substrate is set on a substrate support provided in the processing chamber. The substrate may further include a semiconductor wafer on an adhesive tape on the frame. Provide electric orifice plate bias source. A plurality of orifice plates operatively connected to an electric orifice plate bias source are provided in the processing chamber. At least one of the plurality of orifice plates may further include a plurality of holes. The plasma generated by the plasma source is used to process the substrate on the substrate support. During plasma processing of the substrate, a variable bias voltage from an electro-orifice plate bias source is applied to at least one of the plurality of orifice plates, wherein the bias voltage changes with time. During the plasma processing of the substrate, at least one of the plurality of orifice plates may be actively cooled for a period of time. During the plasma processing of the substrate, at least one of the plurality of orifice plates may be grounded for a period of time. During the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates may be positioned unevenly from at least one of the plurality of orifice plates. During plasma processing of the substrate, at least one of the plurality of orifice plates may be positioned non-parallel to at least one of the plurality of orifice plates. The plasma processing of the substrate may also include a plasma time division multiplexing process in which the substrate is exposed to alternate between deposition and etching on the substrate.

Another feature of the present invention is to provide a method for adjusting the number of ions delivered to the substrate using ion filtration. The method includes providing a processing chamber operably connected to a plasma source. The substrate is set on a substrate support provided in the processing chamber. The substrate may further include a semiconductor wafer on an adhesive tape on the frame. Provide multiple electric orifice plate bias sources. An orifice plate having a plurality of orifice plate regions is disposed in the processing chamber, wherein at least two orifice plate regions of the plurality of orifice plate regions are operatively connected to individual bias voltages of the plurality of electric orifice plate biasing sources. At least one of the plurality of orifice plate regions may further include a circular geometric shape. The orifice plate may further include a plurality of holes. The plasma generated by the plasma source is used to process the substrate on the substrate support. During plasma processing of the substrate, individual bias voltages from a plurality of electro-orifice plate bias sources are applied to at least two orifice plate regions of the plurality of orifice plate regions. During the plasma processing of the substrate, at least one orifice area of the orifice plate can be actively cooled for a period of time. During the plasma processing of the substrate, at least one orifice area of the orifice plate may be grounded for a period of time. The plasma processing of the substrate may also include a plasma time division multiplexing process in which the substrate is exposed to alternate between deposition and etching on the substrate.

Another feature of the present invention is to provide a method of adjusting the amount of ions delivered to the substrate using ion filtering. The method includes providing a processing chamber operably connected to a plasma source. The substrate is set on a substrate support provided in the processing chamber. The substrate may further include a semiconductor wafer on an adhesive tape on the frame. Provide multiple electric orifice plate bias sources. A plurality of orifice plates having a plurality of orifice plate regions are disposed in the processing chamber, wherein at least two orifice plate regions of the plurality of orifice plate regions are operatively connected to individual bias voltages of the plurality of electric orifice plate bias voltage sources. At least one of the plurality of orifice plate regions may further include a toroidal geometric shape. At least one of the plurality of orifice plates may further include a plurality of holes. The plasma generated by the plasma source is used to process the substrate on the substrate support. During plasma processing of the substrate, individual bias voltages from a plurality of electro-orifice plate bias sources are applied to at least two orifice plate regions of the plurality of orifice plate regions. During the plasma processing of the substrate, at least one orifice plate area among the plurality of orifice plate areas may be actively cooled for a period of time. During the plasma processing of the substrate, at least one orifice area of the plurality of orifice areas may be grounded for a period of time. During the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates may be positioned unevenly from at least one of the plurality of orifice plates. During plasma processing of the substrate, at least one of the plurality of orifice plates may be positioned non-parallel to at least one of the plurality of orifice plates. The plasma processing of the substrate may also include a plasma time division multiplexing process in which the substrate is exposed to alternate between deposition and etching on the substrate.

Another feature of the present invention is to provide an ion filtration system including a processing chamber operably connected to a plasma source. The substrate support is positioned in the processing chamber together with an orifice plate having a plurality of orifice plate regions. The individual biases of the plurality of electric orifice plate biasing sources are operatively connected to at least two orifice plate regions of the plurality of orifice plate regions of the orifice plate. At least one of the plurality of orifice plate regions of the orifice plate may further include an annular geometry. The orifice plate may further include a plurality of holes.

The more relevant and important features of the present invention have been summarized quite extensively in the foregoing, so that the subsequent detailed description of the present invention can be better understood, so that the contribution to the field can be more fully understood. The following will describe the additional features of the subject invention that constitutes the scope of the patent application of the present invention. Those skilled in the art should understand that the disclosed concepts and specific embodiments can be easily used as a basis for modifying or designing other structures for achieving the same purpose of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present invention as set forth in the scope of the appended patent application.

100‧‧‧Processing chamber

110‧‧‧Gas Supply

120‧‧‧Plasma source

130‧‧‧Substrate support

140‧‧‧Substrate bias source

150‧‧‧Exhaust port

170‧‧‧Substrate

190‧‧‧Orifice plate

191‧‧‧Orifice plate

192‧‧‧Orifice plate

195‧‧‧Hole

202‧‧‧Orifice plate area

203‧‧‧Orifice plate area

204‧‧‧Orifice plate area

206‧‧‧Orifice plate bias source

207‧‧‧Orifice plate bias source

208‧‧‧Orifice plate bias source

209‧‧‧Electrical insulation parts

210‧‧‧Electrical insulation parts

220‧‧‧Orifice plate

221‧‧‧Orifice plate

222‧‧‧Orifice plate

225‧‧‧Orifice plate bias

226‧‧‧Orifice plate bias

Fig. 1 is a schematic diagram of a prior art ion filtration system; Fig. 2 is a view of an orifice plate with an enlarged inset of hole geometry according to the prior art; Fig. 3 is a schematic diagram of an ion filtration system according to an embodiment of the present invention; Fig. 4 Is a schematic diagram of an ion filtration system according to an embodiment of the present invention; FIG. 5 shows an enlarged view of an orifice plate and an orifice plate structure geometry option according to an embodiment of the present invention; FIG. 6 shows an embodiment according to the present invention An enlarged view of the orifice plate of the embodiment and the options for the orifice structure geometry; FIG. 7 shows an enlarged view of the orifice plate and the options for the orifice structure geometry according to an embodiment of the present invention; FIG. 8 shows An enlarged view of an orifice plate according to an embodiment of the present invention and options for the geometry of the orifice plate structure; Figure 9 shows three regions of a biased orifice plate according to an embodiment of the present invention; 10 shows three regions of a biased orifice plate according to an embodiment of the present invention; FIG. 11 is a graph of voltage versus time of a reference process variable according to an embodiment of the present invention; FIG. 12 is a graph according to the present invention. A graph of voltage versus time for a reference process variable according to an embodiment of the invention; FIG. 13 is a graph of voltage versus time for a reference process variable according to an embodiment of the present invention; FIG. 14 is a graph according to an embodiment of the present invention A graph of voltage versus time for a reference process variable; and FIG. 15 is a graph of voltage versus time for a reference process variable according to an embodiment of the present invention.

In the multiple views of the drawings, similar reference numerals represent similar features.

The present invention provides several method embodiments that use ion filtering to adjust the number of ions delivered to the substrate. All method embodiments of the present invention have a processing chamber operatively connected to a plasma source, wherein the substrate is placed on a substrate support provided in the processing chamber. All the method embodiments of the present invention can make the substrate also include the semiconductor wafer on the tape on the frame. All method embodiments of the present invention use a plasma source to generate plasma, which is used to process a substrate in a processing chamber.

In all the method embodiments described here, when the orifice plate is divided into two or more physically separated regions that can be biased apart, the bias voltage in the two or more orifice regions can be adjusted To different levels, the degree of ion filtering in different regions can be adjusted to be more or less, so as to adjust the number of ions passing through the filter in each physically separated region respectively. Physically separated regions can be described as having different positions in an appropriate coordinate system, such as a Cartesian x, y, z coordinate system or a cylindrical r, θ, z cylindrical coordinate system. When different degrees of ion filtration are selected in different orifice regions, the number of ions delivered to the substrate can be described as "spatially adjusted." The change in the number of ions reaching the substrate as a time-varying change can be achieved by adjusting the bias voltage on one or more orifice plates or areas of the orifice plate that changes over time so as to pass through the orifice plate, orifice plate assembly or orifice plate The number of ions in the region changes over time. This is called "time adjustment" of the number of ions delivered to the substrate.

In one embodiment according to the present invention, a plurality of electric orifice plate bias voltage sources are provided. An orifice plate having a plurality of orifice plate regions is disposed in the processing chamber, wherein at least two orifice plate regions of the plurality of orifice plate regions are operatively connected to individual bias voltages of the plurality of electric orifice plate biasing sources. The orifice plate may further include a plurality of holes. At least one of the plurality of orifice plate regions may further include a circular geometric shape. During the plasma processing of the substrate, by applying individual bias voltages from a plurality of electric orifice plate biasing sources to at least two of the orifice plate regions, it can be adjusted in space and/or time The number of ions delivered to the substrate for optimal performance. In addition, the orifice plate may be actively cooled for a period of time during the plasma processing of the substrate, and/or at least one orifice plate area among the plurality of orifice plate regions may be grounded for a period of time during the plasma processing of the substrate.

In one embodiment according to the present invention, a plurality of electric orifice plate bias voltage sources are provided. A plurality of orifice plates are provided in the processing chamber, wherein at least one of the plurality of orifice plates has a plurality of orifice plate areas, and wherein at least two orifice plate areas of the plurality of orifice plate areas are operably connected to the plurality of electric holes Individual bias voltage in the plate bias voltage source. At least one of the plurality of orifice plates may further include a plurality of holes. At least one of the plurality of orifice plate regions may further include a circular geometric shape. During the plasma processing of the substrate, by applying individual bias voltages from a plurality of electric orifice plate biasing sources to at least two orifice plate regions of the plurality of orifice plate regions, it is possible to adjust the delivery to at least in space and/or time. The number of ions on the substrate to achieve the best performance. In addition, at least one orifice plate area among the plurality of orifice plate areas may be actively cooled for a period of time during the plasma processing of the substrate, and/or at least one orifice plate area among the plurality of orifice plate areas may be in the plasma of the substrate. Grounded for a period of time during processing. Moreover, during the plasma processing of the substrate, at least one of the plurality of orifice plates may be positioned to be non-planar with at least one of the plurality of orifice plates, and/or during the plasma processing of the substrate, the plurality of holes At least one of the plates may be positioned non-parallel to at least one of the plurality of orifice plates.

In one embodiment according to the present invention, there is provided an electric orifice plate bias source operably connected to an orifice plate provided in the processing chamber. The orifice plate may further include a plurality of holes. During the plasma processing of the substrate, by applying a time-variable bias voltage from the electro-orifice bias source to the orifice, the number of ions delivered to the substrate can be adjusted in time for optimal performance. The "time variable" bias is the bias voltage that changes with time during the plasma processing of the substrate. The bias voltage can vary linearly or increase or decrease non-linearly during the duration of the plasma treatment. The polarity can remain the same or can be reversed one or more times. Depending on the instantaneous voltage of the AC waveform, its polarity may change, or it can only follow the magnitude. It can include AC waveforms superimposed on a DC background. If the AC waveform is used, the frequency may remain the same or may change over time. When the process conditions change with time in different stages of the process, or the values of various parameters change, the orifice plate bias can be adjusted gradually with the change, adjusted with a more complex function of the change, or adjusted in anti-phase with the change. The orifice bias can be kept constant for a period of time, but can be changed at other times in the process. In addition, during the plasma processing of the substrate, the orifice plate can be actively cooled for a period of time, and/or during the plasma processing of the substrate, the orifice plate can be grounded for a period of time. In addition, the plasma processing of the substrate may also include a plasma time division multiplexing process in which the substrate is exposed to alternate between deposition and etching on the substrate.

In an embodiment according to the present invention, an electric orifice plate bias source is provided. One or more orifice plates are operably connected to a source of electrical orifice plate bias. At least one of the plurality of orifice plates may further include a plurality of holes. During the plasma processing of the substrate, by applying a variable bias voltage from the electro-orifice bias source to at least one of the plurality of orifice plates, the number of ions delivered to the substrate can be adjusted in time to obtain the optimum Good performance, where the bias voltage changes with time. In addition, during the plasma processing of the substrate, at least one of the plurality of orifice plates may be actively cooled for a period of time, and/or during the plasma processing of the substrate, at least one of the plurality of orifice plates may be grounded for a period of time. Moreover, during the plasma processing of the substrate, at least one of the plurality of orifice plates may be positioned to be non-planar with at least one of the plurality of orifice plates, and/or during the plasma processing of the substrate, the plurality of holes At least one orifice plate of the plates may be positioned non-parallel to at least one of the plurality of orifice plates. Moreover, the plasma processing of the substrate may also include a plasma time division multiplexing process in which the substrate is exposed to alternate between deposition and etching on the substrate.

In one embodiment according to the present invention, a plurality of electric orifice plate bias voltage sources are provided. An orifice plate having a plurality of orifice plate regions is disposed in the processing chamber, wherein at least two orifice plate regions of the plurality of orifice plate regions are operatively connected to individual bias voltages of the plurality of electric orifice plate biasing sources. At least one of the plurality of orifice plate regions may further include a circular geometric shape. At least one of the plurality of orifice plates may further include a plurality of holes. During the plasma processing of the substrate, by applying individual bias voltages from a plurality of electric orifice plate bias sources to at least two of the orifice plate regions, the transport can be adjusted in space and/or time The number of ions to the substrate for optimal performance. In addition, during the plasma processing of the substrate, at least one of the orifice plate regions may be actively cooled for a period of time, and/or during the plasma processing of the substrate, at least one of the orifice regions The orifice area can be grounded for a period of time. Moreover, during the plasma processing of the substrate, at least one of the plurality of orifice plates may be positioned to be non-planar with at least one of the plurality of orifice plates, and/or during the plasma processing of the substrate, the plurality of holes At least one of the plates may be positioned non-parallel to at least one of the plurality of orifice plates. Moreover, the plasma processing of the substrate may also include a plasma time division multiplexing process in which the substrate is exposed to alternate between deposition and etching on the substrate.

In one embodiment according to the present invention, a plurality of electric orifice plate bias voltage sources are provided. A plurality of orifice plates having a plurality of orifice plate regions are disposed in the processing chamber, wherein at least two orifice plate regions of the plurality of orifice plate regions are operatively connected to individual bias voltages of the plurality of electric orifice plate bias voltage sources. At least one of the plurality of orifice plate regions may further include a circular geometric shape. At least one of the plurality of orifice plates may further include a plurality of holes. During the plasma processing of the substrate, by applying individual bias voltages from a plurality of electric orifice plate bias sources to at least two of the orifice plate regions, the transport can be adjusted in space and/or time The number of ions to the substrate for optimal performance. In addition, during the plasma processing of the substrate, at least one of the orifice plate regions may be actively cooled for a period of time, and/or during the plasma processing of the substrate, at least one of the orifice regions The orifice area can be grounded for a period of time. Moreover, during the plasma processing of the substrate, at least one of the plurality of orifice plates may be positioned non-planar with at least one of the plurality of orifice plates, and/or during the plasma processing of the substrate, the plurality of holes At least one orifice plate of the plates may be positioned non-parallel to at least one of the plurality of orifice plates. Moreover, the plasma processing of the substrate may also include a plasma time division multiplexing process in which the substrate is exposed to alternate between deposition and etching on the substrate.

As shown in FIG. 1, the prior art teaches a processing chamber 100, which is operatively connected to a plasma source 120, and a substrate support 130 is located in the processing chamber 100 for supporting a substrate 170. An orifice plate 190 having a plurality of holes 195 is positioned in the processing chamber 100. The substrate bias source 140 may be operatively connected to the substrate support 130. The gas supplier 110 is operatively connected to the processing chamber 100, and the exhaust port 150 is operatively connected to the processing chamber 100.

In Figure 2 is shown a prior art orifice plate with an enlarged view of the hole geometry inserted.

As shown in FIG. 3, in one embodiment according to the present invention, the processing chamber 100 may be operably connected to the plasma source 120, and the substrate support 130 may be positioned in the processing chamber 100 to support the substrate 170. In addition, a plurality of orifice plates 190 having a plurality of holes aligned with each other is shown. The substrate bias source 140 may be operatively connected to the substrate support 130. The gas supplier 110 may be operably connected to the processing chamber 100, and the exhaust port 150 may be operably connected to the processing chamber 100.

As shown in FIG. 4, in one embodiment according to the present invention, the processing chamber 100 may be operatively connected to the plasma source 120, and the substrate support 130 may be positioned in the processing chamber 100 to support the substrate 170. In addition, a plurality of orifice plates 190, 191, 192 with a plurality of holes are shown. The orifice plates can be offset from each other. The orifice plates 190, 192 may overlap. In the area where the orifice plates 190, 191, 192 overlap, some holes in the overlap area may overlap with other holes. Some holes in the overlap area may not overlap with another hole. The substrate bias source 140 may be operatively connected to the substrate support 130. The gas supply 110 may be operably connected to the processing chamber 100, and the exhaust port 150 may be operably connected to the processing chamber 100.

Figure 5 shows an enlarged view of the orifice plate 220 and options for the geometry of the orifice plate area. The orifice plate 220 according to an embodiment of the present invention has a plurality of orifice plate regions.

Figure 6 shows an enlarged view of the orifice plate 221 and options for the geometry of the orifice plate area. The orifice plate 221 according to an embodiment of the present invention has a plurality of orifice plate regions.

Figure 7 shows an enlarged view of the orifice plate 222 and options for the geometry of the orifice plate area. The orifice plate 222 according to an embodiment of the present invention has a plurality of orifice plate regions. In addition, FIG. 7 shows that one orifice plate bias 225 is operatively connected to one of the plurality of orifice plate regions, and the other orifice plate bias 226 is operatively connected to the other of the plurality of orifice plate regions.

Figure 8 shows an enlarged view of the orifice plate 222 and options for the geometry of the orifice plate area. The orifice plate 222 according to an embodiment of the present invention has a plurality of orifice plate regions. In addition, FIG. 8 shows that one orifice plate bias 225 is operatively connected to more than one of the orifice plate areas, and another orifice plate bias 226 is operably connected to the orifice plate area. another.

As shown in Fig. 9, a plurality of electric orifice plate bias sources are respectively operatively connected to individual orifice plate regions. 9 shows a plurality of electric orifice plate biasing sources 206, 207, 208, which are operably connected to individual orifice plate regions 202, 203, 204 of the plurality of orifice regions of the orifice plate according to an embodiment of the present invention . A representative electrical insulating member 209 is shown, which can be used to support and maintain the spacing between the orifice plates while allowing the potential difference to be applied between the orifice plates or between the orifice plate regions.

As shown in FIG. 10, a group of orifice plates, at least one orifice plate has a plurality of orifice plate regions 202, 203, 204. The plurality of electric orifice plate biasing sources 206, 207, 208 are each operatively connected to at least one orifice plate area of an orifice plate having a plurality of orifice areas according to an embodiment of the present invention. Figure 10 also shows the ground hole plate. Representative electrical insulating parts 209, 210 are shown, which can be used to support and maintain the spacing between the orifice plates while allowing the potential difference to be applied between the orifice plates or between the orifice plate regions.

Figures 11 to 15 show graphs of orifice bias voltage versus time with reference to changes in process variables. Specifically, the bias applied to the orifice plate or to one orifice plate of the plurality of orifice plates or the orifice plate area in the orifice plate can be applied in time to synchronize with the change in the processing parameter or relative to the change in the processing parameter Offset in time or only reflect some changes in processing parameters. Each of Figures 11 to 15 shows an embodiment according to the present invention. Process variables can include process set points and/or system responses. Process set points can include RF power, process pressure, gas flow, and/or gas composition. The process set point can be defined by the recipe. The system response can be a measurable response from the system. System response can include throttle valve position, matching network variable capacitor position, RF reflected power, etc. The system response may also include process measurements such as plasma density, plasma strength, plasma composition (e.g., by emission spectroscopy), and/or measurement of substrate characteristics (e.g., film thickness, etching depth, etc.). Process measurement can be performed on-site during the process. The orifice bias voltage can be synchronized or non-synchronized with process variables. The orifice bias voltage can be in phase or opposite to the process variable. Although the figure shows a voltage curve with a similar frequency to the process variables, the voltage curve can be at a different frequency than any or all of the process variables.

In any embodiment of the invention, at least one orifice plate may be planar or non-planar. The orifice plate may be parallel to the substrate, or the orifice plate may not be parallel to the substrate. The orifice plate can be domed. The orifice plate can be composed of a single material or multiple materials. The orifice plate can be partially or fully conductive; partially or fully dielectric; and/or partially or fully semiconductor.

In any embodiment of the present invention, all orifice plates may be the same size, or at least one orifice plate may be a different size from other orifice plates. All the orifice plates can be the same shape, or at least one plate can be a different shape from the other orifice plates. At least a part of the two orifice plates may be non-coplanar, or all the orifice plates may be non-coplanar. At least a part of the two orifice plates can be coplanar or all the plates can be coplanar. At least a part of the two orifice plates may be parallel, or at least a part of the two orifice plates may be non-parallel. No orifice plates can overlap or at least a part of two orifice plates can overlap. At least one hole in the plate may overlap the hole in the second plate, or more than one hole may overlap or all the holes may overlap each other. At least one hole in the plate cannot overlap the hole in the second plate, or more than one hole cannot overlap or the holes cannot overlap each other. At least one orifice plate may be completely overlapped by the second orifice plate, or all orifice plates may be overlapped.

In any embodiment of the present invention, at least one orifice plate may be electrically isolated from the second plate, or more than two orifice plates may be electrically isolated from each other or all orifice plates may be electrically isolated from each other. At least one orifice plate may be electrically connected to the second plate, or more than two orifice plates may be electrically connected to each other, or all orifice plates may be electrically connected to each other. At least one orifice plate can be isolated from ground, or more than one orifice plate can be isolated from ground, or all orifice plates can be isolated from ground. At least one orifice plate can be grounded, or multiple orifice plates can be grounded, or all orifice plates can be grounded. At least one orifice plate may be divided into more than one orifice plate area, or more than one orifice plate may have multiple areas, or all orifice plates may have multiple areas.

In any embodiment of the present invention, the holes in different orifice plates, in the orifice plate, between different orifice plate areas, and/or in the orifice plate area may have the same size, shape and/or aspect ratio or various sizes, Shape and/or aspect ratio.

In any embodiment of the invention, a voltage can be applied to at least one orifice plate. The voltage can be AC or DC or a combination of both. The voltage applied to different orifice plates, in an orifice plate, between different orifice plate areas, and/or in an orifice plate area may be the same or may be relative to the amplitude, frequency, and/or during a certain part of the process The phase changes. For certain parts of the process, any orifice plate or area of the orifice plate can be grounded.

In any embodiment of the invention, more than one hole may overlap the substrate. The orifice plate can be divided into more than one orifice plate area or at least two orifice plate areas that are electrically isolated from each other, or all orifice plate areas that can be electrically isolated from each other. At least two orifice plate areas may be electrically connected to each other, or all orifice plate areas may be electrically connected to each other. At least two orifice plate areas may be the same shape, or all orifice plate areas may be the same shape. At least two orifice plate areas may be of different shapes, or all orifice plate areas may be of different shapes. All orifice areas can be the same size, or at least two orifice areas can be different sizes. At least one orifice area can be electrically grounded. The voltage may be applied to at least one orifice area, or the voltage may be applied to more than one orifice area, or the voltage may be applied to all orifice areas. The same voltage can be applied to all orifice regions, or at least two orifice regions can have different voltages or different voltages for at least a part of the plasma process, or different voltages for the entire plasma process.

The disclosure of the present invention includes the content included in the scope of the appended application and the foregoing description. Although the present invention has been described in a preferred form with a certain degree of specificity, it should be understood that the disclosure of the present invention in the preferred form is done by way of example only, and various changes in the details and combinations of construction and the arrangement of components It can be adopted without departing from the spirit and scope of the present invention.

Now that the present invention has been described, please refer to the patent scope of the present invention.

100‧‧‧Processing chamber

110‧‧‧Gas Supply

120‧‧‧Plasma source

130‧‧‧Substrate support

140‧‧‧Substrate bias source

150‧‧‧Exhaust port

170‧‧‧Substrate

190‧‧‧Orifice plate

Claims (40)

A method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; and providing a substrate in the processing chamber Supporting member; providing the substrate to the substrate supporting member; providing a plurality of electrical bias sources; providing an orifice plate in the processing chamber, the orifice plate having a plurality of orifice plate regions, wherein the plurality of At least two of the orifice plate regions are operatively connected to the individual bias voltages of the plurality of electrical bias voltage sources; the plasma source is used to generate plasma; the generated plasma is used to process the The substrate on the substrate support; and during the plasma processing of the substrate, applying individual bias voltages from the plurality of electrical bias sources to at least two of the plurality of orifice regions Orifice area. The method according to claim 1, wherein at least one of the plurality of orifice plate regions further includes a circular geometric shape. The method according to claim 1, wherein the substrate further includes a semiconductor wafer on an adhesive tape on the frame. The method according to claim 1, wherein the orifice plate further includes a plurality of holes. The method according to claim 1, wherein the orifice plate is actively cooled for a period of time during the plasma processing of the substrate. The method according to claim 1, wherein at least one area of the plurality of orifice plate areas is grounded for a period of time during the plasma processing of the substrate. A method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; and providing a substrate in the processing chamber Supporting member; providing the substrate to the substrate supporting member; providing a plurality of electrical bias sources; providing a plurality of orifice plates in the processing chamber, at least one orifice plate of the plurality of orifice plates having A plurality of orifice plate areas, wherein at least two orifice plate areas of the plurality of orifice plate areas are operably connected to individual bias voltages of the plurality of electrical bias voltage sources; generating plasma using the plasma source; Using the generated plasma to process the substrate on the substrate support; and during the plasma processing of the substrate, applying individual bias voltages from the plurality of electrical bias sources to all At least two orifice plate areas of the plurality of orifice plate areas, wherein at least one orifice plate area of the plurality of orifice plate areas is actively cooled for a period of time during the plasma processing of the substrate. The method according to claim 7, wherein at least one orifice plate area of the plurality of orifice plate areas is grounded for a period of time during the plasma processing of the substrate. The method according to claim 7, wherein during the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates is positioned to correspond to at least one orifice plate of the plurality of orifice plates Uneven. The method according to claim 7, wherein during the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates is positioned to correspond to at least one orifice plate of the plurality of orifice plates Not parallel. A method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; and providing a substrate in the processing chamber Supporting member; providing the substrate to the substrate supporting member; providing an electrical bias source; providing an orifice plate in the processing chamber, the orifice plate operably connected to the electrical bias source; using The plasma source generates plasma; the generated plasma is used to process the substrate on the substrate support; and a variable bias voltage from the electrical bias source is applied to the orifice plate, During the plasma processing of the substrate, the bias voltage changes with time. The method according to claim 11, wherein the substrate further includes a semiconductor wafer on an adhesive tape on the frame. The method according to claim 11, wherein the orifice plate further includes a plurality of holes. The method according to claim 11, wherein the orifice plate is actively cooled for a period of time during the plasma processing of the substrate. The method according to claim 11, wherein the orifice plate is grounded for a period of time during the plasma treatment of the substrate. The method according to claim 11, wherein the plasma processing of the substrate further comprises exposing the substrate to a plasma time division multiplexing process of alternating between deposition and etching on the substrate. A method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; Providing a plasma source operably connected to the processing chamber; providing a substrate support in the processing chamber; providing the substrate on the substrate support; providing an electrical bias source; A plurality of orifice plates are provided in the chamber, at least one of the plurality of orifice plates is operatively connected to the electrical bias source; the plasma source is used to generate plasma; the generated plasma is used to treat the plasma The substrate on the substrate support; and applying a variable bias voltage from the electrical bias source to at least one orifice plate of the plurality of orifice plates, the bias voltage being applied to the substrate The plasma treatment period varies with time. The method of claim 17, wherein the substrate further includes a semiconductor wafer on an adhesive tape on the frame. The method according to claim 17, wherein at least one of the plurality of orifice plates further includes a plurality of holes. The method according to claim 17, wherein at least one of the plurality of orifice plates is actively cooled for a period of time during the plasma processing of the substrate. The method according to claim 17, wherein at least one of the plurality of orifice plates is grounded for a period of time during the plasma processing of the substrate. The method according to claim 17, wherein during the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates is positioned to correspond to at least one orifice plate of the plurality of orifice plates Uneven. The method according to claim 17, wherein, during the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates is positioned to correspond to at least one of the plurality of orifice plates The plates are not parallel. The method according to claim 17, wherein the plasma processing of the substrate further comprises exposing the substrate to a plasma time-division multiplexing process of alternating between deposition and etching on the substrate. A method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; and providing a substrate in the processing chamber Supporting member; providing the substrate to the substrate supporting member; providing a plurality of electrical bias sources; providing an orifice plate in the processing chamber, the orifice plate having a plurality of orifice plate regions, wherein the plurality of At least two of the orifice plate regions are operatively connected to the individual bias voltages of the plurality of electrical bias voltage sources; the plasma source is used to generate plasma; the generated plasma is used to process the The substrate on the substrate support; and during the plasma processing of the substrate, applying individual bias voltages from the plurality of electrical bias sources to at least two of the plurality of orifice regions In each orifice area, at least one bias voltage changes with time during the plasma processing of the substrate. The method according to claim 25, wherein at least one of the plurality of orifice plate regions further includes a circular geometric shape. The method of claim 25, wherein the substrate further includes a semiconductor wafer on an adhesive tape on the frame. The method according to claim 25, wherein the orifice plate further includes a plurality of holes. The method according to claim 25, wherein during the plasma processing of the substrate, at least one orifice plate area of the orifice plate is actively cooled for a period of time. The method according to claim 25, wherein during the plasma treatment of the substrate, at least one orifice plate area of the orifice plate is grounded for a period of time. The method according to claim 25, wherein the plasma treatment of the substrate further comprises a plasma time-division multiplexing process in which the substrate is exposed to alternating between deposition and etching on the substrate. A method for adjusting the amount of ions delivered to a substrate using ion filtering, the method comprising: providing a processing chamber; providing a plasma source operably connected to the processing chamber; and providing a substrate in the processing chamber Supporting member; providing the substrate to the substrate supporting member; providing a plurality of electrical bias sources; providing a plurality of orifice plates in the processing chamber, at least one orifice plate of the plurality of orifice plates having A plurality of orifice plate areas, wherein at least two orifice plate areas of the plurality of orifice plate areas are operably connected to individual bias voltages of a plurality of electrical bias voltage sources; using the plasma source to generate plasma; The plasma processes the substrate on the substrate support; and during the plasma processing of the substrate, individual bias voltages from the plurality of electrical bias sources are applied to the multiple In at least two of the orifice plate regions, at least one bias voltage changes with time during the plasma processing of the substrate. The method according to claim 32, wherein at least one of the plurality of orifice plate regions further includes a circular geometric shape. The method of claim 32, wherein the substrate further includes a semiconductor wafer on an adhesive tape on the frame. The method according to claim 32, wherein at least one of the plurality of orifice plates also includes Includes multiple holes. The method according to claim 32, wherein during the plasma processing of the substrate, at least one orifice plate area of the plurality of orifice plate areas is actively cooled for a period of time. The method according to claim 32, wherein during the plasma processing of the substrate, at least one orifice area of the plurality of orifice plate areas is grounded for a period of time. The method according to claim 32, wherein, during the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates is positioned to correspond to at least one of the plurality of orifice plates The board is not flat. The method according to claim 32, wherein during the plasma processing of the substrate, at least one orifice plate of the plurality of orifice plates is positioned to correspond to at least one orifice plate of the plurality of orifice plates Not parallel. The method according to claim 32, wherein the plasma processing of the substrate further comprises exposing the substrate to a plasma time-division multiplexing process of alternating between deposition and etching on the substrate.

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