TWI742685B - Flyback converter and control method thereof - Google Patents

Abstract

A flyback converter, including: a transformer, a first switch, a second switch, and a control circuit. The transformer includes a first side and a second side. The first switch is coupled to the first side at an input terminal. The second switch is coupled to the second side and an output terminal. The control circuit is coupled between the output terminal and the second switch, wherein the control circuit is arranged to adjust a voltage on the input terminal by changing a flow of a current between the second switch and the second side.

Description

Flyback converter and control method of flyback converter

This application relates to an electronic device, and specifically relates to a flyback converter and a control method of the flyback converter.

The power supplies on the market can be roughly divided into linear power supplies and switching power supplies. Various types of switching power supplies, such as flyback converters, are currently the mainstream in the market. However, the switching loss of the switches in the switching power supply is currently a major obstacle to improving system efficiency.

Therefore, one of the objectives of the present application is to provide a flyback converter and a control method of the flyback converter to solve the above-mentioned problems.

According to an embodiment of the present application, a flyback converter is disclosed. The flyback converter includes: a transformer, a first switch, a second switch and a control circuit. The transformer includes a first side and a second side. The first switch is coupled to an input terminal on the first side. The second switch is coupled to the second side and an output terminal. The control circuit is coupled between the output terminal and the second switch, and the control circuit is used to adjust the voltage on the input terminal by changing the current between the second switch and the second side.

According to an embodiment of the present application, a flyback converter is disclosed. The flyback converter includes: a transformer, a first switch, a second switch, a first control circuit and a second control circuit. The transformer includes a first side and a second side. The first switch and the first side are connected in series between an input voltage and a ground terminal. The second switch and the second side are connected in series between an output terminal and the ground terminal. The first control circuit is coupled to the second switch, and the first control circuit is used to compare an output voltage on the output terminal with a reference voltage, and when the output voltage is less than the reference voltage, a first The second switch is enabled at the time. The first control circuit is also used for deactivating the second switch at a second point in time. The second control circuit is coupled to the first switch, wherein the second control circuit is used to activate the first switch at a third time point after the second switch is disabled.

According to an embodiment of the present application, a control method of a flyback converter is disclosed. The flyback converter includes a transformer, a first switch, and a second switch, wherein the first switch is coupled to a first side of the transformer, and the second switch is coupled to a second side of the transformer . The control method includes: activating the second switch at a first time point to generate an output current; deactivating the second switch at a second time point, and the output current drops to zero at the second time point; The second switch is activated at a third time point to generate the output current, wherein the current direction of the output current at the third time point is opposite to the current direction at the second time point; it is disabled at a fourth time point The second switch generates an input current, wherein the input current flows from the input terminal to an input voltage source; and the first switch is activated at a fifth time point, and at the fifth time point, the input current on the input terminal The voltage drops to zero.

The following disclosure provides many different embodiments or examples of different components for implementing the disclosure. Specific examples of components and configurations are described below to simplify the disclosure. Of course, these are only examples and are not intended to be limiting. For example, in the following description, a first member formed on or on a second member may include an embodiment in which the first member and the second member are formed in direct contact, and may also include additional members therein An embodiment that can be formed between the first member and the second member so that the first member and the second member may not directly contact. In addition, the present disclosure may repeat reference numbers and/or letters in each example. This repetition is for the purpose of simplification and clarity and does not in itself indicate the relationship between the various embodiments and/or configurations discussed.

In addition, for ease of description, spatially relative terms such as "below", "below", "below", "above", "upper" and the like can be used herein to describe one element or component and another(s) The relationship between components or components is illustrated in the figure. Spatial relative terms are intended to cover different orientations of devices in use or operation other than those depicted in the figures. The device can be oriented in other ways (rotated by 90 degrees or in other orientations) and therefore the spatial relative descriptors used in this article can also be interpreted.

Although the numerical ranges and parameters stated in the broad scope of this disclosure are approximate values, the numerical values stated in the specific examples should be reported as accurately as possible. However, any value inherently contains certain errors inevitably due to the standard deviation seen in the respective test measurement. Furthermore, as used herein, the term "about" generally means within 10%, 5%, 1%, or 0.5% of a given value or range. Alternatively, the term "approximately" means within one acceptable standard error of the mean when considered by a general technician of the technology. Except in the operation/working example, or unless explicitly specified in other ways, such as the total numerical range of the quantity of materials disclosed in this article, the duration of time, temperature, operating conditions, the ratio of quantities and the like, Quantities, values and percentages should be understood as modified by the term "about" in all examples. Correspondingly, unless otherwise indicated, the numerical parameters stated in the scope of this disclosure and the accompanying invention application are approximate values that can be changed as needed. At the very least, each numerical parameter should be explained at least in view of the number of significant digits reported and by applying ordinary rounding techniques. Ranges can be expressed herein as from one endpoint to the other or between two endpoints. All ranges disclosed herein include endpoints, unless otherwise specified.

FIG. 1 is a schematic diagram of a flyback converter 10 according to an embodiment of the invention. The flyback converter 10 includes a transformer 11, a first switch SW1, a second switch SW2, a first diode D1, a second diode D2, a first capacitor C1, a second capacitor C2, a first control circuit 110, and The second control circuit 120.

The transformer 11 includes a first side and a second side. In this embodiment, the first side is the primary side of the transformer 11 and the second side is the secondary side of the transformer 11. In this embodiment, the turns ratio between the primary side and the secondary side is N, where N is a natural number. The first side and the first switch SW1 are connected in series between the input voltage Vin and the ground terminal. The first diode D1, the first capacitor C1 and the first switch SW1 are connected in parallel. In this embodiment, the first switch SW1 is implemented by a metal oxide semiconductor field effect transistor (MOSFET). The drain terminal of the first switch SW1, the cathode of the first diode D1 and one end of the first capacitor C1 are connected to the first side of the transformer 11 through the input terminal IN. The source terminal of the first switch SW1, the anode of the first diode D1 and the other terminal of the first capacitor C1 are connected to the ground terminal.

It should be noted that in other embodiments, the first switch SW1 may be implemented by a bipolar transistor (BJT) or other devices with similar functions. In addition, the first diode D1 and the first capacitor C1 may be elements added by a designer or parasitic elements formed in the first switch SW1. In addition, the position of the first switch SW1 is not limited to being coupled between the first side and the ground terminal. In other embodiments, the first switch SW1 is coupled between the input voltage Vin and the first side.

The second side and the second switch SW2 are connected in series between the output terminals OUT1 and OUT2 of the flyback converter 10. The second diode D2, the second capacitor C2 and the second switch SW2 are connected in parallel. In this embodiment, the second switch SW2 is implemented by a MOSFET. The drain terminal of the second switch SW2, the cathode of the second diode D2 and one end of the second capacitor C2 are connected to the second side of the transformer 11. The source terminal of the second switch SW2, the anode of the second diode D2 and the other terminal of the second capacitor C2 are connected to the output terminal OUT2.

It should be noted that in other embodiments, the second switch SW2 can be implemented by a BJT or other devices with similar functions. In addition, the second diode D2 and the second capacitor C2 may be elements added by a designer or parasitic elements formed in the second switch SW2. In addition, the position of the second switch SW2 is not limited to being coupled between the second side and the output terminal OUT2. In other embodiments, the second switch SW2 is coupled between the second side and the output terminal OUT1.

The first control circuit 110 is coupled between the output terminal OUT1 and the second switch SW2. The first control circuit 110 activates/disables the second switch SW2 through the activation signal VGS according to the output voltage Vout and the output current IS. When the second switch SW2 is activated, energy is provided from the second side of the transformer 11 to the output load between the output terminals OUT1 and OUT2. The second control circuit 120 is coupled between the first control circuit 110 and the first switch SW1. The second control circuit 120 is used to enable/disable the first switch SW1 through the enable signal VGP. When the first switch SW1 is activated, energy is provided to the first side of the transformer 11 from the input voltage Vin.

For the flyback converter 10, the on-times of the first switch SW1 and the second switch SW2 are staggered. That is, when the first switch SW1 is activated, the second switch SW2 is deactivated, and vice versa. Refer to FIG. 1 and FIG. 2 at the same time, wherein FIG. 2 is a timing diagram of the first part of the operation of the flyback converter 10 according to an embodiment of the present application. As shown in FIG. 2, at time t0, the enable signal VGP is pulled high and instructs the first switch SW1 to be turned on. In response to the activation of the first switch SW1, the input current IP is provided to the first side of the transformer 11. Specifically, the input current IP flows from the input voltage Vin to the first side of the transformer 11 and is stored as electrical energy.

At time t1, the enable signal VGP is pulled low and instructs to disable the first switch SW1. At the same time, the enable signal VGS is pulled high and instructs to enable the second switch SW2. In response to the deactivation of the first switch SW1 and the activation of the second switch SW2, an output current IS is induced on the second side of the transformer 11. Specifically, the output current IS flows from the second side of the transformer 11 to the output load. In addition, at time t1, the voltage VP on the input terminal IN is pulled up to Vin+NVout. Starting from the time point t1, the output current IS continuously provides energy to the output load, so that the size of the output current IS gradually decreases. On the other hand, the output voltage Vout gradually increases to a peak value and then decreases.

At time t2, the magnitude of the output current IS decreases to zero. Accordingly, the enable signal VGS is pulled low and instructs to disable the second switch SW2. So far, the first part of the operation of the first control circuit 110 and the second control circuit 120 in the switching period ends.

1 again, the flyback converter 10 further includes an output capacitor CO and a detection resistor Rd, wherein the output capacitor CO is coupled between the output terminals OUT1 and OUT2, and the detection resistor Rd is coupled between the second side and the first side of the transformer 11 A control circuit 110 between. The output capacitor CO stores the energy provided by the output current IS. The detection resistor Rd provides feedback information FD to the first control circuit 110. In some embodiments, the feedback information FD is the voltage across the detection resistor Rd. In some embodiments, the feedback information FD reflects the magnitude of the output current IS. For example, when the output current IS decreases to zero at the time point t2, the feedback information FD informs the first control circuit 110, and the first control circuit 110 accordingly disables the second switch at the time point t2.

In this embodiment, the first control circuit 110 is also used to adjust the voltage VP on the input terminal IN by changing the current direction of the output current IS between the second switch SW2 and the second side of the transformer 11. In this way, the switching loss of the first switch SW1 can be reduced, and the efficiency can be improved. The details of the first control circuit 110 and the second control circuit 120 will be described in subsequent paragraphs.

FIG. 3 is a schematic diagram of the first control circuit 110 according to an embodiment of the invention. The first control circuit 110 includes a trigger circuit 210. The trigger circuit 210 generates the trigger signal TG by comparing the output voltage Vout with the reference voltage VREF. Specifically, referring to FIG. 4, FIG. 4 is a schematic diagram of a trigger circuit 210 according to an embodiment of the present application. The trigger circuit 210 includes a comparison circuit 211 and a pulse generating circuit 212. The comparison circuit 211 compares the output voltage Vout with the reference voltage VREF to generate the indicator signal ID. When the indicating signal ID indicates that the output voltage Vout is less than the reference voltage VREF, the pulse generating circuit 212 generates a pulse signal as the trigger signal TG.

Referring again to FIG. 3, the first control circuit 110 further includes a first on-time control circuit 220. The first on-time control circuit 220 enables/disables the second switch SW2 through the enable signal VGS. In this embodiment, the first on-time control circuit 220 includes but is not limited to an SR control circuit for controlling the activation/deactivation of the second switch SW2. For example, at time t2, when the feedback information FD indicates that the output current IS decreases to zero, the SR control circuit disables the second switch SW2.

In addition, when the trigger signal TG indicates that the output voltage Vout is less than the reference voltage VREF, the first on-time control circuit 220 further activates the second switch SW2 through the activation signal VGS, and when the activation of the second switch SW2 reaches the preset duration, passes The activation signal VGS is used to deactivate the second switch SW2.

Referring to FIG. 1 and FIG. 5 at the same time, FIG. 5 is a timing diagram of the second part of the operation of the flyback converter 10 according to an embodiment of the present application. As described above, at the time point t2, the output current IS decreases to zero and stops supplying energy. However, the output capacitor CO will provide energy for the output load, so that the output voltage Vout will continue to decrease after the time point t2. In addition, since both the first switch SW1 and the second switch SW2 are disabled at the time point t2, the voltage VP on the input terminal IN begins to oscillate. In other words, from the time point t2 to the time point t3, the voltage VP may rise or fall. The waveform of the voltage VP from the time point t2 to the time point t3 depends on the output load.

At time t3, the output voltage Vout is less than the reference voltage VREF. The trigger signal TG with pulse waveform is thus generated, and the enable signal VGS is pulled high accordingly. Therefore, the second switch SW2 is activated at the time point t3. In response to the activation of the second switch SW2, the voltage VP on the input terminal IN is pulled up to Vin+NVout again.

Since the second switch SW2 is activated after the output current IS is reduced to zero, at the time point t3, the output current IS with different current directions is further induced and generated. Specifically, from the time point t1 to the time point t2, the current direction of the output current IS is clockwise. In other words, the output current IS passes through the transformer 11, the output capacitor CO, and the second switch SW2, and then returns to the transformer 11. Starting from the time point t3, the current direction of the output current IS is counterclockwise. In other words, the output current IS passes through the transformer 11, the second switch SW2, and the output capacitor CO, and then returns to the transformer 11.

At time t4, the enable signal VGS is pulled low. Therefore, the second switch SW2 is deactivated at time t4. As the second switch SW2 is disabled at time t4, the magnitude of the output current IS decreases to zero again.

Since the magnitude of the output current IS is pulled to zero at the time point t4, the input current IP is induced and generated on the first side of the transformer 11 accordingly. Specifically, the input current IP flows from the first capacitor C1 to the input voltage Vin via the input terminal IN. In response to the generation of the input current IP at the time point t4, the voltage VP on the input terminal IN starts to decrease. At time t5, the voltage VP decreases to zero. At this point, the second part of the switching cycle of the flyback converter 10 ends, the operation of the flyback converter 10 will return to the first part, and so on. Each switching cycle repeats from t1 to t5, so that the effect of voltage stabilization can be achieved.

By inducing the output current IS with the opposite current direction between the time point t3 and the time point t4, the voltage VP on the input terminal IN can be reduced by the input current IP flowing from the first capacitor C1 to the input voltage Vin through the input terminal IN. To zero. With this arrangement, the switching loss of the first switch SW1 can be reduced, and the efficiency of the flyback converter 10 can be improved.

It should be noted that, in order to accurately reduce the voltage VP to zero, the energy provided by the input current IP in the time period from the time point t4 to the time point t5 must be accurate. The energy provided by the input current IP during the time period from the time point t4 to the time point t5 is related to the energy provided by the output current IS during the time period from the time point t3 to the time point t4. The energy provided by the output current IS is related to the size of the output current IS and the length of time from the time point t3 to the time point t4. Specifically, when the output current IS is strong, only a short duration is required. On the other hand, when the output current IS is weak, a longer time period is required. That is to say, in order to provide enough energy to reduce the voltage VP to zero, the time from time t3 to time t4 is negatively correlated with the rate of change of the output current IS, where the rate of change can be reflected in the output current IS in Figure 5 Slope.

However, the voltage VP is not limited to decrease to zero. In other embodiments, the voltage VP may be reduced to a predetermined voltage in a time period from the time point t4 to the time point t5. For example, the predetermined voltage may be one-fifth of Vin+NVout. The size of the predetermined voltage depends on the designer's consideration.

Referring again to FIG. 3, the first control circuit 110 further includes a delay circuit 230 and a second on-time control circuit 240. The delay circuit 230 is used to generate the delay signal DS by delaying the trigger signal TG. The second on-time control circuit 240 is used for generating the on-time signal OTS when the delay signal DS is received, wherein the on-time signal OTS indicates the on-time of the first switch SW1 according to the feedback information FD. Specifically, the on-time of the first switch SW1 indicated by the on-time signal OTS is negatively correlated with the voltage across the detection resistor Rd indicated by the feedback information FD. In other words, the greater the voltage across the detection resistor Rd, the shorter the conduction time of the first switch SW1.

In this embodiment, the delay signal DS is generated by delaying the trigger signal TG from the time point t3 to the time point t5. When the second on-time control circuit 240 receives the delay signal DS at time t5, the on-time signal OTS is output to the second control circuit 120 to instruct the second control circuit 120 to activate the first switch SW1 at the time t5.

FIG. 6 is a schematic diagram of the second control circuit 120 according to an embodiment of the invention. The second control circuit 120 includes an isolated transmission circuit 250 and a receiving circuit 260. The isolated transmission circuit 250 is used to generate the on-time signal OTS' by transmitting the on-time signal OTS from the second side of the transformer 11 to the first side of the transformer 11. Those skilled in the art should understand that after being transmitted by the isolated transmission device 250, the on-time signal OTS' and the on-time signal OTS may have different magnitudes. However, the information in the on-time signal OTS will be completely transmitted. For example, the indication of the on-time and off-time of the first switch SW1 will be completely transmitted. In this embodiment, the isolated transmission circuit 250 includes, but is not limited to, a transformer, an optocoupler, or a capacitor.

The receiving circuit 260 is configured to receive the on-time signal OTS' from the isolation transmission circuit 250, and generate an enable signal VGP according to the on-time signal OTS' to enable/disable the first switch SW1. Specifically, the receiving circuit 260 is used to identify and decouple the information in the on-time signal OTS'. For example, the receiving circuit 260 can respectively identify the on time and the off time of the first switch SW1 according to the rising edge and the falling edge of the on-time signal OTS'.

In this embodiment, the on-time signal OTS' indicates that the first switch SW1 should be activated at the time point t5, and the duration of activation is the same as the time length from the time point t0 to the time point t1. Therefore, the activation signal VGP indicates that the first switch SW1 is activated at the time point t5, and the activation duration is the same as the duration from the time point t0 to the time point t1.

In the flyback converter 10, the trigger circuit 210 generates the trigger signal TG by comparing the output voltage Vout with the reference voltage VREF. When the trigger signal TG indicates that the output voltage Vout is less than the reference voltage VREF, the first on-time control circuit 220 generates the enable signal VGS to enable the second switch SW2. However, this is not a limitation of this application. In other embodiments, the trigger signal TG can be generated based on different mechanisms.

For example, the trigger circuit 210 may include a current detection circuit for detecting the magnitude of the output current IS according to the feedback information FD to generate the indicator signal ID. Under such a configuration, the pulse generating circuit 212 is also used to generate a pulse signal as the trigger signal TG when the indicating signal ID indicates that the output current IS decreases to zero.

In some embodiments, when the magnitude of the output current IS decreases to zero, the trigger circuit 210 immediately generates the trigger signal TG. For example, when the output current IS decreases to zero at the time t2, the trigger signal TG with a pulse waveform is also generated at the time t2. Therefore, at the time point t2, the enable signal VGS instructs the second switch SW2 to turn off and immediately turn on again.

In some embodiments, the trigger circuit 210 generates the trigger signal TG after the magnitude of the output current IS decreases to zero. For example, when the output current IS decreases to zero at the time point t2, the trigger signal TG will not be generated immediately. For example, the trigger signal TG will be generated at time t3. Therefore, the enable signal VGS instructs the second switch SW2 to be turned off at the time t2 and turned on at the time t3.

FIG. 7 is a flowchart of a control method 900 of a flyback converter according to an embodiment of the present application. In this embodiment, the control method 900 can be applied to the flyback converter 10. For a better understanding, please refer to Figure 5 and Figure 7 at the same time. If substantially the same result can be obtained, this application does not require the execution of the step flow shown in FIG. 7 completely. The control method 900 is roughly summarized as follows.

Step 901: Activating a switch coupled to a second side of a transformer at a first time point to induce and generate an output current.

For example, at time t1, the second switch SW2 is activated, and the output current IS is induced on the second side of the transformer 11.

Step 902: Disable the switch at a second time point, and the output current drops to zero at the second time point.

For example, the output current IS drops to zero at time t2, and the second switch SW2 is disabled accordingly.

Step 903: Activating the switch at a third time point to induce and generate the output current, wherein the current direction of the output current at the third time point is opposite to the current direction at the second time point.

For example, the second switch SW2 is activated at the time point t3, wherein the current direction of the output current IS at the time point t3 is opposite to the current direction at the time point t2.

Step 904: Disable the switch at a fourth time point to induce an input current flowing from the input terminal to an input voltage.

For example, at the time point t4, the second switch SW2 is disabled, and the input current IP is induced to the first side of the transformer 11. Specifically, the input current flows from the first capacitor C1 to the input voltage Vin through the input terminal IN.

Step 905: Enable another switch coupled to a first side of the transformer at a fifth time point, and the voltage on the input terminal drops to zero at the fifth time point.

For example, at time t5, the voltage VP on the input terminal IN drops to zero, and the first switch SW1 is enabled.

Those skilled in the art should be able to easily understand the details of the control method 900 after reading the foregoing embodiments. Therefore, the detailed description is omitted here to save space.

The foregoing content summarizes the features of several embodiments, so that those familiar with the art can better understand the aspect of the disclosure. Those familiar with the technology should understand that they can easily use the present disclosure as a basis for designing or modifying other processes and structures for implementing the same purpose and/or achieving the same advantages of the embodiments described herein. Those familiar with this technology should also understand that these equivalent structures do not depart from the spirit and scope of this disclosure, and they can make various changes, substitutions and alterations in this article without departing from the spirit and scope of this disclosure.

10: Flyback converter 11: Transformer 110: The first control circuit 120: second control circuit Vin: input voltage IP: Input current VP: Voltage IN: Input SW1: The first switch D1: The first diode C1: The first capacitor VGP, VGS: enable signal IS: output current Vout: output voltage C2: second capacitor D2: The second diode SW2: second switch Rd: Sensing resistance FD: feedback information CO: output capacitor OUT1, OUT2: output terminal 210: trigger circuit 220: The first on-time control circuit 230: Delay circuit 240: second on-time control circuit TG: Trigger signal DS: Delayed signal OTS, OTS’: On-time signal 211: comparison circuit 212: Pulse generating circuit VREF: Reference voltage ID: Indication signal 250: Isolated transmission circuit 260: receiving circuit 901-905: steps t0-t5: time point

When read in conjunction with the accompanying drawings, the aspect of the present disclosure is best understood from the following detailed description. It should be noted that according to standard practice in the industry, the various components are not drawn to scale. In fact, the size of various components can be increased or decreased arbitrarily for the sake of clarity of the discussion. Fig. 1 is a schematic diagram of a flyback converter according to an embodiment of the present application. FIG. 2 is a timing diagram of the first part of the operation of the flyback converter according to an embodiment of the present application. FIG. 3 is a schematic diagram of a first control circuit according to an embodiment of the present application. FIG. 4 is a schematic diagram of a trigger circuit according to an embodiment of the present application. FIG. 5 is a timing diagram of the second part of the operation of the flyback converter according to an embodiment of the present application. Fig. 6 is a schematic diagram of a second control circuit according to an embodiment of the present application. FIG. 7 is a flowchart of a control method of a flyback converter according to an embodiment of the present application.

10: Flyback converter

11: Transformer

110: The first control circuit

120: second control circuit

Vin: input voltage

IP: Input current

VP: Voltage

IN: Input

SW1: The first switch

D1: The first diode

C1: The first capacitor

VGP, VGS: enable signal

IS: output current

Vout: output voltage

C2: second capacitor

D2: The second diode

SW2: second switch

Rd: Sensing resistance

FD: feedback information

CO: output capacitor

OUT1, OUT2: output terminal

Claims (16)

A flyback converter includes: a transformer including a first side and a second side; a first switch and a second switch, wherein the first switch is coupled to the first switch at an input end On one side, the second switch is coupled to the second side and an output terminal; and a control circuit is coupled between the output terminal and the second switch, wherein the control circuit is used to change the second switch A current direction between a current and the second side to adjust a voltage on the input terminal; wherein the control circuit includes: a trigger circuit for comparing an output voltage on the output terminal with a reference voltage To generate a trigger signal; and a first on-time control circuit coupled to the trigger circuit, wherein the first on-time control circuit is used to generate a first enable when the trigger signal indicates that the output voltage is less than the reference voltage Signal to activate the second switch; wherein the first on-time control circuit is further used to disable the second switch through the first activation signal when the second switch has been activated for a predetermined length of time; wherein the predetermined length of time There is a negative correlation with a rate of change of the current between the second switch and the second side. The flyback converter according to claim 1, wherein the trigger circuit includes: a comparison circuit coupled to the output terminal, wherein the comparison circuit is used to generate an indication signal by comparing the output voltage with the reference voltage ;as well as A pulse generating circuit is coupled to the comparing circuit, wherein the pulse generating circuit is used for generating the trigger signal when the indicating signal indicates that the output voltage is less than the reference voltage. The flyback converter according to claim 2, further comprising: a first capacitor connected in parallel with the first switch, wherein when the second switch is disabled, an induced current flows from the first capacitor to the Input voltage to reduce the voltage on the input terminal. A flyback converter includes: a transformer including a first side and a second side; a first switch and a second switch, wherein the first switch is coupled to the first switch at an input end On one side, the second switch is coupled to the second side and an output terminal; and a control circuit is coupled between the output terminal and the second switch, wherein the control circuit is used to change the second switch A current direction between a current and the second side to adjust a voltage on the input terminal; wherein the control circuit includes: a trigger circuit for comparing an output voltage on the output terminal with a reference voltage To generate a trigger signal; and a first on-time control circuit coupled to the trigger circuit, wherein the first on-time control circuit is used to generate a first enable when the trigger signal indicates that the output voltage is less than the reference voltage Signal to activate the second switch; wherein the control circuit further includes: A delay circuit is coupled to the trigger circuit, wherein the delay circuit is used to delay the trigger signal to generate a delay signal; a second conduction time control circuit is used to generate a conduction time signal when the delay signal is received, wherein The on-time signal indicates an on-time of the first switch. A flyback converter includes: a transformer including a first side and a second side; a first switch and a second switch, wherein the first switch is coupled to the first switch at an input end On one side, the second switch is coupled to the second side and an output terminal; and a control circuit is coupled between the output terminal and the second switch, wherein the control circuit is used to change the second switch And a current direction of a current between the second side and the second side to adjust a voltage on the input terminal; wherein the control circuit includes: a trigger circuit for when the second switch and the second side are connected A trigger signal is generated when a current magnitude of the current drops to zero; and a first on-time control circuit is coupled to the trigger circuit, wherein the first on-time control circuit is used to generate a first enable when the trigger signal is received Signal to activate the second switch and change the direction of the current between the second switch and the second side. The flyback converter according to claim 5, wherein the trigger circuit includes: a current detection circuit for generating an indication by detecting the magnitude of the current between the second switch and the second side Signal; and A pulse generating circuit coupled to the current detecting circuit, wherein the pulse generating circuit is used to generate the trigger when the indicating signal indicates that the current magnitude of the current between the second switch and the second side drops to zero Signal. The flyback converter according to claim 6, wherein the current detection circuit is further configured to instruct the first on-time control circuit to stop according to the current magnitude of the current between the second switch and the second side Use this second switch. A flyback converter includes: a transformer including a first side and a second side; a first switch, wherein the first switch and the first side are connected in series with an input voltage and a ground A second switch, wherein the second switch and the second side are connected in series between an output terminal and the ground terminal; a first control circuit, coupled to the output terminal and the second switch, The first control circuit is used to compare an output voltage on the output terminal with a reference voltage, and when the output voltage is less than the reference voltage, the second switch is activated at a first time point, and is also used for a The second switch is disabled at the second time point; and a second control circuit is coupled to the first switch, wherein the second control circuit is used for a third time after the second switch is disabled Click to enable the first switch; wherein a voltage on an end point between the first switch and the first side drops to zero from the second time point to the third time point. The flyback converter according to claim 8, wherein when the first control circuit activates the second switch at the first time point, the current between the second switch and the second side is zero. The flyback converter according to claim 8, wherein the first control circuit is further configured to activate the second switch at a fourth time point after the first switch is activated. The flyback converter according to claim 10, wherein a current between the second switch and the second side has a current direction at the first time point opposite to a current direction at the fourth time point. A flyback converter includes: a transformer including a first side and a second side; a first switch, wherein the first switch and the first side are connected in series with an input voltage and a ground A second switch, wherein the second switch and the second side are connected in series between an output terminal and the ground terminal; a first control circuit, coupled to the output terminal and the second switch, The first control circuit is used to compare an output voltage on the output terminal with a reference voltage, and when the output voltage is less than the reference voltage, the second switch is activated at a first time point, and is also used for a The second switch is disabled at a second time point; and a second control circuit is coupled to the first switch, wherein the second control circuit is used for a third time after the second switch is disabled Click to enable the first switch, wherein the first control circuit includes: A comparison circuit for comparing the output voltage with the reference voltage to generate an indication signal; and a pulse generation circuit coupled to the comparison circuit, wherein the pulse generation circuit is used when the indication signal indicates that the output voltage is less than the When the reference voltage is used, a pulse signal is generated at the first time point. The flyback converter according to claim 12, wherein the first control circuit further includes: a first on-time control circuit coupled to the pulse generating circuit, wherein the first on-time control circuit is used for receiving The pulse signal generates a first enable signal to enable the second switch. The flyback converter according to claim 13, wherein the first control circuit further includes: a delay circuit coupled to the pulse generating circuit, wherein the delay circuit is used for the pulse signal from the first time point Delay to the third time point to generate a delay signal; and a second on-time control circuit coupled to the delay circuit, wherein the second on-time control circuit is used to generate a on-time signal when receiving the delay signal . The flyback converter according to claim 14, wherein the second control circuit includes: an isolated transmission circuit coupled to the second on-time control circuit, wherein the isolated transmission circuit is used to receive and transmit the on-time Signal; and a receiving circuit coupled to the isolated transmission circuit, wherein the receiving circuit is used to identify and decouple a resource in the on-time signal when receiving the on-time signal Signal to send a second enable signal to enable the first switch. A control method of a flyback converter, wherein the flyback converter includes a transformer, a first switch and a second switch, the first switch is coupled to a first side of the transformer at an input end, The second switch is coupled to a second side of the transformer, and the control method includes: activating a switch coupled to a second side of a transformer at a first time point to induce an output current; The switch is disabled at two time points, and the output current drops to zero at the second time point; the switch is activated at a third time point to induce the output current, wherein the output current is the current at the third time point The direction is opposite to the direction of the current at the second time point; the switch is disabled at a fourth time point to induce an input current flowing from the input terminal to an input voltage; and at a fifth time point, the coupling to Another switch on a first side of the transformer, and the voltage on the input terminal drops to zero at the fifth time point.

Images