TWI741417B - Method and device of real time monitoring the connection status of i2c devices - Google Patents

Abstract

A method and device of real time monitoring the connection status of I2C devices for identifying and controlling a plurality of I2C slaves and performing a plug and play function, the I2C bus including SCL and SDA, which are characterized in that: the communication flow is executed; and when a communication error is detected, it is determined whether the system data line is at a low level, and continues for a delay time, if it is true, then judged that a new I2C slave is added to the I2C bus.

Description

Device and method for real-time detection of connection state of integrated circuit bus

The invention relates to an integrated circuit bus, in particular to a device and method for real-time detection of the connection state of the integrated circuit bus.

Inter-Integrated Circuit (I2C) is a serial communication bus used to connect low-speed peripherals to motherboards, mobile phones, and embedded systems. I2C can be applied to the master-slave system control architecture, such as System Management Bus (SMBus), Power Management Bus (PMBus), Intelligent Platform Management Interface (IPMI), display Data channel (Display Data Channel, DDC), Advanced Telecom Computing Architecture (ATCA), etc. The I2C design uses a 7-bit address space but reserves 16 addresses, so it can communicate with up to 112 nodes in a group of buses. The common I2C bus has different modes depending on the transmission rate: standard mode (100Kbit/s), low-speed mode (10Kbit/s), fast mode (400kbit/s), high-speed mode (3.4Mbit/s) and ultra High-speed mode (5Mbit/s), but the clock frequency can be allowed to drop to zero, which means communication is suspended.

I2C uses only two bidirectional open drain lines (Open Drain), serial data line (SDA) and serial clock line (SCL). I2C uses pull-up resistors, and the typical voltage used is +5V or +3.3V (Other voltage systems are also allowed).

There are two types of nodes on the I2C bus: the master node (host), which is used to generate the clock (SCL) and communicate with the slave node (slave); the slave node (slave), which is used to receive The clock also responds to the addressing and communication of the master node. The I2C bus is a multi-master bus, that is, any number of master nodes can be placed on the bus. The I2C bus has four different operating modes, although most devices only serve one role and use two of these operating modes: I. Master node transmission mode: The master node transmits data to the slave node; II. The master node receives mode: Master The node receives the data from the slave node; III. The slave node transmission mode: the slave node sends the data to the master node; IV. The slave node reception mode: the slave node receives the master node data.

Please refer to Figure 1, the waveform diagram of the conventional I2C communication mode. The I2C communication system starts operation by the master node in the master node transmission mode. The master node transmits the start bit 51 (START), that is, SDA is pulled to the low level; then, the master node transmits the 7 bits of the slave node that it wants to communicate with Address, and finally send a bit read/write bit. This data bit indicates whether the master node wants to read (1) or write (0) with the slave node. This is the data configuration of the first byte (byte) 55. If the slave node matching the 7-bit address is on the bus, it will use the 9th bit as the response (low effective) address (ACK) 56. After the master node receives the response, according to the read and write bits it transmits, it is in transmission mode or reception mode, while the slave node is in the corresponding opposite mode (receiving or transmission); no matter which mode, the data will be in the bus SDA Byte 57 is present. Finally, when the master node confirms the completion of the communication, it resets the clock frequency to zero (STOP) on the SCL bus, as shown in block 54 in Figure 1.

In the above I2C communication protocol, the I2C bus design does not support the plug-and-play function, so the I2C master cannot inquire about the new connected device (slave) in real time, or respond in time. The event that the device is removed; compared to other plug-and-play interfaces such as USB (Universal Bus), it limits the application of I2C products. For example, existing communication technologies such as SMBus can use additional pins and generate a signal to notify the host, so that the host can know that the SMBus device has a new state or event, but the host must use additional pins.

In short, since I2C uses two bidirectional open-drain (Open-Drain) signal lines, SDA and SCL use resistors to pull up the potential (usually to 3V or 5V). This feature makes the I2C host unable to connect to the bus or remove it from the bus through the pin signal detection device.

Therefore, how to make I2C have a plug-and-play function under the limitations of the I2C communication protocol and hardware has become a technology development direction that I2C can be used more widely.

In view of this, the present invention proposes an integrated circuit bus (I2C) device and method for real-time detection of the connection status. The I2C host uses the pulse signal of the existing SDA pin to know that the new device is connected to the I2C bus, which can be realized Plug-and-play function; after the address confirmation or address assignment process, it can detect that the device is removed from the I2C bus, and the hot-unplugging function can be realized; therefore, the use of the I2C device can be improved when multiple sets of I2C devices are connected The special technical effect that does not increase the circuit modification and the cost of electronic materials.

The present invention provides an integrated circuit bus (I2C) device for real-time detection of connection status, which is used to identify and control a plurality of integrated circuit bus slaves and perform plug-and-play functions. The integrated circuit bus includes a The system clock line (SCL) and a system data line (SDA) are characterized by: executing the communication process; and when a communication error is detected, it is judged whether the system data line is low If it is a low level and recovers after a delay time, it is determined that a new integrated circuit bus slave has been added. In addition, in the non-executive communication process stage, that is, the level of the system data line is detected. If it is a low level and recovers after a delay time, it is determined that a new integrated circuit bus slave has been added.

The present invention further provides an integrated circuit bus (I2C) slave, which can be plug-and-played on an integrated circuit bus including a system clock line (SCL) and a system data line (SDA), which is characterized by : When inserting the integrated circuit bus, after the system communication starts, the system data line continues to output the low level and resumes after a delay time.

The present invention also provides a method for real-time detection of the connection status of an integrated circuit bus (I2C), which is used to identify and control the plug-and-play function of a plurality of integrated circuit bus slaves. The integrated circuit bus includes a System clock line (SCL) and a system data line (SDA), including: executing the communication process; and when a communication error is detected, judging whether the system data line is low level, if it is low level and after a delay time Recovery, it is judged that a new integrated circuit bus from the machine has been added.

The present invention also provides a method for real-time detection of the connection status of an integrated circuit bus (I2C), which is used to identify and control the plug-and-play function of a plurality of integrated circuit bus slaves. The integrated circuit bus includes a System clock line (SCL) and a system data line (SDA), including: perform detection of the level of the system data line, if it is low level and recovers after a delay time, it is determined that a new integrated circuit bus is from Machine joined.

The present invention also provides a method for real-time detection of the connection status of an integrated circuit bus (I2C), which is used to identify and control the removal detection function of a plurality of integrated circuit bus slaves. The integrated circuit bus includes a system Clock line (SCL) and a system data line (SDA), including: inquiry The device identification codes of the IC bus slaves, and count and record the number of one of the IC bus slaves; and when it is judged that the number of the slaves is reduced, confirm that there is a slave removal status .

The detailed features and advantages of the present invention will be described in detail in the following embodiments. The content is sufficient to enable anyone familiar with the relevant art to understand the technical content of the present invention and implement it accordingly, and according to the content disclosed in this specification, the scope of patent application and the drawings. Anyone who is familiar with relevant skills can easily understand the purpose and advantages of the present invention.

10: I2C host

21, 22, 23: I2C slave

30: Integrated circuit bus

43: I2C connector

51: start bit

53: low level

54: block

55: The first byte (byte)

56: Acknowledgment (low effective) address (ACK)

57: data byte

Figure 1, the waveform diagram of the conventional I2C communication mode.

Figures 2A-2D are respectively the signal timing diagram, the pulse signal diagram, and the hot plug function block diagram of the method of the integrated circuit bus (I2C) to detect the connection status in real time.

Figure 3 shows a flow chart of the method for real-time detection of the connection status of the integrated circuit bus (I2C).

Figure 4 is a flow chart of the method for real-time detection of the connection status of the integrated circuit bus (I2C) of the present invention.

Figure 5 is a flowchart of another embodiment of the integrated circuit bus (I2C) real-time detection of the connection status.

In the device and method for real-time detection of the connection status of the integrated circuit bus (I2C) provided by the present invention, the I2C host uses the pulse signal of the existing SDA pin to know that the new device is connected to the I2C The bus can realize the plug and play function; after the address confirmation or address assignment procedure, it can detect the removal of the device from the I2C bus, and the hot removal function can be realized; therefore, when multiple sets of I2C devices are connected It can improve the efficiency of using I2C devices without increasing the cost of circuit modification and electronic materials.

Please refer to Figures 2A-2D, which are the method of real-time detection of the connection status of the integrated circuit bus (I2C). Signal timing diagram, pulse signal diagram, hot plug function block diagram, and also refer to the integrated circuit in Figure 3 The flow chart of the method for the circuit bus (I2C) to detect the connection status in real time.

First, please refer to Figures 2C and 2D. The device of the present invention for the integrated circuit bus (I2C) to detect the connection status in real time, that is, the I2C master 10, is used to identify and control a plurality of integrated circuit bus slaves. (Ie, I2C slave 21, I2C slave 22, I2C slave 23) and perform plug-and-play function. The integrated circuit bus 30 includes a system clock line (SCL) and a system data line (SDA) (As shown in Figures 2A and 2B), it is characterized in that the process of Figure 3 is executed: Step S101: the I2C device communication process starts.

Step S102: Execute the I2C communication process. The I2C host 10 transmits the start bit 51 (START), and then starts to perform I2C communication according to the flow in Figure 1.

Step S103: I2C communication error? This is the most important step of the present invention, because the idle state of I2C is to continuously maintain a high potential (Bus pull-up). Therefore, when the system starts to communicate, if a new IC bus slave is inserted into the IC bus 30 from the offline state, as shown in Figures 2C and 2D, the I2C slave 23 is inserted into the IC bus 30. At this time, the original I2C slave 21, the IC slave 22 and the I2C host 10 are in normal communication. In this communication process, all three will transmit signals on the SDA line. Since SDA is usually at a high potential, only I2C is in the communication state The host 10 or the I2C slave 21 or the I2C slave 22, any of these three, can pull the potential low on the SDA bus when it is the main communication player (master node transmission mode or slave node transmission mode). Therefore, no matter which transmission mode is in, the present invention uses a method of actively causing communication errors to allow the I2C host 10 to recognize that a new integrated circuit bus slave is newly inserted. Therefore, in the present invention, a new integrated circuit bus slave is added to the integrated circuit bus 30 (via the I2C connector 43), and the new integrated circuit bus slave (that is, the I2C slave 23) communicates with After the start, the system data line (SDA) continues to output the low level 53 for a delay time (T1), as shown in Figures 2A and 2B. In this way, normal communication can be disturbed, causing communication errors. Since the new integrated circuit bus slave, that is, the I2C slave 23 in the 2C and 2D diagrams, is actively sent when it is added to the integrated circuit bus 30, the I2C master 10 has the opportunity to determine that there is an I2C slave 23. join in. If there is no I2C communication error, then go to step S108.

Step S104: Is the SDA pin low and lasts for a delay time? This is determined by the I2C host 10, and if the SDA pin is at a low level, step S105 is entered. Otherwise, return to step S102. The time length of the low level, that is, the length of the delay time T1, is not less than the time of the longest data transmission packet, or the Time-out time defined by the system. (P.S. That is, it covers no less than one START/STOP range)

Step S105: Confirm that there is a new connection device for the I2C BUS. Since the aforementioned judgment conditions are met, one is the detection of a communication error, the other is the detection of a continuous low level of SDA, and the third is that the continuous low level meets the condition of the preset delay time. In this way, I2C can be confirmed. BUS has a new I2C slave to join, such as the I2C slave 23 in the 2C and 2D diagrams.

Step S106: Confirm that there is no new connection device in the I2C BUS. Return to step S102.

Step S107: Does the user stop communication? The system can determine whether it is based on user settings Whether to continue to detect the real-time connection signal, if not, return to step S102 to continue the process. If the communication stop state set by the user has been reached, step S108 is entered.

Step S108: The communication process of the I2C device ends.

It can be seen from the above description that the device for real-time detection of the connection status of the integrated circuit bus (I2C) of the present invention uses three judgment conditions to determine whether a new integrated circuit bus slave is added to the integrated circuit bus. A communication error is detected, or a continuous low level of SDA is detected, and the continuous low level meets the preset delay time. And this low-level delay time is produced by the newly added new integrated circuit bus slave. Therefore, the integrated circuit bus slave has the following characteristics: when inserting the integrated circuit bus (I2C), the system data line SDA continues to output the low level and resumes after a delay time; the delay time is not less than the longest data The time to transmit the packet, or the Time-out time defined by the system.

Next, please refer to Figure 4, which is a flow chart of the method for real-time detection of the connection status of the integrated circuit bus (I2C) of the present invention, which is used to identify and control the removal of one or more IC bus slaves. The integrated circuit bus includes a system clock line (SCL) and a system data line (SDA), including the following steps: Step S111: I2C device removal detection process starts.

Step S112: Determine whether all I2C slaves have assigned addresses? As shown in Figure 2C, the I2C slave 21, the I2C slave 22, and the I2C slave 23 are divided into designated addresses ID1, ID2, and ID3. If the connected I2C slave 21 and I2C slave 22 have not designated addresses, proceed to step S113; otherwise, if there is a designated address, proceed to step S114.

Step S113: Execute the I2C slave address designation process. Generally speaking, I2C slave The number can be judged by a fixed 7-bit address, which is the hardware code judgment method. When the 7-bit hardware code address is insufficient (you may accidentally select an I2C slave with the same hardware code), you can use an additional address specification (software code), that is, the I2C host 10 specifies the new The address is given to the existing I2C slaves. For example, the second byte (Byte 2) or the second and third byte (Byte 3) outside the original 7-bit address are used as the new designated address. Since this designation is designated by the I2C master 10 to the existing I2C slaves, there will be no overlap problem. The I2C master and the I2C slave must be used in conjunction with each other. In other words, this is not available in the standard I2C communication protocol, and it is a new supplementary communication protocol developed by the present invention. Once designated, such as I2C slave 21, I2C slave 22, I2C slave 23, etc., all have designated addresses ID1, ID2, and ID3. For example, ID1, ID2, and ID3 can be Byte 2 of SDA as 0000-0001, 0000-0010, 0000-0011, respectively. This is the automatic address assignment process of the present invention.

Step S113 can also be added to step S105. In other words, when the I2C master 10 confirms that a new I2C slave (such as the I2C slave 23 in the 2C and 2D diagrams) has been added, the I2C slave address specification process can be executed.

Step S114: Query the identification code of the I2C slave device, and count and record the number. Taking Figure 2D as an example, the number of slaves detected by the I2C master 10 is 3.

Step S115: Decrease the number of I2C slave device identification codes? When the state of the 2D diagram is changed to the state of the 2C diagram, the number of slaves will be reduced to 2. At this time, the I2C host 10 can confirm that one is missing, and it is judged that the number of slaves has decreased, and the process can proceed to step S116. If there is no decrease, go to step S117.

Step S116: Generate an I2C slave pull-out warning signal. I2C host 10 can send out signals To the motherboard system, and then the motherboard system sends out warning messages to the user. Then, it progresses to step S117.

Step S117: Does the user stop the I2C device disconnection detection function? The system determines whether to continue detecting the number according to the user setting. If the detection condition for stopping the device removal is not met, it returns to step S112 to continue the detection.

Step S118: The I2C device removal detection process ends.

From the above process, it can be seen that the device for the integrated circuit bus (I2C) to detect the connection status in real time, that is, the I2C host 10, can additionally include a disconnection detection function. The disconnection detection function includes: inquiring about the integrated circuit bus Arrange the device identification codes of the slaves, and count and record the number of slaves of the integrated circuit bus; and when it is judged that the number of slaves has decreased, confirm that there is a slave removal status.

Furthermore, the device for real-time detection of the connection status of the integrated circuit bus (I2C) further includes the feature that when the slave device is confirmed to be removed, a pull-out warning signal is generated. Among them, the device for real-time detection of the connection status of the integrated circuit bus (I2C) further includes the feature of judging whether the new integrated circuit bus slave machine has a designated address, and when the new integrated circuit bus slave machine is not When the designated address is available, the new integrated circuit bus slave is provided to a new designated address.

It can be seen from the above description that the present invention uses the I2C slave to actively output the low-level signal of the SDA during the communication process when the integrated circuit bus (I2C) is newly added, forcing the SDA to generate an incorrect communication result, so that the I2C master 10 After detecting this error, the delay time (T1) of the low-level signal can be further used to determine the addition of a new I2C slave. Then, use the existing hardware address as the device identification code, or give a new software address if the existing hardware address is different As a device, it is a code to confirm the newly added I2C slave. Since the number of new and old added I2C slaves has been known, after the user unplugs the I2C slave, the I2C master 10 can also use the number of I2C slaves and the designated address to know which I2C slave is unplugged.

In addition, the I2C master can also detect the SDA level during the non-I2C communication process to further determine the addition of a new I2C slave by the delay time (T1) of the low-level signal. The flowchart is as shown in section 5. picture.

Step S121: The non-communication detection process of the I2C device starts.

Step S122: Detect the level of the SDA pin; the method of detecting the level of the system data line can be system interrupt or system polling.

Step S123: Is the SDA pin at a low level for a delay time? If this condition is met, step S124 is executed to further communicate with possible I2C devices to confirm whether there is a new I2C device; if not, go back to step S122.

Step S124: Execute the I2C communication process; perform I2C communication to confirm that there is a new I2C device, and further define its device identification code for subsequent communication.

Step S125: Confirm that there is a new device connected to the I2C BUS; since the aforementioned judgment conditions are met, a communication error is detected, and the continuous low level of SDA is detected, and the continuous low level meets the condition of the preset delay time, so, that is It can be confirmed that a new I2C slave is added to the I2C BUS, such as the I2C slave 23 in the 2C and 2D diagrams.

Step S126: Does the user stop communication? The system can determine whether to continue detecting the real-time connection signal according to the user setting, if not, it returns to step S122 to continue the process. If the communication stop state set by the user has been reached, step S127 is entered.

Step S127: The I2C device detection process ends.

It can be seen from the above different embodiments that the present invention determines whether a new I2C device is added to the system by detecting the change of the SDA pin level. However, this technology must be combined with the added function of the I2C device: when the integrated circuit bus is inserted, the system data line will continue to output a low level and recover after a delay time. This function added to the I2C slave can be executed during I2C communication or in the process of I2C non-communication. The I2C host can detect whether this situation occurs at any time, that is, the state where the SDA pin level is pulled low, that is, as described in the embodiment in FIG. 3 or FIG. 5. Therefore, by using the technology of the present invention, the plug-and-play function of the I2C system can be fully realized. Let the I2C system that does not have the plug-and-play function obtain this function, so that the system is more flexible, and the application range and methods are wider.

Although the technical content of the present invention has been disclosed in the preferred embodiments as above, it is not intended to limit the present invention. Anyone who is familiar with this technique and makes some changes and modifications without departing from the spirit of the present invention should be covered by the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of the attached patent application.

10: I2C host

21, 22, 23: I2C slave

30: Integrated circuit bus

43: I2C connector

53: low level

Claims (19)

An integrated circuit bus (I2C) device for real-time detection of connection status, used to identify and control one or more integrated circuit bus slaves and perform plug-and-play functions. The integrated circuit bus includes a system The clock line (SCL) and a system data line (SDA) are characterized by: executing the communication process; when a communication error is detected, it is judged whether the system data line is low level, if it is low level and after a delay time Recovery, it is judged that a new integrated circuit bus slave is added; and the communication error is added to the integrated circuit bus by the new integrated circuit bus slave, and the new integrated circuit bus slave is added to the integrated circuit bus. After the communication started, the system data line (SDA) continued to output the low level for the delay time. An integrated circuit bus (I2C) device for real-time detection of connection status as described in claim 1, wherein the delay time is not less than the time of the longest data transmission packet, or the time-out time defined by the system. The integrated circuit bus (I2C) device for real-time detection of the connection status as described in claim 1, wherein the device for real-time detection of the connection status of the integrated circuit bus (I2C) further includes the feature of querying the integrated circuits The device identification code of the slaves of the circuit bus, and count and record the number of slaves of the integrated circuit bus; and when it is judged that the number of the slaves is reduced, confirm that the slave is removed. The integrated circuit bus (I2C) device for real-time detection of the connection status as described in claim 3, wherein the device for real-time detection of the connection status of the integrated circuit bus (I2C) further includes the feature that: when the slave is confirmed When the machine is removed, a pull-out warning signal is generated. The integrated circuit bus (I2C) described in claim 1 or 3 is a device for real-time detection of connection status, which The device for real-time detection of the connection status of the integrated circuit bus (I2C) further includes the feature of judging whether the new integrated circuit bus slave machine has a designated address, and when the new integrated circuit bus slave machine is not When the designated address is available, the new integrated circuit bus slave is provided to a new designated address. An integrated circuit bus (I2C) device for real-time detection of connection status, used to identify and control one or more integrated circuit bus slaves and perform plug-and-play functions. The integrated circuit bus includes a system A clock line (SCL) and a system data line (SDA) are characterized by: detecting the level of the system data line, if it is a low level and recovering after a delay time, it is determined that there is a new integrated circuit bus Add from the machine; query the device identification codes of the IC bus slaves, and count and record the number of the IC bus slaves; and when it is judged that the number of the slaves is reduced, confirm that there is a slave transfer In addition to the state. An integrated circuit bus (I2C) device for real-time detection of connection status as described in claim 6, wherein the delay time is not less than the time of the longest data transmission packet, or the time-out time defined by the system. The integrated circuit bus (I2C) device for real-time detection of connection status as described in claim 6, wherein the device for real-time detection of the connection status of the integrated circuit bus (I2C) further includes the feature that: when the slave is confirmed When the machine is removed, a pull-out warning signal is generated. The integrated circuit bus (I2C) device for real-time detection of connection status as described in claim 6, wherein the device for real-time detection of connection status of the integrated circuit bus (I2C) further includes the feature of: judging the new integrated circuit Whether the circuit bus slave has a designated address, when the new integrated circuit bus When the row slave does not have the designated address, the new integrated circuit bus slave is provided with a new designated address. An integrated circuit bus (I2C) device for real-time detection of connection status as described in claim 6, wherein the method of detecting the level of the system data line can be system interruption or system polling. An integrated circuit bus (I2C) slave, which can be plug-and-played on an integrated circuit bus including a system clock line (SCL) and a system data line (SDA), and is characterized in that: When the integrated circuit bus is used, the system data line continues to output a low level and resumes after a delay time; and when the system data line continues to output a low level and continues for the delay time, the recovery is performed after the system communication starts. The integrated circuit bus (I2C) slave described in claim 11, wherein the delay time is not less than the time of the longest data transmission packet, or the time-out time defined by the system. An integrated circuit bus (I2C) method for real-time detection of connection status, used to identify and control the plug-and-play function of a plurality of integrated circuit bus slaves, the integrated circuit bus includes a system clock line (SCL) and a system data line (SDA), including: execute the communication process; when a communication error is detected, determine whether the system data line is low level, if it is low level and recover after a delay time, it is determined that there is a The new integrated circuit bus slave machine is added; and the communication error is added to the integrated circuit bus by the new integrated circuit bus slave machine, and the new integrated circuit bus slave machine starts communication after the start of communication. The system data line (SDA) continues to output the low level due to the delay time. The integrated circuit bus (I2C) method for real-time detection of connection status as described in claim 13, wherein the delay time is not less than the time of the longest data transmission packet, or the time-out time defined by the system. An integrated circuit bus (I2C) method for real-time detection of connection status, used to identify and control the plug-and-play function of a plurality of integrated circuit bus slaves, the integrated circuit bus includes a system clock line (SCL) and a system data line (SDA), including: detecting the level of the system data line, if it is a low level and recovering after a delay time, it is determined that a new integrated circuit bus slave has been added. The integrated circuit bus (I2C) method for real-time detection of connection status as described in claim 15, wherein the delay time is not less than the time of the longest data transmission packet, or more than the time-out time defined by the system. The method for real-time detection of the connection status of an integrated circuit bus (I2C) as described in claim 15, wherein the method of detecting the level of the system data line can be system interruption or system polling. An integrated circuit bus (I2C) method for real-time detection of connection status, used to identify and control the removal detection function of a plurality of integrated circuit bus slaves, the integrated circuit bus includes a system clock line ( SCL) and a system data line (SDA), including: querying the device identification codes of the IC bus slaves, and counting and recording the number of IC bus slaves; and when judging the slaves When the number is reduced, confirm that the slave is removed; when the slave is confirmed to be removed, a pull-out warning signal is generated. An integrated circuit bus (I2C) device for real-time detection of connection status as described in claim 18, wherein The device for real-time detection of the connection status of the integrated circuit bus (I2C) further includes the feature of judging whether the new integrated circuit bus slave machine has a designated address, when the new integrated circuit bus slave machine does not have When the designated address, the new integrated circuit bus slave is provided to a new designated address.

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