TWI740444B - Foldable display panel - Google Patents

Abstract

The foldable display panel includes a substrate and a pixel array. The substrate has a surface and a display area and a periphery area on the surface. The periphery area is on at least one side of the display area. The periphery area has at least one first bonding area and at least one second bonding area. The first bonding area and the second bonding area are at an opposite first side and a second side of the periphery area, respectively. The first bonding area and the second bonding area are spaced apart by a first distance along a first direction. The substrate has a foldable line passing through a center of the display area. The foldable line is between the first bonding area and the second bonding area and is parallel to the first direction. The first side and the second side are on two sides of the foldable line. The pixel array is on the display area and overlaps the foldable line. The pixel array is between the first side and the second side and includes a plurality of sub pixel units arranged in an array.

Description

Foldable display panel

The invention relates to a foldable display panel.

The development of the display has a trend of large screens, but as the screen size becomes larger, the portability is reduced. The foldable display can take care of these two needs. It can provide a large screen when it is unfolded to the full screen, and the size is reduced when it is folded, making it convenient for users to carry. The peripheral area of the display panel is generally provided with a circuit, which is used to drive the pixel matrix located in the middle for displaying the picture. However, when the display panel is folded to close it, the circuits on the two opposite sides may hit each other and be damaged. Therefore, there is an urgent need for a method that can solve the aforementioned problems.

The present invention provides a foldable display panel. A first external circuit area and a second external circuit area are separated by a first distance along a first direction, and a substrate has a foldable line passing through the center of the display area. When the foldable display panel is folded, the first external circuit area can be prevented from contacting the second external circuit area.

The foldable display panel of the present invention includes a substrate and a pixel array. The substrate has a surface and a display area and a peripheral area on the surface, wherein the peripheral area is located on at least one side of the display area, the peripheral area has at least one first external circuit area and at least one second external circuit area, the first external circuit area and The second external circuit area is respectively located on the first side and the second side opposite to the peripheral area. The first external circuit area and the second external circuit area are separated by a first distance along the first direction. The foldable line, wherein the foldable line is located between the first external circuit area and the second external circuit area and is parallel to the first direction. The pixel array is located in the display area and overlaps the foldable line, and the first side and the second side are respectively located on two sides of the foldable line. The pixel array is located between the first side and the second side. The pixel array includes a plurality of sub-pixel units, and the sub-pixel units are arranged in an array.

In an embodiment of the present invention, the above-mentioned foldable display panel further includes a plurality of first pads, a plurality of first signal lines, a plurality of second pads, and a plurality of second signal lines. The first pad is disposed on the first external circuit area, and the first signal line is connected between the first pad and a part of the sub-pixel units. The second pad is disposed on the second external circuit area, and the second signal line is connected between the second pad and another part of the sub-pixel unit.

In an embodiment of the present invention, the above-mentioned peripheral area has a third side and a fourth side opposite to each other, the third side and the fourth side are located between the first side and the second side, and the first external circuit area and the second side The sum of the shortest distance between the three sides and the length of the first external circuit area along the first direction is smaller than the shortest distance between the second external circuit area and the third side.

In an embodiment of the present invention, the number of the above-mentioned first external circuit areas is multiple, and the first external circuit areas are arranged at a first interval along the first direction, the first external circuit areas and the third side The shortest distance between, the sum of the length of the first external circuit area in the first direction and the first spacing is greater than the shortest distance between the second external circuit area and the third side and the length of the second external circuit area in the first direction Sum.

In an embodiment of the present invention, the number of the aforementioned first external circuit areas is multiple, and the first external circuit areas are arranged at intervals along the first direction at a first interval, and the number of the second external circuit areas is greater And the second external circuit areas are arranged at a second interval along the first direction. The shortest distance between the first external circuit area and the third side is twice the length of the first external circuit area along the first direction The sum of the distance from the first distance is smaller than the sum of the shortest distance between the second external circuit area and the third side, the length of the second external circuit area in the first direction, and the sum of the second distance.

In an embodiment of the present invention, the aforementioned shortest distance between the second external circuit area and the third side is greater than the length of the first external circuit area along the first direction.

In an embodiment of the present invention, the aforementioned shortest distance between the first external circuit area and the fourth side is greater than the shortest distance between the second external circuit area and the fourth side, and the second external circuit area is along the first direction The sum of the lengths.

In an embodiment of the present invention, the above-mentioned foldable display panel further includes at least one driving chip, and the driving chip is disposed on the first external circuit area and is electrically connected to the first pad.

In an embodiment of the present invention, the above-mentioned foldable display panel further includes an anisotropic conductive adhesive, the anisotropic conductive adhesive is disposed on the first external circuit area, and the anisotropic conductive adhesive is located on the driving chip and the first pad between.

In an embodiment of the present invention, the above-mentioned foldable display panel further includes a plurality of scan lines and a plurality of data lines. The scan lines are arranged in the display area, the data lines are arranged in the display area, each sub-pixel unit is electrically connected to one of the scan lines and one of the data lines, and each sub-pixel unit includes a thin film transistor And an organic light-emitting diode, and the organic light-emitting diode is electrically connected to the thin film transistor.

Based on the above, in the foldable display panel of the present invention, the foldable display panel has at least one first external circuit area and at least one second external circuit area, and the first external circuit area and the second external circuit area are respectively located in the peripheral area. Opposite the first side and the second side, the first external circuit area and the second external circuit area are separated by a first distance along the first direction, and the substrate has a foldable line passing through the center of the display area, and the foldable line is located at the first Between the external circuit area and the second external circuit area and parallel to the first direction, the first side and the second side are respectively located on two sides of the foldable line. Therefore, after the foldable display panel is folded along the foldable line so that the first side and the second side of the substrate overlap each other, the first external circuit area does not overlap the second external circuit area. In other words, the first external circuit area can be Avoid contact with the second external circuit area, thereby avoiding the first pad arranged on the first external circuit area and the second pad arranged on the second external circuit area from colliding with each other and being damaged, and avoiding The first printed circuit board arranged on the first external circuit area and the second printed circuit board arranged on the second external circuit area collide with each other and are damaged.

Figure 1 is a schematic top view of a foldable display panel 100 according to an embodiment of the present invention. The foldable display panel 100 includes a substrate 102 and a pixel array AR. The substrate 102 has a surface 102A and a display area AA on the surface 102A. In the peripheral area NA, the pixel array AR is located in the display area AA. The peripheral area NA is located on at least one side of the display area AA. For example, the peripheral area NA may surround the display area AA. For the convenience of description, the first direction D1 and the second direction D2 are shown in Fig. 1, and the first direction D1 and the second direction D2 are different. For example, the first direction D1 and the second direction D2 are as shown in Fig. 1 respectively. The longitudinal direction and the transverse direction are orthogonal to each other.

The pixel array AR includes a plurality of sub-pixel units PX, and each sub-pixel unit PX is arranged in an array. Figure 2 is an enlarged schematic view of the region R in Figure 1, and Figure 3 is a schematic cross-sectional view of the section line II' in Figure 2. The foldable display panel 100 is not limited to the structure described below, and may have One of the different structures is an organic light-emitting diode or a flexible liquid crystal display (LCD). Please refer to FIGS. 2 and 3 together. The sub-pixel unit PX includes a switching thin film transistor T1, a driving thin film transistor T2, and a capacitor C1, and the foldable display panel 100 also includes multiple gate lines GL and multiple The data line DL and a plurality of shared power lines PL, and the data line DL and the shared power line PL each intersect the gate line GL. For example, the data line DL and the common power line PL are parallel to the first direction D1, and the gate line GL is parallel to the second direction D2. In this embodiment, the sub-pixel unit PX is an example of a dual transistor single capacitor (2T1C) structure, but the invention is not limited to this. In this embodiment, the foldable display panel 100 further includes a buffer layer 104 and a gate insulating layer GI (see FIG. 3). The buffer layer 104 is disposed on the substrate 102 and the switching semiconductor layer 106 (not shown in FIG. 3) and Between the driving semiconductor layers 110, the gate insulating layer GI is disposed on the switching semiconductor layer 106 (not shown in FIG. 3) and the driving semiconductor layer 110, and the switching gate GE1 and the driving gate GE2 are located on the gate insulating layer GI. However, the present invention is not limited to this. In other embodiments of the present invention, the buffer layer 104 may not be included. The material of the gate insulating layer GI may include inorganic materials (for example, silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or a combination of the above).

The switch thin film transistor T1 includes a switch gate GE1, a switch semiconductor layer 106, a switch insulating layer 108, a switch source SE1, and a switch drain DE1. The driving thin film transistor T2 includes a driving gate GE2, a driving semiconductor layer 110, a driving insulating layer 112, a driving source SE2, and a driving drain DE2. The switching semiconductor layer 106 and the driving semiconductor layer 110 may be formed of polysilicon or oxide semiconductor. In this embodiment, the material of the switching semiconductor layer 106 and the driving semiconductor layer 110 may include polysilicon, that is, the switching thin film transistor T1 and the driving thin film transistor. The crystal T2 can be a Low Temperature Poly-Silicon Thin Film Transistor (LTPS TFT). However, the present invention does not limit the types of the switching thin film transistor T1 and the driving thin film transistor T2. In other embodiments, the material of the switching semiconductor layer 106 and the driving semiconductor layer 110 may include amorphous silicon, microcrystalline silicon, nanocrystalline silicon, single crystal silicon, organic semiconductor materials, metal oxide semiconductor materials, and carbon nanotubes. / Rod, perovskite or other suitable materials.

The switching semiconductor layer 106 includes a channel region (not shown) (not doped with impurities), a source region (not shown), and a drain region (not shown). The driving semiconductor layer 110 includes a channel region 110a (not doped with impurities), a source region 110b, and a drain region 110c. The source region 110b and the drain region 110c are respectively formed on both sides of the channel region 110a and doped with impurities. Here, the impurity used depends on the type of thin film transistor, and may include N-type impurities or P-type impurities.

In this embodiment, the foldable display panel 100 further includes a protective layer 123, and the protective layer 123 is located on the switching thin film transistor T1 (not shown in FIG. 3), the driving thin film transistor T2, and the capacitor C1. The protective layer 123 can be made of inorganic materials, organic materials, or a combination thereof. The inorganic materials are, for example, silicon oxide, silicon nitride, silicon oxynitride, or a stacked layer of at least two of the foregoing materials. The organic material is, for example, a polymer material such as polyimide resin, epoxy resin, or acrylic resin.

The sub-pixel unit PX also includes an organic light-emitting diode 114, which includes a pixel electrode PE, an organic light-emitting layer EL, a common electrode 116, and an encapsulation layer 118, one of the pixel electrode PE and the common electrode 116 One is a hole injection electrode, and the other is an electron injection electrode. Electrons and holes are injected from the pixel electrode PE and the common electrode 116 into the organic light-emitting layer EL, so that the holes and electrons recombine with each other to emit light. The pixel electrode PE is formed of a metal with high reflectivity, and the common electrode 116 is formed of a transparent conductive layer. The light generated by the organic light emitting layer EL is reflected by the pixel electrode PE and emitted to the outside through the common electrode 116 and the encapsulation layer 118. In this embodiment, the encapsulation layer 118 covers the organic light emitting diode 114 to isolate water vapor, moisture, and the like. The material of the encapsulation layer 118 may include (but is not limited to) silicon nitride, aluminum oxide, or silicon oxynitride.

The capacitor C1 includes an upper electrode 120, an interlayer insulating layer 122, and a lower electrode 124. The interlayer insulating layer 122 is located between the upper electrode 120 and the lower electrode 124 and includes a dielectric material. The switching thin film transistor T1 is used as a switch to select the sub-pixel unit PX for light emission. The switch gate GE1 is connected to the gate line GL, the switch source SE1 is connected to the data line DL, and the switch drain DE1 is connected to the upper electrode 120 of the capacitor C1. The driving thin film transistor T2 applies driving power to the pixel electrode PE of the selected sub-pixel unit PX to cause the organic light emitting layer EL to emit light. The driving gate GE2 is connected to the upper electrode 120, and the upper electrode 120 is connected to the switch drain DE1. The driving source SE2 and the lower electrode 124 are connected to the common power line PL1, and the driving drain DE2 is connected to the pixel electrode PE of the organic light emitting diode 114 via the contact hole TH.

The switching thin film transistor T1 is driven by the gate voltage applied to the gate line GL to transmit the data voltage applied to the data line DL to the driving thin film transistor T2. The voltage corresponding to the voltage difference between the common voltage applied from the common power line PL to the driving thin film transistor T2 and the data voltage transmitted from the switching thin film transistor T1 is stored in the capacitor C1 and corresponds to the voltage stored in the capacitor C1 The electric current drives the thin film transistor T2 to indwell the organic light emitting diode 114, so that the organic light emitting layer EL emits light.

The organic light emitting layer EL is formed of a polymer organic material. The organic light-emitting layer EL can be a multi-layer, and includes a light-emitting layer, a hole injection layer (HIL), a hole transporting layer (HTL), and an electron transporting layer; At least one of ETL and electron injection layer (EIL). When the organic light emitting layer EL includes a light emitting layer, a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer, and the electron injection layer are sequentially Stacked on the pixel electrode PE from bottom to top.

In this embodiment, the organic light-emitting layer EL may be any light-emitting layer used in a display panel that is well known to those with ordinary knowledge in the art. The organic light-emitting layer EL can be a red organic light-emitting layer, a green organic light-emitting layer, a blue organic light-emitting layer, an organic light-emitting layer of other colors, or a combination of the above-mentioned light-emitting layers.

The peripheral area NA has a first side 126A and a second side 126B opposite to each other, and the pixel array AR is located between the first side 126A and the second side 126B. In this embodiment, the peripheral area NA has at least one first external circuit area BA1 and at least one second external circuit area BA2. For example, the first external circuit area BA1 and the second external circuit area BA2 are respectively located on the first side 126A and the second side 126B opposite to the peripheral area NA.

The substrate 102 has a foldable line 132 passing through the center CT of the display area AA, and the first side 126A and the second side 126B are respectively located on two sides of the foldable line 132. The foldable line 132 is located between the first external circuit area BA1 and the second external circuit area BA2 and is parallel to the first direction D1, and the pixel array AR overlaps the foldable line 132. The foldable display panel 100 further includes a plurality of first signal lines FL1 and a plurality of first pads 134. The first pads 134 are disposed on the first external circuit area BA1, and each first pad 134 is located on each first signal line. One end of the line FL1. The other end of the first signal line FL1 is connected to the data line DL, so that the first signal line FL1 is electrically connected to the first pad 134 and can be electrically connected to part of the sub-pixel units PX through the data line DL. The foldable display panel 100 further includes a plurality of second signal lines FL2 and a plurality of second pads 136. The second pads 136 are disposed on the second external circuit area BA2, and each second pad 136 is located on each second signal One end of the line FL2, and the other end of the second signal line FL2 is connected to a data line DL (not shown), so that the second signal line FL2 is electrically connected to the second pad 136 and can be electrically connected to the other part through the data line DL Part of the sub-pixel unit PX.

The foldable display panel 100 further includes a driving circuit 128 and a plurality of third signal lines FL3, and the driving circuit 128 is located at one side of the peripheral area NA. For example, the peripheral area NA further has a third side 130A and a fourth side 130B opposite to each other. The third side 130A, the fourth side 130B, the first side 126A, and the second side 126B together form the outer edge of the peripheral area NA. The foldable line 132 passes through the third side 130A and the fourth side 130B. The driving circuit 128 is located between the third side 130A of the peripheral area NA and the pixel array AR, and the driving circuit 128 is located between the first external circuit area BA1 and the second external circuit area BA2, and the third signal line FL3 is located in the driving circuit 128 And between the pixel array AR. The driving circuit 128 is, for example, an integrated gate driver on array (GOA), that is, the active element (not shown) of the driving circuit 128 is the switching thin film transistor T1 and the driving thin film transistor of the sub-pixel unit PX. T2 is made together, but the invention is not limited to this. The pixel array AR is electrically connected to the driving circuit 128 through the third signal line FL3. In this embodiment, the first side 126A and the second side 126B are parallel to the first direction D1, and the third side 130A and the fourth side 130B are parallel to the second direction D2.

In this embodiment, the foldable display panel 100 further includes a first printed circuit board 138 and a second printed circuit board 140. The first printed circuit board 138 is disposed on the first external circuit area BA1, and the first pad 134 is electrically connected. It is electrically connected to the first printed circuit board 138, the second printed circuit board 140 is disposed on the second external circuit area BA2, and the second pad 136 is electrically connected to the second printed circuit board 140.

Figure 4 is a schematic top view of Figure 1 after being folded along the foldable line 132. Please refer to Figures 1 and 4 together. In this embodiment, the first external circuit area BA1 and the second external circuit area BA2 The first distance S1 is spaced along the first direction D1. Therefore, after the foldable display panel 100 is folded along the foldable line 132 so that the first side 126A and the second side 126B of the substrate 102 overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2. In other words, the first external circuit area BA1 can avoid contacting the second external circuit area BA2, thereby avoiding the first pad 134 disposed on the first external circuit area BA1 And the second pads 136 arranged on the second external circuit area BA2 collide and damage each other, and avoid the first printed circuit board 138 arranged on the first external circuit area BA1 and the second external circuit area BA2. The upper second printed circuit boards 140 are damaged by hitting each other.

The sum of the shortest distance c1 between the first external circuit area BA1 and the third side 130A and the length a1 of the first external circuit area BA1 along the first direction D1 is smaller than the shortest between the second external circuit area BA2 and the third side 130A Distance c2. For example, the shortest distance c1 between the first external circuit area BA1 and the third side 130A is 3 mm to 7 mm, and the length a1 of the first external circuit area BA1 along the first direction D1 is 26 mm to 31 The shortest distance c2 between the second external circuit area BA2 and the third side 130A is 39 mm to 43 mm. In this way, after the foldable display panel 100 is folded along the foldable line 132 so that the first side 126A and the second side 126B of the substrate 102 overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2, in other words, the first external circuit area BA1 can avoid contacting the second external circuit area BA2, thereby avoiding the first pad 134 disposed on the first external circuit area BA1 and the second external circuit area BA2 The second pads 136 on the upper side of the board collide with each other and are damaged, and prevent the first printed circuit board 138 arranged on the first external circuit area BA1 and the second printed circuit board 140 arranged on the second external circuit area BA2 from each other. Damaged by impact.

In this embodiment, the number of the first external circuit areas BA1 is multiple, and the first external circuit areas BA1 are arranged at intervals along the first direction D1 with a pitch b1. The sum of the shortest distance c1 between the first external circuit area BA1 and the third side 130A, the length a1 of the first external circuit area BA1 along the first direction D1, and the distance b1 between the first external circuit area BA1 is greater than the second The sum of the shortest distance c2 between the external circuit area BA2 and the third side 130A and the length a2 of the second external circuit area BA2 along the first direction D1. For example, the shortest distance c1 between the first external circuit area BA1 and the third side 130A is 3 mm to 7 mm, and the length a1 of each first external circuit area BA1 along the first direction D1 is 26 mm to 31 mm, the spacing b1 between the first external circuit areas BA1 is 40 mm to 45 mm, and the shortest distance c2 between the second external circuit area BA2 and the third side 130A is 39 mm to 43 mm , And the length a2 of the second external circuit area BA2 along the first direction D1 is 26 mm to 31 mm. In this way, after the foldable display panel 100 is folded along the foldable line 132 so that the first side 126A and the second side 126B of the substrate 102 overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2, in other words, the first external circuit area BA1 can avoid contacting the second external circuit area BA2, thereby avoiding the first pad 134 disposed on the first external circuit area BA1 and the second external circuit area BA2 The second pads 136 on the upper side of the board collide with each other and are damaged, and prevent the first printed circuit board 138 arranged on the first external circuit area BA1 and the second printed circuit board 140 arranged on the second external circuit area BA2 from each other. Damaged by impact.

In this embodiment, the number of the second external circuit areas BA2 is multiple, and the second external circuit areas BA2 are arranged at intervals along the first direction D1 with a pitch b2. The sum of the shortest distance c1 between the first external circuit area BA1 and the third side 130A, the twice the length a1 of the first external circuit area BA1 along the first direction D1, and the distance b1 between the first external circuit area BA1 is less than The sum of the shortest distance c2 between the second external circuit area BA2 and the third side 130A, the length a2 of the second external circuit area BA2 along the first direction D1, and the distance b2 between the second external circuit area BA2. For example, the shortest distance c1 between the first external circuit area BA1 and the third side 130A is 3 mm to 7 mm, and the length a1 of each first external circuit area BA1 along the first direction D1 is 26 mm to 31 mm, the spacing b1 between the first external circuit areas BA1 is 40 mm to 45 mm, and the shortest distance c2 between the second external circuit area BA2 and the third side 130A is 39 mm to 43 mm The length a2 of the second external circuit area BA2 along the first direction D1 is 26 mm to 31 mm, and the distance b2 between the second external circuit areas BA2 is 40 mm to 45 mm. In this way, the foldable display panel 100 is folded along the foldable line 132, so that the After one side 126A and the second side 126B overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2. In other words, the first external circuit area BA1 can be prevented from contacting the second external circuit area BA2. Prevent the first pad 134 arranged on the first external circuit area BA1 and the second pad 136 arranged on the second external circuit area BA2 from colliding with each other and being damaged, and avoid being arranged on the first external circuit area BA1 The first printed circuit board 138 and the second printed circuit board 140 disposed on the second external circuit area BA2 collide with each other and are damaged.

Figure 5 is a schematic cross-sectional view taken along the line II-II' in Figure 2. Please refer to Figures 1, 2 and 5 together. The first printed circuit board 138 includes a flexible substrate 142 and is disposed on the flexible substrate The circuit layer 144 on 142, that is, the first printed circuit board 138 is a flexible printed circuit board (FPC). In this embodiment, the foldable display panel 100 further includes a driving chip 146 on the circuit layer 144, and the driving chip 146 is a Chip On Film (COF) structure. For example, the driver chip 146 may be electrically connected to the circuit layer 144 by using flip chip bonding technology. In other embodiments, the driver chip 146 may be electrically connected to the circuit layer 144 using other technologies, such as tape automated bonding (TAB) technology.

The foldable display panel 100 further includes an anisotropic conductive adhesive 148, and the circuit layer 144 of the first printed circuit board 138 is electrically connected to the first pad 134 through the anisotropic conductive adhesive 148. The anisotropic conductive adhesive 148 is disposed between the first pad 134 and the circuit layer 144 of the first printed circuit board 138. In this embodiment, the foldable display panel 100 further includes a driving chip 147, and the driving chip 147 is located on the second printed circuit board 140. The structure of the second printed circuit board 140 and its configuration relationship with the second pad 136 is similar to the structure of the first printed circuit board 138 and its configuration relationship with the first pad 134. The driver chip 147 and the second printed circuit board 136 The configuration relationship of the circuit board 140 is similar to the configuration relationship of the driver chip 146 and the first printed circuit board 138, so it will not be repeated here.

Figure 6 is a schematic top view of a foldable display panel 100a according to another embodiment of the present invention. Please refer to Figure 6. The foldable display panel 100a in Figure 6 is similar to the foldable display panel 100 in Figure 1. Discuss the differences between the two, the same or similarities will not be repeated. The sum of the shortest distance c1' between the first external circuit area BA1 and the third side 130A and the length a1' of the first external circuit area BA1 along the first direction D1 is smaller than that between the second external circuit area BA2 and the third side 130A The shortest distance c2'. For example, the shortest distance c1' between the first external circuit area BA1 and the third side 130A is 1 mm to 5 mm, and the length a1' of the first external circuit area BA1 along the first direction D1 is 50 mm To 55 mm, and the shortest distance c2' between the second external circuit area BA2 and the third side 130A is 68 mm to 72 mm. In this way, after the foldable display panel 100 is folded along the foldable line 132 so that the first side 126A and the second side 126B of the substrate 102 overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2, in other words, the first external circuit area BA1 can avoid contacting the second external circuit area BA2, thereby avoiding the first pad 134 disposed on the first external circuit area BA1 and the second external circuit area BA2 The second pads 136 on the upper side of the board collide with each other and are damaged, and prevent the first printed circuit board 138 arranged on the first external circuit area BA1 and the second printed circuit board 140 arranged on the second external circuit area BA2 from each other. Damaged by impact.

In this embodiment, the shortest distance d1' between the first external circuit area BA1 and the fourth side 130B is greater than the shortest distance d2' between the second external circuit area BA2 and the fourth side 130B and the second external circuit area BA2 The sum of the length a2' along the first direction D1. For example, the shortest distance d1' between the first external circuit area BA1 and the fourth side 130B is 68 mm to 72 mm, and the shortest distance d2' between the second external circuit area BA2 and the fourth side 130B is 1 mm to 5 mm, the length a2' of the second external circuit area BA2 along the first direction D1 is 50 mm to 55 mm. In this way, after the foldable display panel 100 is folded along the foldable line 132 so that the first side 126A and the second side 126B of the substrate 102 overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2, in other words, the first external circuit area BA1 can avoid contacting the second external circuit area BA2, thereby avoiding the first pad 134 disposed on the first external circuit area BA1 and the second external circuit area BA2 The second pads 136 on the upper side of the board collide with each other and are damaged, and prevent the first printed circuit board 138 arranged on the first external circuit area BA1 and the second printed circuit board 140 arranged on the second external circuit area BA2 from each other. Damaged by impact.

Fig. 7 is a schematic top view of a foldable display panel 100b according to another embodiment of the present invention, Fig. 8 is a schematic cross-sectional view taken along the line III-III' in Fig. 7, and the foldable display panel 100b in Fig. 7 is similar As for the foldable display panel 100 in FIG. 1, only the differences between the two will be discussed below, and the same or similarities will not be repeated. Referring to FIGS. 7 and 8, the driver chip 146b is configured on the substrate 102 in a chip on glass (COG) package, and the foldable display panel 100b further includes a driver chip 146b and a first pad 134 Between the anisotropic conductive adhesive 148b, the driving chip 146b is fixed on the first pad 134 through the anisotropic conductive adhesive 148b. The first printed circuit board 138b is located between the first external circuit area BA1 and the first side 126A, and the foldable display panel 100b can be connected to the first printed circuit by pins (not shown) arranged on the peripheral area NA of the substrate 102板138b. The second printed circuit board 140b is located between the second external circuit area BA2 and the second side 126B, and the foldable display panel 100b can be connected to the second printed circuit by pins (not shown) arranged on the peripheral area NA of the substrate 102板140b.

The structure of the second printed circuit board 140b and its configuration relationship with the second pad 136b are similar to the structure of the first printed circuit board 138b and its configuration relationship with the first pad 134b. The configuration relationship of the circuit board 140b is similar to the configuration relationship of the driver chip 146b and the first printed circuit board 138b, so it will not be repeated here.

The sum of the shortest distance c1" between the first external circuit area BA1 and the third side 130A and the length a1" of the first external circuit area BA1 along the first direction D1 is smaller than that between the second external circuit area BA2 and the third side 130A The shortest distance c2". For example, the shortest distance c1" between the first external circuit area BA1 and the third side 130A is 7 mm to 10 mm, the first external circuit area BA1 area along the first direction D1 Length a1" is 18 meters To 22 mm, and the shortest distance c2" between the second external circuit area BA2 and the third side 130A is 34 mm to 38 mm. As a result, the pair of foldable display panels along the foldable line 132 100 is folded so that the first side 126A and the second side 126B of the substrate 102 overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2, in other words, the first external circuit area BA1 can avoid contacting the second external circuit area BA1 The external circuit area BA2 can prevent the first pad 134 arranged on the first external circuit area BA1 and the second pad 136 arranged on the second external circuit area BA2 from colliding with each other and being damaged. The first printed circuit board 138b arranged between the first external circuit area BA1 and the first side 126A and the second printed circuit board 140 arranged between the second external circuit area BA2 and the second side 126B collide and be damaged .

In this embodiment, the number of the first external circuit areas BA1 is multiple, and the first external circuit areas BA1 are arranged along the first direction D1 at intervals of a pitch b1". The first external circuit areas BA1 and the third side 130A The sum of the shortest distance c1", the length a1" of the first external circuit area BA1 along the first direction D1, and the distance b1" between the first external circuit area BA1 is greater than the sum of the second external circuit area BA2 and the third side 130A The sum of the shortest distance c2" and the length a2" of the second external circuit area BA2 along the first direction D1. For example, the shortest distance c1" between the first external circuit area BA1 and the third side 130A is 7 mm to 10 mm, and the length a1" of each first external circuit area BA1 along the first direction D1 is 18 mm. The distance b1" between each first external circuit area BA1 is 32 mm to 36 mm, and the distance between the second external circuit area BA2 and the third side 130A is the longest The short distance c2" is 34 mm to 38 mm, and the length a2" of the second external circuit area BA2 along the first direction D1 is 18 mm to 22 mm. In this way, after the foldable display panel 100 is folded along the foldable line 132 so that the first side 126A and the second side 126B of the substrate 102 overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2, in other words, the first external circuit area BA1 can avoid contacting the second external circuit area BA2, thereby avoiding the first pad 134 disposed on the first external circuit area BA1 and the second external circuit area BA2 The second pads 136 on the upper side of the board collide with each other and are damaged, and prevent the first printed circuit board 138 arranged on the first external circuit area BA1 and the second printed circuit board 140 arranged on the second external circuit area BA2 from each other. Damaged by impact.

In this embodiment, the number of the second external circuit areas BA2 is multiple, and the second external circuit areas BA2 are arranged along the first direction D1 at intervals of b2". The first external circuit areas BA1 and the third side 130A The sum of the shortest distance c1", twice the length a1" of the first external circuit area BA1 along the first direction D1, and the distance b1" between the first external circuit areas BA1 is smaller than the sum of the second external circuit area BA2 and the first external circuit area BA2. The sum of the shortest distance c2" between the three sides 130A, the length a2" of the second external circuit area BA2 along the first direction D1, and the distance b2" between the second external circuit areas BA2. For example, the first external circuit The shortest distance c1" between the area BA1 and the third side 130A is 7 mm to 10 mm, and the length a1" of each first external circuit area BA1 along the first direction D1 is 18 mm to 22 mm. The distance b1" between an external circuit area BA1 is 32 mm to 36 mm, and the shortest distance c2" between the second external circuit area BA2 and the third side 130A The length a2" of the second external circuit area BA2 along the first direction D1 is between 18 mm and 22 mm, and the distance b2" between the second external circuit areas BA2 is 32 mm. To 36 mm. In this way, after the foldable display panel 100 is folded along the foldable line 132 so that the first side 126A and the second side 126B of the substrate 102 overlap each other, the first external circuit area BA1 does not overlap the second external circuit area BA2, in other words, the first external circuit area BA1 can avoid contacting the second external circuit area BA2, thereby avoiding the first pad 134 disposed on the first external circuit area BA1 and the second external circuit area BA2 The second pads 136 on the upper side of the board collide with each other and are damaged, and prevent the first printed circuit board 138 arranged on the first external circuit area BA1 and the second printed circuit board 140 arranged on the second external circuit area BA2 from each other. Damaged by impact.

The number of the first external circuit area BA1 depicted in FIG. 1, FIG. 6, and FIG. 7 is the same as the number of the second external circuit area BA2, but the present invention is not limited to this. In other embodiments, the number of the first external circuit area BA1 may be different from the number of the second external circuit area BA2.

Figure 9 is a perspective schematic view of a foldable display device 200 according to an embodiment of the present invention. Figure 10 is an exploded perspective view of the foldable display device 200 of Figure 9. Please refer to Figures 9 and 10 together. The foldable display device 200 includes a foldable display panel 202, a first housing 204, a second housing 206, a hinge member 208, a first support 210 and a second support 212. The foldable display device 200 may further include a touch panel (not shown) and a protective layer (not shown) sequentially disposed on the foldable display panel 202. The touch panel can be used to sense the user's touch operation. The protective layer is formed of a transparent hard material to transmit the display image of the foldable display panel 202 and protect the foldable display panel 202 from external impact.

The foldable display panel 202 includes a first flat area 202A, a second flat area 202B, and a foldable area 202C. The first flat area 202A and the second flat area 202B are located on both sides of the foldable area 202C, respectively. The first housing 204 and The second housing 206 is coupled to the foldable area 202C and is used for accommodating the foldable display panel 202, and the foldable line 132 passes through the center CT of the foldable area 202C. The rotation points of the first housing 204 and the second housing 206 are connected to each other by a hinge member 208 in the foldable area 202C. The hinge member 208 is used to connect the first housing 204 and the second housing 206.

The first housing 204 includes a first frame portion 204A and a first bottom portion 204B. The first frame portion 204A is used to surround the periphery of the first plane area 202A of the foldable display panel 202, and the first bottom portion 204B is used to accommodate the foldable display panel 202 of the first planar area 202A. The second housing 206 includes a second frame portion 206A and a second bottom portion 206B. The second frame portion 206A is used to surround the periphery of the second plane area 202B of the foldable display panel 202, and the second bottom portion 206B is used to accommodate the foldable display panel 202 of the second plane area 202B. The first frame portion 204A and the second frame portion 206A further include a curved protrusion 226 and a curved protrusion 228, respectively. The curved protrusion 226 is formed to protrude from the first frame portion 204A, and the curved protrusion 228 is formed from the second frame The end of the portion 206A protrudes.

The first support 210 and the second support 212 are used to support the foldable display panel 202 in a folded or unfolded state. For example, the first support 210 is located between the foldable display panel 202 and the first bottom 204B of the first housing 204, and is rotatably mounted to the first bottom 204B of the first housing 204 by a first hinge 216 The frame portion 204A. The second support 212 is located between the foldable display panel 202 and the second bottom portion 206B of the second housing 206 and is rotatably mounted to the second frame portion 206A of the second housing 206 by a second hinge 218. Therefore, when the foldable display device 200 is unfolded, the first support 210 and the second support 212 respectively support the foldable display panel 202 while rotating relative to the first hinge 216 and the second hinge 218 respectively.

In some embodiments, the foldable display device 200 further includes a side mounting portion 230. The side mounting portion 230 is provided corresponding to the side surface of the foldable area 202C of the foldable display panel 202, and the side mounting portion 230 is on one side. It is installed to the first bottom 204B and the second bottom 206B, and the side mounting portion 230 on the other side is connected to the respective rotation points of the first frame portion 204A and the second frame portion 206A.

The first bottom portion 204B includes a flat portion 220 and a first curved portion 222. The second bottom portion 206B includes a flat portion 221 and a second curved portion 224. The first curved portion 222 and the second curved portion 224 are used to connect the flat portion 220 and the flat portion. 221. The first curved portion 222 and the second curved portion 224 are connected to each other through the hinge member 208. When the foldable display device 200 is in the unfolded state, the first flat area 202A and the second flat area 202B of the foldable display panel 202 are respectively covered by the first bottom 204B of the first housing 204 and the second bottom of the second housing 206 206B is supported, and the foldable area 202C is supported by the hinge member 208.

In summary, the foldable display panel of at least one embodiment of the present invention has at least one first external circuit area and at least one second external circuit area. The first external circuit area and the second external circuit area are located opposite to the peripheral area. The first side and the second side, the first external circuit area and the second external circuit area are separated by a first distance along the first direction, and the substrate has a foldable line passing through the center of the display area, and the foldable line is located at the first external The circuit area and the second external circuit area are between and parallel to the first direction. Therefore, after the foldable display panel is folded along the foldable line so that the first side and the second side of the substrate overlap each other, the first external circuit area does not overlap the second external circuit area. In other words, the first external circuit area can be Avoid contact with the second external circuit area, thereby avoiding the first pad arranged on the first external circuit area and the second pad arranged on the second external circuit area from colliding with each other and being damaged, and avoiding The first printed circuit board arranged on the first external circuit area and the second printed circuit board arranged on the second external circuit area collide with each other and are damaged.

100, 100a, 100b: foldable display panel 102: substrate 102A: Surface 104: buffer layer 106: Switch semiconductor layer 108: switch insulation layer 110: drive semiconductor layer 110a: Passage area 110b: source region 110c: drain area 112: drive insulation layer 114: organic light-emitting diode 116: common electrode 118: Encapsulation layer 120: Upper electrode 122: Interlayer insulating layer 123: protective layer 124: Lower electrode 126A: First side 126B: second side 128: drive circuit 130A: third side 130B: Fourth side 132: Foldable line 134: The first pad 136: second pad 138: The first printed circuit board 140: The second printed circuit board 142: Flexible substrate 144: circuit layer 146,146b: driver chip 147,147b: driver chip 148,148b: Anisotropic conductive adhesive 200: Foldable display device 202: Foldable display panel 202A: the first plane area 202B: second plane area 202C: Foldable area 204: first shell 204A: The first frame part 204B: first bottom 206: second shell 206A: The second frame part 206B: second bottom 208: Hinge member 210: The first support 212: second support 216: The first hinge 218: second hinge 220: Plane Department 221: Plane Department 222: The first bend 224: second bend 226: curved protrusion 228: curved protrusion 230: side mounting part AA: Display area AR: pixel array a1,a1',a1'': length a2, a2', a2'': length BA1: The first external circuit area BA2: The second external circuit area b1,b1',b1'': spacing b2,b2',b2'': spacing C1: Capacitor c1,c1',c1'': the shortest distance c2,c2',c2'': the shortest distance CT: Center D1: First direction D2: second direction d1': shortest distance d2': shortest distance DE1: switch drain DE2: drive drain DL: Data line EL: organic light emitting layer FL1: The first signal line FL2: The second signal line FL3: The third signal line GE1: switch gate GE2: drive gate GI: Gate insulation layer GL: Gate line I-I': cut line II-II': Sectional line III-III': Sectional line NA: Surrounding area PE: pixel electrode PL: Shared power line PX: sub-pixel unit R: area S1: first distance SE1: switch source SE2: drive source T1: Switching thin film transistor T2: Drive thin film transistors TH: contact hole

Read the following detailed description and match the corresponding diagrams to understand many aspects of this disclosure. It should be noted that many of the features in the drawing are not drawn in actual proportions according to the standard practice in the industry. In fact, the size of the feature can be increased or decreased arbitrarily to facilitate the clarity of the discussion. FIG. 1 is a schematic top view of a foldable display panel according to an embodiment of the invention. Fig. 2 is an enlarged schematic diagram of the area R in Fig. 1. Fig. 3 is a schematic cross-sectional view taken along the line II' in Fig. 2. Figure 4 is a schematic top view of Figure 1 after being folded along the foldable line. Fig. 5 is a schematic cross-sectional view taken along the line II-II' in Fig. 2. FIG. 6 is a schematic top view of a foldable display panel according to another embodiment of the invention. FIG. 7 is a schematic top view of a foldable display panel according to another embodiment of the invention. Fig. 8 is a schematic cross-sectional view taken along the line III-III' in Fig. 7. FIG. 9 is a three-dimensional schematic diagram of a foldable display device according to an embodiment of the present invention. Fig. 10 is an exploded perspective view of the foldable display device of Fig. 9;

Domestic deposit information (please note in the order of deposit institution, date and number) without Foreign hosting information (please note in the order of hosting country, institution, date, and number) without

100: Foldable display panel

102: substrate

102A: Surface

126A: First side

126B: second side

128: drive circuit

130A: third side

130B: Fourth side

132: Foldable line

134: The first pad

136: second pad

138: The first printed circuit board

140: The second printed circuit board

146: driver chip

147: driver chip

Claims (9)

A foldable display panel includes: a substrate with a surface, a display area and a peripheral area on the surface, wherein the peripheral area is located on at least one side of the display area, and the peripheral area has at least one first external circuit Area and at least one second external circuit area, the first external circuit area and the second external circuit area are respectively located on a first side and a second side opposite to the peripheral area, the first external circuit area and the first external circuit area Two external circuit areas are separated by a first distance along a first direction, the substrate has a foldable line passing through the center of the display area, and the foldable line is located between the first external circuit area and the second external circuit area And parallel to the first direction, and the first side and the second side are respectively located on two sides of the foldable line; a pixel array is located in the display area and overlaps the foldable line, wherein the pixel The array is located between the first side and the second side, the pixel array includes a plurality of sub-pixel units, and the sub-pixel units are arranged in an array; a plurality of first pads are disposed on the first external circuit On the area; a plurality of first signal lines connected between the first pads and a part of the sub-pixel units; a plurality of second pads arranged on the second external circuit area; and a plurality of The second signal line is connected between the second pads and the other sub-pixel units. The foldable display panel according to claim 1, wherein the peripheral area has a third side and a fourth side opposite to each other, and the third side and the fourth side are located between the first side and the second side , The first external circuit area and The sum of the shortest distance between the third side and the length of the first external circuit area along the first direction is smaller than the shortest distance between the second external circuit area and the third side. The foldable display panel according to claim 2, wherein the number of the first external circuit areas is multiple, and the first external circuit areas are arranged at a first interval along the first direction, and the second The shortest distance between an external circuit area and the third side, the sum of the length of the first external circuit area along the first direction and the first distance is greater than the distance between the second external circuit area and the third side The sum of the shortest distance and the length of the second external circuit area along the first direction. The foldable display panel according to claim 2, wherein the number of the first external circuit areas is multiple, and the first external circuit areas are arranged at a first interval along the first direction, and the second The number of the two external circuit areas is multiple, and the second external circuit areas are arranged at a second interval along the first direction. The shortest distance between the first external circuit area and the third side is, Twice the length of the first external circuit area along the first direction, the sum of the first spacing is less than the shortest distance between the second external circuit area and the third side, and the second external circuit area along the first The sum of the length in one direction and the second distance. The foldable display panel according to claim 2, wherein the shortest distance between the second external circuit area and the third side is greater than the first external The length of the circuit area along the first direction. The foldable display panel according to claim 2, wherein the shortest distance between the first external circuit area and the fourth side is greater than the shortest distance between the second external circuit area and the fourth side and the second The sum of the length of the external circuit area along the first direction. The foldable display panel according to claim 1, further comprising: at least one driving chip disposed on the first external circuit area and electrically connected to the first pads. The foldable display panel according to claim 7, further comprising: an anisotropic conductive adhesive disposed on the first external circuit area, and the anisotropic conductive adhesive is located between the driving chip and the first pads between. The foldable display panel according to claim 1, further comprising: a plurality of scan lines arranged in the display area; and a plurality of data lines arranged in the display area, each of the sub-pixel units is electrically connected In one of the scan lines and one of the data lines, each sub-pixel unit includes at least one thin film transistor and an organic light emitting diode, and the organic light emitting diode is electrically connected The thin film transistor.

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