TWI733574B - Composite substrate and light-emitting diode - Google Patents

Abstract

A composite substrate including a substrate, a buffer layer, and a strain release layer. The buffer layer is disposed on the substrate. The strain release layer is disposed on the buffer layer, wherein the buffer layer is between the substrate and the strain release layer. A material of the strain release layer includes Al _1-xGa _xN, where 0≦x＜0.15. The strain release layer is doped with silicon to release a compressive strain due to the buffer layer. A concentration of silicon doped in the strain release layer is greater than 10 ¹⁹cm ^-3. A defect density of the strain release layer is less than or equal to 5×10 ⁹/cm ². A light-emitting diode is also provided.

Description

Composite substrate and light emitting diode

The technical field relates to a composite substrate and a light-emitting diode (LED).

In the epitaxial process of light-emitting diodes, if you want to grow N-type and P-type III-V semiconductor layers and quantum well layers and other semiconductor layers on the substrate, it is necessary to solve the problems of the substrate (such as sapphire substrate) and the above There is a difference in the lattice constant of the semiconductor layer. The difference in lattice constants will cause epitaxial defects, which in turn affects the luminous efficiency of the light-emitting diode. In order to solve the above-mentioned difference in lattice constants, a buffer layer with a smaller difference in lattice constants is generally formed before the semiconductor layer is grown.

On the other hand, in order to improve the quantum efficiency of light-emitting diodes, patterned sapphire substrates (PSS) have been developed to increase the light extraction rate through light scattering by the convex patterns on the substrate. At this time, if the aluminum nitride layer is used as the buffer layer, the high activity of aluminum atoms and the low surface mobility result in high dislocation density, high stitch thickness, rough surface or cracks in the aluminum nitride layer. And other issues.

An embodiment of the disclosure provides a composite substrate including a substrate and an aluminum nitride layer. The aluminum nitride layer is disposed on the upper surface of the substrate. Silicon is doped in the aluminum nitride layer to adjust the residual stress. The film thickness of the aluminum nitride layer is less than 3.5 microns, the defect density of the aluminum nitride layer is less than or equal to 5×10 ⁹ /cm ² , and the back of the aluminum nitride layer The root mean square roughness of the upper surface of the substrate is less than 3 nanometers (nm).

An embodiment of the present disclosure provides a method for manufacturing a composite substrate, including: preparing a substrate and forming an aluminum nitride layer on the upper surface of the substrate. Silicon is doped in the aluminum nitride layer to adjust the residual stress. The film thickness of the aluminum nitride layer is less than 3.5 microns, the defect density of the aluminum nitride layer is less than or equal to 5×10 ⁹ /cm ² , and the back of the aluminum nitride layer The root mean square roughness of the upper surface of the substrate is less than 3 nm.

An embodiment of the disclosure provides a composite substrate including a substrate, a buffer layer and a strain relief layer. The buffer layer is disposed on the substrate. The strain relief layer is disposed on the buffer layer, wherein the buffer layer is located between the substrate and the strain relief layer. The material of the strain relief layer includes Al _1-x Ga _x N, where 0≦x<0.15. The strain release layer is doped with silicon to release the compressive strain caused by the buffer layer. The concentration of silicon doped in the strain relief layer is greater than 10 ¹⁹ cm ^-3 . The defect density of the strain relief layer is less than or equal to 5×10 ⁹ /cm ² .

An embodiment of the present disclosure provides a light emitting diode including a substrate, a buffer layer, a strain relief layer, an N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, and an electrode contact layer. The buffer layer is disposed on the substrate. The strain relief layer is disposed on the buffer layer, wherein the buffer layer is located between the substrate and the strain relief layer. The material of the strain relief layer includes Al _1-x Ga _x N, where 0≦x<0.15. The strain release layer is doped with silicon to release the compressive strain caused by the buffer layer. The concentration of silicon doped in the strain relief layer is greater than 10 ¹⁹ cm ^-3 . The defect density of the strain relief layer is less than or equal to 5×10 ⁹ /cm ² . The N-type semiconductor layer is arranged on the strain relief layer. The material of the N-type semiconductor layer includes Al _1-z Ga _z N, where z>x+0.15. The light-emitting layer is disposed on the N-type semiconductor layer. The P-type semiconductor layer is disposed on the light-emitting layer. The electrode contact layer is configured on the P-type semiconductor layer.

In order to make the above-mentioned features and advantages of the present disclosure more obvious and understandable, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

1A and FIGS. 2 to 5 are cross-sectional schematic diagrams of the manufacturing process of the composite substrate according to an embodiment of the disclosure, and FIG. 1B is a schematic top view of the substrate in FIG. 1A. The manufacturing method of the composite substrate of this embodiment includes the following steps. First, referring to FIGS. 1A and 1B, a substrate 110 is prepared. The upper surface 112 of the substrate 110 includes a plurality of nano-patterned recesses 114, and the nano-patterned recesses 114 are separated from each other. In this embodiment, the substrate 110 is, for example, a sapphire substrate, and the depth H of the nano-patterned recesses 114 is in the range of 150 nanometers to 1.5 micrometers, preferably 100 nanometers to 1 micrometer, more preferably 200 nanometers. From nanometers to 500 nanometers. And the width W of these nano-patterned recesses is in the range of 200 nanometers to 1.5 micrometers, preferably 300 nanometers to 800 nanometers, more preferably 400 nanometers to 600 nanometers. In this embodiment, the method for forming these nano-patterned recesses 114 is, for example, to wet-etch the upper surface of the unprocessed sapphire substrate to form these nano-patterned recesses 114, so the etching solution will follow a plurality of Different crystal planes etch the sapphire substrate, and a boundary line 113 of crystal planes is generated between two adjacent crystal planes. In this embodiment, a plurality of crystal faces of the nano-patterned recess 114 are in a chamfered cone shape (for example, three crystal faces are in an inverted triangular cone shape), and a plurality of crystal faces (for example, at least three, in this embodiment are three For example) The boundary line 113 intersects at the bottom vertex of the inverted triangular pyramid. In this embodiment, the sidewalls of the nano-patterned recess 114 have a chamfered cone shape, and the bottom of the nano-patterned recess 114 has a pointed shape. However, in other embodiments, the method for forming these nano-patterned recesses 114 can also be dry etching, and the nano-patterned recesses 114 formed by this method do not have the aforementioned boundary line 113.

In this embodiment, these nano-patterned recesses 114 are periodically arranged on the upper surface 112 of the substrate 110. However, in other embodiments, the nano-patterned recesses 114 may also be arranged irregularly.

Next, referring to FIG. 2, a first aluminum nitride layer 120 is formed on the upper surface 112 of the substrate 110. The method for forming the first aluminum nitride layer 120 may be metal organic chemical vapor deposition (MOCVD), sputtering, or hydride vapor phase epitaxy (HVPE). . In this embodiment, the film thickness T1 of the first aluminum nitride layer 120 is greater than the depth H of the nano-patterned recess 114.

Then, referring to FIG. 3 again, a planarization layer 130 is formed on the first aluminum nitride layer 120. After the planarization layer 130 covers the first aluminum nitride layer 120, the upper surface of the planarization layer 130 is lower than that of the first aluminum nitride layer 120. The upper surface of the aluminum oxide layer 120 is flat. In this embodiment, the material of the planarization layer 130 is spin-on glass, for example. However, in other embodiments, the material of the planarization layer 130 may also be a polymer.

Afterwards, referring to FIG. 4, the material of the planarization layer 130 is gradually removed. When the material of the planarization layer 130 is gradually removed to the bottom of the planarization layer 130, part of the first aluminum nitride is also gradually removed at the same time. The first aluminum nitride layer 120 is flattened to form a first aluminum nitride layer 121 with a relatively flat upper surface. In this embodiment, the method of gradually removing the material of the planarization layer 130 is dry etching, such as an inductively coupled plasma (ICP) etching method, and the etching conditions can be selected so that the planarization layer The etching rate of 130 is substantially the same as the etching rate of the first aluminum nitride layer 121, so when all the materials of the planarization layer 130 are etched, part of the first aluminum nitride layer 120 will be etched at this time Then, the top surface topography of the planarization layer 130 is transferred to the top surface of the first aluminum nitride layer 121 to form a relatively flat first aluminum nitride layer 121. However, in other embodiments, the method of gradually removing the material of the planarization layer 130 may also be mechanical polishing.

In addition, after the material of the planarization layer 130 is gradually removed, the planarized first aluminum nitride layer 121 may be annealed, for example, a high-temperature annealing process above 1500° C. may be performed. The high-temperature annealing treatment can initiate the recrystallization of the first aluminum nitride layer 121 and greatly reduce the dislocation density in the film of the first aluminum nitride layer 121.

Thereafter, referring to FIG. 5, a second aluminum nitride layer 140 is formed on the planarized first aluminum nitride layer 121, for example, the second aluminum nitride layer 140 is formed by metal organic vapor deposition. Since the second aluminum nitride layer 140 is formed on the planarized first aluminum nitride layer 121, the root mean square roughness of the second aluminum nitride layer 140 opposite to the upper surface 142 of the substrate 110 ) Less than 3nm. Since the second aluminum nitride layer 140 is formed on the first aluminum nitride layer 121 with a relatively flat upper surface, the stitching thickness of the second aluminum nitride layer 140 can be smaller. In this embodiment, the film thickness T2 of the aluminum nitride layer 150 formed by the first aluminum nitride layer 121 and the second aluminum nitride layer 140 is less than 3.5 microns. In addition, since the second aluminum nitride layer 140 is formed on the first aluminum nitride layer 121 with a relatively flat upper surface, the aluminum nitride layer 150 may not have holes or smaller holes, and the aluminum nitride layer 150 The defect density is less than or equal to 5×10 ⁹ /cm ² , and it has good crystal quality. Smaller holes in the aluminum nitride layer 150 means that the aluminum nitride layer 150 has multiple holes inside, and the size of each hole in at least one direction parallel to the lateral direction of the substrate 110 and perpendicular to the longitudinal direction of the substrate 110 is less than 50 Nano. In this embodiment, the thickness of the second aluminum nitride layer 140 (which is equal to the film thickness T2 minus the film thickness T3 of the first aluminum nitride layer 121) is less than 600 nm.

In this embodiment, the aluminum nitride layer 150 formed after the step of FIG. 5 is disposed on the upper surface 112 of the substrate 110, and the aluminum nitride layer 150 faces the upper surface of the substrate 110 (that is, the second nitride layer). The root mean square roughness of the upper surface 142) of the aluminum layer 140 is less than 3 nm. In this way, the composite substrate 100 including the substrate 110 and the aluminum nitride layer 150 is formed. The composite substrate 100 can be formed on the N-type semiconductor layer, the quantum well layer and the P-type semiconductor layer of the light emitting diode, and helps to improve the crystal quality of the N-type semiconductor layer, the quantum well layer and the P-type semiconductor layer .

In this embodiment, when the second aluminum nitride layer 140 is formed on the first aluminum nitride layer 121, silicon may be doped in the second aluminum nitride layer 140 to control the residual stress. In this embodiment, the doping concentration of silicon in the second aluminum nitride layer 140 is greater than 2×10 ¹⁷ cm ⁻³ and less than 1×10 ²⁰ cm ⁻³ . In a preferred embodiment, the doping concentration of silicon in the second aluminum nitride layer 140 is greater than 2×10 ¹⁸ cm ⁻³ and less than 5×10 ¹⁹ cm ⁻³ . In this embodiment, due to the silicon doping in the second aluminum nitride layer 140, the in-plane lattice constant of the second aluminum nitride layer 140 is greater than that of the first aluminum nitride layer 121. Inner lattice constant. In addition, in this embodiment, the silicon concentration of the aluminum nitride layer 150 on the side adjacent to the substrate 110 (ie, the lower side in the figure) is less than that of the aluminum nitride layer 150 on the side away from the substrate 110 (ie, the upper side in the figure). ) The silicon concentration. In this embodiment, the distance from the position of the highest silicon concentration in the aluminum nitride layer (that is, the position on the lower side of the second aluminum nitride layer 140) to the upper surface of the substrate 110 in the vertical direction perpendicular to the substrate 110 is greater than 600nm.

In the composite substrate 100 and its manufacturing method of this embodiment, since a plurality of nano-patterned recesses 114 separated from each other are used on the upper surface 112 of the substrate 110, a nano-patterned recess 114 with a recessed nano-pattern is used. Rice patterned substrates replace traditional patterned substrates with raised nano-patterns, which can greatly reduce the difficulty of innate grain stitching of aluminum nitride epitaxy. In addition, in this embodiment, the method for forming the nano-patterned recess 114 may be a wet etching method, which helps to improve the epitaxial quality of aluminum nitride directly on it. Furthermore, by forming the planarization layer 130 and then gradually removing the material of the planarization layer 130, the surface of the first aluminum nitride layer 121 is planarized, and the first aluminum nitride layer 121 is planarized. Annealing the layer 121 can further improve the crystal quality of the aluminum nitride layer 150, reduce the difficulty of stitching, and expand the design space of the composite substrate 100.

Fig. 6A is a (002) X-ray rocking curve of three different samples of the composite substrate of Fig. 5 after the second aluminum nitride layer is grown, and Fig. 6B is a composite of Fig. 5 (102) X-ray swing curves of three different samples of the substrate after the growth of the second aluminum nitride layer. Here, sample A, sample B, and sample C are used to verify the crystal quality of this embodiment in FIGS. 4, 5, 6A, and 6B. Sample A refers to a sample in which the first aluminum nitride layer 121 is formed on the substrate 110, but the first aluminum nitride layer 121 has not been annealed, and the film thickness T3 of the first aluminum nitride layer 121 is 300 nm. Sample B refers to a sample in which the first aluminum nitride layer 121 is formed on the substrate 110, the first aluminum nitride layer 121 has been annealed, and the film thickness T3 of the first aluminum nitride layer 121 is 300 nm. Sample C refers to a sample in which the first aluminum nitride layer 121 is formed on the substrate 110, the first aluminum nitride layer 121 has been annealed, and the film thickness T3 of the first aluminum nitride layer 121 is 600 nm. When the second aluminum nitride layer 140 has not been formed on Sample A, Sample B, and Sample C, the full width at half maximum of the (002) X-ray swing curve is 50 arcsec, 30 arcsec, and 70 arcsec. , And the half-height width of its (102) X-ray swing curve is greater than 2000 arc seconds, 392 arc seconds and 371 arc seconds, respectively. The (002) X-ray swing curve and the (102) X-ray swing curve after forming the second aluminum nitride layer 140 on the sample A, the sample B, and the sample C are respectively shown in FIG. 6A and FIG. 6B. After sample A, sample B, and sample C form the second aluminum nitride layer 140, the full width at half maximum of the (002) X-ray swing curve is 420 arcsec, 216 arcsec, and 144 arcsec, respectively. (102) The full width at half maximum of the X-ray swing curve is 560 arcsec, 400 arcsec and 280 arcsec, respectively. In this embodiment, the FWHM of the (002) X-ray swing curve of the aluminum nitride layer 150 is less than or equal to 216 arcsec (for example, less than 150 arcsec), and the (102) X-ray of the aluminum nitride layer 150 The full width at half maximum of the swing curve is less than or equal to 400 arcsec (for example, less than 350 arcsec). It can be verified from the above experimental data that the annealing treatment can effectively improve the crystal quality of the first aluminum nitride layer 121 before the second aluminum nitride layer 140 is grown, and a sufficient thickness of the first aluminum nitride layer 121 is helpful for further improvement. The crystal quality of the second aluminum nitride layer 140. In this embodiment, finally, the full width at half maximum of the (102) X-ray swing curve of the aluminum nitride layer 150 of the composite substrate 100 can reach 260 arcsec, and the converted row density is about 4×10 ⁸ cm ^-2 .

FIG. 7 is the Raman spectra of three different samples after the second aluminum nitride layer 140 is grown. The sample X in FIG. 7 means that the first aluminum nitride layer 121 is formed on the substrate 110, but the first aluminum nitride layer 121 has not undergone annealing treatment, and the first aluminum nitride layer 121 is grown on the first aluminum nitride layer 121 without doping silicon. The aluminum nitride layer 140, the sample Y refers to the formation of the first aluminum nitride layer 121 on the substrate 110, but the first aluminum nitride layer 121 has been annealed and grown on the first aluminum nitride layer 121 without doping The second aluminum nitride layer 140 of silicon. Sample Z refers to the formation of the first aluminum nitride layer 121 on the substrate 110, but the first aluminum nitride layer 121 has been annealed and grown on the first aluminum nitride layer 121 The second aluminum nitride layer 140 is doped with silicon. The thickness of the aluminum nitride layer 150 of samples X, Y, and Z in FIG. 7 are 2.11 micrometers, 2.12 micrometers, and 2.13 micrometers, respectively, and the warpages of samples X, Y, and Z in FIG. 7 are 20.3 micrometers, respectively , 60.8 microns and 46.4 microns, and the E2 high mode (E2 high mode) frequency shifts of the Raman spectra of samples X, Y, and Z in Figure 7 are 658.9 cm ^-1 , 661.7 cm ^-1 and 659.6 cm ^{-respectively 1} . In this embodiment, the frequency shift of the E2 high mode of the Raman spectrum of the composite substrate 100 is less than or equal to 659.6 cm ^-1 . From the frequency shift of the Raman spectrum, it can be known from the literature that the stress values of the samples X, Y, and Z in Figure 7 are -1 GPa, -1.96 GPa, and -1.24 GPa, respectively. According to the warpage, the history can be found The Stoney equation calculated the stress values of samples X, Y, and Z in Figure 7 to be -0.54 GPa, -1.61 GPa, and -1.22 GPa, respectively. Negative stress value means compressive stress to distinguish it from tensile stress with positive stress value. The greater the absolute value of the negative stress value, the greater the compressive stress. In this embodiment, the value of the residual stress of the composite substrate 100 is greater than or equal to -1.24 GPa.

FIG. 8 is a graph of (102) X-ray swing curve half-height versus warpage of three different samples X, Y, and Z of the composite substrate of FIG. 7 after the second aluminum nitride layer 140 is grown. The warpages of samples X, Y, and Z in Fig. 8 are 20.3 microns, 60.8 microns, and 46.4 microns, respectively. After sample X, sample Y, and sample Z form the second aluminum nitride layer 140, the full width at half maximum of the (102) X-ray swing curve is 521 arcsec, 259 arcsec, and 254 arcsec, respectively. From the above experimental data, it can be seen that the high-temperature annealing treatment effectively improves the crystal quality, but the residual thermal compression strain causes large wafer warpage after the second aluminum nitride layer 140 is grown, and the second aluminum nitride layer 140 The method of doping silicon can counteract this strain while maintaining good crystalline quality.

FIG. 9 is a schematic cross-sectional view of a composite substrate according to another embodiment of the disclosure. Please refer to FIG. 9, the composite substrate 100 a of this embodiment is similar to the composite substrate 100 of FIG. 5, but the main differences between the two are as follows. The upper surface 112a of the substrate 110a of the composite substrate 100a of this embodiment is a flat surface without the nano-patterned recess 114 as shown in FIG. 5. In addition, the method for manufacturing the composite substrate 100a of this embodiment is to directly form an aluminum nitride layer 150 on the upper surface 112a of the substrate 110a, and the aluminum nitride layer 150 is doped with silicon to effectively control the residual stress. The material of the substrate 110a of this embodiment is the same as that of the substrate 110 of FIG. 5, and the method of forming the aluminum nitride layer 150 of this embodiment may be a metal organic chemical vapor deposition method.

FIG. 10 is a schematic cross-sectional view of a light-emitting diode according to an embodiment of the disclosure. 10, the light-emitting diode 200 of this embodiment includes a substrate 110a, a buffer layer 121b, a strain relief layer 140b, an N-type semiconductor layer 220, a light-emitting layer 230, a P-type semiconductor layer 240, and a The electrode contact layer 250. The substrate 110a, the buffer layer 121b and the strain relief layer 140b form a composite substrate 100b. The composite substrate 100b of this embodiment is similar to the composite substrate 100a of FIG. 9, and the main differences between the two are as follows. The buffer layer 121b is disposed on the substrate 110a, and the strain relief layer 140b is disposed on the buffer layer 121b, wherein the buffer layer 121b is located between the substrate 110a and the strain relief layer 140b. The material of the buffer layer 121b is the same as the material of the aforementioned first aluminum nitride layer 121, and like the aforementioned first aluminum nitride layer 121, the buffer layer 121b is an annealed film layer. In this embodiment, the half-height width of the (102) X-ray swing curve of the buffer layer 121b is less than 350 arc seconds, and the threading dislocation density of the buffer layer is less than 2×10 ⁹ cm ^-2 . It means that the buffer layer 121b has good epitaxial quality.

The material of the strain relief layer 140b includes Al _1-x Ga _x N, where 0≦x<0.15. For example, the strain relief layer 140b is an Al _1-x Ga _x N layer, and when x is equal to zero, the strain relief layer 140b is an aluminum nitride layer.

The strain release layer 140b is doped with silicon to release the compressive strain caused by the buffer layer 121b. The concentration of silicon doped in the strain relief layer 140b is greater than 10 ¹⁹ cm ^-3 . Since the buffer layer 121b is annealed and is compressively strained, when an aluminum nitride layer that is not doped with silicon is formed on the buffer layer 121b, it will have a large compressive strain. Although the undoped silicon aluminum nitride layer can have good epitaxial quality, the aforementioned compressive strain plus the other caused by the lattice constant mismatch between the aluminum nitride layer and the AlGaN layer (ie, the N-type semiconductor layer) A compressive strain can make it difficult to control the strain of the AlGaN layer, which reduces the epitaxial quality of the AlGaN layer and multiple film layers above it. In this embodiment, the strain relief layer 140b is doped with high-concentration silicon, and the silicon generates many vacancy and gradually releases the compressive strain of the crystal. Therefore, the strain relief layer 140b can have a small defect density and good epitaxial quality, and the good epitaxial quality can be inherited by these film layers above the strain relief layer 140b. In this embodiment, the defect density of the strain relief layer 140b is less than or equal to 5×10 ⁹ /cm ² . In addition, in this embodiment, the distance T4 between the lower surface 142b of the strain relief layer 140b and the upper surface 112b of the substrate 110a is less than 600 nm, and the lower surface 142b of the strain relief layer 140b and the upper surface 112b of the substrate 110a are mutually face.

The N-type semiconductor layer 220 is disposed on the strain relief layer 140b. The material of the N-type semiconductor layer 220 includes Al _1-z Ga _z N, where z>x+0.15. The light-emitting layer 230 is disposed on the N-type semiconductor layer 220. The P-type semiconductor layer 240 is disposed on the light-emitting layer 230. The electrode contact layer 250 is disposed on the P-type semiconductor layer 240. In this embodiment, since the strain relief layer 140b has a small defect density, good epitaxial quality and small compressive strain, the N-type semiconductor layer 220, the light-emitting layer 230, and the P-type semiconductor layer 240 can have better Epitaxy quality.

In this embodiment, the light emitting diode 200 further includes an aluminum graded layer 210 disposed between the strain relief layer 140b and the N-type semiconductor layer 220. The material of the aluminum graded layer 210 includes Al _1-y Ga _y N, Where x≦y≦z. In this embodiment, the aluminum graded layer 210 is an aluminum gallium nitride layer. Along the direction D1 from the strain relief layer 140b to the N-type semiconductor layer 220, the aluminum concentration of the aluminum graded layer 210 gradually changes from the aluminum concentration close to the strain relief layer 140b to the aluminum concentration close to the N-type semiconductor layer 220.

In this embodiment, the electrode contact layer 250 has a superlattice structure. The superlattice structure includes a plurality of Al _1-w Ga _w N layers 252 and a plurality of Al _1-v Ga _v N layers 254 alternately stacked, wherein w is not equal to v. The period P1 of this superlattice structure can be less than 4 nm. This superlattice structure can reduce the absorbance of the light emitted by the light-emitting layer 230 by the electrode contact layer 250, thereby improving the light extraction efficiency of the light-emitting diode 200. In this embodiment, the absorbance of the light emitted by the light-emitting layer 230 by the electrode contact layer 250 is less than 10%. However, in other embodiments, the electrode contact layer 250 may be a single AlGaN layer without a superlattice structure.

In this embodiment, the light-emitting layer 230 may have multiple quantum well layers, and the multiple quantum well layers have multiple barrier layers 232 and multiple well layers 234 alternately stacked. The energy barrier layer 232 and the energy well layer 234 may be aluminum gallium nitride layers, wherein the mole fraction of aluminum of the energy barrier layer 232 is different from the mole fraction of aluminum of the energy well layer 234. The aluminum concentration of the energy well layer 234 is less than the aluminum concentration of the energy barrier layer 232.

In addition, the electrode 260 and the electrode 270 may be respectively disposed on the N-type semiconductor layer 220 and the electrode contact layer 250. By applying a forward voltage between the electrode 270 and the electrode 260, the light-emitting layer 230 can emit light, such as ultraviolet light C (UVC). In other embodiments, the light-emitting layer 230 may emit light, for example, ultraviolet light B (UVB). In this embodiment, the electrode 260 and the electrode 270 may be metal electrodes.

Figure 11 shows the X-ray ω-2θ scan of an aluminum nitride layer without silicon doping (labeled as "undoped MOCVD aluminum nitride template") and the X-ray ω of the buffer layer and the strain relief layer in Figure 10 -2θ scan (labeled as "aluminum nitride buffer layer with compressive stress and silicon-doped aluminum nitride"). The unit "a.u." in Figure 11 refers to the "arbitrary unit". 10 and FIG. 11, it can be seen from FIG. 11 that when silicon is doped in the strain relief layer 140b, the peak of the X-ray ω-2θ scan of the aluminum nitride layer including the buffer layer 121b and the strain relief layer 140b ) Broadens or splits into two crests (ie, the crest of 121b and the crest of 140b shown in FIG. 11), which means that the strain in the strain relief layer 140b is released.

FIG. 12 is a composition distribution diagram obtained by measuring the light-emitting diode of FIG. 10 with a secondary ion mass spectrometer (SIMS). In Fig. 12, the unit "c/s" refers to counts per second. 10 and 12, it can be seen from FIG. 12 that the concentration of silicon doped in the strain relief layer 140b is greater than 10 ¹⁹ cm ^-3 , and the aluminum concentration of the aluminum graded layer 210 is from close to that of the strain relief layer 140b The concentration of aluminum gradually changes to be close to that of the N-type semiconductor layer 220.

FIG. 13 is a scanning transmission electron microscopy (STEM) image of the lower part of the light-emitting diode in FIG. 10. Fig. 14 is a scanning transmission electron microscopy image of the upper part of the light-emitting diode in Fig. 10. 10 and FIG. 13, in this embodiment, the dislocation 143b in the strain relief layer 140b is inclined at an inclination angle θ with respect to the normal of the substrate, and the inclination angle θ falls from 10 degrees to Within 30 degrees. FIG. 13 shows that the three tilt angles θ are approximately 13 degrees, 26 degrees, and 15 degrees, for example. If the strain relief layer 140b is replaced by an aluminum nitride layer that is not doped with silicon, the rows in this layer will be irregular or curved. In contrast, the strain relief layer 140b has a relatively regular inclination, which represents that the strain relief layer 140b has better epitaxial quality. It can be seen from FIG. 14 that the multiple film layers above the strain relief layer 140b also have good epitaxial quality.

FIG. 15 shows the absorbance spectra of the two electrode contact layers and the electroluminescence (EL) spectra of the light-emitting layer in FIG. 10. The curve labeled "p-SPSL 12.5Å/12.5Å" is the absorbance spectrum curve of the electrode contact layer 250 in FIG. 10, wherein each of the Al _1-w Ga _w N layers 252 has a thickness of 12.5 Å, and Each of these Al _1-v Ga _v N layers 254 has a thickness of 12.5 Å. Furthermore, for example, _{w of these Al 1-w} Ga _w N layers 252 (a plurality of black lines in FIG. 14) may be 0.6, and these Al _1-v Ga _v N layers 254 (a plurality of black lines in FIG. 14) (Bright line) v can be 0.36. The curve labeled "p-GaN contact layer" is the absorbance spectrum curve of the electrode contact layer, where the electrode contact layer is a single p-type gallium nitride layer without a superlattice structure. The curve labeled "EL" is the electroluminescence spectrum of the light-emitting layer 230. By comparing the three curves, it can be seen that the electrode contact layer 250 with the superlattice structure in FIG. 10 absorbs less light from the light emitting layer 230, so the light emitting diode 200 has better light extraction efficiency.

FIG. 16 is a schematic cross-sectional view of a light-emitting diode according to another embodiment of the disclosure. Please refer to FIG. 16, the light-emitting diode 200c of this embodiment is similar to the light-emitting diode 200 of FIG. 10, and the main difference between the two is that the composite substrate 100c has multiple nano patterns as shown in FIG. 1A. The recessed substrate 110 (ie, nano-patterned sapphire substrate), and the buffer layer formed on the substrate 110 is the first aluminum nitride layer 121 in FIG. 5. The manufacturing method of the first aluminum nitride layer 121 has been described in the foregoing embodiment, and will not be repeated here.

In this embodiment, the strain relief layer 140b does not have any observable holes, which means that the holes in the strain relief layer are oriented in at least one of a horizontal direction parallel to the substrate 110 and a vertical direction perpendicular to the substrate 110. The size is less than 50 nanometers, and the holes can be caused by the nano-patterned depressions of the substrate 110.

FIG. 17 shows the electroluminescence intensity of the multiple light-emitting diodes of FIG. 10 and FIG. 16. Please refer to Figure 17, the data point labeled "UVC LED on FSS" refers to the electroluminescence intensity of the light-emitting diode 200 in Figure 10, and the data point labeled "UVC LED on NPSS" refers to Figure 16 The electroluminescence intensity of the light-emitting diode 200c. The horizontal axis of FIG. 17 refers to the test serial numbers of a plurality of different light-emitting diode wafers that can effectively emit light. The numbers below 23 are light emitting diodes that do not use the strain relief layer 140b and the electrode contact layer 250 with a superlattice structure, and the numbers 24 and above are light emitting diodes that use the strain relief layer 140b and the electrode contact layer 250 with a superlattice structure. Diode 200 or 200c. It can be seen from FIG. 17 that by using the strain relief layer 140b and the electrode contact layer 250 with a superlattice structure, the electroluminescence intensity of the light emitting diode 200 is increased by at least about 50%.

In summary, in the composite substrate and the manufacturing method thereof of the disclosed embodiments, since a plurality of nano-patterned recesses separated from each other are used on the upper surface of the substrate, a nano-patterned recess with a recess is used. Patterned nano-patterned substrates replace the traditional patterned substrates with raised nano-patterns, thus greatly reducing the difficulty of innate grain stitching of aluminum nitride epitaxy. In addition, in the embodiment of the present disclosure, the method for forming the nano-patterned recesses may be a wet etching method, which helps to improve the epitaxial quality of aluminum nitride directly on it. Furthermore, in the embodiment of the present disclosure, the surface of the first aluminum nitride layer is flattened by forming the flattening layer and then gradually removing the material of the flattening layer. Annealing the first aluminum nitride layer can further improve the crystal quality of the aluminum nitride layer, reduce the difficulty of stitching, and expand the design space of the composite substrate. In the composite substrate and light emitting diode of the embodiment of the disclosure, a strain relief layer doped with high concentration silicon is used, and the silicon will generate many vacancies and gradually release the compressive strain in the crystal. Therefore, the strain relief layer can have a small defect density and good epitaxial quality, and the good epitaxial quality can be inherited by multiple film layers above the strain relief layer.

Although the present disclosure has been disclosed in the above embodiments, it is not intended to limit the present disclosure. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of this disclosure. Therefore, The scope of protection of this disclosure shall be subject to those defined by the attached patent scope.

100, 100a, 100b, 100c: composite substrate 110, 110a: substrate 112, 112a, 112b, 142: upper surface 113: boundary line 114: nano-patterned recess 120, 121: first aluminum nitride layer 121b: buffer Layer 130: planarization layer 140: second aluminum nitride layer 140b: strain relief layer 142b: lower surface 143b: differential row 150: aluminum nitride layer 200, 200c: light-emitting diode 210: aluminum gradient layer 220: N-type Semiconductor layer 230: Light emitting layer 232: Energy barrier layer 234: Energy well layer 240: P-type semiconductor layer 250: Electrode contact layer 252: Al _1-w Ga _w N layer 254: Al _1-v Ga _v N layer 260, 270 : Electrode D1: direction H: depth P1: period T1, T2, T3, T4: film thickness W: width θ: tilt angle

1A and FIGS. 2 to 5 are schematic cross-sectional views of the manufacturing process of the composite substrate according to an embodiment of the disclosure. FIG. 1B is a schematic top view of the substrate in FIG. 1A. FIG. 6A is a (002) X-ray swing curve diagram of three different samples of the composite substrate of FIG. 5 after the second aluminum nitride layer has grown. 6B is a (102) X-ray swing curve diagram of three different samples of the composite substrate of FIG. 5 after the second aluminum nitride layer has grown. FIG. 7 is the Raman spectra of three different samples of the composite substrate after the second aluminum nitride layer is grown. FIG. 8 is a graph of (102) X-ray swing curve half-height versus warpage of three different samples of the composite substrate of FIG. 7 after the second aluminum nitride layer is grown. FIG. 9 is a schematic cross-sectional view of a composite substrate according to another embodiment of the disclosure. FIG. 10 is a schematic cross-sectional view of a light-emitting diode according to an embodiment of the disclosure. FIG. 11 shows the X-ray ω-2θ scan of an aluminum nitride layer without silicon doping and the X-ray ω-2θ scan of the buffer layer and the strain relief layer in FIG. 10. Fig. 12 is a composition distribution diagram obtained by measuring the light-emitting diode of Fig. 10 with a secondary ion mass spectrometer. Fig. 13 is a scanning transmission electron microscopy image of the lower part of the light-emitting diode in Fig. 10. Fig. 14 is a scanning transmission electron microscopy image of the upper part of the light-emitting diode in Fig. 10. FIG. 15 shows the absorbance spectra of the two electrode contact layers and the electroluminescence spectra of the light-emitting layer in FIG. 10. FIG. 16 is a schematic cross-sectional view of a light-emitting diode according to another embodiment of the disclosure. FIG. 17 shows the electroluminescence intensity of the multiple light-emitting diodes of FIG. 10 and FIG. 16.

100b: Composite substrate

110a: substrate

112b: upper surface

121b: buffer layer

140b: strain relief layer

142b: lower surface

200: LED

210: Aluminum gradient layer

220: N-type semiconductor layer

230: light-emitting layer

232: Energy Barrier Layer

234: Energy Well Layer

240: P-type semiconductor layer

250: Electrode contact layer

252: Al _1-w Ga _w N layer

254: Al _1-v Ga _v N layer

260, 270: Electrode

D1: direction

P1: Period

T4: Film thickness

Claims (20)

A composite substrate includes: a substrate; a buffer layer disposed on the substrate; and a strain relief layer disposed on the buffer layer, wherein the buffer layer is located between the substrate and the strain relief layer, and the strain The material of the release layer includes Al _1-x Ga _x N, where 0≦x<0.15, the strain release layer is doped with silicon to release the compressive strain caused by the buffer layer, and the strain release layer is doped with silicon The concentration is greater than 10 ¹⁹ cm ^-3 , and the defect density of the strain release layer is less than or equal to 5×10 ⁹ /cm ² . The composite substrate according to claim 1, wherein the buffer layer is an aluminum nitride layer. The composite substrate according to claim 1, wherein the full width at half maximum of the (102) X-ray swing curve of the buffer layer is less than 350 arcsec. The composite substrate according to claim 1, wherein the distance between the lower surface of the strain relief layer and the upper surface of the substrate is less than 600 nm, and the lower surface of the strain relief layer and the upper surface of the substrate Face each other. The composite substrate according to claim 1, wherein the differential row in the strain relief layer is inclined at an inclination angle with respect to the normal line of the substrate, and the inclination angle falls within a range from 10 degrees to 30 degrees. The composite substrate according to claim 1, wherein the strain relief layer does not have observable holes. The composite substrate according to claim 1, wherein the buffer layer is an annealed film layer. The composite substrate according to claim 1, wherein the line offset density of the buffer layer is less than 2×10 ⁹ cm ^-2 . A light emitting diode includes: a substrate; a buffer layer disposed on the substrate; a strain relief layer disposed on the buffer layer, wherein the buffer layer is located between the substrate and the strain relief layer, and the strain The material of the release layer includes Al _1-x Ga _x N, where 0≦x<0.15, the strain release layer is doped with silicon to release the compressive strain caused by the buffer layer, and the strain release layer is doped with silicon The concentration is greater than 10 ¹⁹ cm ^-3 , and the defect density of the strain relief layer is less than or equal to 5×10 ⁹ /cm ² ; an N-type semiconductor layer is disposed on the strain relief layer, and the material of the N-type semiconductor layer includes Al _1-z Ga _z N, where z>x+0.15; a light-emitting layer arranged on the N-type semiconductor layer; a P-type semiconductor layer arranged on the light-emitting layer; and an electrode contact layer arranged on the P Type semiconductor layer. The light emitting diode according to claim 9, wherein the buffer layer is an aluminum nitride layer. The light-emitting diode according to claim 9, wherein the half-height width of the (102) X-ray swing curve of the buffer layer is less than 350 arcsec. The light emitting diode according to claim 9, wherein the distance between the lower surface of the strain relief layer and the upper surface of the substrate is less than 600 nm, and the lower surface of the strain relief layer and the upper surface of the substrate The surfaces face each other. The light emitting diode according to claim 9, wherein the differential row in the strain relief layer is inclined at an inclination angle with respect to the normal line of the substrate, and the inclination angle falls within a range from 10 degrees to 30 degrees. The light emitting diode according to claim 9, wherein the strain relief layer does not have observable holes. The light emitting diode according to claim 9, wherein the buffer layer is an annealed film layer. The light-emitting diode according to claim 9, wherein the line offset density of the buffer layer is less than 2×10 ⁹ cm ^-2 . The light-emitting diode according to claim 9, further comprising an aluminum graded layer disposed between the strain relief layer and the N-type semiconductor layer, wherein the material of the aluminum graded layer includes Al _1-y Ga _y N, Where x≦y≦z, the aluminum concentration of the aluminum graded layer gradually changes from a concentration close to the aluminum concentration of the strain relief layer to close to the N-type semiconductor along a direction from the strain relief layer to the N-type semiconductor layer A concentration of the aluminum concentration of the layer. The light-emitting diode according to claim 9, wherein the electrode contact layer has a superlattice structure, and the superlattice structure includes a plurality of Al _1-w Ga _w N layers and Al _1-v Ga _v N alternately stacked Layer, where w is not equal to v. The light emitting diode according to claim 18, wherein the period of the superlattice structure is less than 4 nanometers. The light-emitting diode according to claim 18, wherein the absorbance of the light emitted by the light-emitting layer of the electrode contact layer is less than 10%.

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