TWI724182B - Method, computer-readable storage medium, and system for chemical mechanical polishing automated recipe generation - Google Patents

Method, computer-readable storage medium, and system for chemical mechanical polishing automated recipe generation Download PDF

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TWI724182B
TWI724182B TW106119743A TW106119743A TWI724182B TW I724182 B TWI724182 B TW I724182B TW 106119743 A TW106119743 A TW 106119743A TW 106119743 A TW106119743 A TW 106119743A TW I724182 B TWI724182 B TW I724182B
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polishing
substrate
wafer
grinding
recipe
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TW201802981A (en
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永豪 劉
敬儀 向
查爾斯Ｃ 蓋瑞森
隽 錢
湯瑪士Ｈ 歐斯特海德
蘇契維拉特Ｍ 達塔爾
大衛 崔
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美商應用材料股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • G01B11/02—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness
    • G01B11/03—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness by measuring coordinates of points
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • G01B11/02—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness
    • G01B11/06—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness for measuring thickness ; e.g. of sheet material
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • G01B11/30—Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces
    • G01B11/306—Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces for measuring evenness
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B21/00—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant
    • G01B21/02—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring length, width, or thickness
    • G01B21/08—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring length, width, or thickness for measuring thickness
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B21/00—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant
    • G01B21/30—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring roughness or irregularity of surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Constituent Portions Of Griding Lathes, Driving, Sensing And Control (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)

Abstract

A method for polishing dies locations on a substrate with a polishing module. A thickness at selected locations on the substrate is premeasured at a metrology station, each location corresponding to a location of a single die. The thickness obtained by the metrology station for the selected locations of the substrate is provided to a controller of a polishing module. The thickness corrections for each selected location on the substrate are determined. A polishing step in a polishing recipe is formed from the thickness correction for each selected location. A polishing parameter for each die location is calculated for the recipe.

Description

用於化學機械研磨的自動配方的產生的方法、電腦可讀式儲 存媒體及系統 Method for generating automatic formula for chemical mechanical polishing, computer-readable storage Storage media and systems

本揭示案的實施例一般係關於用於研磨基板(如半導體晶圓)的方法及設備。更特定而言，係關於電子裝置製造製程中用於研磨基板局部區域的方法及設備。 The embodiments of the present disclosure generally relate to methods and equipment for polishing substrates (such as semiconductor wafers). More specifically, it relates to a method and equipment for polishing a local area of a substrate in the manufacturing process of an electronic device.

整體化學機械研磨為在高密度整合電路製造中經常使用的一個製程，以在研磨流體出現的情況下藉由移動基板的特徵側(亦即，沉積接收表面)接觸研磨墊來平面化或研磨基板上沉積的材料層。研磨墊一般遠較基板直徑大。在典型的研磨製程中，基板保持在載具頭中，該載具頭促使或壓迫基板背側朝向大於基板的研磨墊。在基板的特徵側表面全域移除材料，該基板與研磨墊經由化學及機械活動的組合而接觸。 Bulk chemical mechanical polishing is a process often used in high-density integrated circuit manufacturing to planarize or polish the substrate by moving the feature side of the substrate (that is, the deposition receiving surface) in contact with the polishing pad in the presence of polishing fluid Layer of material deposited on top. The polishing pad is generally much larger in diameter than the substrate. In a typical polishing process, the substrate is held in a carrier head, which urges or presses the backside of the substrate toward a polishing pad larger than the substrate. Material is removed from the entire feature side surface of the substrate, and the substrate and the polishing pad are brought into contact through a combination of chemical and mechanical activities.

然而，習用整體化學機械研磨製程可能無法產生足夠平面化的基板，因為局部高點使基板的部分不符合規格。可使用裝配小研磨墊(亦即，墊遠小於基板)的CMP系統移除局部高點，該小研磨墊適於研磨與特定晶片(die)位置同樣小的區域。然而，依據諸多晶片位置及依 據變化的地形，產生針對該小墊CMP系統的研磨配方已被證實具有挑戰性，且通常由過度或不足地研磨高點或以非所欲方式研磨相鄰高點的區域而產生額外問題。 However, the conventional overall chemical mechanical polishing process may not be able to produce a sufficiently planar substrate because the local high points make the part of the substrate not meet the specifications. A CMP system equipped with a small polishing pad (that is, the pad is much smaller than the substrate) can be used to remove the local high points, and the small polishing pad is suitable for polishing an area as small as a specific die position. However, depending on many chip positions and According to the changing topography, creating a polishing recipe for the small pad CMP system has proven to be challenging, and additional problems are usually caused by excessively or insufficiently polishing high points or polishing areas adjacent to high points in an undesirable manner.

因此，具有針對自基板局部區域移除材料的方法及設備之需求。 Therefore, there is a need for a method and equipment for removing material from a local area of the substrate.

本揭示案的實施例一般相關於用於研磨基板(例如，半導體晶圓，等等)局部區域的方法及設備。在一個實施例中，揭露用於使用研磨模組研磨基板上晶片位置的方法。在一計量站預先量測該基板上選擇的位置處之厚度，每一位置對應至單一晶片的一位置。提供該計量站針對所選擇的基板的該等位置所獲得的該等厚度給研磨模組的控制器。針對該基板上每一選擇的位置決定厚度改正。針對每一選擇的位置由該等厚度改正形成研磨配方(recipe)中的研磨步驟。計算針對每一晶片位置的研磨參數以用於配方。 The embodiments of the present disclosure generally relate to methods and equipment for polishing a local area of a substrate (for example, a semiconductor wafer, etc.). In one embodiment, a method for polishing the position of a wafer on a substrate using a polishing module is disclosed. A measuring station pre-measures the thickness at selected positions on the substrate, and each position corresponds to a position on a single wafer. The thickness obtained by the measuring station for the positions of the selected substrate is provided to the controller of the polishing module. Determine the thickness correction for each selected location on the substrate. For each selected position, the thickness is corrected to form the polishing step in the polishing recipe. Calculate the polishing parameters for each wafer position for use in the recipe.

其他實施例包含而不限於包含指令的電腦可讀式媒體，該等指令使處理單元能夠實行所揭露方法的一或更多個態樣，以及具有處理器、記憶體及應用程式經配置以實行所揭露方法的一或更多個態樣之系統。 Other embodiments include, but are not limited to, computer-readable media containing instructions that enable a processing unit to perform one or more aspects of the disclosed method, and have a processor, memory, and application programs configured to perform System of one or more aspects of the disclosed method.

本揭示案係針對由研磨系統使用的方法，特別適於製造製程期間研磨基板的部分。該方法意味針對基板上每一個別部分、位置、或晶片的分開研磨步驟之自動產生。該方法額外包含用於修改研磨操作之技術，以維持及改良用於後續基板的研磨結果。The present disclosure is directed to the method used by the polishing system, which is particularly suitable for polishing the portion of the substrate during the manufacturing process. This method means the automatic generation of separate grinding steps for each individual part, location, or wafer on the substrate. The method additionally includes techniques for modifying the polishing operation to maintain and improve the polishing result for subsequent substrates.

如該技術所屬領域具有通常知識者將理解，本發明之態樣可體現為一系統、方法或電腦程式產品。據此，本發明之態樣可採取以下形式：整體硬體實施例、整體軟體實施例(包含韌體、常駐軟體、微程式碼等)、或組合軟體及硬體態樣(在此可被稱作「電路」、「模組」、或「系統」)的實施例。進一步地，本發明之態樣可採取以下形式：體現於一或更多個電腦可讀式媒體中的電腦程式產品，具有在其上體現的電腦可讀式程式碼。Those with ordinary knowledge in the art to which the technology belongs will understand that the aspect of the present invention can be embodied as a system, method, or computer program product. Accordingly, the aspect of the present invention can take the following forms: an overall hardware embodiment, an overall software embodiment (including firmware, resident software, microcode, etc.), or a combination of software and hardware aspects (which may be referred to herein as It is an embodiment of "circuit", "module", or "system"). Further, aspects of the present invention may take the following forms: a computer program product embodied in one or more computer-readable media has computer-readable program codes embodied thereon.

可使用一或更多個電腦可讀式媒體之任何組合以儲存程式產品，當執行時該程式產品經配置以執行用於研磨基板的方法。電腦可讀式媒體可為電腦可讀式訊號媒體或電腦可讀式儲存媒體。電腦可讀式儲存媒體可為例如但不限於：電子、磁性、光學、電磁、紅外光、或半導體系統、設備或裝置、或前述各者任何合適的組合。電腦可讀式儲存媒體的更特定的實例(非詳盡清單)包含以下：可攜式電腦軟盤、硬碟、隨機存取記憶體(RAM)、唯讀記憶體(ROM)、可擦拭可程式化唯讀記憶體(EPROM或快閃記憶體)、光纖、可攜式壓縮光碟唯讀記憶體(CD-ROM)、光學儲存裝置、磁性儲存裝置、或前述各者任何合適的組合。在本文件上下文中，電腦可讀式儲存媒體可為任何有形的(tangible)媒體，而可包含或儲存一程式以被指令執行系統、設備或裝置使用或連接。Any combination of one or more computer-readable media can be used to store the program product, which when executed, is configured to perform the method for polishing a substrate. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to: electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, equipment or devices, or any suitable combination of the foregoing. More specific examples (non-exhaustive list) of computer-readable storage media include the following: portable computer floppy disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable Read only memory (EPROM or flash memory), optical fiber, portable compact disc read only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer-readable storage medium may be any tangible medium, and may contain or store a program to be used or connected to an instruction execution system, equipment, or device.

電腦可讀式訊號媒體可包含傳播資料訊號，具有電腦可讀式程式碼體現於其中，例如，於基頻中或為載波的部分。該傳播訊號可採取任何多變的形式，包含但不限於：電磁、光學、無線電、或上述各者任何合適的組合。電腦可讀式訊號媒體可為不是電腦可讀式儲存媒體且可通訊、傳播、或傳輸程式以被指令執行系統、設備或裝置使用或連接的任何電腦可讀式媒體。The computer-readable signal medium may include a propagated data signal, with a computer-readable program code embodied therein, for example, in the base frequency or as part of a carrier wave. The propagation signal can take any changeable form, including but not limited to: electromagnetic, optical, radio, or any suitable combination of the above. The computer-readable signal medium may be any computer-readable medium that is not a computer-readable storage medium and can communicate, propagate, or transmit a program to be used or connected to an instruction execution system, equipment, or device.

可使用任何適當的媒體傳送體現於電腦可讀式媒體上的程式碼，包含但不限於：無線、纜線、光纖纜、射頻等，或前述任何合適的組合。電腦程式碼可以任何一或更多個程式語言寫入。可整體在使用者電腦上、部分在使用者電腦上、以單機軟體封包、部分在使用者電腦上且部分在遠端電腦上、或整體在遠端電腦或伺服器上執行程式碼。在後者的情境中，遠端電腦可經由任何類型的網路連接至使用者電腦，包含區域網路(LAN)或廣域網路(WAN)，或可進行連接至外部電腦(例如，使用網際網路服務提供商經由網際網路)。Any suitable medium may be used to transmit the program code embodied on a computer-readable medium, including but not limited to: wireless, cable, fiber optic cable, radio frequency, etc., or any suitable combination of the foregoing. The computer program code can be written in any one or more programming languages. The code can be executed entirely on the user's computer, partly on the user's computer, packaged as a stand-alone software, partly on the user's computer and partly on the remote computer, or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (for example, using the Internet The service provider via the Internet).

電腦程式指令亦可裝載至電腦、其他可程式化資料處理設備、或其他裝置上以造成在電腦、其他可程式化設備或其他裝置上執行一系列的操作步驟以產生電腦實施製程，使得在電腦或其他可程式化設備上執行的指令提供製程以用於實施流程圖及/或方塊圖方塊或多個方塊中規定的功能/行動。Computer program instructions can also be loaded on a computer, other programmable data processing equipment, or other devices to cause a series of operation steps to be executed on the computer, other programmable equipment, or other devices to generate a computer-implemented process, so that the computer Or instructions executed on other programmable devices provide a process for implementing the functions/actions specified in the flowchart and/or block diagram or multiple blocks.

第1圖為針對具有計量站110的研磨系統100的示意圖。研磨系統100額外具有研磨站200。工廠介面120可設置於研磨站200及計量站110之間。工廠介面120、計量站110及研磨站200可電性耦合以在研磨系統100的各個站之間傳送資料及資訊。FIG. 1 is a schematic diagram of a polishing system 100 with a metering station 110. The grinding system 100 additionally has a grinding station 200. The factory interface 120 can be arranged between the grinding station 200 and the metering station 110. The factory interface 120, the metering station 110, and the polishing station 200 may be electrically coupled to transmit data and information among the various stations of the polishing system 100.

工廠介面120具有機械手122。機械手122經配置以在研磨站200及計量站110之間移動基板115。機械手122亦可經配置以移動基板115進入及離開研磨系統100。The factory interface 120 has a robot 122. The robot 122 is configured to move the substrate 115 between the polishing station 200 and the metering station 110. The robot 122 can also be configured to move the substrate 115 into and out of the polishing system 100.

簡短轉至第3圖，第3圖為適於在第1及2圖中所圖示研磨站200中研磨的基板115之平面視圖。基板115可具有圓形形狀，具有中央322及外直徑304。外直徑304可具有平坦或凹槽301以定向基板115。在一個實施例中，外直徑304為300 mm。或者，基板115可具有任何合適形狀及大小。Turning briefly to FIG. 3, which is a plan view of the substrate 115 suitable for polishing in the polishing station 200 shown in FIGS. 1 and 2. The substrate 115 may have a circular shape with a center 322 and an outer diameter 304. The outer diameter 304 may have flats or grooves 301 to orient the substrate 115. In one embodiment, the outer diameter 304 is 300 mm. Alternatively, the substrate 115 may have any suitable shape and size.

可使用座標系統320映射基板115，如具有y軸360及x軸380的笛卡爾(Cartesian)座標系統。原點，亦即座標系統320的(0,0)可位於基板115上或外部的任何地方。在一個實施例中，原點為基板115的中央322。應理解任何座標系統(如極座標系統)皆適於界定基板115上的位置333。位置333具有第一偏移332，可對應於座標系統320的x軸380上的「X」值。相似地，位置333具有第二偏移334，可對應於座標系統320的y軸360上的「Y」值。因此，位置333可由(X,Y)界定即可。位置333可識別第一晶片330。A coordinate system 320 may be used to map the substrate 115, such as a Cartesian coordinate system with a y-axis 360 and an x-axis 380. The origin, that is, (0,0) of the coordinate system 320 can be located anywhere on the substrate 115 or outside. In one embodiment, the origin is the center 322 of the substrate 115. It should be understood that any coordinate system (such as a polar coordinate system) is suitable for defining the position 333 on the substrate 115. The position 333 has a first offset 332, which may correspond to the “X” value on the x-axis 380 of the coordinate system 320. Similarly, the position 333 has a second offset 334, which may correspond to the “Y” value on the y-axis 360 of the coordinate system 320. Therefore, the position 333 can be defined by (X, Y). The location 333 can identify the first wafer 330.

基板115可具有局部區域342。局部區域342主要代表基板115的部分。在一個實施例中，可調整每一局部區域342的大小至且對應至複數個晶片340。在另一實施例中，每一局部區域342可分別對應至單一晶片340。晶片340可界定於基板115上約6 mm乘以約6 mm或更大(如最大約20 mm乘以約20 mm)的表面區域中。知曉晶片340的大小及基板115的定向允許每一晶片340被位置(X,Y)界定，如在位置333識別第一晶片330的情況中。基板115可額外具有非對應至任何晶片340的區域390。在一個實施例中，基板115具有七十二個晶片340。在另一實施例中，基板115具有超過三百個晶片340。基板115及晶片340的大小決定了基板115可包含的晶片340數量。The substrate 115 may have a local area 342. The local area 342 mainly represents a part of the substrate 115. In one embodiment, the size of each local area 342 can be adjusted to and correspond to a plurality of chips 340. In another embodiment, each local area 342 may correspond to a single chip 340 respectively. The wafer 340 may be defined in a surface area of about 6 mm by about 6 mm or more (eg, a maximum of about 20 mm by about 20 mm) on the substrate 115. Knowing the size of the wafer 340 and the orientation of the substrate 115 allows each wafer 340 to be defined by position (X, Y), as in the case where the position 333 identifies the first wafer 330. The substrate 115 may additionally have an area 390 that does not correspond to any wafer 340. In one embodiment, the substrate 115 has seventy-two wafers 340. In another embodiment, the substrate 115 has more than three hundred wafers 340. The size of the substrate 115 and the wafer 340 determines the number of the wafer 340 that the substrate 115 can contain.

返回第1圖，基板115可藉由機械手122移動至量測基板115的計量站。計量站110可執行整個基板115的複數個厚度或平坦度量測。計量站110可決定基板115的局部區域處的厚度及/或平坦度超出規格，亦即，於預先界定的容忍度窗外部，如厚度太大或太薄。例如，計量站110可決定每一晶片位置處的基板厚度。適於量測厚度的計量站110可自Nanometrics and Nova Measuring Instruments公司購得。Returning to FIG. 1, the substrate 115 can be moved by the robot 122 to the measuring station where the substrate 115 is measured. The metering station 110 can perform multiple thickness or flatness measurements of the entire substrate 115. The metering station 110 may determine that the thickness and/or flatness of the local area of the substrate 115 is out of specification, that is, outside the predetermined tolerance window, such as the thickness is too large or too thin. For example, the metering station 110 can determine the thickness of the substrate at each wafer location. A metering station 110 suitable for measuring thickness can be purchased from Nanometrics and Nova Measuring Instruments.

可傳送由計量站110所收集之關於基板115的資訊(亦即，資料)遍及研磨系統100，且使用以執行基板115上的處理或其他操作。例如，計量站110所量測的基板115上的位置被決定為太厚而可藉由研磨系統200研磨以使基板符合規格。在一些情境中，計量站110可記錄基板115上所有晶片340的厚度作為規格，且在基板115被機械手122移動至製造製程中的下一位置而遠離研磨系統100時該資訊與基板115相關聯。The information (ie, data) about the substrate 115 collected by the metering station 110 can be transmitted throughout the polishing system 100 and used to perform processing or other operations on the substrate 115. For example, the position on the substrate 115 measured by the measuring station 110 is determined to be too thick and can be polished by the polishing system 200 to make the substrate meet the specifications. In some scenarios, the metering station 110 can record the thickness of all the wafers 340 on the substrate 115 as a specification, and the information is related to the substrate 115 when the substrate 115 is moved by the robot 122 to the next position in the manufacturing process and away from the polishing system 100 United.

選擇地或結合計量站110，計量裝置(未圖示)亦可耦合至研磨站200。可使用計量裝置以在研磨期間藉由在基板(未圖示)上量測金屬或介電薄膜厚度來提供研磨進展的原位度量(in-situ metric)。計量裝置可為渦流感測器、光學感測器、或其他可用以決定金屬或介電薄膜厚度的感測裝置。Optionally or in combination with the metering station 110, a metering device (not shown) can also be coupled to the grinding station 200. A metering device can be used to provide an in-situ metric of the progress of the polishing by measuring the thickness of the metal or dielectric film on the substrate (not shown) during polishing. The measuring device can be an eddy flu sensor, an optical sensor, or other sensing devices that can be used to determine the thickness of a metal or dielectric film.

第2圖為研磨站200的一個實施例之示意截面視圖。研磨站200包含支撐夾具210的基底206，夾具210可旋轉地支撐其上的基板115。夾具210可為真空夾具，或其他合適的裝置以維持其上的基板115。夾具210耦合至驅動裝置221(可為馬達或致動器)，為繞著Z方向中定向的軸的夾具210提供至少旋轉移動。可在習用整體研磨製程之前或習用整體研磨製程之後使用研磨站200，以研磨基板115的局部區域及/或執行基板115上的厚度改正。在一些實施例中，可使用研磨站200以研磨及/或移除基板115上個別晶片340上方的一區域中的材料。Figure 2 is a schematic cross-sectional view of an embodiment of the polishing station 200. The polishing station 200 includes a base 206 that supports a jig 210, and the jig 210 rotatably supports a substrate 115 thereon. The clamp 210 may be a vacuum clamp, or other suitable devices to maintain the substrate 115 thereon. The clamp 210 is coupled to a driving device 221 (which may be a motor or an actuator), and provides at least rotational movement for the clamp 210 about an axis oriented in the Z direction. The polishing station 200 can be used before the conventional bulk polishing process or after the conventional bulk polishing process to polish a local area of the substrate 115 and/or perform thickness correction on the substrate 115. In some embodiments, the polishing station 200 may be used to polish and/or remove material in an area above the individual wafers 340 on the substrate 115.

基板115以「面朝上」之定向設置於夾具210上，使得基板115的特徵側面對一或更多個研磨墊組件265。使用一或更多個研磨墊組件265之每一者以研磨或自基板115移除材料。可使用研磨墊組件265以在習用整體化學機械研磨(CMP)系統中研磨基板115之前或之後自基板115的局部區域342移除材料及/或沿著基板115的外直徑304研磨周邊邊緣。研磨墊組件265可為圓形、卵形、或任何多角形，例如正方形或矩形。研磨墊組件265包含接觸部分266。接觸部分266可為聚合物研磨墊材料，如聚胺酯、聚碳酸酯、含氟聚合物、聚四氟乙烯(PTFE)、聚苯硫醚(PPS)、或其組合，等等。接觸部分266可進一步包括開啟或關閉細胞發泡聚合物、彈性體、氈、浸漬氈、塑膠、及與處理化學性質相容的相似材料。The substrate 115 is disposed on the fixture 210 in a “face-up” orientation such that the characteristic side of the substrate 115 faces one or more polishing pad assemblies 265. Each of one or more polishing pad assemblies 265 is used to polish or remove material from the substrate 115. The polishing pad assembly 265 may be used to remove material from the local area 342 of the substrate 115 and/or to polish the peripheral edge along the outer diameter 304 of the substrate 115 before or after polishing the substrate 115 in a conventional overall chemical mechanical polishing (CMP) system. The polishing pad assembly 265 may be circular, oval, or any polygonal shape, such as square or rectangular. The polishing pad assembly 265 includes a contact portion 266. The contact portion 266 may be a polymer polishing pad material, such as polyurethane, polycarbonate, fluoropolymer, polytetrafluoroethylene (PTFE), polyphenylene sulfide (PPS), or a combination thereof, and so on. The contact portion 266 may further include open or closed cell foaming polymers, elastomers, felts, impregnated felts, plastics, and similar materials compatible with processing chemistry.

在一個實施例中，可在處理期間將來自流體來源240的研磨流體應用至研磨墊組件265及/或基板115。流體來源240亦可提供去離子化水(DIW)至研磨墊組件265及/或基板115以便於清理。流體來源240亦可提供氣體(如，清潔乾燥空氣(CDA))至研磨墊組件265以便調整應用至研磨墊組件265的壓力。基底206可經配置以包含水槽以收集流出基板115邊緣的研磨流體及/或DIW。In one embodiment, the polishing fluid from the fluid source 240 may be applied to the polishing pad assembly 265 and/or the substrate 115 during processing. The fluid source 240 can also provide deionized water (DIW) to the polishing pad assembly 265 and/or the substrate 115 for easy cleaning. The fluid source 240 can also provide gas (eg, clean dry air (CDA)) to the polishing pad assembly 265 to adjust the pressure applied to the polishing pad assembly 265. The base 206 may be configured to include a water tank to collect the grinding fluid and/or DIW flowing out of the edge of the substrate 115.

一或更多個研磨墊組件265之每一者耦合至支撐臂230，支撐臂230相對於基板115移動研磨墊組件265。支撐臂230可移動地藉由致動器組件220裝設於基底206上。致動器組件220包含第一致動器225A及第二致動器225B。可使用第一致動器225A以垂直(Z方向)移動每一支撐臂230(具有各自之研磨頭222)，且可使用第二致動器225B以側向(X方向、Y方向、或其組合)移動每一支撐臂230(具有各自之研磨頭222)。亦可使用第一致動器225A以提供可控制向下力以促使研磨墊組件265朝向基板接收表面205且抵靠基板115。儘管在第2圖中僅圖示兩個支撐臂230及研磨頭222(其上具有研磨墊組件265)，研磨站200不限於此配置。只要夾具210的圓周(例如，周邊)以及用於支撐臂230(具有研磨頭222及研磨墊組件265裝設於上)的掃掠移動之空間允許，研磨站200可包含任何數量的支撐臂230及研磨頭222。Each of the one or more polishing pad assemblies 265 is coupled to the support arm 230, and the support arm 230 moves the polishing pad assembly 265 relative to the substrate 115. The support arm 230 is movably installed on the base 206 by the actuator assembly 220. The actuator assembly 220 includes a first actuator 225A and a second actuator 225B. The first actuator 225A can be used to move each support arm 230 (with its own polishing head 222) vertically (Z direction), and the second actuator 225B can be used to move sideways (X direction, Y direction, or its Combination) Move each support arm 230 (having its own polishing head 222). The first actuator 225A can also be used to provide a controllable downward force to urge the polishing pad assembly 265 toward the substrate receiving surface 205 and against the substrate 115. Although only the two support arms 230 and the polishing head 222 (with the polishing pad assembly 265 thereon) are shown in Figure 2, the polishing station 200 is not limited to this configuration. As long as the circumference (for example, the periphery) of the clamp 210 and the space for the sweeping movement of the support arm 230 (with the polishing head 222 and the polishing pad assembly 265 installed on it) permit, the polishing station 200 can include any number of support arms 230 And grinding head 222.

致動器組件220可包括線性移動機構227，可為耦合至第二致動器225B的滑動機構或滾珠螺釘。相似地，每一第一致動器組件225A可包括線性滑動機構、滾珠螺釘、或柱面滑動機構以垂直移動支撐臂230。致動器組件220亦包含在第一致動器225A及線性移動機構227之間耦合的支撐臂235A、235B。可藉由第二致動器225B同時或個別致動支撐臂235A、235B之每一者。因此，支撐臂230(及裝設於支撐臂230上的研磨墊組件265)的側向移動可以同步或非同步方式在基板(未圖示)上徑向掃掠。The actuator assembly 220 may include a linear movement mechanism 227, which may be a sliding mechanism or a ball screw coupled to the second actuator 225B. Similarly, each first actuator assembly 225A may include a linear sliding mechanism, a ball screw, or a cylindrical sliding mechanism to move the support arm 230 vertically. The actuator assembly 220 also includes support arms 235A, 235B coupled between the first actuator 225A and the linear movement mechanism 227. Each of the support arms 235A, 235B can be activated simultaneously or individually by the second actuator 225B. Therefore, the lateral movement of the support arm 230 (and the polishing pad assembly 265 installed on the support arm 230) can be synchronously or asynchronously scanned radially on the substrate (not shown).

支撐軸件242可為第一致動器225A的一部分。支撐軸件242設置於在基底206中形成的開口244中，以基於致動器組件220所提供的移動而允許支撐臂230的側向移動。調整開口244的大小以允許支撐軸件242的充分側向移動，使得支撐臂230(及裝設至支撐臂230的研磨頭222)可自基板接收表面205的周邊246的移動朝向其中央至約基板接收表面205的半徑的一半。在一個實施例中，基板接收表面205具有與基板直徑實質相同的直徑，該基板在處理期間裝設於基板接收表面205上。例如，如若基板接收表面205的半徑為150 mm，支撐臂230(特定地，研磨墊組件265裝設於支撐臂230上)可自約150 mm(例如，自周邊246起)徑向移動至約75 mm向內朝向基板接收表面205的中央，且返回周邊246。調整開口244的大小以允許支撐軸件242足夠的側向移動，使得支撐臂230的末端248可從夾具210的周邊250向外移動，使得基板115可藉由機械手122被傳送至基板接收表面205上或離開基板接收表面205。The support shaft 242 may be a part of the first actuator 225A. The support shaft 242 is disposed in the opening 244 formed in the base 206 to allow the lateral movement of the support arm 230 based on the movement provided by the actuator assembly 220. The size of the opening 244 is adjusted to allow sufficient lateral movement of the support shaft 242, so that the support arm 230 (and the polishing head 222 installed to the support arm 230) can move from the periphery 246 of the substrate receiving surface 205 toward the center thereof to approximately Half the radius of the substrate receiving surface 205. In one embodiment, the substrate receiving surface 205 has a diameter that is substantially the same as the diameter of the substrate, which is mounted on the substrate receiving surface 205 during processing. For example, if the radius of the substrate receiving surface 205 is 150 mm, the support arm 230 (specifically, the polishing pad assembly 265 is mounted on the support arm 230) can move radially from about 150 mm (for example, from the periphery 246) to about The 75 mm inwardly faces the center of the substrate receiving surface 205 and returns to the periphery 246. Adjust the size of the opening 244 to allow sufficient lateral movement of the support shaft 242 so that the end 248 of the support arm 230 can move outward from the periphery 250 of the clamp 210, so that the substrate 115 can be transferred to the substrate receiving surface by the robot 122 205 on or off the substrate receiving surface 205.

根據研磨常規來移動支撐臂230(特定地，研磨墊組件265裝設於支撐臂230上)，使用該研磨常規以研磨基板115的局部區域。在一些實施例中，基板115的局部區域可為被單一晶片340佔據的表面區域。可依據需要研磨的位置(如使用者規格所界定)來使用研磨墊組件265以研磨基板115的任何區域。揭示案的益處包含針對基板上研磨個別區域的設定中改良的時間及減低的錯誤。如此處所描述的研磨模組的實施例可移除基板上約20Å至約200Å的材料厚度，且在一些實施例中，可移除約10Å至約200Å的材料厚度。在一些實施例中，可以約+/-5Å的精確度移除材料。可使用於此描述的實施例以執行基板局部區域上的任何薄膜或矽層上的厚度改正，且亦可使用於邊緣斜角研磨。The support arm 230 is moved according to the polishing routine (specifically, the polishing pad assembly 265 is installed on the support arm 230), and the polishing routine is used to polish a local area of the substrate 115. In some embodiments, the local area of the substrate 115 may be a surface area occupied by a single wafer 340. The polishing pad assembly 265 can be used to polish any area of the substrate 115 according to the location to be polished (as defined by user specifications). The benefits of the disclosure include improved time and reduced errors in the settings for polishing individual areas on the substrate. The embodiment of the polishing module as described herein can remove a material thickness of about 20 Å to about 200 Å on the substrate, and in some embodiments, a material thickness of about 10 Å to about 200 Å can be removed. In some embodiments, material can be removed with an accuracy of about +/-5Å. The embodiment described here can be used to perform thickness correction on any thin film or silicon layer on a local area of the substrate, and can also be used for edge bevel polishing.

控制器290可接合至研磨站200或為研磨站200的一部分。控制器290包含中央處理單元(CPU) 292及系統記憶體294。系統記憶體294儲存軟體應用程式及資料以供CPU 292使用。CPU 292運行軟體應用程式且可控制研磨站200。控制器可額外具有埠293。埠293可支撐裝置，例如I/O裝置(鍵盤、視訊顯示器)、網路配接器、及/或其他用於提供輸入、儲存、輸出等的裝置。The controller 290 may be coupled to or part of the polishing station 200. The controller 290 includes a central processing unit (CPU) 292 and a system memory 294. The system memory 294 stores software applications and data for use by the CPU 292. The CPU 292 runs a software application and can control the grinding station 200. The controller may additionally have a port 293. The port 293 can support devices, such as I/O devices (keyboards, video displays), network adapters, and/or other devices for providing input, storage, and output.

控制器290儲存及執行程式以決定移除量及研磨參數，如壓力、振盪速度及每一研磨區域所需研磨時間。研磨參數(如，研磨壓力、時間、及振盪速度)為針對每一研磨區域的每一配方步驟中的一些變數，且可計算及/或設定每一配方步驟中的其他參數。收集針對每一晶片340、局部區域342、或整體基板115的其他部分之配方步驟而成為使用於基板115的處理之研磨配方。The controller 290 stores and executes programs to determine the removal amount and grinding parameters, such as pressure, oscillation speed, and grinding time required for each grinding area. The grinding parameters (eg, grinding pressure, time, and oscillation speed) are some variables in each recipe step for each grinding area, and other parameters in each recipe step can be calculated and/or set. The recipe steps for each wafer 340, local area 342, or other parts of the entire substrate 115 are collected to become a polishing recipe used in the processing of the substrate 115.

控制器290可自計量站110、工廠介面、FAB主控制器、或其他裝置獲得量測資料或其他關於基板115的資訊。控制器290可儲存複數個資料以決定自基板115所研磨的材料移除率。可儲存移除率資料為公式，亦即，圖形、表格、斷點、或藉由其他合適的計量方法。可針對每一晶片340、基板115上較大區域、或基板115整體而分派圖形至特定位置。可使用位置資訊來識別針對基板115上特定位置的移除率資訊，例如座標值、索引值、或其他合適的識別符。The controller 290 can obtain measurement data or other information about the substrate 115 from the metering station 110, the factory interface, the FAB master controller, or other devices. The controller 290 can store a plurality of data to determine the removal rate of the polished material from the substrate 115. The removal rate data can be stored as formulas, that is, graphs, tables, breakpoints, or by other suitable measurement methods. The pattern can be assigned to a specific location for each chip 340, a larger area on the substrate 115, or the entire substrate 115. The location information can be used to identify the removal rate information for a specific location on the substrate 115, such as coordinate values, index values, or other suitable identifiers.

簡短轉至第4及5圖，提供描繪「移除量對研磨時間」的移除率圖形。該等移除率圖形可維持用於研磨站200的研磨壓力及振盪速度為恆常。應理解：在決定材料的移除率時，移除率圖形可特定於研磨站200的壓力與振盪速度的一個特定組合，同時其他移除率圖形具有壓力及振盪速度的第二組合。為了簡化進一步論述，在移除率圖形中壓力及振盪速度維持為恆常。第4圖為描繪由第1圖中所圖示研磨模組所計算的材料自基板的移除率的圖形400。圖形400圖示沿著y軸416的材料移除量412為沿著x軸420的時間430之函數。應理解圖形400選擇地繪製沿著x軸420的材料移除量412及沿著y軸416的時間430。然而，亦應理解研磨區域不需依時間(或研磨站200的壓力及振盪速度)繪製。Briefly turn to Figures 4 and 5 to provide a graph of removal rate depicting "removal amount versus grinding time". The removal rate patterns can maintain the polishing pressure and oscillation speed used in the polishing station 200 to be constant. It should be understood that when determining the removal rate of the material, the removal rate pattern may be specific to a specific combination of the pressure and the oscillation speed of the polishing station 200, while other removal rate patterns have a second combination of the pressure and the oscillation speed. In order to simplify the further discussion, the pressure and the oscillation speed in the removal rate graph are kept constant. FIG. 4 is a graph 400 depicting the removal rate of material from the substrate calculated by the polishing module shown in FIG. 1. Graph 400 illustrates the amount of material removal 412 along the y-axis 416 as a function of time 430 along the x-axis 420. It should be understood that the graph 400 selectively plots the amount of material removed 412 along the x-axis 420 and the time 430 along the y-axis 416. However, it should also be understood that the polishing area does not need to be drawn according to time (or the pressure and oscillation speed of the polishing station 200).

在研磨站200處研磨基板115之前，針對每一研磨操作，可選地於校正晶圓上的每一晶片位置產生「移除量對研磨時間」的曲線450。在實例中第一基板(實質相似於基板115)具有79個晶片340，可有79個圖形400對應至每一晶片340。每一圖形400提供時間430以佔用使用於研磨第一基板的配方中的步驟。然而，如上方簡單論述，亦可決定步驟中的振盪速度及壓力。因此，79個晶片可具有79個相關聯圖形400以用於產生使用於第一基板的一個研磨配方中的79個步驟(每一晶片340位置一個步驟)。第二基板(實質相似於基板115)可接著具有79個不同步驟，因為第二基板中針對每一晶片340的研磨時間、或其他研磨參數可在多個晶片位置處具有相較於第一基板不同的厚度。亦應述及：研磨配方中的步驟數量對應至基板上所執行研磨操作的數量而無關於晶片數量，因為一些晶片位置不可研磨。Before polishing the substrate 115 at the polishing station 200, for each polishing operation, a curve 450 of "removal amount versus polishing time" is optionally generated for each wafer position on the calibration wafer. In the example, the first substrate (substantially similar to the substrate 115) has 79 chips 340, and there may be 79 patterns 400 corresponding to each chip 340. Each pattern 400 provides time 430 to occupy the steps in the recipe used to grind the first substrate. However, as discussed briefly above, the oscillation speed and pressure in the step can also be determined. Therefore, 79 wafers can have 79 associated patterns 400 for generating 79 steps (one step per wafer 340 position) in one polishing recipe for the first substrate. The second substrate (substantially similar to the substrate 115) can then have 79 different steps, because the polishing time or other polishing parameters for each wafer 340 in the second substrate can be compared to the first substrate at multiple wafer positions. Different thickness. It should also be mentioned that the number of steps in the polishing recipe corresponds to the number of polishing operations performed on the substrate, regardless of the number of wafers, because some wafer positions cannot be polished.

或者，可自預測(如藉由模型化)或預先決定值(如藉由經驗資料)來計算曲線450。而在其他備案中，可經由過去的研磨操作資料或經由其他合適技術來決定曲線450。在第一實施例中，自預先決定值決定曲線450。在完成校正之後，在計量站110上預先量測產品基板115以決定厚度改正，亦即，在對應基板115上每一晶片340的位置處移除多餘的材料。曲線450提供了材料移除量412為時間430的函數，允許研磨站200的控制器快速且自動地決定或計算每一晶片位置處處理基板欲研磨材料移除量412(亦即，厚度改正)所需的時間430的總量，且將晶片340置於規格內，亦即，於預先決定的厚度及/或平坦度容忍度內。亦即，研磨站200使用研磨時間430自動地佔用對應每一晶片位置的每一步驟，以移除材料且自動建立針對手邊特定基板的研磨配方。因此，每一配方具有高度可能性為唯一的，導因於變化時間430以在不同晶片位置處移除材料的可能性(導因於計量站110所決定的不同材料厚度、或平坦度)。Alternatively, the curve 450 can be calculated by self-predicting (such as by modeling) or predetermined values (such as by empirical data). In other filings, the curve 450 can be determined through past grinding operation data or through other suitable techniques. In the first embodiment, the curve 450 is determined from a predetermined value. After the calibration is completed, the product substrate 115 is pre-measured on the metering station 110 to determine the thickness correction, that is, the excess material is removed at the position corresponding to each wafer 340 on the substrate 115. The curve 450 provides the amount of material removed 412 as a function of time 430, allowing the controller of the polishing station 200 to quickly and automatically determine or calculate the amount of material removed 412 to be polished at each wafer position (ie, thickness correction) The total amount of time 430 required, and the wafer 340 is placed within specifications, that is, within a predetermined thickness and/or flatness tolerance. That is, the polishing station 200 uses the polishing time 430 to automatically occupy each step corresponding to each wafer position to remove material and automatically create a polishing recipe for the specific substrate at hand. Therefore, each recipe has a high probability of being unique, due to the possibility of changing the time 430 to remove material at different wafer positions (due to the different material thickness or flatness determined by the metering station 110).

在純圖示的實例中，計量站110可指示第一晶片位置(X1 ,Y1 )過厚了約0.02Å。參考圖形400，可發現移除0.02Å(314)的材料與曲線450在點452交叉，接著指示研磨時間424為低於約1秒。因此，可自動取得研磨時間424且接著佔用針對第一晶片位置(X1 ,Y1 )的研磨配方中的步驟。在計量站110處研磨之後量測基板115以決定真實材料移除量允許在後續基板115上使用對曲線450的改正。In the purely illustrated example, the metering station 110 may indicate that the first wafer position (X 1 , Y 1 ) is too thick by about 0.02 Å. Referring to the graph 400, it can be found that the material removed by 0.02 Å (314) crosses the curve 450 at point 452, and then indicates that the grinding time 424 is less than about 1 second. Therefore, the polishing time 424 can be automatically obtained and then the steps in the polishing recipe for the first wafer position (X 1 , Y 1) can be occupied. Measuring the substrate 115 after grinding at the metering station 110 to determine the actual amount of material removed allows the correction of the curve 450 to be used on the subsequent substrate 115.

或者，可自使用以設定或限定研磨站200的校正晶圓來決定曲線。第5圖為描繪由第1及2圖中所圖示研磨站200所量測的材料自基板的移除率的圖形500。可藉由繪製使用以自校正晶圓研磨離開材料移除量412的時間430來決定初始曲線530。初始曲線530可對基板115上每一晶片位置為相同的。可在由校正晶圓所量測的值之間外插、趨勢化、或平均曲線530上的值以便建立初始曲線530。Alternatively, it can be used to set or limit the calibration wafer of the polishing station 200 to determine the curve. FIG. 5 is a graph 500 depicting the removal rate of the material from the substrate measured by the polishing station 200 shown in FIGS. 1 and 2. FIG. The initial curve 530 can be determined by plotting the time 430 used to self-calibrate the wafer grinding away from the material removal amount 412. The initial curve 530 can be the same for each wafer position on the substrate 115. The values on the curve 530 can be extrapolated, trended, or averaged between the values measured by the calibration wafer to establish the initial curve 530.

在一個實例中，可在第一晶片位置501處對校正晶圓研磨約1秒的第一時間561。校正晶圓上的第一晶片位置501接著由計量站110來量測以決定大約的第一材料移除量514。第一材料移除量514與第一時間561的交叉532提供用於產生曲線530的資料點。在實作中，思量在移動至計量站110以用於量測之前，在後續可能的每一晶片位置處研磨校正晶圓以及後續基板115。可使用不同基板上相同第一晶片位置501處的複數個量測以形成特定對第一晶片位置501的圖形500。例如，可在不同研磨時間430之後皆在相同第一晶片位置501處進行量測。或者，對基板上複數個晶片位置所進行之量測及量測可併入初始曲線530以用於基板上所有晶片位置。在一個實施例中，所有晶片位置使用相同圖形500以決定移除率。在另一實施例中，每一晶片位置具有單獨(唯一)的圖形500以決定移除率。圖形500對基板115上的晶片位置或區域可為不同的，導因於薄膜品質及厚度自中央至邊緣之變化等理由。In one example, the calibration wafer may be ground for a first time 561 of about 1 second at the first wafer position 501. The first wafer position 501 on the calibration wafer is then measured by the metering station 110 to determine the approximate first material removal amount 514. The intersection 532 of the first material removal amount 514 and the first time 561 provides data points for generating the curve 530. In practice, before moving to the measuring station 110 for measurement, the calibration wafer and the subsequent substrate 115 are polished at each possible wafer position in the future. A plurality of measurements at the same first wafer position 501 on different substrates can be used to form a pattern 500 specific to the first wafer position 501. For example, the measurement can be performed at the same first wafer position 501 after different grinding times 430. Alternatively, measurements and measurements performed on a plurality of wafer positions on the substrate can be incorporated into the initial curve 530 for all wafer positions on the substrate. In one embodiment, the same pattern 500 is used for all wafer positions to determine the removal rate. In another embodiment, each wafer position has a separate (unique) pattern 500 to determine the removal rate. The position or area of the pattern 500 on the wafer on the substrate 115 may be different due to the change of the film quality and thickness from the center to the edge.

使用於每一晶片位置的圖形500可開始實質相同，而隨著研磨後續基板115且在計量站110量測而偏離，其中計量站110提供返回研磨站200的量測以修改(改良)相關聯於圖形500的晶片位置處的圖形500。或者，對所有基板上晶片位置使用單一圖形500且由計量站110處所決定的研磨結果修改。在此方式中，當耗材被研磨站200磨損時可調整移除率。此外，可使用來自後處理基板的量測資料以指示何時需要替換耗材。當曲線530的斜率(亦即，移除率)接近預先決定的下限時，指示進行材料移除更久且耗材上可能有更多磨損，可翻新或替換研磨站200上的耗材，例如研磨墊或漿。The pattern 500 used for each wafer position can begin to be substantially the same, and deviate as the subsequent substrate 115 is polished and measured at the metering station 110, where the metering station 110 provides the measurement back to the polishing station 200 to modify (improve) the correlation The pattern 500 at the wafer position of the pattern 500. Alternatively, a single pattern 500 is used for all wafer positions on the substrate and is modified by the polishing result determined at the metering station 110. In this manner, the removal rate can be adjusted when the consumable is worn by the grinding station 200. In addition, measurement data from post-processed substrates can be used to indicate when consumables need to be replaced. When the slope of the curve 530 (ie, the removal rate) is close to the predetermined lower limit, it indicates that the material is removed longer and there may be more wear on the consumables. The consumables on the polishing station 200 can be refurbished or replaced, such as polishing pads. Or pulp.

在研磨基板115之後，在計量站110或原地上後量測基板115以決定基板115(或更特定而言，基板115上的晶片位置)是否符合規格。如上述，可使用針對晶片340的厚度的量測以修改圖形500或發送基板以在被發現仍太厚的晶片位置中再次研磨。返回由研磨站200研磨第一晶片位置501一週期的第一時間561的上方實例，可在第一晶片位置501處研磨後量測基板115。所量測厚度可指示真實材料移除量580小於曲線530所預測，因而真實移除率582可需要曲線530的調整528至新曲線540的位置。新曲線540現在圖示針對對應第一時間561的真實移除率582之時間430。進一步地，現在可決定針對達成改正的第一材料移除量514的新時間562，且後續研磨操作可在其步驟中使用新時間562，以在未來基板上第一晶片位置501中及附近研磨。趨勢線592圖示一示例性函數，可使用以預測第一晶片位置501處的研磨率。研磨站200亦可以相似方式針對每一晶片位置調整圖形500，或可基於針對第一晶片位置501的曲線移動僅調整鄰近晶片的圖形。After the substrate 115 is polished, the substrate 115 is measured at the metering station 110 or in situ to determine whether the substrate 115 (or more specifically, the position of the wafer on the substrate 115) meets the specifications. As described above, the measurement of the thickness of the wafer 340 can be used to modify the pattern 500 or to send the substrate to re-grind in the wafer position that is found to be still too thick. Returning to the upper example of the first time 561 when the first wafer position 501 is polished by the polishing station 200 for one cycle, the substrate 115 can be measured after the first wafer position 501 is polished. The measured thickness may indicate that the actual material removal amount 580 is less than that predicted by the curve 530, so the actual removal rate 582 may require an adjustment 528 of the curve 530 to the position of the new curve 540. The new curve 540 now illustrates the time 430 for the true removal rate 582 corresponding to the first time 561. Further, the new time 562 for the corrected first material removal amount 514 can now be determined, and the subsequent grinding operation can use the new time 562 in its steps to grind in and near the first wafer position 501 on the future substrate . The trend line 592 illustrates an exemplary function that can be used to predict the polishing rate at the first wafer position 501. The polishing station 200 may also adjust the pattern 500 for each wafer position in a similar manner, or may adjust only the patterns of adjacent wafers based on the curve movement for the first wafer position 501.

總結以上，基板的每一量測點提供量測座標(x,y)位置及厚度資訊至研磨站200上的控制器190，且基於使用者所界定標的厚度，研磨站200決定材料移除量412及針對每一研磨區域(亦即，晶片位置)所需研磨時間430。在針對每一研磨區域的每一配方步驟中自動插入研磨參數，例如研磨壓力、時間、及操作速度。配方步驟的收集成為使用於特定基板115的研磨配方。在研磨站200上研磨基板115之後，在計量站110或其他合適位置處再次量測基板115，且厚度資料發送回到研磨站200以產生及調整使用於發展後續基板上研磨配方的移除率資訊(圖形)。To summarize the above, each measurement point of the substrate provides measurement coordinate (x, y) position and thickness information to the controller 190 on the polishing station 200, and based on the thickness of the target defined by the user, the polishing station 200 determines the amount of material removed 412 and the required polishing time 430 for each polishing area (ie, wafer position). Automatically insert grinding parameters, such as grinding pressure, time, and operating speed, in each recipe step for each grinding area. The collection of the recipe steps becomes the polishing recipe used on the specific substrate 115. After the substrate 115 is polished on the polishing station 200, the substrate 115 is measured again at the metering station 110 or other suitable locations, and the thickness data is sent back to the polishing station 200 to generate and adjust the removal rate for the development of subsequent polishing recipes on the substrate Information (graphics).

第6圖為根據本發明的實施例圖示用於基板的研磨操作之示意流程圖。方法600始於步驟610，其中在計量站處預先量測基板。計量站在對應未來晶片的每一座標位置處量測厚度。在步驟620處，計量站提供基板上每一座標位置處的厚度給研磨系統。Fig. 6 is a schematic flow chart illustrating a polishing operation for a substrate according to an embodiment of the present invention. The method 600 begins at step 610, where the substrate is pre-measured at a metering station. The measuring station measures the thickness at each coordinate position corresponding to the future wafer. At step 620, the metering station provides the thickness at each coordinate position on the substrate to the polishing system.

在步驟630處，針對基板上每一晶片位置的厚度決定晶片改正(厚度改正)。可藉由在地座標系統所建立的計畫晶片之界線及邊界在基板上界定晶片位置。例如，(X,Y)座標值可指示已知大小及定向之晶片的左下起始位置。在此方式中，可映射出每一晶片位置於基板的表面上。可藉由比較針對該晶片位置的界定標的厚度與所量測厚度來形成晶片改正。晶片改正對應至自標的規格的偏離及在每一位置處欲執行的研磨量以移除材料且使晶片位置符合規格。在晶片改正小於或約為零的實例中，可設定晶片改正為零，因為材料的移除或特定晶片位置的薄化可為非所欲的。At step 630, a wafer correction (thickness correction) is determined for the thickness of each wafer position on the substrate. The chip position can be defined on the substrate by the boundaries and boundaries of the planned chip created in the geo-coordinate system. For example, the (X, Y) coordinate value can indicate the lower left starting position of a wafer of known size and orientation. In this way, each wafer position can be mapped on the surface of the substrate. The chip correction can be formed by comparing the thickness of the delimiter for the chip position with the measured thickness. The chip correction corresponds to the deviation of the self-standard specifications and the amount of grinding to be performed at each position to remove material and make the wafer position meet the specifications. In instances where the wafer correction is less than or about zero, the wafer correction can be set to zero because the removal of material or the thinning of a particular wafer location may be undesirable.

在步驟640處，自晶片改正形成研磨配方。將所需的一數量的研磨步驟插入配方。在研磨配方中，針對對應配方中的步驟之每一晶片位置提供多種輸入，例如晶片改正的數值及研磨處理參數。使用界定晶片位置的基板上的x及y偏移以及晶片的寬度及高度以界定基板的每一研磨區域。因此，可有實質相等數量的晶片與研磨區域，且兩者可為一致的。At step 640, the polishing recipe is formed from the wafer correction. Insert the required number of grinding steps into the recipe. In the polishing recipe, a variety of inputs are provided for each wafer position corresponding to the steps in the recipe, such as the value of the wafer correction and the polishing process parameters. The x and y offsets on the substrate defining the wafer position and the width and height of the wafer are used to define each polishing area of the substrate. Therefore, there can be a substantially equal number of wafers and polishing areas, and the two can be the same.

在步驟650處，針對基板上每一研磨區域計算研磨時間。此外，可針對基板上每一研磨區域計算研磨壓力及振盪速度以及其他研磨參數。研磨時間係由繪製於一圖形(此後稱為移除率圖形)上的移除量(y軸)對時間(x軸)曲線來取得。移除率圖形可相似地在y軸上繪製時間對上在x軸上繪製欲移除的材料量。單一移除率圖形可對應基板的整體表面，使得每一晶片位置使用相同移除率圖形以止步於研磨配方中針對每一晶片位置的研磨時間。或者，複數個移除率圖形之每一者可對應至基板上分離的晶片位置。在此方式中，每一晶片位置處的移除量具有對應曲線繪圖以決定針對每一晶片位置處的晶片改正的研磨時間。而在另一選擇的變體中，移除率圖形可對應至一群組的晶片或基板區域。而在其他實施例中，每一移除率圖形可額外對應至一組唯一的研磨壓力及振盪速度。At step 650, the polishing time is calculated for each polishing area on the substrate. In addition, the polishing pressure and oscillation speed and other polishing parameters can be calculated for each polishing area on the substrate. The polishing time is obtained from the removal amount (y-axis) versus time (x-axis) curve drawn on a graph (hereinafter referred to as the removal rate graph). The removal rate graph can similarly plot the time on the y-axis versus the amount of material to be removed on the x-axis. A single removal rate pattern can correspond to the entire surface of the substrate, so that each wafer position uses the same removal rate pattern to stop the polishing time for each wafer position in the polishing recipe. Alternatively, each of the plurality of removal rate patterns may correspond to the positions of the separated wafers on the substrate. In this manner, the removal amount at each wafer position has a corresponding curve plot to determine the polishing time for the wafer correction at each wafer position. In another alternative variant, the removal rate pattern can correspond to a group of wafer or substrate areas. In other embodiments, each removal rate pattern may additionally correspond to a unique set of grinding pressure and oscillation speed.

可自啟動程序或校正晶圓產生初始的移除率圖形。或者，可自理論或預測結果計算初始的移除率圖形。該預測結果可使用耗材中剩餘的使用壽命之長度。仍為或者，可自研磨系統中最近處理的基板取得初始的移除率圖形。可在處理期間藉由自量測基板後研磨且比較結果與自移除率圖形所取得之配方而決定真實移除率來調整移除率圖形。例如，移除率圖形可指示約3秒的移除時間將自基板上特定晶片位置移除約3Å的材料。在研磨後量測特定晶片位置之後，可反饋移除材料中之差異且使用以調整移除率圖形以用於後續基板上，以更精確地取得研磨時間來移除材料。移除率圖形的調整可對應至移動至相關聯於真實材料移除量的移除率圖形上的時間值的交叉處的值的繪圖。在一些實例中，可在量測或變更移除率值中及附近局部平緩化移除率圖形上的分離值。The initial removal rate graph can be generated from the start-up process or the calibration wafer. Alternatively, the initial removal rate graph can be calculated from the theoretical or predicted results. The prediction result can use the length of service life remaining in the consumables. Still or, the initial removal rate pattern can be obtained from the most recently processed substrate in the polishing system. The removal rate can be adjusted by determining the true removal rate during the processing by measuring the substrate after polishing and comparing the result with the recipe obtained from the removal rate graph. For example, the removal rate graph may indicate that a removal time of about 3 seconds will remove about 3Å of material from a specific wafer position on the substrate. After measuring the position of a specific wafer after polishing, the difference in the removed material can be fed back and used to adjust the removal rate pattern for use on the subsequent substrate, so as to obtain the polishing time more accurately to remove the material. The adjustment of the removal rate graph may correspond to a plot that moves to the value at the intersection of the time value on the removal rate graph associated with the actual material removal amount. In some examples, the separation value on the removal rate graph can be locally smoothed in and around the measurement or change of the removal rate value.

在步驟660處，針對基板自動產生配方步驟。配方步驟包含針對每一晶片位置的資訊，例如針對每一晶片的研磨時間、操作模式、研磨位置、及晶片大小。此外，配方步驟包含複數個研磨參數，例如針對研磨每一晶片位置的研磨壓力及振盪速度。配方步驟應用研磨時間至特定晶片位置以自晶片位置移除所需的改正材料量，以將基板及晶片位置置於規格內。研磨系統合適地經適用以使用研磨配方中的每一步驟來研磨單一晶片位置。在單一基板上可具有超過100個晶片位置，因而研磨配方中可具有等量的研磨步驟。優勢地，每一研磨配方中的研磨步驟之自動產生顯著地減低操作員產生個別配方的時間，且減低針對每一晶片的研磨錯誤，使研磨系統更適於生產且減低針對每一晶片的總體成本。At step 660, a recipe step is automatically generated for the substrate. The recipe step includes information for each wafer position, such as the polishing time, operation mode, polishing position, and wafer size for each wafer. In addition, the recipe step includes a plurality of polishing parameters, such as polishing pressure and oscillation speed for polishing each wafer position. The recipe step applies the grinding time to a specific wafer position to remove the required amount of correction material from the wafer position to place the substrate and wafer position within specifications. The polishing system is suitably adapted to use each step in the polishing recipe to polish a single wafer position. There can be more than 100 wafer positions on a single substrate, so the polishing recipe can have an equal number of polishing steps. Advantageously, the automatic generation of the polishing steps in each polishing recipe significantly reduces the time for the operator to generate individual recipes, and reduces the polishing errors for each wafer, making the polishing system more suitable for production and reducing the overall size for each wafer cost.

控制器可選擇配方步驟且組織配方步驟以引導基板上的研磨操作。因此，研磨模組可依特定順序組織欲執行的配方步驟。研磨模組可將步驟排序以獲得高效的材料移除，如研磨處理時間所量測。例如，研磨模組可由欲移除材料量來組織配方步驟，且優先研磨或可能一起研磨個別晶片(如若空間上便利)。或者，研磨模組可由位置組織配方步驟，且以依序方式自基板的一側移動至另一側來研磨晶片位置。而在其他選擇中，研磨模組可由研磨參數(例如，壓力及振盪速度)組織配方步驟，以依序執行相似配置的步驟。因此，內部組織針對研磨基板的研磨配方以決定一序列或順序以有效研磨基板上每一晶片。The controller can select the recipe steps and organize the recipe steps to guide the grinding operation on the substrate. Therefore, the grinding module can organize the recipe steps to be executed in a specific order. The grinding module can sequence the steps to obtain efficient material removal, as measured by the grinding process time. For example, the polishing module can organize the recipe steps by the amount of material to be removed, and prioritize polishing or possibly polishing individual wafers together (if space is convenient). Alternatively, the polishing module may organize the recipe steps by position and move in a sequential manner from one side of the substrate to the other side to polish the wafer position. In other options, the polishing module can organize the recipe steps by polishing parameters (for example, pressure and oscillation speed) to sequentially execute similarly configured steps. Therefore, the internal organization determines a sequence or sequence for the polishing recipe of the polishing substrate to effectively polish each wafer on the substrate.

在步驟670處，在計量站處量測基板。在使用自動產生的研磨配方步驟藉由研磨每一晶片位置的厚度來改正所有晶片位置之後，在計量站處量測基板，且計量工具將資料反饋至研磨系統以調整繪圖曲線，使用該繪圖曲線以計算欲研磨的下一基板的移除率。提供變更移除率圖形的即時反饋確保晶片在研磨操作完成後符合規格，即便研磨站圖示磨損耗材的標誌。At step 670, the substrate is measured at the metering station. After using the automatically generated grinding recipe step to correct all wafer positions by grinding the thickness of each wafer position, the substrate is measured at the metering station, and the metering tool feeds back the data to the grinding system to adjust the drawing curve, using the drawing curve To calculate the removal rate of the next substrate to be polished. Provides instant feedback on changing the removal rate graph to ensure that the wafer meets specifications after the polishing operation is completed, even if the polishing station shows signs of wear loss.

研磨模組所使用以發展針對研磨基板局部區域的研磨配方的方法之益處包含改良的時間及針對研磨基板上個別區域的設定中減低的錯誤。如此處描述的研磨模組之實施例可以約+/-5Å的精確度移除位於基板上局部區域(亦即，晶片)上約20Å至約200Å的材料厚度。優勢地，亦可在生產環境中使用基板局部區域上的的任何薄膜或矽上的厚度改正，而以顯著減低的成本改正超出規格的晶片位置。The benefits of the method used by the polishing module to develop polishing recipes for polishing local areas of the substrate include improved time and reduced errors in settings for polishing individual areas on the substrate. The embodiment of the polishing module as described herein can remove the material thickness of about 20 Å to about 200 Å on the local area on the substrate (ie, the wafer) with an accuracy of about +/-5 Å. Advantageously, any thin film on a local area of the substrate or thickness correction on silicon can also be used in a production environment to correct wafer positions that exceed specifications at a significantly reduced cost.

自動實行配方產生節省了顯著的時間量(否則耗時於針對基板上每一晶片產生研磨配方)而使研磨適於生產環境。本發明減低經由人為錯誤所導入配方差錯之潛在性。進一步地，可在影響研磨操作之前否定及監視耗材磨損。該等優點改良總體操作效率。依序使晶片層級研磨對使用於研發及製造層級皆為實用的，而延伸操作至處理環境。The automatic recipe generation saves a significant amount of time (otherwise it takes time to generate a polishing recipe for each wafer on the substrate) and makes the polishing suitable for the production environment. The invention reduces the potential for formula errors introduced through human error. Further, it is possible to negate and monitor the wear of consumables before affecting the grinding operation. These advantages improve overall operating efficiency. Sequentially, the wafer-level polishing is practical for both R&D and manufacturing levels, and extends the operation to the processing environment.

前述係本揭示案的實施例，可修改本揭示案的其他及進一步的實施例而不遠離其基本範疇，且該範疇由隨後的申請專利範圍所決定。The foregoing are the embodiments of the present disclosure, and other and further embodiments of the present disclosure can be modified without departing from its basic scope, and the scope is determined by the scope of subsequent patent applications.

100‧‧‧研磨系統 110‧‧‧計量站 115‧‧‧基板 120‧‧‧工廠介面 122‧‧‧機械手 190‧‧‧控制器 200‧‧‧研磨站 205‧‧‧基板接收表面 206‧‧‧基底 210‧‧‧夾具 220‧‧‧致動器組件 221‧‧‧驅動裝置 222‧‧‧研磨頭 225A‧‧‧第一致動器 225B‧‧‧第二致動器 227‧‧‧線性移動機構 230‧‧‧支撐臂 235A‧‧‧支撐臂 235B‧‧‧支撐臂 240‧‧‧流體來源 242‧‧‧支撐軸件 244‧‧‧開口 246‧‧‧周邊 248‧‧‧末端 250‧‧‧周邊 265‧‧‧研磨墊組件 266‧‧‧接觸部分 290‧‧‧控制器 292‧‧‧CPU 293‧‧‧埠 294‧‧‧系統記憶體 301‧‧‧凹槽 304‧‧‧外直徑 320‧‧‧座標系統 322‧‧‧中央 330‧‧‧第一晶片 332‧‧‧第一偏移 333‧‧‧位置 334‧‧‧第二偏移 340‧‧‧晶片 342‧‧‧局部區域 360‧‧‧y軸 380‧‧‧x軸 390‧‧‧區域 400‧‧‧圖形 412‧‧‧材料移除量 416‧‧‧y軸 420‧‧‧x軸 424‧‧‧研磨時間 430‧‧‧研磨時間 450‧‧‧曲線 452‧‧‧點 500‧‧‧圖形 501‧‧‧第一晶片位置 528‧‧‧調整 530‧‧‧曲線 532‧‧‧交叉 540‧‧‧新曲線 561‧‧‧第一時間 562‧‧‧新時間 580‧‧‧真實材料移除量 582‧‧‧真實移除率 592‧‧‧趨勢線 600‧‧‧方法 610‧‧‧步驟 620‧‧‧步驟 630‧‧‧步驟 640‧‧‧步驟 650‧‧‧步驟 660‧‧‧步驟 670‧‧‧步驟 100‧‧‧Grinding system 110‧‧‧Measuring station 115‧‧‧Substrate 120‧‧‧Factory interface 122‧‧‧Robot 190‧‧‧controller 200‧‧‧Grinding station 205‧‧‧Substrate receiving surface 206‧‧‧Base 210‧‧‧Fixture 220‧‧‧Actuator assembly 221‧‧‧Drive 222‧‧‧Grinding head 225A‧‧‧First actuator 225B‧‧‧Second Actuator 227‧‧‧Linear moving mechanism 230‧‧‧Support arm 235A‧‧‧Support arm 235B‧‧‧Support arm 240‧‧‧Fluid source 242‧‧‧Support shaft 244‧‧‧Open 246‧‧‧Surroundings 248‧‧‧End 250‧‧‧surroundings 265‧‧‧Polishing Pad Assembly 266‧‧‧Contact part 290‧‧‧controller 292‧‧‧CPU 293‧‧‧Port 294‧‧‧System memory 301‧‧‧Groove 304‧‧‧Outer diameter 320‧‧‧Coordinate System 322‧‧‧Central 330‧‧‧First chip 332‧‧‧First offset 333‧‧‧Location 334‧‧‧Second offset 340‧‧‧chip 342‧‧‧local area 360‧‧‧y axis 380‧‧‧x axis 390‧‧‧area 400‧‧‧Graph 412‧‧‧Material removal 416‧‧‧y axis 420‧‧‧x axis 424‧‧‧grinding time 430‧‧‧grinding time 450‧‧‧Curve 452‧‧‧points 500‧‧‧Graph 501‧‧‧First chip position 528‧‧‧Adjustment 530‧‧‧Curve 532‧‧‧Cross 540‧‧‧New Curve 561‧‧‧First time 562‧‧‧New Time 580‧‧‧Real material removal 582‧‧‧True removal rate 592‧‧‧Trend Line 600‧‧‧Method 610‧‧‧Step 620‧‧‧step 630‧‧‧Step 640‧‧‧step 650‧‧‧step 660‧‧‧step 670‧‧‧Step

於是可以詳細理解本揭示案上述特徵中的方式，可藉由參考實施例而具有本揭示案的更特定描述(簡短總結如上)，其中一些圖示於所附圖式中。然而，注意所附圖式僅圖示本揭示案典型的實施例，因此不考慮限制其範疇，因為本揭示案可允許其他等效實施例。Therefore, the above-mentioned features of the present disclosure can be understood in detail, and a more specific description of the present disclosure can be provided by referring to the embodiments (a brief summary is as above), some of which are shown in the accompanying drawings. However, note that the accompanying drawings only illustrate typical embodiments of the present disclosure, and therefore do not consider limiting its scope, because the present disclosure may allow other equivalent embodiments.

第1圖為針對具有計量站及研磨模組的研磨系統的示意圖。Figure 1 is a schematic diagram of a polishing system with a metering station and a polishing module.

第2圖為第1圖中所描繪研磨模組的一個實施例之示意截面視圖。Figure 2 is a schematic cross-sectional view of an embodiment of the polishing module depicted in Figure 1.

第3圖為適於在第1圖中所圖示研磨模組中研磨的基板之平面視圖。FIG. 3 is a plan view of a substrate suitable for polishing in the polishing module shown in FIG. 1. FIG.

第4圖為描繪由第1圖中所圖示研磨模組所計算的材料自基板移除率的圖形。Figure 4 is a graph depicting the removal rate of material from the substrate calculated by the polishing module shown in Figure 1.

第5圖為描繪由第1圖中所圖示研磨模組所量測的材料自基板移除率的圖形。Figure 5 is a graph depicting the removal rate of material from the substrate measured by the polishing module shown in Figure 1.

第6圖為圖示根據本發明的實施例用於基板的研磨操作之示意流程圖。Figure 6 is a schematic flow chart illustrating a polishing operation for a substrate according to an embodiment of the present invention.

為了便於理解，儘可能使用相同元件符號，以標示圖式中常見的相同元件。設想揭露於一個實施例中的元件可有利地使用於其他實施例，而無須特定敘述。In order to facilitate understanding, the same component symbols are used as much as possible to indicate the common components in the drawings. It is envisaged that the elements disclosed in one embodiment can be advantageously used in other embodiments without specific description.

國內寄存資訊 (請依寄存機構、日期、號碼順序註記) 無Domestic hosting information (please note in the order of hosting organization, date, and number) None

國外寄存資訊 (請依寄存國家、機構、日期、號碼順序註記) 無Foreign hosting information (please note in the order of hosting country, institution, date, and number) None

600:方法 600: method

610:步驟 610: Step

620:步驟 620: step

630:步驟 630: step

640:步驟 640: step

650:步驟 650: step

660:步驟 660: step

670:步驟 670: step

Claims (18)

一種研磨一基板的方法，該方法包括以下步驟：在一計量站預先量測該基板上選擇的位置處之厚度，每一位置對應至一單一晶片(die)的一位置；將使用該計量站針對該基板的該等所選擇的位置所獲得的該等厚度提供給一研磨模組的一控制器；針對該基板上每一選擇的位置決定厚度改正；針對每一選擇的位置由該等厚度改正形成一研磨配方(recipe)中的一步驟；及針對每一選擇的位置計算一研磨參數。 A method of grinding a substrate, the method comprising the following steps: a measuring station pre-measures the thickness at selected positions on the substrate, each position corresponds to a position of a single die; the measuring station will be used The thicknesses obtained for the selected positions of the substrate are provided to a controller of a polishing module; the thickness correction is determined for each selected position on the substrate; the thickness is determined for each selected position Correct a step in forming a grinding recipe; and calculate a grinding parameter for each selected position. 如請求項1所述之方法，進一步包括以下步驟：在該研磨配方中以一個別步驟研磨每一晶片位置，該研磨配方與該晶片位置相關聯。 The method according to claim 1, further comprising the step of polishing each wafer position in a separate step in the polishing recipe, and the polishing recipe is associated with the wafer position. 如請求項2所述之方法，進一步包括以下步驟：以一第二步驟研磨該基板上的一第二晶片位置。 The method according to claim 2, further comprising the following step: grinding a second wafer position on the substrate in a second step. 如請求項1所述之方法，其中該計算該研磨參數的步驟包括以下步驟：比較該等晶片改正與一移除率曲線，以決定該研磨參數，該研磨參數包含研磨時間、研磨壓力、及振盪 速度之其中一者或更多者。 The method according to claim 1, wherein the step of calculating the polishing parameters includes the following steps: comparing the wafer corrections with a removal rate curve to determine the polishing parameters, the polishing parameters including polishing time, polishing pressure, and oscillation One or more of speed. 如請求項4所述之方法，進一步包括以下步驟：在一計量站後研磨量測該基板；及調整該移除率曲線以反映該後研磨量測及使用以研磨該晶片位置的該研磨時間。 The method according to claim 4, further comprising the steps of: grinding and measuring the substrate after a measuring station; and adjusting the removal rate curve to reflect the post-grind measurement and the grinding time used to grind the wafer position . 如請求項4所述之方法，進一步包括以下步驟：決定用於該基板上每一晶片的研磨步驟之序列以最小化研磨時間。 The method according to claim 4, further comprising the step of determining the sequence of polishing steps for each wafer on the substrate to minimize the polishing time. 一種電腦可讀式儲存媒體，該電腦可讀式儲存媒體儲存一程式，在由一處理器執行時，該程式執行用於研磨一基板的操作，該操作包括以下步驟：在一計量站預先量測該基板上選擇的位置處之厚度，每一位置對應至一單一晶片(die)的一位置；將使用該計量站針對該基板的該等所選擇的位置所獲得的該等厚度提供給一研磨模組的一控制器；針對該基板上每一選擇的位置決定厚度改正；針對每一選擇的位置由該等厚度改正形成一研磨配方(recipe)中的一步驟；及針對每一選擇的位置計算一研磨參數。 A computer-readable storage medium stores a program. When executed by a processor, the program executes an operation for grinding a substrate. The operation includes the following steps: pre-measurement at a metering station Measure the thickness at selected positions on the substrate, and each position corresponds to a position of a single die; provide the thicknesses obtained for the selected positions of the substrate using the metering station to a A controller of the polishing module; determining thickness correction for each selected position on the substrate; forming a step in a polishing recipe from the thickness correction for each selected position; and for each selected position The position calculates a grinding parameter. 如請求項7所述之電腦可讀式儲存媒體，進 一步包括以下步驟：在該研磨配方中以一個別步驟研磨每一晶片位置，該研磨配方與該晶片位置相關聯。 The computer-readable storage medium as described in claim 7, further One step includes the following steps: polishing each wafer position in a separate step in the polishing recipe, and the polishing recipe is associated with the wafer position. 如請求項8所述之電腦可讀式儲存媒體，進一步包括以下步驟：以一第二步驟研磨該基板上的一第二晶片位置。 The computer-readable storage medium according to claim 8, further comprising the following step: grinding a second wafer position on the substrate in a second step. 如請求項7所述之電腦可讀式儲存媒體，其中該計算該研磨參數的步驟包括以下步驟：比較該等晶片改正與一移除率曲線，以決定該研磨參數，該研磨參數包含研磨時間、研磨壓力、及振盪速度之其中一者或更多者。 The computer-readable storage medium according to claim 7, wherein the step of calculating the polishing parameter includes the following steps: comparing the wafer correction with a removal rate curve to determine the polishing parameter, the polishing parameter including the polishing time One or more of, grinding pressure, and oscillation speed. 如請求項10所述之電腦可讀式儲存媒體，進一步包括以下步驟：在一計量站後研磨量測該基板；及調整該移除率曲線以反映該後研磨量測及使用以研磨該晶片位置的該研磨時間。 The computer-readable storage medium according to claim 10, further comprising the steps of: grinding and measuring the substrate after a measuring station; and adjusting the removal rate curve to reflect the post-grind measurement and use to grind the wafer The grinding time of the location. 如請求項10所述之電腦可讀式儲存媒體，進一步包括以下步驟：決定用於該基板上每一晶片的研磨步驟之序列以最小化研磨時間。 The computer-readable storage medium according to claim 10, further comprising the step of: determining a sequence of polishing steps for each wafer on the substrate to minimize polishing time. 一種用於化學機械研磨的自動配方的產生的系統，包括： 一處理器；及一記憶體，其中該記憶體包含一應用程式，經配置以執行用於產生研磨配方的一操作，包括以下步驟：在一計量站預先量測基板上選擇的位置處之厚度，每一位置對應至一單一晶片的一位置；將使用該計量站針對該基板的該等所選擇的位置所獲得的該等厚度提供給一研磨模組的一控制器；針對該基板上每一選擇的位置決定厚度改正；針對每一選擇的位置由該等厚度改正形成一研磨配方中的一步驟；及針對每一選擇的位置計算一研磨參數。 A system for automatic formulation generation of chemical mechanical polishing, including: A processor; and a memory, wherein the memory includes an application program configured to perform an operation for generating a grinding recipe, including the following steps: pre-measurement of the thickness at a selected position on the substrate at a measuring station , Each position corresponds to a position of a single wafer; the thicknesses obtained by using the metering station for the selected positions of the substrate are provided to a controller of a polishing module; for each position on the substrate A selected position determines the thickness correction; for each selected position, the thickness correction forms a step in a polishing recipe; and a polishing parameter is calculated for each selected position. 如請求項13所述之系統，進一步包括：在該研磨配方中以一個別步驟研磨每一晶片位置，該研磨配方與該晶片位置相關聯。 The system according to claim 13, further comprising: grinding each wafer position in a separate step in the grinding recipe, and the grinding recipe is associated with the wafer position. 如請求項14所述之系統，進一步包括：以一第二步驟研磨該基板上的一第二晶片位置。 The system according to claim 14, further comprising: grinding a second wafer position on the substrate in a second step. 如請求項13所述之系統，其中該計算該研磨參數的步驟包括：比較該等晶片改正與一移除率曲線，以決定該研磨參數，該研磨參數包含研磨時間、研磨壓力、及振盪速度之其中一者或更多者。 The system according to claim 13, wherein the step of calculating the polishing parameters includes: comparing the wafer corrections with a removal rate curve to determine the polishing parameters, the polishing parameters including polishing time, polishing pressure, and oscillation speed One or more of them. 如請求項16所述之系統，進一步包括： 在一計量站後研磨量測該基板；及調整該移除率曲線以反映該後研磨量測及使用以研磨該晶片位置的該研磨時間。 The system described in claim 16, further comprising: Measuring the substrate by post-polishing at a measuring station; and adjusting the removal rate curve to reflect the post-polishing measurement and the polishing time used to grind the wafer position. 如請求項16所述之系統，進一步包括：決定用於該基板上每一晶片的研磨步驟之序列以最小化研磨時間。 The system according to claim 16, further comprising: determining a sequence of polishing steps for each wafer on the substrate to minimize polishing time.
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TW201802981A (en) 2018-01-16
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US20180005842A1 (en) 2018-01-04
WO2018005039A1 (en) 2018-01-04

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