TWI722955B - Pixel driving device and method for driving pixel - Google Patents

Abstract

A method for driving pixels includes: In the first stage, providing a first control signal, coupling the first control signal to a pulse width modulation circuit, the pulse width modulation circuit generates a first driving voltage difference according to the first control signal and a data signal, and delivers a first driving current to a light emitting device. In the second stage, providing a second control signal, coupling the second control signal to a pulse width modulation circuit, the pulse width modulation circuit generates a second driving voltage difference according to the second control signal and the data signal, and delivers a second driving current to the light emitting device. The slope of the first control signal is different from the slope of the second control signal.

Description

Pixel driving device and pixel driving method

This case relates to a display device and method. In detail, this case relates to a pixel driving device and a pixel driving method.

Among existing pixel driving methods, it has become a trend to drive micro light emitting device (μLED) and organic light emitting device (OLED) by pulse width modulation driving method, but due to Compared with organic light-emitting diodes, micro-light-emitting diodes have high-current light-emitting characteristics. Therefore, it is more difficult to control low-gray-level low currents than providing high-gray-level high currents. Moreover, it is more difficult to control low-gray-level low currents than organic light-emitting diodes In this range, the human eye cannot subdivide the difference between two similar gray scales. Therefore, the above-mentioned technology still has many defects, and it is necessary for practitioners in the field to develop other suitable signal driving methods.

One aspect of this case involves a pixel driving method. The pixel driving method includes: providing a first control signal in a first stage, and coupling the first control signal to a pulse width modulation circuit, whereby the pulse width modulation circuit generates a first drive according to the first control signal and the data signal And output the first driving current to the light-emitting element according to the first driving voltage difference; and provide a second control signal in the second stage, and couple the second control signal to the pulse width modulation circuit, and the pulse width modulation The circuit generates a second driving voltage difference according to the second control signal and the data signal, and outputs the second driving current to a light emitting element according to the second driving voltage difference. The slope of the first control signal determines the fall time of the first pulse of the first driving current. The slope of the second control signal determines the second time pulse falling time of the second driving current. The slope of the first control signal is different from the slope of the second control signal.

Another aspect of this case involves a pixel driving device. The pixel driving device includes a first signal generating circuit and a pulse width modulation circuit. The first signal generating circuit receives the first control signal in the first stage, and couples the first control signal to the first node. The first signal generating circuit receives the second control signal in the second stage, and couples the first control signal to the first node. The pulse width modulation circuit generates the first gray level according to the first control signal and the data signal of the first node in the first stage. The pulse width modulation circuit generates a first driving voltage difference according to the first gray scale at the second node, and outputs the first driving current to the light emitting element according to the first driving voltage difference of the second node. In the second stage, the pulse width modulation circuit generates a second gray level according to the second control signal and the data signal of the first node, and generates a second driving voltage difference according to the second gray level at the second node. The second driving voltage difference of the node outputs a second driving current to the light-emitting element. The slope of the first control signal determines the fall time of a first pulse of the first driving current. The slope of the second control signal determines the fall time of a second pulse of the second driving current. The slope of the first control signal is different from the slope of the second control signal.

The following will clearly illustrate the spirit of this case with diagrams and detailed descriptions. Anyone with ordinary knowledge in the technical field who understands the embodiments of this case can change and modify the technology taught in this case without departing from the scope of this case. Spirit and scope.

The terms used herein are only to describe specific embodiments, and are not intended to limit the present application. Singular forms such as "a", "this", "this", "本" and "this", as used herein, also include plural forms.

Regarding the "include", "include", "have", "contain", etc. used in this article, they are all open terms, which means including but not limited to.

Regarding the terms used in this article, unless otherwise specified, each term usually has the usual meaning when used in this field, in the content of this case, and in the special content. Some terms used to describe the case will be discussed below or elsewhere in this specification to provide those skilled in the art with additional guidance on the description of the case.

FIG. 1 is a schematic diagram showing the structure of a pixel driving device 100 according to some embodiments of the present application. In some embodiments, as shown in FIG. 1, the pixel driving device 100 includes a pulse width modulation circuit 110 and a first signal generating circuit 120. In some embodiments, the display device (not shown in the figure) includes a plurality of pixels. Each pixel includes at least one pixel driving device 100.

In some embodiments, in order to make the operation of the pixel driving device 100 in FIG. 1 easier to understand, please refer to FIG. 2. FIG. 2 is a signal waveform diagram of the pixel driving method according to some embodiments of the present invention. . The first signal generating circuit 120 is used for receiving the first scan signal S1. In some embodiments, the first scan signal S1 includes a first control signal S11 in the first stage T1 and a second control signal S12 in the second stage T2. The slope of the first control signal S11 is different from that of the second control signal S12. Slope.

In addition, the first signal generating circuit 120 receives the first control signal S11 in the first stage T1, and couples the first control signal S11 to the first node Q1. The first signal generating circuit 120 is used for receiving the second control signal S12 in the second stage T2, and coupling the second control signal S12 to the first node Q1.

In addition, the pulse width modulation circuit 110 generates the first gray level according to the first control signal S11 and the data signal Sig of the first node Q1 in the first stage T1. The pulse width modulation circuit 110 generates a first driving voltage difference Vgs1 according to the first gray level at the second node Q2, and outputs a first driving current I1 to the light emitting element L according to the first driving voltage difference Vgs1 of the second node Q2.

In addition, the pulse width modulation circuit 110 generates a second gray-scale level according to the second control signal S12 and the data signal Sig of the first node Q1 in the second stage T2, and the pulse-width modulation circuit 110 generates a second gray-scale level according to the second gray-scale level. A second driving voltage difference Vgs2 is generated at the second node Q2, and the pulse width modulation circuit 110 outputs a second driving current I2 to the light emitting element L according to the second driving voltage difference Vgs2 of the second node Q2.

In some embodiments, in order to make the detailed element operation of the first signal generating circuit 120 in FIG. 1 easy to understand, please refer to FIG. 1 and FIG. 2 together. The first signal generating circuit 120 includes a first capacitor C1. The first capacitor C1 is used for receiving the first control signal S11 and coupling the first control signal S11 to the first node Q1 in the first stage T1. In addition, the first capacitor C1 is used to receive the second control signal S12 in the second stage T2 and couple the second control signal S12 to the first node Q1.

In some embodiments, in order to make the operation of the detailed components of the pulse width modulation circuit 110 in Figure 1 easy to understand, please refer to Figures 1 and 2 together. Please start from the top and right of the components in the figure. As the first end, the pulse width modulation circuit 110 includes a pulse width modulation unit 111, a first transistor M1, a driving transistor DM1, and a light emitting element L. In some embodiments, the first end of the light-emitting element L is electrically connected to the driving transistor DM1. The second end of the light emitting element L receives the power supply voltage (such as the system low potential).

In some embodiments, the pulse width modulation unit 111 is used to control the first gray level according to the first control signal S11 and the data signal Sig of the first node Q1 in the first stage T1. The pulse width modulation unit 111 is used for controlling the second gray level according to the second control signal S12 and the data signal Sig of the first node Q1 in the second stage T2.

In some embodiments, the first transistor M1 includes a first terminal, a second terminal, and a control terminal. The first terminal of the first transistor M1 receives the power supply voltage (such as the system high potential) and is electrically connected to the first terminal of the driving transistor DM1. The second terminal of the first transistor M1 is electrically connected to the control terminal of the driving transistor DM1 and the second node Q2.

Then, the first transistor M1 is used to generate a first driving voltage difference Vgs1 for driving the transistor DM1 at the second node Q2 according to the first gray level in the first stage T1. The first transistor M1 is used for generating a second driving voltage difference Vgs2 for driving the transistor DM1 at the second node Q2 according to the second gray level in the second stage T2.

In some embodiments, the driving transistor DM1 includes a first terminal, a second terminal, and a control terminal. The first terminal of the driving transistor DM1 receives the power supply voltage (such as the system high potential). The second end of the driving transistor DM1 is electrically connected to the light emitting element L. The control terminal of the driving transistor DM1 is electrically connected to the second node Q2.

Then, the driving transistor DM1 is used to output the first driving current I1 to the light emitting element L according to the first driving voltage difference Vgs1 of the second node Q2 in the first stage T1. The driving transistor DM1 is used for outputting the second driving current I2 to the light emitting element L according to the second driving voltage difference Vgs2 of the second node Q2 in the second stage T2.

FIG. 3 is a flowchart of the steps of a pixel driving method according to some embodiments of the present application. In some embodiments, the pixel driving method 300 can be executed by the pixel driving device 100 shown in FIG. 1.

In step 310, a first control signal is provided in the first stage, and the first control signal is coupled to the pulse width modulation circuit, and the pulse width modulation circuit generates a first driving voltage according to the first control signal and the data signal Difference, output the first driving current to the light emitting element according to the first driving voltage difference.

In some embodiments, please refer to FIG. 1, FIG. 2 and FIG. 3. The pixel driving device 100 provides the first control signal S11 in the first stage T1, and uses the first signal generating circuit 120 to convert the first control signal S11. The control signal S11 is coupled to the pulse width modulation circuit 110. The pulse width modulation circuit 110 generates the first driving voltage difference Vgs1 according to the first control signal S11 and the data signal Sig, and outputs the first driving current I1 to the light emitting element L according to the first driving voltage difference Vgs1.

In step 320, a second control signal is provided in the second stage, and the second control signal is coupled to the pulse width modulation circuit, and the pulse width modulation circuit generates a second driving voltage difference according to the second control signal and the data signal , Outputting a second driving current to the light emitting element according to the second driving voltage difference.

In some embodiments, please refer to FIG. 1, FIG. 2 and FIG. 3. The pixel driving device 100 provides the second control signal S12 in the second stage T2, and uses the first signal generating circuit 120 to convert the second control signal S12. The control signal S12 is coupled to the pulse width modulation circuit 110. The pulse width modulation circuit 110 generates a second driving voltage difference Vgs2 according to the second control signal S11 and the data signal Sig, and outputs a second driving current I2 to the light emitting element L according to the second driving voltage difference Vgs2.

It should be noted that by the above-mentioned stepwise pixel driving method, the currents in different grayscale ranges can be controlled. In some embodiments, the gray scale range corresponding to the first driving current I1 is the first gray scale range, the gray scale range corresponding to the second driving current I2 is the second gray scale range, and the first gray scale range is different from the first gray scale range. Two grayscale range. In some embodiments, the slope of the first control signal corresponds to the first gray scale range, and the slope of the first control signal corresponds to the first gray scale range. In some embodiments, the first gray scale range is 0 to 128 levels, and the second gray scale range is 129 to 255 levels.

FIG. 4 is a current timing diagram of a pixel driving method according to some embodiments of the present application. In some embodiments, as shown in Figure 4, the first driving current I1 in the first stage T1 includes a rising edge U1, an initial falling point P1, a first falling edge D11, a second falling edge D12, and a first falling end point. P11 and the second descending end point P12.

In some embodiments, in order to make the technical features of the present application easy to understand, please refer to FIG. 1, FIG. 2 and FIG. 4. When the pixel driving device 100 provides the first scan signal S1, the pulse width modulation voltage The circuit 110 generates a first driving current I1 in the first stage T1 and a second driving current I2 to the light emitting element L in the second stage T2.

In some embodiments, when the pixel driving device 100 provides a general control signal in the first stage T1, the first driving current I1 generated by the pulse width modulation circuit 110 rises along the rising edge U1, starting from the initial falling point P1 Along the first falling edge D11 to the first falling end point P11. The time difference between the initial falling point P1 and the first falling end point P11 is the first pulse falling time FT11 of the first driving current I1.

In some embodiments, compared to providing general control signals, when the pixel driving device 100 provides the first control signal S11 of FIG. 2 in the first stage T1, the first driving generated by the pulse width modulation circuit 110 The current I1 rises along the rising edge U1, from the initial falling point P1 along the second falling edge D12 to the second falling end point P12. The time difference between the initial falling point P1 and the second falling end point P12 is the first pulse falling time FT12 of the first driving current I1.

It should be noted that when the slope of the signal provided by the pixel driving device 100 is higher, the generated current drops faster and the pulse fall time is shorter. In this embodiment, the first control signal S11 in Figure 2 is an exponential waveform. The exponential waveform includes a plurality of tangent slopes. Different tangent slopes in the index will make the current falling edge drop faster. In other words, by providing the first control signal S11 The first control signal S11 in FIG. 2 can shorten the first pulse falling time FT11 of the first driving current I1 to the first pulse falling time FT12. It is further explained that by providing the first control signal S11 in FIG. 2, the fall time of the first pulse of the first driving current I1 corresponding to the first gray scale range can be improved. In some embodiments, the slope of the first control signal S11 includes a plurality of first tangent slopes, the slope of the second control signal S12 includes a plurality of second tangent slopes, and the plurality of first tangent slopes are different from the plurality of second tangent slopes. Tangent slope.

FIG. 5 is a signal waveform diagram of a pixel driving method according to some embodiments of the present application. In some embodiments, referring to FIG. 1, FIG. 2 and FIG. 5, the pixel driving device 100 can provide not only an exponential waveform as shown in FIG. 2, but also a stepped waveform as shown in FIG. 5. In some embodiments, the first scan signal S1 includes a first control signal S13 in the first stage T1 and a second control signal S14 in the second stage T2. The slope of the first control signal S13 is different from that of the second control signal S14 Slope.

It should be noted that, in this embodiment, the first control signal S13 and the second control signal S14 in Figure 5 are both stepped waveforms, and the slope of the stepped waveform depends on the step width and step height. In other words, the stepped waveform The slope is related to the gradient, and the number of steps provided by the signal depends on the duration of the first stage T1 and the second stage T2.

FIG. 6 and FIG. 7 are signal waveform diagrams of pixel driving methods according to some embodiments of the present application. In some embodiments, referring to Figs. 1, 2 and 5 to 6, the pixel driving device 100 can not only provide the exponential waveform in Fig. 2 and the stepped waveform in Fig. 5, but also Provides mixed waveforms as shown in Figure 6 and Figure 7.

In some embodiments, the first scan signal S1 includes a first control signal S15 in the first stage T1 and a second control signal S16 in the second stage T2. The slope of the first control signal S15 is different from that of the second control signal S16. Slope.

In some embodiments, the first scan signal S1 includes a first control signal S17 in the first stage T1 and a second control signal S18 in the second stage T2. The slope of the first control signal S17 is different from that of the second control signal S18. Slope.

It should be noted that the purpose of providing the exponential waveform in Figure 2 and the stepped waveform in Figure 5 is to improve the pulse fall time of the first drive current I1 in the first stage T1, and provide the results of Figures 6 and 7 The purpose of the mixed waveform is to improve the fall time of the second pulse of the second drive current I2 of T2 in the second stage.

FIG. 8 is a current timing diagram of the pixel driving method according to some embodiments of the present application. As shown in Fig. 8, the second driving current I2 includes a rising edge U2, the initial falling point P2, the first falling edge D21, the second falling edge D22, the first falling end point P21, and the first falling edge U2, which begins to rise in the first stage T1. Second, the end point is P22.

In some embodiments, when the pixel driving device 100 provides a general control signal, the second driving current I2 generated by the pulse width modulation circuit 110 rises along the rising edge U2 in the first stage T1, and starts from the second stage T2. The initial falling point P2 is along the first falling edge D21 to the first falling end point P21. The time difference between the initial falling point P2 and the first falling end point P21 is the second pulse falling time FT21 of the second driving current I2.

In some embodiments, compared to providing general control signals, when the pixel driving device 100 provides the second control signal S16 in FIG. 6 and the second control signal S18 in FIG. 7 in the second stage T2, pulse width modulation The second driving current I2 generated by the circuit 110 rises along the rising edge U2 in the first stage T1, and in the second stage T2 from the initial falling point P2 along the second falling edge D22 to the second falling end point P22. The time difference between the initial falling point P2 and the second falling end point P22 is the second pulse falling time FT22 of the second driving current I2.

It should be noted that in this embodiment, the second control signal S16 in FIG. 6 and the second control signal S18 in FIG. 7 are both linear waveforms, so that the second pulse fall time of the second drive current I2 can be FT21 can be shortened to the second pulse fall time FT22. It is further explained that by providing the second control signal S16 in FIG. 6 and the second control signal S18 in FIG. 7, the fall time of the second pulse of the second driving current I2 corresponding to the second gray scale range can be improved.

FIG. 9 is a schematic diagram showing a part of the structure of a pixel driving device according to some embodiments of the present application. In some embodiments, the pulse width modulation unit 111A in FIG. 9 corresponds to the expanded view of the structure of the pulse width modulation unit 111 in FIG. 1. In some embodiments, as shown in FIG. 9, the pulse width modulation unit 111A includes a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, and a second capacitor C2, and the rest The structure is shown in Figure 1. In order to keep the description concise, it will not be repeated here.

In addition, the second capacitor C2 includes a first terminal and a second terminal. The first end of the second capacitor C2 is electrically connected to the first end of the first transistor M1. The first terminal of the second capacitor C2 is electrically connected to the second node Q2. The second transistor M2 includes a first terminal, a second terminal and a control terminal. The first terminal of the second transistor M2 receives the power supply voltage (such as the system high potential). The second end of the second transistor M2 is electrically connected to the first end of the driving transistor DM1. The control terminal of the second transistor M2 is turned on according to the scan signal EM. The third transistor M3 includes a first terminal, a second terminal and a control terminal. The first end of the third transistor M3 is electrically connected to the second end of the driving transistor DM1. The second end of the third transistor M3 is electrically connected to the light emitting element L. The control terminal of the third transistor M3 is turned on according to the scan signal EM.

In addition, the fourth transistor M4 includes a first terminal, a second terminal and a control terminal. The first terminal of the fourth transistor M4 is electrically connected to the second node Q2. The second end of the fourth transistor M4 receives the data signal of the data line. The control terminal of the fourth transistor M4 is turned on according to the scan signal SPAM. The fifth transistor M5 includes a first terminal, a second terminal and a control terminal. The first terminal of the fifth transistor T5 is electrically connected to the first node Q1. The second end of the fifth transistor M5 is electrically connected to the second end of the fourth transistor M4. The control terminal of the fifth transistor M5 is turned on according to the scan signal SPWM.

It should be noted that the pulse width modulation function of the pulse width circuit 110 is completed by the detailed structure of the pulse width modulation unit 111A shown in FIG. 9. However, the pulse width modulation unit 111 is not limited to the structure shown in FIG. 9.

FIG. 10 is a schematic diagram showing the structure of a pixel driving device according to some embodiments of the present application. In some embodiments, as shown in FIG. 10, compared to the pixel driving device 100 in FIG. 1, the pixel driving device 100B only adds a second signal generating circuit 130B, and the rest of the structure is the same as the pixel driving device 100. In order to keep the instructions concise, I will not repeat them here. In some embodiments, the display device (not shown in the figure) includes a plurality of pixels. Each pixel includes at least one pixel driving device 100B.

In some embodiments, in order to make the operation of the pixel driving device 100B in FIG. 10 easy to understand, please refer to FIGS. 3, 10, and 14A to 14C together. FIGS. 14A to 14C are based on The signal waveform diagrams of the pixel driving methods shown in some embodiments of this case.

In some embodiments, the first signal generating circuit 120B receives the first scan signal S1 of FIG. 14A and is coupled to the pulse width modulation circuit 110B, and the second signal generating circuit 130B receives the second scan signal S2 of FIG. 14B and Coupled to the pulse width modulation circuit 110B, it should be noted that the first scan signal S1 and the second scan signal S2 will be combined at the first node Q1 to generate the third scan signal S3 in FIG. 14C. In some embodiments, the method of combining two different signals includes adding, subtracting, multiplying, dividing or any linear algebraic combination of the two signals.

In some embodiments, the first control signal S19A and the third control signal S21 are provided in the first stage T1, and the first control signal S19A and the third control signal S21 are coupled to the first node of the pulse width modulation circuit 110B Q1. The pulse width modulation circuit 110B generates the first driving voltage difference Vgs1 according to the first control signal S19A, the third control signal S21 and the data signal Sig.

In some embodiments, the second control signal S19B and the fourth control signal S22 are provided in the second stage T2, and the second control signal S19B and the fourth control signal S22 are coupled to the first node of the pulse width modulation circuit 110B Q1. The pulse width modulation circuit 110B generates a second driving voltage difference Vgs2 according to the second control signal S19B, the fourth control signal S22, and the data signal Sig.

Furthermore, the pulse width modulation circuit 110B can simultaneously improve the pulse fall time of the first drive current I1 in Figure 4 and the pulse fall of the second drive current I2 in Figure 8 according to the third scan signal S3 in Figure 14C time. For example, the first pulse falling time FT11 in Figure 4 is shortened to the first pulse falling time FT12 and the second pulse falling time FT21 in Figure 8 is shortened to the second pulse falling time FT22.

In some embodiments, referring to FIGS. 10 and 14B, the second signal generating circuit 130B includes a second capacitor C3. The second capacitor C3 of the second signal generating circuit 130B is used for receiving the third control signal S21 in the first stage T1 and coupling the third control signal S21 to the first node Q1. The second capacitor C3 of the second signal generating circuit 130B is used for In the second stage T2, the fourth control signal S22 is received and the fourth control signal is coupled to the first node Q1.

In some embodiments, as shown in FIG. 14A, the first scan signal S1 includes a first control signal S19A in the first stage T1 and a second control signal S19B in the second stage T2. The slopes of the first control signal S19A are different The slope of the second control signal S19B.

In some embodiments, as shown in FIG. 14B, the second scan signal S2 includes a third control signal S21 in the first stage T1 and a fourth control signal S22 in the second stage T2. The slope of the third control signal S21 is different The slope of the fourth control signal S22.

In some embodiments, as shown in FIG. 14C, the third scan signal S3 includes a fifth control signal S31 in the first stage T1 and a sixth control signal S32 in the second stage T2. The slope of the fifth control signal S31 is different The slope of the sixth control signal S32.

Please refer to FIG. 11, which is a schematic structural diagram of a pixel driving device according to some embodiments of the present application. As shown in Figure 11, compared to the pixel drive device 100B in Figure 10, the pixel drive device 100C only adds a first switch unit 140C, and the rest of the structure is the same as that of the pixel drive device 100B in Figure 10. For the sake of description It's concise, so I won't repeat it here. In some embodiments, the first switch unit 140C includes a sixth transistor M6 and a seventh transistor M7.

In this embodiment, please refer to FIG. 3, FIG. 11, and FIGS. 14A to 14C. The purpose of adding the first switch unit 140C is that the first switch unit 140C is turned on according to Scan PWM to turn on the low level Low Gray. SW write, thereby selectively coupling the first scan signal S1 to the first node Q1.

Then, according to the first gray scale range corresponding to the driving current, the first switch unit 140C in the first stage passes the first control signal S19A and is coupled to the first node Q1, and the second signal generating circuit 130C couples the third control signal S21 To the first node Q1.

Furthermore, according to the second gray scale range corresponding to the driving current, the first switch unit 140C disables the second control signal S19B in the second stage, and the second signal generating circuit 130C couples the fourth control signal S22 to the first node Q1 .

FIG. 12 is a schematic structural diagram of a pixel driving device according to some embodiments of the present application. In some embodiments, compared to the pixel driving device 100 in FIG. 11, the pixel driving device 100D further adds a second switch unit 150D, and the rest of the structure is the same as the pixel driving device 100C in FIG. 11, for simplicity of description , I won’t repeat it here. In some embodiments, the second switch unit 150D includes an eighth transistor M8 and a ninth transistor M9.

In this embodiment, please refer to FIG. 3, FIG. 12, and FIGS. 14A to 14C. The purpose of adding the second switch unit 150D is that the second switch unit 150D is turned on according to Scan PWM to turn on the low level Low Gray. SW write, thereby selectively coupling the second scan signal S2 to the first node Q1.

Then, according to the first gray scale range corresponding to the driving current, the first switch unit 140D allows the first control signal S19A to pass through and is coupled to the first node Q1 in the first stage, and the second switch unit 150D allows the third control signal S21 to pass and connect Coupled to the first node Q1.

Furthermore, according to the second gray scale range corresponding to the driving current, the first switch unit 140D makes the second control signal S19B not pass in the second stage, and the second switch unit 150D makes the fourth control signal S22 pass and is coupled to the first node Q1.

FIG. 13 is a schematic diagram showing the structure of a pixel driving device according to some embodiments of the present application. In some embodiments, compared to the pixel driving device 100E in FIG. 12, the pixel driving device 100E further includes an inverter V1, and the remaining structure is the same as the pixel driving device 100D in FIG. This will not be repeated here.

In this embodiment, please refer to Fig. 3, Fig. 13 and Figs. 14A to 14C together. The purpose of adding inverter V1 is to reverse the low level Low Gray SW to the high level, thereby reducing Provide a voltage level.

According to the foregoing embodiment, it can be known that this case provides a pixel driving device and a pixel driving method. The pixel driving device and pixel driving method of this case can more accurately control the gray scale of the pixel display by providing appropriate control signals at different stages. In addition, this case also provides another pixel driving device architecture, which is provided in different stages. Combine the control signals of two waveforms or provide the control signal of only one waveform, therefore, it can further control the pixels to display similar gray scales.

Although this case is disclosed as above with detailed embodiments, this case does not exclude other feasible implementation aspects. Therefore, the scope of protection of this case shall be determined by the scope of the attached patent application, and shall not be restricted by the foregoing embodiments.

For those skilled in the art, without departing from the spirit and scope of the case, various changes and modifications can be made to the case. Based on the foregoing embodiment, all changes and modifications made to this case are also covered by the scope of protection of this case.

100, 100A~100E: Pixel drive device 110,110A~110E: Pulse width modulation circuit 120, 120A~120E: The first signal generating circuit 111,111A~111E: Pulse width modulation unit Q1: The first node Q2: The second node M1: The first transistor DM1: drive transistor L: Light-emitting element Vgs: drive pressure difference I: drive current Sig: data signal S1: First scan signal C1: The first capacitor VDD: power supply voltage (system high potential) VSS: power supply voltage (system low potential) S1: First scan signal S11: The first control signal S12: Second control signal T1: the first stage T2: second stage 300: method 310~320: Step I1: first drive current U1: rising edge P1: Starting point of descent D11: First falling edge D12: second falling edge P11: First descent end point P12: Second descent end point FT11: First pulse fall time FT12: First pulse fall time S1: First scan signal S13: The first control signal S14: Second control signal S1: First scan signal S15: The first control signal S16: Second control signal S1: First scan signal S17: The first control signal S18: Second control signal I2: second drive current U2: rising edge P1: Starting point of descent D21: First falling edge D22: Second falling edge P21: First descent end point P22: The second end of descent FT21: second pulse fall time FT22: second pulse fall time C2: Capacitance M2: second transistor M3: third transistor M4: The fourth transistor M5: fifth transistor SPWM, SPAM, EM: scan signal Q1: The first node Q2: The second node M1: The first transistor DM1: drive transistor L: Light-emitting element S1: First scan signal C1: The first capacitor S2: second scan signal 130B~130E: The second signal generating circuit C3: second capacitor Sig: data signal 140C~140E: the first switch unit M6: The sixth transistor M7: seventh transistor Scan PWM: Data signal Low Gray SW: Low level 150D~150E: The second switch unit M8: Eighth Transistor M9: Ninth Transistor High Gray SW: High level V1: Inverter S1: First scan signal S19A: The first control signal S19B: Second control signal S2: second scan signal S21: Third control signal S22: Fourth control signal S3: Third scan signal S31: Fifth control signal S32: The sixth control signal

With reference to the implementation in the subsequent paragraphs and the following diagrams, you can better understand the content of this case: FIG. 1 is a schematic diagram of the structure of a pixel driving device according to some embodiments of the present application; Figure 2 is a signal waveform diagram of a pixel driving method according to some embodiments of the present case; Figure 3 is a flowchart of the steps of a pixel driving method according to some embodiments of the present case; FIG. 4 is a current timing diagram of the pixel driving method according to some embodiments of the present case; FIG. 5 is a signal waveform diagram of a pixel driving method according to some embodiments of the present case; FIG. 6 is a signal waveform diagram of a pixel driving method according to some embodiments of the present case; FIG. 7 is a signal waveform diagram of a pixel driving method according to some embodiments of the present case; FIG. 8 is a current timing diagram of a pixel driving method according to some embodiments of the present case; FIG. 9 is a schematic diagram of a part of the structure of a pixel driving device according to some embodiments of the present case; FIG. 10 is a schematic diagram of the structure of a pixel driving device according to some embodiments of the present application; Figure 11 is a schematic structural diagram of a pixel driving device according to some embodiments of the present case; Figure 12 is a schematic structural diagram of a pixel driving device according to some embodiments of the present case; FIG. 13 is a schematic structural diagram of a pixel driving device according to some embodiments of the present case; FIG. 14A is a signal waveform diagram of a pixel driving method according to some embodiments of this case; FIG. 14B is a signal waveform diagram of the pixel driving method according to some embodiments of the present application; and FIG. 14C is a signal waveform diagram of a pixel driving method according to some embodiments of the present application.

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100: Pixel drive device

110: Pulse width modulation circuit

120: The first signal generating circuit

111: Pulse width modulation unit

Q1: The first node

Q2: The second node

M1: The first transistor

DM1: drive transistor

L: Light-emitting element

Vgs: drive pressure difference

I: drive current

Sig: data signal

S1: First scan signal

C1: The first capacitor

VDD: power supply voltage (system high potential)

VSS: power supply voltage (system low potential)

Claims (10)

A pixel driving method, including: A first control signal is provided in a first stage, and the first control signal is coupled to a pulse width modulation circuit, and the pulse width modulation circuit generates a first control signal based on the first control signal and a data signal. A driving voltage difference, and outputting a first driving current to a light emitting element according to the first driving voltage difference, wherein the slope of the first control signal determines a first pulse fall time of the first driving current; and In a second stage, a second control signal is provided, and the second control signal is coupled to the pulse width modulation circuit, and the pulse width modulation circuit generates a second control signal based on the second control signal and the data signal. Two driving voltage differences, and output a second driving current to the light-emitting element according to the second driving voltage difference, wherein the slope of the second control signal determines a second pulse fall time of the second driving current, wherein the first The slope of the control signal is different from the slope of the second control signal. The pixel driving method according to claim 1, wherein the gray scale range corresponding to the first driving current is a first gray scale range, and the gray scale range corresponding to the second driving current is a second gray scale range, The first gray scale range is different from the second gray scale range. The pixel driving method according to claim 2, wherein the slope of the first control signal corresponds to the first gray scale range, and the slope of the second control signal corresponds to the second gray scale range. The pixel driving method according to claim 3, wherein the slope of the first control signal includes a plurality of first tangent slopes, wherein the slope of the second control signal includes a plurality of second tangent slopes, and wherein the first tangent slopes The slope is different from the second tangent slopes. The pixel driving method according to claim 4, wherein the first control signal is provided in the first stage, and the first control signal is coupled to the pulse width modulation circuit, whereby the pulse width modulation circuit The step of generating the first driving pressure difference according to the first control signal and the data signal includes: In the first stage, the first control signal and a third control signal are provided, and the first control signal and the third control signal are coupled to the pulse width modulation circuit, and the pulse width modulation circuit according to The first control signal, the third control signal, and the data signal generate the first driving pressure difference; The second control signal is provided in the second stage, and the second control signal is coupled to the pulse width modulation circuit, and the pulse width modulation circuit generates the second control signal and the data signal. The steps of the second driving pressure difference include: In the second stage, the second control signal and a fourth control signal are provided, the second control signal and the fourth control signal are coupled to the pulse width modulation circuit, and the pulse width modulation circuit is adapted to The second control signal and the fourth control signal generate the second driving pressure difference. A pixel driving device, including: A first signal generating circuit for receiving a first control signal in a first stage, and coupling the first control signal to a first node, wherein the first signal generating circuit is used for receiving a first control signal in a second stage A second control signal, coupling the second control signal to the first node; and A pulse width modulation circuit for generating a first gray level according to the first control signal and a data signal of the first node in the first stage, wherein the pulse width modulation circuit is based on the first A gray scale is located at a second node to generate a first driving voltage difference, and a first driving current is output to a light emitting element according to the first driving voltage difference of the second node, The pulse width modulation circuit is used for generating a second gray level according to the second control signal of the first node and the data signal in the second stage, and is located at the second gray level according to the second gray level. The node generates a second driving voltage difference, and outputs a second driving current to the light emitting element according to the second driving voltage difference of the second node, wherein the slope of the first control signal determines a first driving current of the first driving current. Pulse fall time, and the slope of the second control signal determines a second pulse fall time of the second drive current, wherein the slope of the first control signal is different from the slope of the second control signal. The pixel driving device according to claim 6, wherein the first signal generating circuit includes a first capacitor, and the first capacitor is used for receiving the first control signal and controlling the first control signal in the first stage The signal is coupled to the first node, and the first capacitor is used for receiving the second control signal in the second stage and coupling the second control signal to the first node. The pixel driving device according to claim 6, wherein the pulse width modulation circuit includes: A pulse width modulation unit for controlling the first gray level according to the first control signal and the data signal of the first node in the first stage, and for controlling the first gray level according to the first node in the second stage The second control signal and the data signal control the second gray level; A first transistor is used to generate the first driving voltage difference according to the first gray scale at the second node in the first stage, and is used to generate the first driving voltage difference according to the second gray scale at the second stage in the second stage The two nodes generate the second driving pressure difference; and A driving transistor for outputting the first driving current to the light emitting element according to the first driving voltage difference in the first stage, and for outputting the second driving current according to the second driving voltage difference in the second stage To the light-emitting element. The pixel driving device described in claim 8, further comprising: A second signal generating circuit includes a second capacitor, wherein the second capacitor is used to receive a third control signal in the first stage and couple the third control signal to the first node, wherein the second capacitor is used In the second stage, a fourth control signal is received and the fourth control signal is coupled to the first node. The pixel driving device described in claim 9, further comprising: A first switch unit for selectively controlling the first control signal and the second control signal to be coupled to the first node; and A second switch unit for selectively controlling the third control signal and the fourth control signal to be coupled to the first node; The first switch unit is used to couple the first control signal to the first node in the first stage, and the second switch unit is used to couple the third control signal to the first node in the first stage. A node, wherein the second switch unit is used for coupling the fourth control signal to the first node in the second stage.

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