TWI722827B - Pixel array substrate - Google Patents

Abstract

A pixel array substrate including a substrate, a plurality of first signal lines, a plurality of pixel structures, a plurality of second signal lines, a plurality of light sensing units, a plurality of third signal lines and a plurality of touch units is provided. The first signal lines are arranged on the substrate along a first direction. The pixel structures are disposed between the first signal lines. The second signal lines are arranged on the substrate along the first direction. The light sensing units are disposed between the second signal lines. Any two adjacent light sensing units are electrically connected to one of the second signal lines and are symmetrically arranged about it. The third signal lines and the second signal lines are alternately arranged on the substrate. The touch units are electrically connected to the third signal lines.

Description

Pixel array substrate

The present invention relates to a circuit substrate, and more particularly to a pixel array substrate with display, touch and optical sensing functions.

Nowadays, fingerprint recognition is widely used in various electronic products, and portable mobile devices such as smart phones and tablet computers are the most common. At the same time, in order to pursue a better visual experience, the display screens of current electronic products are gradually moving towards the development direction of high screen ratio and narrow bezel. The fingerprint recognition module needs to be changed and placed under the display screen. Therefore, under-screen fingerprint recognition has been developed. (Fingerprint on Display; FOD) technology.

In order to simplify the manufacturing process of such a touch display panel with under-screen fingerprint recognition, a touch display technology that integrates a fingerprint recognition module and a touch sensing module on a pixel array substrate is proposed. The aperture ratio of the pixel is maximized, and the circuit traces used to transmit fingerprint recognition signals and touch sensing signals must overlap with the display signal lines. In this way, it is necessary to add additional film layers to provide sufficient layout space for the circuit configuration, resulting in an increase in production costs.

The present invention provides a pixel array substrate, which has a relatively large layout space for circuit configuration.

The invention provides a pixel array substrate which can simplify the manufacturing process.

The pixel array substrate of the present invention includes a substrate, multiple first signal lines, multiple pixel structures, multiple second signal lines, multiple light sensing units, multiple third signal lines, and multiple touch units . A plurality of first signal lines are arranged on the substrate along the first direction. A plurality of pixel structures are arranged between the first signal lines. A plurality of second signal lines are arranged on the substrate along the first direction. A plurality of light sensing units are arranged between the second signal lines and are electrically connected to the second signal lines. Any two adjacent ones of the light sensing units are symmetrically arranged with one of the second signal lines as the center. A plurality of third signal lines and these second signal lines are alternately arranged on the substrate. The touch control units are electrically connected to the third signal lines.

The pixel array substrate of the present invention includes a substrate, multiple first signal lines, multiple pixel structures, multiple second signal lines, multiple light sensing units, multiple third signal lines, and multiple touch units . A plurality of first signal lines are arranged on the substrate along the first direction. A plurality of pixel structures are arranged between the first signal lines. A plurality of second signal lines are arranged on the substrate along the first direction. A plurality of light sensing units are arranged between the second signal lines, and any two adjacent ones of the light sensing units are electrically connected to one of the second signal lines. A plurality of third signal lines and these second signal lines are alternately arranged on the substrate. The touch control units are electrically connected to the third signal lines.

Based on the foregoing, in the pixel array substrate of an embodiment of the present invention, a plurality of pixel structures for display and a plurality of first signal lines are alternately arranged on the substrate along a direction. The light sensing unit for optical sensing and a plurality of second signal lines are also alternately arranged on the substrate along the direction. By symmetrically arranging and electrically connecting any two adjacent light sensing units with one of the second signal lines as the center, the layout space of the circuit configuration can be increased, and the manufacturing process of the pixel array substrate can be simplified. And reduce its production cost.

As used herein, "approximately", "approximately", "essentially", or "substantially" includes the stated value and the average value within the acceptable deviation range of the specific value determined by a person of ordinary skill in the art, taking into account all The measurement in question and the specific number of errors associated with the measurement (ie, the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or, for example, within ±30%, ±20%, ±15%, ±10%, ±5%. Furthermore, "about", "approximately", "essentially", or "substantially" used in this article can be based on measurement properties, cutting properties, or other properties to select a more acceptable deviation range or standard deviation. Not one standard deviation applies to all properties.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements can also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements. As used herein, "connection" can refer to physical and/or electrical connection. Furthermore, "electrical connection" can mean that there are other components between the two components.

In addition, relative terms such as "lower" or "bottom" and "upper" or "top" can be used herein to describe the relationship between one element and another element, as shown in the figure. It should be understood that relative terms are intended to include different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one figure is turned over, elements described as being on the "lower" side of other elements will be oriented on the "upper" side of the other elements. Therefore, the exemplary term "lower" may include an orientation of "lower" and "upper," depending on the specific orientation of the drawing. Similarly, if the device in one figure is turned over, elements described as "below" or "below" other elements will be oriented "above" the other elements. Thus, the exemplary terms "above" or "below" can include an orientation of above and below.

Reference will now be made in detail to the exemplary embodiments of the present invention, and examples of the exemplary embodiments are illustrated in the accompanying drawings. Whenever possible, the same component symbols are used in the drawings and descriptions to indicate the same or similar parts.

FIG. 1 is a schematic top view of a pixel array substrate according to an embodiment of the invention. FIG. 2 is an enlarged schematic diagram of a partial area of the pixel array substrate of FIG. 1. FIG. 3 is a schematic circuit diagram of the pixel array substrate of FIG. 2. 4 is a schematic cross-sectional view of the pixel array substrate of FIG. 2. Specifically, for the sake of clarity, FIG. 1 omits the scan line GL, the first signal line SL1, the second signal line SL2, the fourth signal line SL4, the fifth signal line SL5, and the sixth signal line of FIG. 2 for clarity. Illustration of SL6; Figure 2 omits the buffer layer 120, the gate insulating layer 130, the interlayer insulating layer 140, the first flat layer 150, the insulating layer 160, the second flat layer 170, the insulating layer 180, the insulating layer 190, A drawing of the touch electrode TE, the first active element T1, the sensing element 210, the connecting electrode CE1, the connecting electrode CE2, and the connecting electrode CE3.

Referring to FIGS. 1, 2 and 3, the pixel array substrate 10 includes a substrate 110, a plurality of scan lines GL, a plurality of first signal lines SL1 (for example, data lines), and a plurality of pixel structures PX. For example, these scan lines GL are arranged on the substrate 110 along the direction Y and extend in the direction X. The first signal lines SL1 are arranged on the substrate 110 along the direction X and extend in the direction Y. The pixel structures PX are respectively arranged between the first signal lines SL1. In this embodiment, the direction X may be perpendicular to the direction Y, but it is not limited to this. More specifically, these pixel structures PX are arrayed on the substrate 110, and are respectively electrically connected to a corresponding scan line GL and a corresponding first signal line SL1.

In particular, the pixel array substrate 10 of this embodiment is suitable for a full-screen display panel with under-screen fingerprint recognition, touch sensing, and display functions, and such a full-screen display panel It is suitable to be mounted on portable electronic devices (such as smart phones, tablets or smart watches). The full-screen display panel is, for example, a non-self-luminous display panel. For example, a full-screen display panel may include a pixel array substrate 10, a display medium layer, and a counter substrate. The display medium layer is sandwiched between the pixel array substrate 10 and the counter substrate and includes a plurality of liquid crystal molecules. In other words, the full-screen display panel here is a liquid crystal display panel. It should be understood that such a full-screen display panel needs to be equipped with a backlight module to achieve the effect of displaying images. However, the present invention is not limited to this. According to other embodiments, the full-screen display panel may also be a self-luminous display panel. That is, the display medium layer may include a plurality of light-emitting diode elements. The light-emitting diode element is, for example, an organic light-emitting diode (OLED), a micro light-emitting diode (Micro LED), and a sub-millimeter light-emitting diode (mini light-emitting diode). , Mini LED).

Furthermore, the pixel array substrate 10 further includes a plurality of second signal lines SL2 and a plurality of light sensing units LSU. The second signal lines SL2 are arranged on the substrate 110 along the direction X and extend in the direction Y. The light sensing units LSU are respectively disposed between the second signal lines SL2, and are electrically connected to the second signal lines SL2. In this embodiment, the second signal lines SL2 include a plurality of second signal lines SL2a and a plurality of second signal lines SL2b, and the second signal lines SL2a and the second signal lines SL2b are alternately arranged on the substrate 110. More specifically, a second signal line SL2a and a second signal line SL2b are respectively provided between each light sensing unit LSU and the two light sensing units LSU adjacent to it.

For example, the plurality of light sensing units LSU includes a first light sensing unit LSU1, a second light sensing unit LSU2, and a third light sensing unit LSU3 that are arranged in the direction X and are adjacent to each other. A second signal line SL2b is provided between the first light sensing unit LSU1 and the second light sensing unit LSU2, and a second signal line SL2b is provided between the second light sensing unit LSU2 and the third light sensing unit LSU3 SL2a. In this embodiment, the light sensing unit LSU includes a sensing element 210, a first active element T1, and a second active element T2, but it is not limited thereto. The first active element T1 is electrically connected between the sensing element 210 and the second signal line SL2b, and the second active element T2 is electrically connected between the sensing element 210 and the second signal line SL2a. In this embodiment, the second signal line SL2a is, for example, a high potential side power line (SVDD), and the second signal line SL2b is, for example, a low potential side power line (SVSS), but it is not limited to this.

It is worth noting that any two neighbors of the light sensing units LSU are symmetrically arranged with one of the second signal lines SL2 as the center. For example, the first light sensing unit LSU1 and the second light sensing unit LSU2 are symmetrically arranged with the second signal line SL2b as the center. More specifically, the first active element T1, the sensing element 210, and the second active element T2 of the first light sensing unit LSU1 and the second light sensing unit LSU2 are all facing away from the same second signal line SL2b ( That is, the directions of the second signal line SL2b) located between the first light sensing unit LSU1 and the second light sensing unit LSU2 are arranged in sequence. Similarly, the second light sensing unit LSU2 and the third light sensing unit LSU3 are symmetrically arranged with the second signal line SL2a as the center. More specifically, the second active element T2, the sensing element 210, and the first active element T1 of the second light sensing unit LSU2 and the third light sensing unit LSU3 are all facing away from the same second signal line SL2a ( That is, the directions of the second signal line SL2a) located between the second light sensing unit LSU2 and the third light sensing unit LSU3 are arranged in sequence.

From another point of view, any two neighbors of the light sensing unit LSU are electrically connected to one of the second signal lines SL2. For example, the first active element T1 of the first light sensing unit LSU1 and the first active element T1 of the second light sensing unit LSU2 are electrically connected to the first light sensing unit LSU1 and the second light sensing unit LSU2 The second signal line SL2b between. Similarly, the second active element T2 of the second light sensing unit LSU2 and the second active element T2 of the third light sensing unit LSU3 are electrically connected between the second light sensing unit LSU2 and the third light sensing unit LSU3. The second signal line SL2a between. That is, the first light sensing unit LSU1 and the second light sensing unit LSU2 can share the same second signal line SL2b, and the second light sensing unit LSU2 and the third light sensing unit LSU3 can share the same second signal line SL2b. The signal line SL2a. Accordingly, the layout space of the pixel array substrate 10 for circuit configuration can be increased.

Furthermore, the pixel array substrate 10 further includes a plurality of third signal lines SL3 and a plurality of touch units TU. These third signal lines SL3 are arranged along the direction X and extend in the direction Y. The third signal line SL3 and the second signal line SL2 are alternately arranged on the substrate 110. The multiple touch units TU are electrically connected to the third signal lines SL3. In this embodiment, the multiple touch units TU can be arranged in multiple columns and multiple rows in the direction X and the direction Y, respectively, and the vertical projection of the area occupied by each touch unit TU on the substrate 110 can overlap the multiple A vertical projection of an area occupied by a pixel structure PX and a plurality of light sensing units LSU on the substrate 110. For example, the third signal line SL3 can be a touch sensing signal line, but it is not limited to this.

In this embodiment, the pixel array substrate 10 may further include a plurality of fourth signal lines SL4, a plurality of fifth signal lines SL5, and a plurality of sixth signal lines SL6. The plurality of fourth signal lines SL4 are arranged along the direction X and extend in the direction Y. The fourth signal line SL4 and the second signal line SL2 are alternately arranged on the substrate 110. The plurality of fifth signal lines SL5 and the plurality of sixth signal lines SL6 are arranged along the direction Y and extend in the direction X. The fifth signal line SL5, the sixth signal line SL6 and the scan line GL are alternately arranged on the substrate 110. For example, the second active device T2 of the light sensing unit LSU is electrically connected between the fourth signal line SL4 and the second signal line SL2a. The plurality of sensing elements 210 of the plurality of light sensing units LSU arranged along the direction X are electrically connected to the same fifth signal line SL5. The plurality of first active devices T1 of the plurality of light sensing units LSU arranged along the direction X are electrically connected to the same sixth signal line SL6. In this embodiment, the fourth signal line SL4 can be used to transmit DC voltage signals to an external driver chip (not shown), the fifth signal line SL5 can be used to transmit pulse voltage signals, and the sixth signal line SL6 can be used for resetting ( reset) signal line, but the present invention is not limited to this.

Please refer to FIG. 4, the pixel array substrate 10 further includes a buffer layer 120. In this embodiment, the method of forming an active device (for example, the first active device T1) may include the following steps: sequentially forming a semiconductor pattern SC, a gate insulating layer 130, a gate electrode G, an interlayer insulating layer 140 on the buffer layer 120, Source S and Drain D. The semiconductor pattern SC has a source region SR, a lightly doped source region LSR, a channel region CH, a lightly doped drain region LDR, and a drain region DR. The gate electrode G overlaps the channel region CH of the semiconductor pattern SC in the normal direction of the substrate 110 (for example, direction Z), and the source electrode S and the drain electrode D penetrate the interlayer insulating layer 140 and the gate insulating layer 130 to electrically connect the semiconductor The source region SR and the drain region DR of the pattern SC.

In this embodiment, the gate G of the active device (for example, the first active device T1) can be selectively disposed above the semiconductor pattern SC (that is, the gate G, the source S, and the drain D are located on the semiconductor pattern SC On the same side of the TFT) to form a top-gate TFT, but the present invention is not limited to this. In other embodiments, the gate G of the active device can be selectively disposed under the semiconductor pattern SC (that is, the gate G is located between the semiconductor pattern SC and the substrate 110) to form a bottom gate type thin film transistor (Bottom-gate TFT).

It should be noted that the gate electrode G, the source electrode S, the drain electrode D, the semiconductor pattern SC, the buffer layer 120, the gate insulating layer 130, and the interlayer insulating layer 140 can be used by any person having ordinary knowledge in the art. Any gate, any source, any drain, any semiconductor pattern, any buffer layer, any gate insulating layer, and any interlayer insulating layer of the pixel array substrate are implemented, and the gate G, the source The electrode S, the drain electrode D, the semiconductor pattern SC, the buffer layer 120, the gate insulating layer 130, and the interlayer insulating layer 140 can be respectively formed by any method known to those with ordinary knowledge in the art, so they are not here. Go into details.

In this embodiment, the pixel array substrate 10 may also optionally include at least one light-shielding pattern SM. The light-shielding pattern SM is disposed between the buffer layer 120 and the substrate 110 and overlaps the active device (such as the first active device T1) in the direction Z to prevent the electrical properties of the semiconductor pattern SC from deteriorating under long-term backlight irradiation. On the other hand, in this embodiment, the materials of the fifth signal line SL5, the sixth signal line SL6 (as shown in FIG. 2) and the scan line GL can also be selectively the same. That is, the fifth signal line SL5, the sixth signal line SL6, and the scan line GL may belong to the same film layer, and the film layer is located between the gate insulating layer 130 and the interlayer insulating layer 140, but is not limited to this.

Furthermore, in this embodiment, the method of forming the sensing element 210 may include the following steps: sequentially forming a first electrode 211, a sensing layer 212, a first flat layer 150, and a second electrode on the interlayer insulating layer 140 213. The sensing layer 212 is sandwiched between the first electrode 211 and the second electrode 213. The first flat layer 150 covers the active device and has an opening 150 a overlapping the sensing layer 212. The second electrode 213 of the sensing element 210 extends into the opening 150a to cover the portion of the sensing layer 212 exposed by the opening 150a.

For example, the first electrode 211 of the sensing element 210 is electrically connected to the source S of the first active element T1, and the second electrode 213 of the sensing element 210 is electrically connected to the fifth signal line SL5. In this embodiment, the second electrode 213 of the sensing element 210 is electrically connected to the fifth signal line SL5 through the connecting electrode CE1. It is worth mentioning that in this embodiment, the first signal line SL1, the connecting electrode CE1, the first electrode 211 of the sensing element 210, the source S and the drain D of the active element may belong to the same film layer (that is, The materials of these components can be selectively the same), but the present invention is not limited to this.

In this embodiment, the material of the sensing layer 212 is, for example, silicon-rich oxide (SRO) or other suitable materials. The first electrode 211 is, for example, a reflective electrode. The material of the reflective electrode includes metals, alloys, nitrides of metallic materials, oxides of metallic materials, oxynitrides of metallic materials, or other suitable materials, or metallic materials and Stacked layers of other conductive materials. The second electrode 213 is, for example, a light-transmitting electrode, and the material of the light-transmitting electrode includes metal oxides, such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, or other suitable ones. Oxide, or a stacked layer of at least two of the above. However, the present invention is not limited to this. According to other embodiments, the first electrode 211 may also be a light transmissive electrode.

The pixel array substrate 10 further includes an insulating layer 160, a second flat layer 170, an insulating layer 180, and an insulating layer 190 sequentially stacked on the sensing element 210. The insulating layer 160 directly covers the first flat layer 150 and the sensing element 210. In this embodiment, the second signal line SL2 (for example, the second signal line SL2a and the second signal line SL2b), the third signal line SL3 and the fourth signal line SL4 may belong to the same film layer (that is, the materials of these components (Optionally the same), and this film layer is located between the insulating layer 160 and the second flat layer 170.

Furthermore, the touch electrode TE of the touch unit TU can be disposed between the insulating layer 180 and the insulating layer 190, and is electrically connected to the third signal line SL3 through the connecting electrode CE2. For example, the pixel structure PX may include at least one active device (not shown) and a pixel electrode PE electrically connected to the active device. The pixel electrode PE may be disposed on the insulating layer 190. In this embodiment, the pixel electrode PE and the connecting electrode CE2 may belong to the same film layer. In other words, the material of the pixel electrode PE and the connecting electrode CE2 can be selectively the same, but not limited to this.

In this embodiment, in order to increase the aperture ratio of the pixel structure PX, the plurality of second signal lines SL2, the plurality of third signal lines SL3, and the plurality of fourth signal lines SL4 may overlap in the direction Z Multiple first signal lines SL1, as shown in FIG. 2 and FIG. 4. It is worth noting that in this embodiment, any two neighbors passing through the plurality of light sensing units LSU are symmetrically arranged with one of the plurality of second signal lines SL2 as the center, and any of these light sensing units LSU are arranged symmetrically. Two adjacent ones are electrically connected to one of the second signal lines SL2, which can increase the layout space of the pixel array substrate 10 for circuit configuration, for example: a plurality of third signal lines SL3 for touch sensing And the plurality of second signal lines SL2 and the plurality of fourth signal lines SL4 for optical sensing can be formed on the same film layer. In other words, an increase in the number of required film layers can be avoided, which helps reduce production costs.

It should be noted that, in this embodiment, the width of the second signal line SL2, the third signal line SL3, and the fourth signal line SL4 in the direction X may be smaller than the width of the first signal line SL1 in the direction X, but this The invention is not limited to this. In other embodiments, the width of the second signal line SL2, the third signal line SL3, and the fourth signal line SL4 in the direction X may also be equal to the width of the first signal line SL1 in the direction X. On the other hand, in this embodiment, the second signal line SL2, the third signal line SL3, and the fourth signal line SL4 can completely overlap the first signal lines SL1, but the invention is not limited to this. In other embodiments, the second signal line SL2, the third signal line SL3, and the fourth signal line SL4 may also partially overlap the first signal lines SL1.

Other embodiments will be listed below to describe the disclosure in detail, wherein the same components will be marked with the same symbols, and the description of the same technical content will be omitted. For the omitted parts, please refer to the foregoing embodiments, and will not be repeated hereafter.

5 is a schematic cross-sectional view of a pixel array substrate according to another embodiment of the invention. Please refer to FIG. 5, the main difference between the pixel array substrate 11 of this embodiment and the pixel array substrate 10 of FIG. 4 is that the configuration film layers of the sensing elements are different. Specifically, the sensing element 210A of the pixel array substrate 11 is disposed on the insulating layer 160. In this embodiment, the first electrode 211A of the sensing element 210A is located between the second flat layer 170 and the insulating layer 160, and penetrates the insulating layer 160 and the first flat layer 150 to electrically connect to the source of the first active element T1 S. The second flat layer 170 has an opening 170 a overlapping the sensing layer 212, and the second electrode 213A extends into the opening 170 a to directly cover the sensing layer 212.

In this embodiment, the second electrode 213A of the sensing element 210A is electrically connected to the fifth signal line SL5 through the connecting electrode CE3 and the connecting electrode CE1, and the connecting electrode CE3, the first electrode 211A and the first electrode 211A of the sensing element 210A are electrically connected to the fifth signal line SL5. The second signal line SL2, the third signal line SL3, and the fourth signal line SL4 may belong to the same film layer. On the other hand, the touch electrode TE of the touch unit TU is electrically connected to the third signal line SL3 through the connecting electrode CE2a and the connecting electrode CE2b, and the connecting electrode CE2b and the second electrode 213A of the sensing element 210A can belong to the same film. Layer, but the present invention is not limited to this.

FIG. 6 is a schematic cross-sectional view of a pixel array substrate according to another embodiment of the present invention. Please refer to FIG. 6, the difference between the pixel array substrate 12 of this embodiment and the pixel array substrate 10 of FIG. 4 is that the electrode connection modes of the sensing elements are different. Specifically, the first electrode 211B of the sensing element 210B of the pixel array substrate 12 penetrates the interlayer insulating layer 140 to be electrically connected to the fifth signal line SL5. The second electrode 213B of the sensing element 210B penetrates the first flat layer 150 to electrically connect to the source S of the first active element T1.

FIG. 7 is a schematic cross-sectional view of a pixel array substrate according to still another embodiment of the present invention. Please refer to FIG. 7, the difference between the pixel array substrate 13 of this embodiment and the pixel array substrate 11 of FIG. 5 is that the electrode connection modes of the sensing elements are different. Specifically, the first electrode 211C of the sensing element 210C of the pixel array substrate 13 is directly electrically connected to the fifth signal line SL5 through the connecting electrode CE3, and the second electrode 213C of the sensing element 210C is electrically connected to the first active element. The source S of T1 is electrically connected. In this embodiment, the pixel array substrate 13 may further include a connecting electrode CE4 disposed between the insulating layer 160 and the second flat layer 170, and the second electrode 213C of the sensing element 210C is electrically connected through the connecting electrode CE4. Connect the source S of the first active element T1.

In summary, in the pixel array substrate of an embodiment of the present invention, a plurality of pixel structures for display and a plurality of first signal lines are alternately arranged on the substrate along a direction. The light sensing unit for optical sensing and a plurality of second signal lines are also alternately arranged on the substrate along the direction. By symmetrically arranging and electrically connecting any two adjacent light sensing units with one of the second signal lines as the center, the layout space of the circuit configuration can be increased, and the manufacturing process of the pixel array substrate can be simplified. And reduce its production cost.

10, 11, 12, 13: pixel array substrate

110: substrate

120: buffer layer

130: gate insulation

140: Interlayer insulation layer

150: first flat layer

150a, 170a: opening

160, 180, 190: insulating layer

170: second flat layer

210, 210A, 210B, 210C: sensing element

211, 211A, 211B, 211C: first electrode

212: Sensing layer

213, 213A, 213B, 213C: second electrode

CE1, CE2, CE2a, CE2b, CE3, CE4: connecting electrodes

CH: Channel area

D: Dip pole

DR: Drain region

G: Gate

GL: scan line

LDR: Lightly doped drain region

LSR: Lightly doped source region

LSU, LSU1, LSU2, LSU3: light sensing unit

PE: pixel electrode

PX: Pixel structure

S: source

SC: Semiconductor pattern

SL1: The first signal line

SL2, SL2a, SL2b: the second signal line

SL3: The third signal line

SL4: The fourth signal line

SL5: Fifth signal line

SL6: The sixth signal line

SM: shading pattern

SR: Source region

T1: The first active component

T2: second active component

TE: touch electrode

TU: Touch unit

X, Y, Z: direction

FIG. 1 is a schematic top view of a pixel array substrate according to an embodiment of the invention. FIG. 2 is an enlarged schematic diagram of a partial area of the pixel array substrate of FIG. 1. FIG. 3 is a schematic circuit diagram of the pixel array substrate of FIG. 2. 4 is a schematic cross-sectional view of the pixel array substrate of FIG. 2. 5 is a schematic cross-sectional view of a pixel array substrate according to another embodiment of the invention. FIG. 6 is a schematic cross-sectional view of a pixel array substrate according to another embodiment of the present invention. FIG. 7 is a schematic cross-sectional view of a pixel array substrate according to still another embodiment of the present invention.

10: Pixel array substrate

210: sensing element

GL: scan line

LSU1, LSU2, LSU3: light sensing unit

PX: Pixel structure

SL1: The first signal line

SL2, SL2a, SL2b: the second signal line

SL3: The third signal line

SL4: The fourth signal line

SL5: Fifth signal line

SL6: The sixth signal line

T1: The first active component

T2: second active component

Claims (20)

A pixel array substrate includes: a substrate; a plurality of first signal lines arranged on the substrate along a first direction; a plurality of pixel structures arranged between the first signal lines; and a plurality of first signal lines Two signal lines are arranged on the substrate along the first direction; a plurality of light sensing units are arranged between the second signal lines, and are electrically connected to the second signal lines, the light sensing units Any two neighbors of the unit are symmetrically arranged with one of the second signal lines as the center; a plurality of third signal lines are alternately arranged on the substrate with the second signal lines, and the third signal lines Electrically independent of the second signal lines; and a plurality of touch units are electrically connected to the third signal lines. The pixel array substrate according to claim 1, wherein the light-sensing units include a first light-sensing unit, a second light-sensing unit, and a third light-sensing unit that are adjacent to each other, and the first light-sensing unit One of the second signal lines is provided between a light sensing unit and the second light sensing unit, and the first light sensing units are provided between the second light sensing unit and the third light sensing unit. The other of the two signal lines, the one of the second signal lines is electrically connected to the first light sensing unit and the second light sensing unit, and the other of the second signal lines is electrically connected Connect the second light sensing unit and the third light sensing unit. The pixel array substrate according to claim 1, wherein each of the light sensing units includes: A sensing element; a first active element electrically connected between the sensing element and one of the second signal lines; and a second active element electrically connected between the sensing element and the Between the other of these second signal lines. The pixel array substrate according to claim 3, further comprising: a plurality of fourth signal lines alternately arranged on the substrate with the second signal lines, wherein the second active elements of the light sensing units The fourth signal lines are electrically connected. The pixel array substrate according to claim 4, wherein the second signal lines, the third signal lines, and the fourth signal lines belong to the same film layer and overlap the first signal lines. The pixel array substrate according to claim 3, further comprising an insulating layer covering the sensing elements of the light sensing units, and the second signal lines and the third signal lines are disposed on the insulating layer Layer, where the sensing element includes: a first electrode, which belongs to the same film layer as a source and a drain of the first active element, and is electrically connected to the source of the first active element; Two electrodes are overlapped on the first electrode; and a sensing layer is sandwiched between the first electrode and the second electrode. The pixel array substrate according to claim 3, further comprising: a flat layer covering the first active element; and an insulating layer disposed on the flat layer, and the second signal lines and the first Three signal lines are arranged on the insulating layer, wherein the sensing element includes a first electrode, a second electrode, and a sensing layer sandwiched between the first electrode and the second electrode, and the first electrode The electrodes, the second signal lines, and the third signal lines belong to the same film layer. The pixel array substrate according to claim 3, further comprising: a flat layer covering the first active element; and an insulating layer covering the flat layer and the sensing elements of the light sensing units, and The second signal lines and the third signal lines are disposed on the insulating layer, wherein the sensing element includes a first electrode, a second electrode, and is sandwiched between the first electrode and the second electrode A sensing layer, the flat layer has an opening overlapping the sensing layer, the first electrode and a source and a drain of the first active device belong to the same film layer, and the second electrode covers a portion of the The flat layer and the portion of the sensing layer exposed by the opening are electrically connected to the first active device. The pixel array substrate according to claim 3, further comprising: a first flat layer covering the first active element; an insulating layer disposed on the first flat layer, and the second signal lines and the The third signal lines are disposed on the insulating layer; and a second flat layer is disposed on the insulating layer and covers the second signal lines and the third signal lines, wherein the sensing element includes a first Electrode, a second electrode, and a sensing layer sandwiched between the first electrode and the second electrode, the second flat layer has an opening overlapping the sensing layer, the first electrode, the The second signal line and the first The three signal lines belong to the same film layer, and the second electrode covers a portion of the second flat layer and the portion of the sensing layer exposed by the opening, and is electrically connected to the first active device. The pixel array substrate according to claim 1, wherein the second signal lines and the third signal lines belong to the same film layer and overlap the first signal lines. A pixel array substrate includes: a substrate; a plurality of first signal lines arranged on the substrate along a first direction; a plurality of pixel structures arranged between the first signal lines; and a plurality of first signal lines Two signal lines are arranged on the substrate along the first direction; a plurality of light sensing units are arranged between the second signal lines, and any two adjacent ones of the light sensing units are electrically connected One of the second signal lines; a plurality of third signal lines alternately arranged on the substrate with the second signal lines, and the third signal lines are electrically independent of the second signal lines; and A plurality of touch units are electrically connected to the third signal lines. The pixel array substrate according to claim 11, wherein the light-sensing units include a first light-sensing unit, a second light-sensing unit, and a third light-sensing unit that are adjacent to each other, and the first light-sensing unit A light-sensing unit and the second light-sensing unit are symmetrically arranged with one of the second signal lines as the center, and the second light-sensing unit and the third light-sensing unit are arranged symmetrically with the second light-sensing units The other of the signal lines is centrally symmetrically arranged. The pixel array substrate according to claim 11, wherein each of the light sensing units includes: a sensing element; a first active element electrically connected to the sensing element and the second signal lines Between one; and a second active device electrically connected between the sensing device and the other of the second signal lines. The pixel array substrate according to claim 13, further comprising: a plurality of fourth signal lines alternately arranged on the substrate with the second signal lines, wherein the second active elements of the light sensing units The fourth signal lines are electrically connected. The pixel array substrate according to claim 14, wherein the second signal lines, the third signal lines, and the fourth signal lines belong to the same film layer and overlap the first signal lines. The pixel array substrate according to claim 13, further comprising an insulating layer covering the sensing elements of the light sensing units, and the second signal lines and the third signal lines are disposed on the insulating layer Layer, where the sensing element includes: a first electrode, which belongs to the same film layer as a source and a drain of the first active element, and is electrically connected to the source of the first active element; Two electrodes are overlapped on the first electrode; and a sensing layer is sandwiched between the first electrode and the second electrode. The pixel array substrate according to claim 13, further comprising: A flat layer covering the first active element; and an insulating layer disposed on the flat layer, and the second signal lines and the third signal lines are disposed on the insulating layer, wherein the sensing element includes A first electrode, a second electrode, and a sensing layer sandwiched between the first electrode and the second electrode, and the first electrode, the second signal lines, and the third signal lines belong to The same film layer. The pixel array substrate according to claim 13, further comprising: a flat layer covering the first active element; and an insulating layer covering the flat layer and the sensing elements of the light sensing units, and The second signal lines and the third signal lines are disposed on the insulating layer, wherein the sensing element includes a first electrode, a second electrode, and is sandwiched between the first electrode and the second electrode A sensing layer, the flat layer has an opening overlapping the sensing layer, the first electrode and a source and a drain of the first active device belong to the same film layer, and the second electrode covers a portion of the The flat layer and the portion of the sensing layer exposed by the opening are electrically connected to the first active device. The pixel array substrate according to claim 13, further comprising: a first flat layer covering the first active element; an insulating layer disposed on the flat layer, and the second signal lines and the first active device Three signal lines are arranged on the insulating layer; and a second flat layer is arranged on the insulating layer and covers the second signal lines and the third signal lines, wherein the sensing element includes a first electrode, A second electrode and clamped on the A sensing layer between the first electrode and the second electrode, the second flat layer having an opening overlapping the sensing layer, the first electrode, the second signal lines, and the third signal lines Belonging to the same film layer, the second electrode covers a portion of the second flat layer and the portion of the sensing layer exposed by the opening, and is electrically connected to the first active device. The pixel array substrate according to claim 11, wherein the second signal lines and the third signal lines belong to the same film layer and overlap the first signal lines.

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