TWI721525B - Circuit board and stacked structure and method for manufacturing stacked structure - Google Patents
Circuit board and stacked structure and method for manufacturing stacked structure Download PDFInfo
- Publication number
- TWI721525B TWI721525B TW108128787A TW108128787A TWI721525B TW I721525 B TWI721525 B TW I721525B TW 108128787 A TW108128787 A TW 108128787A TW 108128787 A TW108128787 A TW 108128787A TW I721525 B TWI721525 B TW I721525B
- Authority
- TW
- Taiwan
- Prior art keywords
- circuit board
- substrate
- wiring portions
- concave surfaces
- perforated
- Prior art date
Links
Images
Abstract
Description
本發明是有關於一種組裝結構及其製造方法。特別是關於具有電路板的組裝結構及具有電路板的組裝結構的製造方法。 The invention relates to an assembly structure and a manufacturing method thereof. In particular, it relates to an assembly structure having a circuit board and a manufacturing method of the assembly structure having a circuit board.
隨著積體電路晶片及各種電子產品不斷往更小的尺寸發展,電子產品中不同電子元件之間的電連接也因此往更小的維度發展。在新型的微發光二極體(microLED)或次毫米發光二極體(miniLED)技術中,併板及接點一般係使用晶粒軟模接合(COF)搭配軟性印刷電路板(FPC)來製作。然而,利用此技術製作的微發光二極體或次毫米發光二極體將使連接點處無法放置發光二極體,因此無法滿足現今對於顯示器的高佔屏比需求。此外,大型LED顯示器需要利用拼接的方式進行多螢幕的舉陣排列,然現有技術中小螢幕與小螢幕接合之間的連接點所占面積較大,無法做到完全無縫的視覺效 果。 With the continuous development of integrated circuit chips and various electronic products to smaller sizes, the electrical connections between different electronic components in electronic products also develop to smaller dimensions. In the new microLED or sub-millimeter light emitting diode (miniLED) technology, the board and contacts are generally made by using die soft die bonding (COF) and flexible printed circuit boards (FPC) . However, the micro-light-emitting diodes or sub-millimeter light-emitting diodes produced by this technology will make it impossible to place the light-emitting diodes at the connection points, and therefore cannot meet the current demand for high screen ratio of displays. In addition, large-scale LED displays need to use splicing for multi-screen arrangement. However, the connection point between the small screen and the small screen in the prior art occupies a large area and cannot achieve a completely seamless visual effect. fruit.
有鑑於此,目前急需一種更佳的細微間距元件的組裝方法,以改上述問題。 In view of this, there is an urgent need for a better assembly method of fine-pitch components to solve the above-mentioned problems.
本發明的一態樣是提供一種電路板,此電路板包含一基板以及多個穿孔走線部。基板包含一頂面、相對於頂面的一底面、一側面以及多個凹面。側面連接頂面和底面。所述多個凹面由側面向內凹陷且由頂面延伸到底面。所述多個穿孔走線部各自設置於所述多個凹面的對應一者上。各穿孔走線部的一邊緣與側面之間存在一間隔,以裸露各凹面鄰接側面的一部分。 One aspect of the present invention is to provide a circuit board. The circuit board includes a substrate and a plurality of perforated wiring portions. The substrate includes a top surface, a bottom surface opposite to the top surface, a side surface, and a plurality of concave surfaces. The sides connect the top and bottom surfaces. The plurality of concave surfaces are recessed from the side surface inward and extend from the top surface to the bottom surface. The plurality of perforated wiring portions are respectively arranged on a corresponding one of the plurality of concave surfaces. There is an interval between an edge and the side surface of each perforated wiring portion, so as to expose a part of each concave surface adjacent to the side surface.
在某些實施方式中,所述多個穿孔走線部不接觸基板的側面。 In some embodiments, the plurality of perforated trace portions do not contact the side surface of the substrate.
在某些實施方式中,電路板更包含設置於基板之上的一上部線路結構以及設置於基板之下的一下部線路結構,所述多個穿孔走線部中的一個或多個電性連接上部線路結構和/或下部線路結構。 In some embodiments, the circuit board further includes an upper circuit structure disposed on the substrate and a lower circuit structure disposed below the substrate, and one or more of the plurality of perforated wiring portions are electrically connected Upper line structure and/or lower line structure.
在某些實施方式中,電路板更包含至少一導電焊料,填充於其中一個所述多個凹面,且覆蓋所述其中一個所述多個凹面的裸露的部分。 In some embodiments, the circuit board further includes at least one conductive solder, which is filled in one of the plurality of concave surfaces and covers the exposed part of the one of the plurality of concave surfaces.
本發明之另一態樣是提供一種組裝結構,此組裝結構包含一第一電路板以及一第二電路 板。第一電路板包含一第一基板、多個第一穿孔走線部以及至少一導電焊料。第二電路板包含一第二基板以及多個第二穿孔走線部。第一基板包含一第一頂面、相對於該第一頂面的一第一底面、一第一側面以及多個第一凹面。第一側面連接第一頂面和第一底面。所述多個第一凹面由側面向內凹陷且由第一頂面延伸到第一底面。所述多個第一穿孔走線部各自設置於所述多個第一凹面的對應一者上第一頂面與第一底面之局部區域。所述至少一導電焊料填充於其中一個所述多個第一凹面。第二基板具有相對於所述多個第一凹面設置於第二基板的一第二側面的多個第二凹面。第一側面與第二側面接觸。所述多個第二穿孔走線部各自設置於所述多個第二凹面的對應一者上第二頂面與第二底面之局部區域。所述至少一導電焊料從各第一穿孔走線部延伸至相對應的各第二穿孔走線部。 Another aspect of the present invention is to provide an assembly structure including a first circuit board and a second circuit board. The first circuit board includes a first substrate, a plurality of first through-hole wiring portions, and at least one conductive solder. The second circuit board includes a second substrate and a plurality of second perforated wiring portions. The first substrate includes a first top surface, a first bottom surface opposite to the first top surface, a first side surface, and a plurality of first concave surfaces. The first side surface connects the first top surface and the first bottom surface. The plurality of first concave surfaces are recessed inward from the side surface and extend from the first top surface to the first bottom surface. The plurality of first perforated wiring portions are respectively disposed on a local area of the first top surface and the first bottom surface on a corresponding one of the plurality of first concave surfaces. The at least one conductive solder is filled in one of the first concave surfaces. The second substrate has a plurality of second concave surfaces disposed on a second side surface of the second substrate relative to the plurality of first concave surfaces. The first side surface is in contact with the second side surface. The plurality of second perforated wiring portions are respectively disposed on a local area of the second top surface and the second bottom surface on a corresponding one of the plurality of second concave surfaces. The at least one conductive solder extends from each first through-hole wiring portion to each corresponding second through-hole wiring portion.
在某些實施方式中,各第一穿孔走線部的一第一邊緣與第一側面之間存在一第一間隔,以裸露各第一凹面所鄰接第一側面的一部分,且各第二穿孔走線部的一第二邊緣與第二側面之間存在一第二間隔,以裸露各第二凹面鄰接第二側面的一部分,其中所述至少一導電焊料覆蓋所述其中一個所述多個第一凹面的裸露的部分並延伸至相對應的各第二穿孔走線部。 In some embodiments, there is a first gap between a first edge of each first perforation trace and the first side surface to expose a part of the first side surface adjacent to each first concave surface, and each second perforation There is a second gap between a second edge and the second side surface of the wiring portion, and each second concave surface is exposed to be adjacent to a part of the second side surface, wherein the at least one conductive solder covers the one of the plurality of first The exposed part of a concave surface extends to the corresponding second perforated wiring portions.
在某些實施方式中,第一電路板包含設置於第一基板之上的一第一上部線路結構,以及第一基板之下的一第一下部線路結構,第二電路板包含設置於第二基板之上的一第二上部線路結構,以及第二基板之下的一第二下部線路結構,其中所述多個第一穿孔走線部中的一個或多個電性連接一第一上部線路結構和/或第一下部線路結構,所述多個第二穿孔走線部中的一個或多個電性連接第二上部線路結構和/或第二下部線路結構。 In some embodiments, the first circuit board includes a first upper circuit structure disposed on the first substrate, and a first lower circuit structure under the first substrate, and the second circuit board includes a first lower circuit structure disposed on the first substrate. A second upper circuit structure on the two substrates, and a second lower circuit structure under the second substrate, wherein one or more of the plurality of first perforated wiring portions are electrically connected to a first upper portion The circuit structure and/or the first lower circuit structure, and one or more of the plurality of second perforated wiring portions are electrically connected to the second upper circuit structure and/or the second lower circuit structure.
本發明之另一態樣是提供一種組裝結構的製造方法,此方法包含:(i)提供一第一電路板,第一電路板包含一第一基板、多個第一穿孔走線部和至少一導電焊料,第一基板包含一第一頂面、相對於第一頂面的一第一底面、一第一側面以及多個第一凹面,第一側面連接第一頂面和第一底面,所述多個第一凹面由第一側面向內凹陷且由第一頂面延伸到第一底面,各第一穿孔走線部設置於所述多個第一凹面的對應一者上,所述至少一導電焊料填充於其中一個所述多個第一凹面;(ii)提供一第二電路板,第二電路板包含一第二基板、多個第二穿孔走線部,第二基板包含相對於所述多個第一凹面設置於第二基板的一第二側面的多個第二凹面,各第二穿孔走線部設置於所述多個第二凹面的對應一者上;以及(iii)接合所述多個第一穿孔走線部上的所述至 少一導電焊料以及相對應的各第二穿孔走線部,使所述至少一導電焊料連接各第一穿孔走線部和各第二穿孔走線部,且第一側面接觸第二側面。 Another aspect of the present invention is to provide a method of manufacturing an assembly structure. The method includes: (i) providing a first circuit board. The first circuit board includes a first substrate, a plurality of first perforated wiring portions, and at least A conductive solder, the first substrate includes a first top surface, a first bottom surface opposite to the first top surface, a first side surface and a plurality of first concave surfaces, the first side surface connects the first top surface and the first bottom surface, The plurality of first concave surfaces are recessed inward from the first side surface and extend from the first top surface to the first bottom surface, and each first perforated wiring portion is provided on a corresponding one of the plurality of first concave surfaces, the At least one conductive solder is filled in one of the plurality of first concave surfaces; (ii) a second circuit board is provided. The second circuit board includes a second substrate and a plurality of second perforated wiring portions, and the second substrate includes opposite A plurality of second concave surfaces provided on a second side surface of the second substrate on the plurality of first concave surfaces, and each second perforated wiring portion is provided on a corresponding one of the plurality of second concave surfaces; and (iii) ) To join the to One less conductive solder and the corresponding second perforated wiring portions make the at least one conductive solder connect each first perforated wiring portion and each second perforated wiring portion, and the first side surface contacts the second side surface.
在某些實施方式中,在提供第一電路板的步驟中,各第一穿孔走線部的一第一邊緣與第一側面之間存在一第一間隔,以裸露各第一凹面鄰接第一側面的一部分,所述至少一導電焊料覆蓋所述其中一個所述多個第一凹面的裸露的部分,且在提供第二電路板的步驟中,各第二穿孔走線部的一第二邊緣與第二側面之間存在一第二間隔,以裸露各第二凹面鄰接第二側面的一部分。 In some embodiments, in the step of providing the first circuit board, there is a first gap between a first edge and the first side surface of each first perforated wiring portion, so that each first concave surface is exposed and adjacent to the first A part of the side surface, the at least one conductive solder covers the exposed part of one of the plurality of first concave surfaces, and in the step of providing the second circuit board, a second edge of each second perforated wiring portion There is a second interval between the second side surface and the second side surface to expose a part of each second concave surface adjacent to the second side surface.
在某些實施方式中,接合所述多個第一穿孔走線部上的所述至少一導電焊料以及相對應的各第二穿孔走線部的步驟中,所述至少一導電焊料沿著各第二凹面之鄰接第二側面的裸露的部分以及所述多個第二穿孔走線部上流動,以將第一電路板接合至第二電路板。 In some embodiments, in the step of joining the at least one conductive solder on the plurality of first through-hole wiring portions and the corresponding second through-hole wiring portions, the at least one conductive solder is along each The exposed portion of the second concave surface adjacent to the second side surface and the plurality of second perforated wiring portions flow to join the first circuit board to the second circuit board.
100、500:電路板 100, 500: circuit board
110、520:基板 110, 520: substrate
111、509、521:穿孔 111, 509, 521: perforation
112、522:頂面 112, 522: top surface
113、523:底面 113, 523: Bottom
114、524:側面 114, 524: side
115、525:凹面 115, 525: concave
120、530:種子層 120, 530: seed layer
121、122:表面 121, 122: Surface
130、540:圖案化光阻層 130, 540: patterned photoresist layer
131、132:區域 131, 132: area
140、550:穿孔走線部 140, 550: perforated wiring part
141、551:邊緣 141, 551: Edge
142、552:間隔 142, 552: Interval
150、560:上部線路結構 150, 560: upper circuit structure
160、570:下部線路結構 160, 570: lower line structure
170、580:導電焊料 170, 580: conductive solder
400、800:組裝結構 400, 800: assembly structure
200、600:第一電路板 200, 600: the first circuit board
210、620:第一基板 210, 620: first substrate
212、622:第一頂面 212, 622: The first top surface
213、623:第一底面 213, 623: The first bottom
214、624:第一側面 214, 624: First side
215、625:第一凹面 215, 625: the first concave surface
220、630:種子層 220, 630: seed layer
240、650:第一穿孔走線部 240, 650: the first perforation routing part
241、651:第一邊緣 241, 651: the first edge
242、652:第一間隔 242, 652: first interval
250、660:第一上部線路結構 250, 660: the first upper circuit structure
260、670:第一下部線路結構 260, 670: the first lower line structure
270、680:導電焊料 270, 680: conductive solder
300、700:第二電路板 300, 700: second circuit board
310、720:第二基板 310, 720: second substrate
314、724:第二側面 314, 724: second side
315、725:第二凹面 315, 725: second concave surface
340、750:第二穿孔走線部 340, 750: the second perforation routing part
341、751:第二邊緣 341, 751: Second Edge
342、752:第二間隔 342, 752: second interval
350、760:第二上部線路結構 350, 760: second upper circuit structure
360、770:第二下部線路結構 360, 770: second lower line structure
320:種子層 320: Seed Layer
505:內部線路結構 505: Internal circuit structure
506:承載板 506: Carrier Board
507:導電盲孔 507: conductive blind hole
508:線路層 508: circuit layer
510:介電層 510: Dielectric layer
511:導通盲孔 511: Through blind hole
590:絕緣保護層 590: Insulation protection layer
590o:開口 590o: opening
593:導電層 593: conductive layer
595:區域 595: area
B-B、L:線 B-B, L: line
第1A~10A圖繪示根據本發明一實施方式之製造電路板之方法在不同製程階段的立體示意圖。 FIGS. 1A-10A show three-dimensional schematic diagrams of the method of manufacturing a circuit board in different process stages according to an embodiment of the present invention.
第1B~10B圖繪示根據本發明一實施方式之製造電路板之方法在不同製程階段分別沿著第1A~10A圖的線B-B切割的剖面示意圖。 FIGS. 1B-10B show schematic cross-sectional views of the method for manufacturing a circuit board according to an embodiment of the present invention, which are respectively cut along the line B-B in FIGS. 1A-10A at different process stages.
第1C~10C圖繪示根據本發明一實施方式之製造電路板之方法在不同製程階段的俯視圖。 FIGS. 1C to 10C show top views of the method of manufacturing a circuit board according to an embodiment of the present invention in different process stages.
第11A圖繪示根據本發明一實施方式之製造組裝結構之方法在某一製程階段的俯視圖。 FIG. 11A is a top view of a method of manufacturing an assembly structure according to an embodiment of the present invention at a certain stage of the manufacturing process.
第11B圖繪示根據本發明一實施方式之製造組裝結構之方法在某一製程階段沿著第11A圖的線B-B切割的剖面示意圖。 FIG. 11B is a schematic cross-sectional view of the method for manufacturing an assembly structure according to an embodiment of the present invention, which is cut along the line B-B in FIG. 11A at a certain process stage.
第12A圖繪示根據本發明一實施方式之製造組裝結構之方法在某一製程階段的俯視圖。 FIG. 12A is a top view of the method for manufacturing an assembly structure according to an embodiment of the present invention at a certain stage of the manufacturing process.
第12B圖繪示根據本發明一實施方式之製造組裝結構之方法在某一製程階段沿著第12A圖的線B-B切割的剖面示意圖。 FIG. 12B is a schematic cross-sectional view of the method for manufacturing an assembly structure according to an embodiment of the present invention, which is cut along the line B-B in FIG. 12A at a certain process stage.
第13圖至第23繪示根據本發明另一實施方式之製造電路板之方法在不同製程階段的剖面示意圖。 13 to 23 are cross-sectional schematic diagrams of a method for manufacturing a circuit board according to another embodiment of the present invention in different process stages.
第24A圖繪示根據本發明另一實施方式之製造電路板之方法在某一製程階段的俯視圖。 FIG. 24A is a top view of a method of manufacturing a circuit board in a certain process stage according to another embodiment of the present invention.
第24B圖繪示根據本發明另一實施方式之製造電路板之方法在某一製程階段沿著第24A圖的線B-B切割的剖面示意圖。 FIG. 24B is a schematic cross-sectional view of a method for manufacturing a circuit board according to another embodiment of the present invention, which is cut along the line B-B in FIG. 24A at a certain process stage.
第25A圖繪示根據本發明另一實施方式之製造組裝結構之方法在某一製程階段的俯視圖。 FIG. 25A is a top view of a method for manufacturing an assembly structure according to another embodiment of the present invention at a certain stage of the manufacturing process.
第25B圖繪示根據本發明另一實施方式之製造組裝結構之方法在不同製程階段沿著第25A圖的線B-B切割的剖面示意圖。 FIG. 25B is a schematic cross-sectional view of a method for manufacturing an assembly structure according to another embodiment of the present invention, which is cut along the line B-B in FIG. 25A at different process stages.
第26A圖繪示根據本發明另一實施方式之製造組裝結構之方法在某一製程階段的俯視圖。 FIG. 26A is a top view of a method of manufacturing an assembly structure according to another embodiment of the present invention at a certain stage of the manufacturing process.
第26B圖繪示根據本發明另一實施方式之製造組裝結構之方法在某一製程階段沿著第26A圖的線B-B切割的剖面示意圖。 FIG. 26B is a schematic cross-sectional view of a method for manufacturing an assembly structure according to another embodiment of the present invention, which is cut along the line B-B in FIG. 26A at a certain process stage.
為了使本揭示內容的敘述更加詳盡與完備,下文針對了本發明的實施態樣與具體實施例提出了說明性的描述;但這並非實施或運用本發明具體實施例的唯一形式。以下所揭露的各實施例,在有益的情形下可相互組合或取代,也可在一實施例中附加其他的實施例,而無須進一步的記載或說明。 In order to make the description of the present disclosure more detailed and complete, the following provides an illustrative description for the implementation aspects and specific embodiments of the present invention; this is not the only way to implement or use the specific embodiments of the present invention. The embodiments disclosed below can be combined or substituted with each other under beneficial circumstances, and other embodiments can also be added to an embodiment without further description or description.
在以下描述中,將詳細敘述許多特定細節以使讀者能夠充分理解以下的實施例。然而,可在無此等特定細節之情況下實踐本發明之實施例。在其他情況下,為簡化圖式,熟知的結構與裝置僅示意性地繪示於圖中。 In the following description, many specific details will be described in detail so that the reader can fully understand the following embodiments. However, the embodiments of the present invention may be practiced without these specific details. In other cases, in order to simplify the drawings, well-known structures and devices are only schematically shown in the drawings.
在本文中使用空間相對用語,例如「下方」、「之下」、「上方」、「之上」等,這是為了便於敘述一元件或特徵與另一元件或特徵之間的相對關係,如圖中所繪示。這些空間上的相對用語的真實意義包含其他的方位。例如,當圖示上下翻轉180度時,一元件與另一元件之間的關係,可能從「下方」、「之下」變成「上方」、「之上」。此外,本文中 所使用的空間上的相對敘述也應作同樣的解釋。 Spatial relative terms are used in this article, such as "below", "below", "above", "above", etc. This is to facilitate the description of the relative relationship between one element or feature and another element or feature, such as Shown in the figure. The true meaning of these relative terms in space includes other directions. For example, when the icon is turned upside down by 180 degrees, the relationship between one element and another element may change from "below" and "below" to "above" and "above". In addition, in this article The relative narrative in the space used should be interpreted in the same way.
本發明之一態樣是提供一種電路板100的製造方法。第1A~10A圖繪示根據本發明一實施方式之製造電路板的方法在不同製程階段的立體示意圖。第1B~10B圖繪示根據本發明一實施方式之製造電路板之方法在不同製程階段分別沿著第1A~10A圖的線B-B切割的剖面示意圖。第1C~10C圖繪示根據本發明一實施方式之製造電路板之方法在不同製程階段的俯視圖。首先,如第1A~1C圖所繪示,提供基板110。在一實施例中,基板110可以例如是玻璃基板、陶瓷基板、矽基板、或高分子玻璃纖維複合基板。
One aspect of the present invention is to provide a manufacturing method of the
如第2A~2C圖所繪示,形成多個穿孔111於基板110中。接著,如第3A~3C圖所繪示,形成種子層120於基板110的表面上以及穿孔111中。種子層120的形成方法包括但不限於物理方式,例如濺鍍鈦銅,或者化學方式,例如化鍍鈀銅。
As shown in FIGS. 2A to 2C, a plurality of through
然後,如第4A~4C圖所繪示,形成圖案化光阻層130於種子層120的相對兩表面121和122上,其中圖案化光阻層130裸露出種子層120之相對兩表面121和122的區域131和區域132。區域131存在於穿孔111上以及環繞穿孔111的部分種子層120上,區域132存在於部分種子層120上。應注意,本文中圖案化光阻層130覆蓋於部分的穿孔111上,這將有利下
一步形成特殊形狀的穿孔走線部140,使本發明具有特殊技術效果,下文將更詳細敘述。
Then, as shown in FIGS. 4A to 4C, a patterned
如第5A~5C圖所繪示,形成多個穿孔走線部140、上部線路結構150和下部線路結構160於裸露的種子層120上。具體而言,各穿孔走線部140形成於各穿孔111中之由種子層120所覆蓋的表面上,並延伸至穿孔111外部由種子層120裸露出之區域131的表面上,上部線路結構150和下部線路結構160形成在種子層120裸露出之區域132上。在一些實施方式中中,穿孔走線部140、上部線路結構150和下部線路結構160的形成方法可以例如為電鍍製程。在一實施例中,穿孔走線部140可以例如是銅、銀、金、或其他高導電性的材料。
As shown in FIGS. 5A to 5C, a plurality of
如第6A~6C圖所繪示,移除圖案化光阻層130。接著,如第7A~7C圖所繪示,移除沒有被穿孔走線部140、上部線路結構150和下部線路結構160所覆蓋的種子層120,以形成具有圖案化的種子層120。
As shown in FIGS. 6A to 6C, the patterned
再來,如第8A~8C圖所繪示,填充至少一導電焊料170於其中一個穿孔111的剩餘空間中。在一實施例中,導電焊料170可以例如是無鉛銲料、錫鈹(SnBe)、錫銀銅(SnAgCu)、錫鉛(SnPb)、或錫銻(SnSb)。
Furthermore, as shown in FIGS. 8A to 8C, at least one
如第9A~9C圖所繪示,沿著線L切割,得
到多個電路板100。也就是說,在進行上述第1A~9C圖所繪示的步驟後,即形成多個電路板100。簡言之,如第10A~10C圖所繪示,電路板100包含基板110、多個穿孔走線部140、上部線路結構150、下部線路結構160以及至少一導電焊料170。在多個實施方式中,基板110包含頂面112、相對於頂面112的底面113、側面114以及多個凹面115。側面114連接頂面112和底面113。凹面115由側面114向內凹陷且由頂面112延伸到底面113。
As shown in Figures 9A-9C, cut along the line L to get
To
在一些實施方式中,穿孔走線部140各自設置於凹面115的對應一者上,其中各穿孔走線部140的邊緣141與側面114之間存在間隔142,以裸露各凹面115鄰接側面114的一部分。換句話說,穿孔走線部140不接觸基板110的側面114。上部線路結構150設置於基板110之上,下部線路結構160設置於基板110之下,穿孔走線部140中的一個或多個電性連接上部線路結構150和/或下部線路結構160。在一實施例中,至少一導電焊料170填充於其中一個凹面115,且覆蓋其中一個凹面115的裸露的部分。
In some embodiments, the
本發明之另一態樣是提供一種組裝結構400的製造方法。第11A圖和第12A圖繪示根據本發明一實施方式之製造組裝結構之方法在某一製程階段的俯視圖。第11B圖和第12B圖繪示根據本發明一實施方式之製造組裝結構之方法在某一製程階段分別
沿著第11A圖和第12A圖的線B-B切割的剖面示意圖。首先,如第11A圖和第11B圖所繪示,提供第一電路板200。
Another aspect of the present invention is to provide a manufacturing method of the
在各種實施方式中,第一電路板200包含第一基板210、多個第一穿孔走線部240和至少一導電焊料270。在一些實施方式中,第一基板210包含第一頂面212、相對於第一頂面212的第一底面213、第一側面214以及多個第一凹面215。第一側面214連接第一頂面212和第一底面213。第一凹面215由第一側面214向內凹陷且由第一頂面212延伸到第一底面213。
In various embodiments, the
在一些實施方式中,各第一穿孔走線部240設置於第一凹面215的對應一者上,且各第一穿孔走線部240的第一邊緣241與第一側面214之間存在第一間隔242,以裸露各第一凹面215鄰接第一側面214的一部分。
In some embodiments, each first
在一實施例中,至少一導電焊料270填充於其中一個第一凹面215並覆蓋其中一個第一凹面215的裸露的部分。有關第一電路板200之製造方法以及材質如前所述,在此不再贅述。
In one embodiment, at least one
接著,提供第二電路板300。在各種實施方式中,第二電路板300包含第二基板310、多個第二穿孔走線部340。在一些實施方式中,第二基板310包含相對於第一凹面215設置於第二基板310的第二
側面314的多個第二凹面315,各第二穿孔走線部340設置於第二凹面315的對應一者上。有關第二電路板300之製造方法以及材質如前所述,在此不再贅述。
Next, the
然後,如第12A圖和第12B圖所示,接合第一穿孔走線部240上的至少一導電焊料270以及相對應的各第二穿孔走線部340,使至少一導電焊料270連接各第一穿孔走線部240和各第二穿孔走線部340,且第一側面214接觸第二側面314,以形成組裝結構400。詳細而言,至少一導電焊料270受到加熱後而融化,並沿著各第二凹面315鄰接第二側面314裸露的部分以及第二穿孔走線部340上流動,以將第一電路板200接合至第二電路板300,而形成第一電路板200和第二電路板300之間的連接。
Then, as shown in FIGS. 12A and 12B, the at least one
綜上所述,本發明實施方式之穿孔走線部係使用圖案化光阻層來形成。具體而言,由於穿孔走線部的邊緣與基板側面之間存在間隔,當第一電路板與第二電路板接合時,未填充導電焊料的第一凹面與相對應的第二凹面之間不會接觸而導電。換句話說,可選擇性填充導電焊料,使電路板的其中一個或多個接點之間呈現導電狀態或是非導電狀態。 In summary, the perforated wiring portion of the embodiment of the present invention is formed by using a patterned photoresist layer. Specifically, due to the gap between the edge of the perforated trace and the side surface of the substrate, when the first circuit board and the second circuit board are joined, there is no gap between the first concave surface that is not filled with conductive solder and the corresponding second concave surface. Will touch and conduct electricity. In other words, the conductive solder can be selectively filled to make one or more of the contacts of the circuit board appear in a conductive state or a non-conductive state.
此外,當形成上部線路結構和/或下部線路結構於基板兩側時,上部線路結構和/或下部線路結構於基板可與穿孔走線部電性連接,因此,本發 明實施方式之組裝結構可設計成並適用於多層或複雜結構的線路板。 In addition, when the upper circuit structure and/or the lower circuit structure are formed on both sides of the substrate, the upper circuit structure and/or the lower circuit structure can be electrically connected to the perforated wiring portion on the substrate. Therefore, the present invention The assembly structure of the Ming embodiment can be designed and applied to a multi-layer or complex structure circuit board.
本發明之另一態樣是提供一種組裝結構400,如第12A圖和第12B圖所示。組裝結構400包含第一電路板200和第二電路板300。在各種實施方式中,第一電路板200包含第一基板210、多個第一穿孔走線部240、設置於第一基板210之上的第一上部線路結構250、設置於第一基板210之下的第一下部線路結構260以及至少一導電焊料270。在一些實施方式中,第一基板210包含第一頂面212、相對於第一頂面212的一第一底面213、第一側面214、以及多個第一凹面215。第一側面214連接第一頂面212和第一底面213,第一凹面215由側面向內凹陷且由第一頂面212延伸到第一底面213。
Another aspect of the present invention is to provide an
在一些實施方式中,第二電路板300包含第二基板310、多個第二穿孔走線部340、設置於第二基板310之上的第二上部線路結構350以及第二基板310之下的第二下部線路結構360。第二基板310具有相對於第一凹面215設置於第二基板310的第二側面314的多個第二凹面315,其中第一側面214與第二側面314接觸。
In some embodiments, the
在一些實施方式中,第一穿孔走線部240各自設置於第一凹面215的對應一者上,且其第一邊緣241與第一側面214之間存在第一間隔242,以裸露
各第一凹面215鄰接第一側面214的一部分。類似地,第二穿孔走線部340各自設置於第二凹面315的對應一者上,且其第二邊緣341與第二側面314之間存在第二間隔342,以裸露各第二凹面315鄰接第二側面314的一部分。在另外一些實施方式中,第一穿孔走線部240中的一個或多個電性連接一第一上部線路結構250和/或第一下部線路結構260。類似地,第二穿孔走線部340中的一個或多個電性連接第二上部線路結構350和/或第二下部線路結構360。
In some embodiments, the first
在一實施例中,至少一導電焊料270填充於其中一個第一凹面215以及覆蓋所述其中一個第一凹面215的裸露的部分,且從各第一穿孔走線部240延伸至相對應的各第二穿孔走線部340。
In one embodiment, at least one
第13圖至第23圖繪示根據本發明另一實施方式之製造電路板之方法在不同製程階段的剖面示意圖。本實施方式的電路板500的製造方法與上述的電路板100的製造方法相似。請同時參照第13~16圖和第1A~1C圖,本實施方式與第1A~1C圖所示的步驟差異在於,在提供基板520的步驟包含:沿著線L鑽孔,以在承載板506中形成多個穿孔509,接著,形成介電層510,使其包覆內部線路結構505的表面並填滿各穿孔509,以形成基板520。詳細而言,如第13圖所示,首先,提供內部線路結構505。
13 to 23 are schematic cross-sectional views of a method of manufacturing a circuit board in different process stages according to another embodiment of the present invention. The method of manufacturing the
舉例來說,內部線路結構505包含承載板
506、多個導電盲孔507以及線路層508。導電盲孔507位於承載板506中,線路層508位於承載板506的相對兩側並可延伸至連接導電盲孔507。線路層508的形成方法例如可為:首先在承載板506上形成例如是乾膜的光阻層(圖未示),光阻層再經由微影製程而圖案化露出部分線路層508,之後再進行電鍍製程與光阻層的移除製程而形成線路層508。線路層508之材質可以例如是銅、銀、金、或其他高導電度的材料。
For example, the
再來,如第14圖和第15圖所示,沿著線L鑽孔,以在承載板506中形成多個穿孔509。如第16圖所示,形成介電層510,使其包覆各內部線路結構505的表面並填滿各穿孔509,以形成基板520。簡言之,基板520包含內部線路結構505和介電層510,其中內部線路結構505包含承載板506、多個導電盲孔507、線路層508以及多個穿孔509。介電層510可以例如是感光型介電材料(PID)、聚酰亞胺(polyimide,PI)、增層材料(ABF)、樹脂、或高分子玻璃纖維複合材料。
Next, as shown in FIGS. 14 and 15, drill holes along the line L to form a plurality of
請同時參照第17圖和第2A~2C圖,本實施方式與第2A~2C圖所示的步驟差異在於,在形成多個穿孔521於基板520中的步驟包含:形成穿孔521時保留部分介電層510於孔壁上,形成多個導通盲孔511於介電層510中,以裸露部分線路層508。導通盲孔511的形成方法包括但不限於對介電層510用雷射燒
蝕(Laser ablation),或是介電層510之材質選用感光介電材以曝光顯影形成導通盲孔511。
Please refer to Figure 17 and Figures 2A to 2C at the same time. The difference between the steps shown in this embodiment and Figures 2A to 2C is that the step of forming a plurality of through
接著,請同時參照第18~21圖和第3A~7C圖,本實施方式與第3A~7C圖所示的步驟相似。與第7C圖所示步驟的不同之處在於,本實施方式之圖案化的種子層530除了設置於基板520的介電層510上之外,亦設置在導通盲孔511的內部表面,穿孔521的孔壁介電層表面,以及部分裸露的介電層510上,且上部線路結構560以及下部線路結構570形成在種子層530上並填滿導通盲孔511的剩餘空間。
Next, please refer to Figures 18-21 and Figures 3A-7C at the same time. This embodiment is similar to the steps shown in Figures 3A-7C. The difference from the step shown in FIG. 7C is that the patterned
請同時參照第22圖和第8A~8C圖,本實施方式與第8A~8C圖所示的步驟差異在於,填充至少一導電焊料580於其中一個穿孔521的剩餘空間中的步驟包含:形成絕緣保護層590在裸露的介電層510上以及上部線路結構560和下部線路結構570上,其中絕緣保護層590具有多個開口590o,使得上部線路結構560和下部線路結構570之部分表面外露於開口590o中,然後,在各開口590o裸露的表面上形成導電層593。在一實施例中,導電層593的材料可以例如是金。
Please refer to Fig. 22 and Figs. 8A to 8C at the same time. The step difference between this embodiment and Figs. 8A to 8C is that the step of filling at least one
第24A圖繪示根據本發明另一實施方式之製造電路板之方法在某一製程階段的俯視圖。第24B圖繪示根據本發明另一實施方式之製造電路板之方法在某一製程階段沿著第24A圖的線B-B切割
的剖面示意圖。請同時參照第23~24B圖和第9A~10C圖,沿著線L切割後,即可得到如第24A圖和第24B圖所示的多個電路板500,本實施方式與第9A~10C圖所示的步驟差異在於,有繪製出在每一電路板500之絕緣保護層590及導電層593上所構成可設置元件的區域595(可例如為微型發光二極體micro-LED),因此,本實施例可應用在以微型LED作矩陣排列的顯示器面板。簡言之,如第24A圖和第24B圖所繪示,電路板500包含基板520、穿孔走線部550、設置於基板520之上的上部線路結構560設置於基板520之下的下部線路結構570以及至少一導電焊料580。在各種實施方式中,基板520包含頂面522、相對於頂面522的底面523、側面524以及多個凹面525。側面524連接頂面522和底面523。凹面525由側面524向內凹陷且由頂面522延伸到底面523。
FIG. 24A is a top view of a method of manufacturing a circuit board in a certain process stage according to another embodiment of the present invention. Fig. 24B illustrates a method for manufacturing a circuit board according to another embodiment of the present invention, cutting along the line B-B in Fig. 24A at a certain process stage
Schematic diagram of the cross section. Please refer to Figures 23~24B and Figures 9A~10C at the same time. After cutting along the line L,
在一些實施方式中,穿孔走線部550各自設置於凹面525的對應一者上,且各穿孔走線部550的邊緣551與側面524之間存在間隔552,以裸露各凹面525鄰接側面524的一部分。換句話說,穿孔走線部550不接觸基板520的側面524。在另外一些實施方式中,穿孔走線部550中的一個或多個電性連接上部線路結構560和/或下部線路結構570。在一實施例中,至少一導電焊料580填充於其中一個凹面525,且覆蓋所述其中一個凹面525的裸露的部分。
In some embodiments, the
第25A圖和第26A圖繪示根據本發明另一實施方式之製造組裝結構之方法在某一製程階段的俯視圖。第25B圖和第26B圖繪示根據本發明另一實施方式之製造組裝結構之方法在不同製程階段分別沿著第25A圖和第25A圖的線B-B切割的剖面示意圖。首先,如第25A圖和第25B圖所示,提供第一電路板600。簡言之,第一電路板600包含第一基板620、多個第一穿孔走線部650、第一上部線路結構660、第一下部線路結構670和至少一導電焊料680,其中第一基板620包含第一頂面622、第一底面623、第一側面624以及多個第一凹面625。在各種實施方式中,各第一穿孔走線部650的第一邊緣651與第一側面624之間存在第一間隔652,以裸露各第一凹面625鄰接第一側面624的一部分。
FIG. 25A and FIG. 26A are top views of a method of manufacturing an assembly structure according to another embodiment of the present invention at a certain process stage. FIGS. 25B and 26B are schematic cross-sectional views of the method for manufacturing an assembly structure according to another embodiment of the present invention, which are respectively cut along the line B-B in FIGS. 25A and 25A at different process stages. First, as shown in FIGS. 25A and 25B, a
有關第一電路板600之製造方法和具體實施方式可參考第13~24B圖中的電路板500之製造方法和實施方式,為簡單起見,在此不再贅述。舉例來說,第一基板620、第一頂面622、第一底面623、第一側面624、第一凹面625、第一穿孔走線部650、第一邊緣651、第一間隔652、第一上部線路結構660、第一下部線路結構670以及至少一導電焊料680可分別參考電路板500的基板520、頂面522、底面523、側面524、凹面525、穿孔走線部550、邊緣551、間隔552、上部線路結構560、下部線路結構570以及
至少一導電焊料580。
For the manufacturing method and specific implementation of the
接著,提供第二電路板700。簡言之,第二電路板包含一第二基板720、多個第二穿孔走線部750、第二上部線路結構760以及第二下部線路結構770,其中第二基板720包含相對於第一凹面設置於第二基板720的第二側面724的多個第二凹面725。在多個實施方式中,各第二穿孔走線部750的第二邊緣751與第二側面724之間存在第二間隔752,以裸露各第二凹面725鄰接第二側面724的一部分。
Next, a
有關第二電路板700之製造方法和具體實施方式可參考第13~24B圖中的電路板500之製造方法和實施方式,為簡單起見,在此不再贅述。舉例而言,第二基板720、第二側面724、第二凹面725、第二穿孔走線部750、第二邊緣751、第二間隔752、第二上部線路結構760以及第二下部線路結構770可分別參考電路板500的基板520、側面524、凹面525、穿孔走線部550、邊緣551、間隔552、上部線路結構560以及下部線路結構570。
For the manufacturing method and specific implementation of the
然後,如第26A圖和第26B圖所示,接合第一穿孔走線部650上的至少一導電焊料680以及相對應的各第二穿孔走線部,使至少一導電焊料680連接各第一穿孔走線部650和各第二穿孔走線部750,且第一側面624接觸第二側面724,以形成組裝結構800。本實施方式的組裝結構800的製造方法與第11A~
第12B圖中之組裝結構400的製造方法相同,因此亦不再贅述。
Then, as shown in FIGS. 26A and 26B, at least one
在進行完上述第25A~26B圖中的步驟之後,即形成本發明另一實施方式之組裝結構800。本實施方式之組裝結構800的具體實施方式可參考第12A圖和第12B圖中之組裝結構400的實施方式,在此不再贅述。
After the steps in Figures 25A to 26B are completed, an
由以上對於本發明之具體實施方式之詳述,可明顯看出,本發明的電路板在其基板側面的凹面形成穿孔走線部,並在凹面中填充導電焊料,使填充導電焊料的凹面成為接合處與另一電路板的凹面接合,將其應用在液晶螢幕的顯示面板時,可藉此提高螢幕佔屏比。此外,利用本發明之做為小尺寸的面板與其他面板矩陣排列並橫向拼接後,可形成大型LED顯示器面板,藉此可大幅減少接合之間的連接點的所占面積,達到無縫的視覺效果。 From the above detailed description of the specific embodiments of the present invention, it is obvious that the circuit board of the present invention is formed with perforated traces on the concave surface of the side surface of the substrate, and the concave surface is filled with conductive solder, so that the concave surface filled with the conductive solder becomes The joint is joined with the concave surface of another circuit board. When it is applied to the display panel of a liquid crystal screen, the screen-to-body ratio can be increased. In addition, by using the present invention as a small-sized panel and other panels arranged in matrix and spliced horizontally, a large-scale LED display panel can be formed, thereby greatly reducing the area occupied by the connection points between the joints and achieving seamless vision. effect.
雖然本發明已以實施方式揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone familiar with the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection of the present invention The scope shall be subject to the definition of the attached patent application scope.
100‧‧‧電路板 100‧‧‧Circuit board
112‧‧‧頂面 112‧‧‧Top surface
114‧‧‧側面 114‧‧‧ side
115‧‧‧凹面 115‧‧‧Concave
140‧‧‧穿孔走線部 140‧‧‧Perforated wiring part
141‧‧‧邊緣 141‧‧‧Edge
142‧‧‧間隔 142‧‧‧Interval
150‧‧‧上部線路結構 150‧‧‧Superior circuit structure
160‧‧‧下部線路結構 160‧‧‧Lower line structure
170‧‧‧導電焊料 170‧‧‧Conductive solder
B-B‧‧‧線 Line B-B‧‧‧
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW108128787A TWI721525B (en) | 2019-08-13 | 2019-08-13 | Circuit board and stacked structure and method for manufacturing stacked structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW108128787A TWI721525B (en) | 2019-08-13 | 2019-08-13 | Circuit board and stacked structure and method for manufacturing stacked structure |
Publications (2)
Publication Number | Publication Date |
---|---|
TW202107951A TW202107951A (en) | 2021-02-16 |
TWI721525B true TWI721525B (en) | 2021-03-11 |
Family
ID=75745336
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW108128787A TWI721525B (en) | 2019-08-13 | 2019-08-13 | Circuit board and stacked structure and method for manufacturing stacked structure |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI721525B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11670520B2 (en) | 2021-09-28 | 2023-06-06 | Unimicron Technology Corp. | Package structure with interconnection between chips and packaging method thereof |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114038869B (en) * | 2021-05-14 | 2023-01-13 | 重庆康佳光电技术研究院有限公司 | Display panel, display back panel and manufacturing method thereof |
TWI773344B (en) * | 2021-05-27 | 2022-08-01 | 奧圖碼股份有限公司 | Light-emitting module and display device |
TWI767728B (en) | 2021-06-01 | 2022-06-11 | 國立臺北科技大學 | Twistable electronic device module |
-
2019
- 2019-08-13 TW TW108128787A patent/TWI721525B/en active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11670520B2 (en) | 2021-09-28 | 2023-06-06 | Unimicron Technology Corp. | Package structure with interconnection between chips and packaging method thereof |
Also Published As
Publication number | Publication date |
---|---|
TW202107951A (en) | 2021-02-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI721525B (en) | Circuit board and stacked structure and method for manufacturing stacked structure | |
JP5084509B2 (en) | Interconnect element for interconnecting terminals exposed on the outer surface of an integrated circuit chip and method for manufacturing the same, multilayer interconnect substrate including a plurality of interconnect elements, method for manufacturing the same, and method for manufacturing multilayer interconnect substrate | |
JP3320325B2 (en) | Method of providing pads on high-density printed circuit board | |
US7754598B2 (en) | Method for manufacturing coreless packaging substrate | |
WO1991016726A1 (en) | Multilayer circuit board for mounting ic and manufacture thereof | |
JP2001111227A (en) | Flexible wiring board and method of manufacturing the same | |
JP2014090183A (en) | Microelectronic substrate having metal post connected with substrate by using bonding layer | |
TWI646879B (en) | Flexible circuit board, circuit board component and flexible circuit board manufacturing method | |
KR20130115323A (en) | Method of transferring and electrically joining a high density multilevel thin film to a circuitized and flexible organic substrate and associated devices | |
TW200412205A (en) | Double-sided printed circuit board without via holes and method of fabricating the same | |
KR20070068445A (en) | Structure and method of making interconnect element having metal traces embedded in surface of dielectric | |
TWI393497B (en) | Printed wiring board, manufacturing method for printed wiring board and electronic device | |
US6954986B2 (en) | Method for fabricating electrical connecting element | |
TWI693866B (en) | Flexible printed circuit boards and fabricating method of the same | |
JP7002643B2 (en) | Circuit board and its manufacturing method | |
US6981320B2 (en) | Circuit board and fabricating process thereof | |
US20110005071A1 (en) | Printed Circuit Board and Manufacturing Method Thereof | |
TWI719721B (en) | Tiled display and manufacturing method thereof | |
CN112423470A (en) | Circuit board, assembly structure and manufacturing method of assembly structure | |
KR100396869B1 (en) | Junction method for a flexible printed circuit board | |
JP3977072B2 (en) | Wiring board, semiconductor device, and manufacturing method thereof | |
TWI704854B (en) | Circuit board structure and manufacturing method thereof, display device having circuit board structure and manufacturing method thereof | |
JP7392966B2 (en) | printed circuit board | |
CN115019646A (en) | Display module, preparation method thereof and electronic equipment | |
CN111211116B (en) | Light emitting diode package and method of manufacturing the same |