TWI720256B - Multi-phase dc-dc controller - Google Patents

Abstract

A multi-phase DC-DC controller is disclosed. The multi-phase controller is connected with a driver having an enable pin. The controller includes a N-th phase current sensing pin, a N-th phase PWM pin, a phase detection selection unit, an enable setting unit and a switching unit. N is a positive integer. The N-th phase PWM pin is connected with the enable pin. The phase detection selection unit is connected with the N-th phase current sensing pin and generates a control signal according to a detection signal of the N-th phase current sensing pin. The enable setting unit provides an enable signal. The switching unit is connected with the enable setting unit and the phase detection selection unit and switches signal path according to the control signal to let the enable signal be provided to the enable pin of the driver through the N-th phase PWM pin.

Description

Multiphase DC to DC Controller

The present invention relates to power conversion, and particularly relates to a multi-phase DC-to-DC controller.

The multi-phase DC-DC controller includes a time signal generation unit and multiple pulse width modulation pins. The time signal generation unit transmits multiple pulse width modulation signals to multiple external driving circuits through multiple pulse width modulation pins. (Driver) or drive switch circuit (DrMOS).

1, in the prior art, the phase subtraction unit 10 in the conventional multi-phase DC-DC controller 1 can determine the number of idle phases based on the detection signal DS detected by the current sensing pin CSNx, so as to find A PWM pin that is idle without operation. When the detection signal DS detected by the current sensing pin CSNx is the working voltage VCC, the phase reduction unit 10 determines that the pulse width modulation pin PWMx does not need to send a pulse width modulation signal and sends a control signal SW1 at time T1 (As shown in FIG. 2) to the time signal generating unit 12 to interrupt the path between the time signal generating unit 12 and the pulse width modulation pin PWMx.

Please refer to FIG. 1 and FIG. 2, the traditional multi-phase DC-to-DC controller 1 also includes a drive control pin DRCTRL as a multi-function pin. The drive control pin DRCTRL is connected to the enable pin EN of the drive circuit 2, and at time T2, a reference current IS0 is generated through the external ground resistance RG for the function setting of the pulse width modulation pin PWMx, and the above function is set After completion, that is, at time T3, an enabling signal ENDR is issued to start the driving circuit 2.

However, when the enable pin EN of the drive circuit 2 connected to the drive control pin DRCTRL has an internal ground resistance, it will affect the resistance value of the ground resistance RG connected to the drive control pin DRCTRL, causing it to An error in the reference current leads to a malfunction of the function setting. In order to improve the above-mentioned shortcomings, in the prior art, a buffer element BF (as shown in FIG. 1) is additionally provided between the drive control pin DRCTRL in the multi-phase controller 1 and the enable pin EN in the drive circuit 2 It also leads to an increase in circuit cost.

In view of this, the present invention provides a multi-phase DC-DC controller to solve the problems mentioned in the prior art.

A preferred embodiment of the present invention is a multi-phase DC-DC controller. In this embodiment, the controller is connected to the driver. The driver has an enable pin. The controller includes an Nth phase current sensing pin, an Nth phase pulse width modulation pin, a phase detection selection unit, an enable setting unit, and a switching unit. The Nth phase pulse width modulation pin is connected to the enable pin. The phase detection selection unit is connected to the N-th phase current sensing pin, and generates a control signal according to the detection signal of the N-th phase current sensing pin. The enable setting unit provides an enable signal. The switching unit is connected to the enable setting unit and the phase detection selection unit, and switches the signal path according to the control signal, so that the enable signal is provided to the enable pin of the driver through the Nth phase pulse width modulation pin.

In an embodiment of the present invention, the Nth phase current sensing pin is connected to a predetermined voltage.

In an embodiment of the present invention, the controller further includes a drive control pin. When the enable signal is provided to the enable pin of the driver via the Nth phase pulse width modulation pin, the drive control pin is connected to the first parameter setting unit.

In an embodiment of the present invention, the controller further includes a drive control pin and a buffer circuit. The buffer circuit is respectively connected to the enable setting unit and the drive control pin. When the control signal indicates that multiple phases are used, the enable signal is provided to the enable pin of the driver via the buffer circuit and the drive control pin.

In an embodiment of the present invention, the driver has a pulse width modulation input pin. The controller also includes a first phase pulse width modulation pin, which is connected to the pulse width modulation input pin, and provides a pulse width modulation signal to the pulse width modulation input pin.

In an embodiment of the present invention, the controller further includes an Nth phase current sensing auxiliary pin, which is connected to the second parameter setting unit.

In an embodiment of the present invention, the controller further includes a function setting unit. The function setting unit is respectively connected to the Nth phase pulse width modulation pin and the Nth phase current sensing auxiliary pin. The function setting unit includes a comparator and a switch. The comparator has a first input terminal. A switch, one end of which is connected to the first input terminal and the other end of which is selectively connected to the Nth phase pulse width modulation pin or the Nth phase current sensing auxiliary pin according to the control signal.

Compared with the prior art, the multi-phase DC-to-DC controller of the present invention uses its idle pulse width modulation pin to output an enable signal to the enable pin of the drive switch circuit to activate the drive circuit. As a result, when there are idle pulse width modulation pins, the drive control pins of the multi-phase DC-to-DC controller of the present invention are no longer multi-function pins, but only need to be used as a setting for generating a reference current. Just connect the pins. Since the drive control pin is no longer connected to the enable pin in the drive circuit, even if the enable pin has an internal ground resistance, it will not affect the reference current generated by the drive control pin, so extra The cost of setting up external buffer components can effectively increase the flexibility of circuit applications.

The advantages and spirit of the present invention can be further understood from the following detailed description of the invention and the accompanying drawings.

3. 5‧‧‧Multi-phase DC-to-DC controller

4‧‧‧Drive switch circuit

30‧‧‧Phase detection selection unit

32‧‧‧Time signal generating unit

34‧‧‧Enable setting unit

35‧‧‧Switching unit

36‧‧‧Reference voltage selection unit

37‧‧‧Comparator

38‧‧‧Function setting unit

39‧‧‧Reference current generation unit

DRCTRL‧‧‧Drive control pin

PWM1~PWMx‧‧‧Pulse width modulation pins

CSP1~CSPx‧‧‧Auxiliary pin for current sensing

CSN1~CSNx‧‧‧Current sensing pins

EN‧‧‧Enable pin

PWM‧‧‧Pulse width modulation input pin

GND‧‧‧Ground pin

VCC‧‧‧Working voltage pin

BOOT‧‧‧Start pin

PH‧‧‧Phase pin

R‧‧‧Resistor

RG‧‧‧Grounding resistance

L‧‧‧Inductance

C‧‧‧Capacitor

VCC‧‧‧Working voltage

SW1‧‧‧Control signal

DS‧‧‧Detection signal

ENDR‧‧‧Enable signal

TON‧‧‧Pulse width modulation signal

IS0~ISX‧‧‧Reference current

351~352‧‧‧Switch

S1~S12‧‧‧Switch

T0~T3‧‧‧Time

50‧‧‧Phase detection selection unit

52‧‧‧Time signal generating unit

54‧‧‧Enable setting unit

55‧‧‧switching unit

58‧‧‧Function setting unit

PWM1~PWM4‧‧‧Pulse width modulation pins

CSP1~CSP4‧‧‧Auxiliary pins for current sensing

CSN1~CSN4‧‧‧Current sensing pins

Ton2~Ton4‧‧‧Time signal

551~553‧‧‧The first switch group ~ the third switch group

551A~551B, 552A~552B, 553A~553B‧‧‧Switch

Iset‧‧‧Set current

Figure 1 shows a schematic diagram of a traditional multi-phase DC-to-DC controller.

Figure 2 shows a timing diagram of the signals of a conventional multi-phase DC-to-DC controller.

Fig. 3 is a schematic diagram of a multi-phase DC-DC controller in a preferred embodiment of the present invention.

FIG. 4 shows a schematic diagram of the switching unit of the multi-phase DC-DC controller including a plurality of switches.

FIG. 5 shows the timing diagram of the signals of the multi-phase DC-to-DC controller when the detection signal is the working voltage.

FIG. 6 shows a schematic diagram of the function setting unit of the multi-phase DC-to-DC controller including a comparator and a switch.

FIG. 7 is a schematic diagram of a multi-phase DC-DC controller in another preferred embodiment of the present invention.

Reference will now be made in detail to exemplary embodiments of the present invention, and examples of the exemplary embodiments are illustrated in the accompanying drawings. Elements/components with the same or similar numbers used in the drawings and embodiments are used to represent the same or similar parts.

A preferred embodiment according to the present invention is a multi-phase DC-DC controller. In this embodiment, the multi-phase DC-to-DC controller can be connected to a driver (such as a driving circuit or a driving switch circuit) and selectively output a pulse width modulation signal or an enable signal to the driver, but it is not limited to this.

Please refer to FIG. 3, which is a schematic diagram of the multi-phase DC-DC controller in this embodiment. As shown in FIG. 3, the multi-phase DC-to-DC controller 3 is connected to the driving switch circuit 4. The multi-phase DC-to-DC controller 3 includes a phase detection selection unit 30, a time signal generation unit 32, an enable setting unit 34, a switching unit 35, a reference voltage selection unit 36, a comparator 37, a function setting unit 38, and a reference current generation unit. Unit 39, drive control pin DRCTRL, x pulse width modulation pins PWM1~PWMx, x current sensing auxiliary pins CSP1~CSPx and x current sensing pins CSN1~CSNx, x is a positive value greater than 2. Integer. The x pulse width modulation pins PWM1~PWMx, x current sensing auxiliary pins CSP1~CSPx, and x current sensing pins CSN1~CSNx can respectively correspond to different phases. The x current sensing pins CSN1~CSNx can be connected to a preset voltage. The driving switch circuit 4 includes an enable pin EN, a pulse width modulation input pin PWM, a ground pin GND, a working voltage pin VCC, a start pin BOOT, and a phase pin PH.

The output terminal of the comparator 37 is connected to the drive control pin DRCTRL; the positive input terminal of the comparator 37 + is connected to the reference voltage selection unit 36 and the negative input terminal of the comparator 37 is connected to the output of the reference current generation unit 39 and the comparator 37, respectively End; enable setting unit 34 are respectively connected to switching unit 35 and reference voltage selection unit 36; time signal generation unit 32 are respectively connected to function setting unit 38, reference current generation unit 39 and pulse width modulation pin PWM1; phase detection selection unit 30 are respectively connected to the switching unit 35, the function setting unit 38 and the current sensing pin CSNx; the reference current generating unit 39 is respectively connected to the negative input terminal-and output terminal of the comparator 37, the switching unit 35, the time signal generating unit 32, and the function setting The unit 38 and the pulse width modulation pin PWM1; the switching unit 35 is respectively connected to the phase detection selection unit 30, the time signal generation unit 32, the enable setting unit 34, the function setting unit 38, the reference current generation unit 39, and the pulse width modulation Pin PWMx and current sensing auxiliary pin CSPx; function setting unit 38 is respectively connected to phase detection selection unit 30, time signal generating unit 32, switching unit 35, pulse width modulation pins PWM1~PWMx and current sensing auxiliary connection Pin CSPx.

When the enable signal ENDR is provided to the enable pin EN of the drive switch circuit 4 via the pulse width modulation pin PWMx, the drive control pin DRCTRL is connected to the first parameter setting unit (for example, the ground resistance RG) and is set through the first parameter The unit is grounded; the pulse width modulation pin PWM1 is grounded through a resistor R and connected to the pulse width modulation input pin PWM of the drive switch circuit 4; the pulse width modulation pin PWMx is connected to the enable pin EN of the drive switch circuit 4 ; The current sensing auxiliary pin CSPx is connected to the second parameter setting unit (such as resistor R) and is grounded through the second parameter setting unit; the current sensing pin CSNx is connected to the resistor R; the current sensing auxiliary pin CSP1 is connected to the resistor R and Between the capacitor C; the current sensing pin CSN1 is connected to the output inductor L and the capacitor C through the resistor R. The working voltage pin VCC of the driving switch circuit 4 is connected to the working voltage VCC, and the working voltage pin VCC and the ground pin GND are respectively connected to both ends of the capacitor C; the phase pin PH is connected to the output inductor L; the start pin BOOT is connected in series The resistor R and the capacitor C are connected between the phase pin PH and the output inductor L.

The pulse width modulation pin PWM1 is used to provide the pulse width modulation signal TON to the pulse width modulation input pin PWM of the driving switch circuit 4. The current sensing pin CSNx is used to provide a detection signal DS to the phase detection selection unit 30 according to the signal it receives, and the phase detection selection unit 30 generates a control signal according to the detection signal DS of the current sensing pin CSNx SW1 to switch unit 35. The enable setting unit 34 is used to provide an enable signal ENDR to the switching unit 35. The time signal generating unit 32 is used for providing the pulse width modulation signal TON to the switching unit 35. The switching unit 35 is used for switching the signal path according to the control signal SW1, so that the enable signal ENDR is provided to the enable pin EN of the driving switch circuit 4 via the pulse width modulation pin PWMx. In fact, when the switching unit 35 receives the control signal SW1, the switching unit 35 can selectively output the enabling signal ENDR to the enabling of the driving circuit through the driving control pin DRCTRL or the pulse width modulation pin PWMx according to the control signal SW1 Pin EN. The reference current generating unit 39 is used for mirroring the reference current IS0 generated by the drive control pin DRCTRL through the external ground resistance RG to obtain mirrored reference currents IS1 to ISx.

In one embodiment, when the detection signal DS provided by the current sensing pin CSNx is the working voltage VCC, it means that the pulse width modulation pin PWMx is in an idle state at this time. Therefore, the phase detection selection unit 30 The control signal SW1 is provided to the switching unit 35 according to the detection signal DS, and the switching unit 35 performs a corresponding switching action according to the control signal SW1, so that the enable signal ENDR provided by the enable setting unit 34 can pass through the switching unit 35 and The idle pulse width modulation pin PWMx is output to the driving switch circuit 4. That is to say, the switching unit 35 of the DC-to-DC controller 3 of the present invention can switch the driving circuit enabling function originally provided by the driving control pin DRCTRL to be performed by the unused pulse width modulation pin PWMx. The enable signal ENDR is output to the enable pin EN of the drive switch circuit 4 through the idle pulse width modulation pin PWMx to activate the drive switch circuit 4. At this time, the drive control pin DRCTRL only serves as a setting pin for generating the reference current and has no other functions. As for the current sensing pin CSNx, it only provides the detection signal DS without other functions.

In another embodiment, when the detection signal DS provided by the current sensing pin CSNx is an output voltage-related signal, it means that the pulse width modulation pin PWMx is not in an unused state at this time. Therefore, the phase detection The selection unit 30 provides a control signal SW1 to the switching unit 35 according to the detection signal DS, and the switching unit 35 performs a corresponding switching action according to the control signal SW1, so that the pulse width modulation signal TON provided by the time signal generating unit 32 can be Output to the driving switch circuit 4 through the pulse width modulation pin PWMx. At this time, since there is no idle phase to output the enable signal ENDR, the enable signal ENDR is still output to the enable pin EN of the drive switch circuit 4 through the drive control pin DRCTRL, and the drive control pin DRCTRL and A buffer circuit (not shown) may be arranged between the enable setting unit 34, so that the buffer circuit is respectively connected to the enable setting unit 34 and the drive control pin DRCTRL. When the control signal SW1 indicates that multiple phases are used, the enable signal ENDR provided by the enable setting unit 34 can be provided to the enable pin EN of the drive switch circuit 4 through the buffer circuit and the drive control pin DRCTRL, but not This is limited.

It should be noted that when there is an idle phase, the drive control pin DRCTRL in the DC-to-DC controller 3 is no longer used as a multi-function pin, but only as a setting pin for generating a reference current. The ground resistance RG generates a reference current IS0 and is mirrored by the reference current generating unit 39 to obtain a mirrored reference current IS1 for function setting of the pulse width modulation pin PWMx.

As shown in FIG. 4, the switching unit 35 may include a plurality of switches 351-352. The switch 351 includes switching switches S1 to S2 and the switch 352 includes switching switches S3 to S4. The switch S1 is connected between the reference current IS1 in the reference current generating unit 39 and the current sensing auxiliary pin CSPx; the switch S2 is connected to the reference current IS1 in the reference current generating unit 39 and the pulse width modulation pin PWMx. The switch S3 is connected between the time signal generating unit 32 and the pulse width modulation pin PWMx; the switch S4 is connected between the enable setting unit 34 and the pulse width modulation pin PWMx.

Please refer to FIGS. 4 and 5 at the same time. In one embodiment, when the DC-DC controller 3 is activated at time T0, if the detection signal DS provided by the current sensing pin CSNx is the working voltage VCC, it represents the pulse width The modulation pin PWMx is in an unused state at this time. Therefore, at time T1, the phase detection selection unit 30 provides the control signal SW1 to the switching unit 35 according to the detection signal DS, and the switching unit 35 according to the control signal SW1 The switches S1 and S4 are turned on and the switches S2 and S3 are not turned on. At time T2, since the switch S1 is turned on, the reference current IS0 generated by the drive control pin DRCTRL through the external ground resistance RG is mirrored by the reference current generating unit 39 and the reference current IS1 obtained by the reference current generation unit 39 can be provided to the current sensing The auxiliary pin CSPx is used for function setting.

After the above function setting is completed, since the switch S4 is turned on, the enabling setting unit 34 can be connected to the pulse width modulation pin PWMx. Therefore, at time T3, the enabling signal ENDR provided by the enabling setting unit 34 is turned on. That is, output to the enable pin EN of the drive switch circuit 4 through the turned-on switch S4 and the idle pulse width modulation pin PWMx to activate the drive switch circuit 4.

In another embodiment, when the detection signal DS provided by the current sensing pin CSNx is an output voltage-related signal, it means that the pulse width modulation pin PWMx is not in an idle state at this time. Therefore, the phase detection selection unit 30 provides the control signal SW1 to the switching unit 35 according to the detection signal DS, and the switching unit 35 turns on the switches S2 and S3 and does not conduct the switches S1 and S4 according to the control signal SW1. Since the switch S2 is turned on, the reference current IS1 generated by the drive control pin DRCTRL through the external ground resistance RG can be provided to the current sensing auxiliary pin CSPx for function setting. Since the switch S3 is turned on, the time signal generating unit 32 can be connected to the pulse width modulation pin PWMx. Therefore, the pulse width modulation signal TON provided by the time signal generating unit 32 can pass through the turned switch S3 and the pulse width The modulation pin PWMx is output to the driving switch circuit 4.

In practical applications, as shown in FIG. 6, the function setting unit 38 of the DC-DC controller 3 may include a comparator 381 and a switch 382. One end of the switch 382 is connected to the positive input terminal + of the comparator, and the other end of the switch 382 is selectively connected to the pulse width modulation pin PWMx or the current sensing auxiliary pin CSPx according to the control signal SW1. As for the negative input terminal of the comparator-the reference voltage Vref is connected, but not limited to this.

The foregoing embodiments all describe the case where the number of idle phases is one. In fact, when the number of idle phases is greater than 1, the DC-DC multi-phase controller may include a plurality of identical switching units corresponding to different phases of the current sensing auxiliary pin CSPx and the pulse width modulation pin PWMx. The detection and selection unit can respectively generate a plurality of control signals to the complex array switching unit.

For example, as shown in FIG. 7, the multi-phase controller 5 includes a phase detection selection unit 50, a time signal generation unit 52, an enable setting unit 54, a switching unit 55, a function setting unit 58, and a pulse width modulation pin PWM1~PWM4, current sensing auxiliary pins CSP1~CSP4, and current sensing pins CSN1~CSN4. The current sensing pins CSN1~CSN4 corresponding to different phases can be called the Nth phase current sensing pins, N=1~4; the current sensing auxiliary pins CSP1~CSP4 corresponding to different phases can be called The N-th phase current sensing auxiliary pin can be connected to an external parameter setting unit (such as a resistor), N=1~4; the pulse width modulation pins PWM1~PWM4 corresponding to different phases can be called the Nth phase pulse width modulation Change pin, N=1~4; the phase detection selection unit 50 is used to provide the function of phase detection selection, and can also be called the phase detection selection unit; the enable setting unit 54 is used to provide the enable signal, or It is called an enabling setting unit, but it is not limited to this.

In this embodiment, the phase detection selection unit 50 is respectively connected to the current sensing pins CSN2~CSN4 of different phases, and respectively generates corresponding control signals SW1 according to the detection signals of the current sensing pins CSN2~CSN4 of different phases. ~SW3 to the first switch group 551 to the third switch group 553 in the switching unit 55. The first switch group 551 is respectively connected to the pulse width modulation pin PWM2 and the current sensing auxiliary pin CSP2; the second switch group 552 is respectively connected to the pulse width modulation pin PWM3 and the current sensing auxiliary pin CSP3; third The switch group 553 is respectively connected to the pulse width modulation pin PWM4 and the current sensing auxiliary pin CSP4. The switch groups 551 to 553 include switches 551A to 553A and 551B to 553B, respectively, and the switches 551A to 553A and 551B to 553B include switch switches S1 to S12, respectively. The enable setting unit 54 is used to provide an enable signal ENDR to the switching unit 55. The first switch group 551 to the third switch group 553 in the switching unit 55 respectively perform signal path switching according to the corresponding control signals SW1 to SW3, so that the enable signal ENDR provided by the enable setting unit 54 can pass through the idle The pulse width modulation pins PWM2~PWM4 are output to, for example, the enable pins of the driver, but not limited to this. The time signal generating unit 52 respectively generates time signals Ton2 to Ton4 and provides them to the first switch group 551 to the third switch group 553 respectively. The reference currents IS1 ˜ IS3 obtained by mirroring the reference current IS0 respectively provide the set current Iset to the first switch group 551 ˜ the third switch group 553.

In addition, similar to FIG. 6, the function setting unit 58 in FIG. 7 may also include a comparator and a switch. One end of the switch is connected to an input end of the comparator and the other end of the switch is selectively connected to the pulse width modulation pins PWM2~PWM4 or current sensing auxiliary pins CSP2~CSP4 of different phases according to the control signal. As for the other input terminal of the comparator, the reference voltage is connected, but it is not limited to this.

In practical applications, the current sensing pins (or N-th phase current sensing pins) CSN2~CSN4 of different phases can be connected to preset voltages, such as working voltage or output voltage-related signals, but not limited to this. Similar to the foregoing embodiment, when the enable signal is provided to the enable pin of the driver via a pulse width modulation pin of a certain phase, the drive control pin can be connected to a parameter setting unit (such as a resistor). When the control signal indicates that multiple phases are used, the enable signal can be provided to the enable pin of the driver via the drive control pin and the buffer circuit provided between the drive control pin and the enable setting unit 54.

Compared with the prior art, the multi-phase DC-to-DC controller of the present invention uses its idle pulse width modulation pin to output an enable signal to the enable pin of the drive switch circuit to activate the drive circuit. As a result, when there are idle pulse width modulation pins, the drive control pins of the multi-phase DC-to-DC controller of the present invention are no longer multi-function pins, but only need to be used as a setting for generating a reference current. Just connect the pins. Since the drive control pin is no longer connected to the enable pin in the drive circuit, even if the enable pin has an internal ground resistance, it will not affect the reference current generated by the drive control pin, so extra The cost of setting up external buffer components can effectively increase the flexibility of circuit applications.

Through the detailed description of the above preferred embodiments, it is hoped that the characteristics and spirit of the present invention can be described more clearly, and the scope of the present invention is not limited by the preferred embodiments disclosed above.

3‧‧‧DC to DC Controller

4‧‧‧Drive switch circuit

30‧‧‧Phase detection selection unit

32‧‧‧Time signal generating unit

34‧‧‧Enable setting unit

35‧‧‧Switching unit

36‧‧‧Reference voltage selection unit

37‧‧‧Comparator

38‧‧‧Function setting unit

39‧‧‧Reference current generation unit

DRCTRL‧‧‧Drive control pin

PWM1~PWMx‧‧‧Pulse width modulation pins

CSP1~CSPx‧‧‧Auxiliary pin for current sensing

CSN1~CSNx‧‧‧Current sensing pins

EN‧‧‧Enable pin

PWM‧‧‧Pulse width modulation input pin

GND‧‧‧Ground pin

VCC‧‧‧Working voltage pin

BOOT‧‧‧Start pin

PH‧‧‧Phase pin

R‧‧‧Resistor

RG‧‧‧Grounding resistance

L‧‧‧Inductance

C‧‧‧Capacitor

VCC‧‧‧Working voltage

SW1‧‧‧Control signal

DS‧‧‧Detection signal

ENDR‧‧‧Enable signal

TON‧‧‧Pulse width modulation signal

IS0~ISX‧‧‧Reference current

Claims (7)

A multi-phase DC-to-DC controller is connected to a driver, the driver has a consistent performance pin, and the multi-phase DC-to-DC controller includes: an N-th phase current sensing pin, where N is a positive integer; and an N-th phase The pulse width modulation pin is connected to the enable pin; a phase detection selection unit is connected to the Nth phase current sensing pin, and generates a detection signal according to a detection signal of the Nth phase current sensing pin Control signal; a consistent energy setting unit that provides a consistent energy signal; and a switching unit that connects the enable setting unit and the phase detection selection unit, and performs a signal path switch based on the control signal, so that the enable signal passes through the The Nth phase pulse width modulation pin is provided to the enable pin of the driver. The multi-phase DC-to-DC controller described in item 1 of the scope of patent application, wherein the N-th phase current sensing pin is connected to a predetermined voltage. The multi-phase DC-to-DC controller described in item 1 of the scope of patent application further includes: a drive control pin, when the enable signal is provided to the driver through the Nth phase pulse width modulation pin When the pin can be connected, the drive control pin is connected to a first parameter setting unit. The multi-phase DC-DC controller described in item 1 of the scope of patent application further includes: a drive control pin; and a buffer circuit respectively connected to the enable setting unit and the drive control pin, when the control signal When indicating that multiple phases are used, the enable signal is provided to the enable pin of the driver via the buffer circuit and the drive control pin. The multi-phase DC-to-DC controller described in item 1 of the scope of patent application, wherein the driver has a pulse width modulation input pin, and the multi-phase DC-to-DC controller further includes: a first phase pulse width modulation The pin is connected to the pulse width modulation input pin and provides a pulse width modulation signal to the pulse width modulation input pin. The multi-phase DC-DC controller described in item 1 of the scope of patent application further includes: an N-th phase current sensing auxiliary pin connected to a second parameter setting unit. For example, the multi-phase DC-to-DC controller described in item 6 of the scope of patent application further includes: a function setting unit respectively connected to the Nth phase pulse width modulation pin and the Nth phase current sensing auxiliary pin, It includes: a comparator having a first input terminal; and a switch, one end of which is connected to the first input terminal and the other end of which is selectively connected to the Nth phase pulse width modulation pin or the The Nth phase current sensing auxiliary pin.

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