TWI716397B - Manufacturing method of semiconductor device - Google Patents

Abstract

The manufacturing method of the semiconductor device of the present invention includes: a first step of disposing a first wiring 3 on the first surface 2a of the semiconductor substrate 2; a second step of mounting a light-transmitting substrate 5 on the first surface 2a; and a third step, It thins the semiconductor substrate 2 in such a way that the thickness of the semiconductor substrate 2 is smaller than the thickness of the light-transmitting substrate 5; the fourth step is to form the through-hole 7 in the semiconductor substrate 2; the fifth step is to implement it by using the first resin material The resin insulating layer 10 is provided by the dip coating method; the sixth step is to form the contact hole 16 in the resin insulating layer 10; and the seventh step is to provide the second wiring 8 on the surface 10b of the resin insulating layer 10 and in the contact hole At 16, the first wiring 3 and the second wiring 8 are electrically connected.

Description

Manufacturing method of semiconductor device

The present invention relates to a method of manufacturing a semiconductor device.

In semiconductor devices such as optical devices and electronic devices, there are cases in which electrical connection is made between the surface side and the inner surface side of the semiconductor substrate through through holes formed in the semiconductor substrate (for example, refer to Patent Document 1).

[Prior Technical Literature] [Patent Literature]

Patent Document 1: Japanese Patent Laid-Open No. 2004-57507

In the above-mentioned general semiconductor devices, along with their miniaturization and high integration, semiconductors tend to be thinner. As a result, during the manufacture of the semiconductor device, damage is likely to occur in the peripheral portion of the through hole, and it is also difficult to ensure electrical insulation between the wiring in the through hole and the semiconductor substrate.

Therefore, the object of the present invention is to provide a semiconductor device that can prevent damage to the peripheral portion of the through hole while reducing the thickness of the semiconductor substrate, and can ensure electrical insulation between the wiring in the through hole and the semiconductor substrate. method.

A method of manufacturing a semiconductor device according to an aspect of the present invention includes: a first step of arranging on the first surface of a semiconductor substrate having a first surface and a second surface facing each other The first wiring; the second step, after the first step, mount the support substrate on the first surface; the third step, after the second step, to remove the portion of the second surface side of the semiconductor substrate, thereby making the semiconductor The thickness of the substrate is smaller than the thickness of the support substrate to thin the semiconductor substrate; the fourth step, after the third step, is formed in the semiconductor substrate from the first surface to the second surface through holes, and in the through holes The first opening on the first surface side exposes a part of the first wiring; in the fifth step, after the fourth step, the first resin material is used to apply the dip coating method to the inner surface of the through hole and the second On the surface, a continuous resin insulating layer is provided through the second opening on the second surface side of the through hole; the sixth step, after the fifth step, a contact hole is formed in the resin insulating layer and on the first surface side of the contact hole The opening exposes a part of the first wiring; and in the seventh step, after the sixth step, the second wiring is arranged on the surface of the resin insulating layer, and the first wiring and the first wiring are placed in the opening on the first surface side of the contact hole. The second wiring is electrically connected.

In the method of manufacturing the semiconductor device, the steps after the step of reducing the thickness of the semiconductor substrate are implemented in a state where the support substrate is mounted on the semiconductor substrate. Thereby, it is possible to prevent damage to the peripheral portion of the through hole. In addition, the resin insulating layer is formed by the implementation of the dip coating method. Thereby, a resin insulating layer with sufficient thickness that can ensure electrical insulation can be reliably formed. Therefore, according to the manufacturing method of the semiconductor device, the semiconductor substrate can be thinned while preventing damage to the peripheral portion of the through hole, and electrical insulation between the wiring in the through hole and the semiconductor substrate can be ensured.

In the method of manufacturing a semiconductor device according to one aspect of the present invention, in the fifth step, the first resin material deposited is immersed and mounted in such a way that the liquid level of the deposited first resin material crosses the first surface A semiconductor substrate with a supporting substrate, and the first resin material deposited on the semiconductor substrate on which the supporting substrate is mounted is pulled up by the liquid surface of the deposited first resin material intersecting the first surface. Thereby, compared with the case where the liquid level of the first resin material deposited is parallel to the first surface of the semiconductor substrate, the impregnation and pulling up with respect to the first resin material can be reduced. The stress generated in the peripheral part. Also, with examples If the liquid level of the deposited first resin material is parallel to the first surface of the semiconductor substrate, the formation of the inner surface of the through hole can be suppressed compared to the case of impregnation and pulling up of the first resin material Air bubbles remain in the resin insulation layer.

In the manufacturing method of the semiconductor device of one aspect of the present invention, in the fifth step, the dip coating method may be implemented using the first resin material having a viscosity of 10 cp or more. Thereby, it is possible to further reliably form a resin insulating layer with sufficient thickness that can ensure electrical insulation.

In the manufacturing method of a semiconductor device of one aspect of the present invention, in the sixth step, the first resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the fifth step may also be removed. With this, for example, when the semiconductor device is an optical device, even if the light-transmitting substrate is used as a supporting substrate, the first resin material can be removed from the supporting substrate, so that the supporting substrate can effectively function as a light-transmitting substrate.

The method of manufacturing a semiconductor device according to one aspect of the present invention may further include: an eighth step, which uses a second resin material to apply a dip coating method after the seventh step, thereby covering the second wiring, A resin protection layer is provided on the surface of the resin insulating layer; and the ninth step, after the eighth step, an opening is formed in the resin protection layer, and a part of the second wiring is exposed in the opening. Thereby, a resin protective layer with sufficient thickness that can protect the second wiring can be reliably formed. In addition, a part of the second wiring can be used as a pad for electrical connection with the outside.

In the method of manufacturing a semiconductor device according to one aspect of the present invention, in the eighth step, the liquid level of the second resin material deposited and the first surface can also be immersed in the deposited second resin material. A semiconductor substrate with a supporting substrate, and the second resin material deposited on the semiconductor substrate with the supporting substrate is pulled up by the liquid level of the deposited second resin material intersecting the first surface. By this, for example, compared with the case where the liquid surface of the second resin material deposited is parallel to the first surface of the semiconductor substrate, the impregnation and pulling up with respect to the second resin material can be reduced. The stress generated in the peripheral part. Also, example For example, in a state where the liquid level of the stored second resin material is parallel to the first surface of the semiconductor substrate, the impregnation and pull-up of the second resin material can be suppressed in the area corresponding to the through hole. The formed resin protective layer contains air bubbles.

In the method of manufacturing a semiconductor device of one aspect of the present invention, in the eighth step, a second resin material having a viscosity of 10 cp or more may be used to implement the dip coating method. Thereby, a resin protective layer with sufficient thickness that can protect the second wiring can be formed more reliably.

In the method of manufacturing a semiconductor device according to one aspect of the present invention, in the ninth step, the second resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the eighth step may also be removed. With this, for example, when the semiconductor device is an optical device, even if the light-transmitting substrate is used as a supporting substrate, the second resin material can be removed from the supporting substrate, so that the supporting substrate can effectively function as a light-transmitting substrate.

In the manufacturing method of a semiconductor device of one aspect of the present invention, the first resin material and the second resin material may be the same. Thereby, even if the resin insulating layer and the resin protective layer are deformed due to temperature changes, the degree of their deformation becomes the same. Therefore, it is possible to prevent the second wiring from being damaged due to the greatly different degree of deformation. .

According to the present invention, it is possible to provide a method for manufacturing a semiconductor device that can prevent damage to the peripheral portion of the through hole while reducing the thickness of the semiconductor substrate, and can ensure electrical insulation between the wiring in the through hole and the semiconductor substrate .

1‧‧‧Semiconductor device

2‧‧‧Semiconductor substrate

2a‧‧‧The first surface

2b‧‧‧Second surface

2c‧‧‧p-type area

3‧‧‧First wiring

3a‧‧‧Pad part

4‧‧‧Oxide film

4a‧‧‧Opening

4b‧‧‧Opening

5‧‧‧Light transmission substrate (support substrate)

6‧‧‧Next layer

7‧‧‧Through hole

7a‧‧‧The first opening

7b‧‧‧Second opening

7c‧‧‧Inner surface

8‧‧‧Second wiring

8a‧‧‧Pad part

9‧‧‧Remove electrode

10‧‧‧Resin insulation layer

10a‧‧‧Open

10b‧‧‧surface

10c‧‧‧Open

11‧‧‧Region 1

12‧‧‧Region 2

13‧‧‧Region 3

14‧‧‧Region 4

15‧‧‧Area 5

16‧‧‧Contact hole

17‧‧‧Concave

21‧‧‧Resin protective layer

21a‧‧‧Concave

21b‧‧‧Open

21c‧‧‧Open

22‧‧‧3rd wiring

22a‧‧‧Pad part

23‧‧‧Remove electrode

100‧‧‧Resin layer

101‧‧‧The first bending part

102‧‧‧The second bend

103‧‧‧The third bend

210‧‧‧Resin layer

A1~A4‧‧‧Arrow

C‧‧‧Container

CL‧‧‧Centerline

D‧‧‧Sum of average thickness

F‧‧‧Resin material

FL‧‧‧Liquid level

H‧‧‧Height

Part P1‧‧‧

P2‧‧‧Part

S‧‧‧Noodles

T1‧‧‧Triangle

T2‧‧‧Triangle

W‧‧‧wafer

α‧‧‧Average tilt angle

β‧‧‧Average tilt angle

γ‧‧‧Average tilt angle

FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of the through hole and its peripheral part of the semiconductor device of FIG. 1. FIG.

FIG. 3 is a top view of the through hole and its peripheral part of the semiconductor device of FIG. 1. FIG.

(A) and (b) of FIG. 4 are cross-sectional views for explaining one step of the manufacturing method of the semiconductor device of FIG. 1.

(A) and (b) of FIG. 5 are cross-sectional views for explaining one step of the manufacturing method of the semiconductor device of FIG. 1.

6(a) and (b) are cross-sectional views for explaining one step of the manufacturing method of the semiconductor device of FIG. 1.

(A) and (b) of FIG. 7 are cross-sectional views for explaining one step of the manufacturing method of the semiconductor device of FIG. 1.

(A) and (b) of FIG. 8 are cross-sectional views for explaining one step of the manufacturing method of the semiconductor device of FIG. 1.

9 is a cross-sectional view for explaining one step of the manufacturing method of the semiconductor device of FIG. 1.

FIG. 10 is a partial cross-sectional view of the semiconductor device of FIG. 1. FIG.

FIG. 11 is a partial cross-sectional view of a modification of the semiconductor device of FIG. 1. FIG.

FIG. 12 is a partial cross-sectional view of a modification of the semiconductor device of FIG. 1. FIG.

FIG. 13 is a plan view of the through hole and its peripheral part of the semiconductor device of FIG. 12;

14 is a cross-sectional view of a modified example of the through hole and its peripheral portion of the semiconductor device of FIG. 1;

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, the same or equivalent parts are denoted by the same symbols in each figure, and repeated descriptions are omitted.

As shown in FIG. 1, the semiconductor device 1 includes a semiconductor substrate 2 having a first surface 2a and a second surface 2b facing each other. The semiconductor device 1 is an optical device such as a silicon photodiode. In the semiconductor device 1, for example, a specific region on the first surface 2a side of a semiconductor substrate 2 containing n-type silicon is provided with a p-type region 2c in which p-type impurities are selectively diffused. On the first surface 2 a of the semiconductor substrate 2, for example, a first wiring 3 containing aluminum is provided via an oxide film 4. In the portion of the oxide film 4 corresponding to the pad portion 3a of the first wiring 3, an opening 4a is formed. An opening 4b is formed in the portion of the oxide film 4 corresponding to the end of the p-type region 2c. No. 1 The wiring 3 is electrically connected to the p-type region 2c through the opening 4b. In addition, instead of the oxide film 4, an insulating film containing other insulating materials, such as SiN, may be provided.

On the first surface 2a of the semiconductor substrate 2, a light-transmitting substrate 5 containing a light-transmitting material such as glass is arranged. The semiconductor substrate 2 and the light-transmitting substrate 5 are optically and physically connected by an adhesive layer 6 containing an optical adhesive. In the semiconductor device 1, light is incident on the p-type region 2 c through the light-transmitting substrate 5 and the adhesive layer 6. In addition, the thickness of the semiconductor substrate 2 is smaller (thin) than the thickness of the light transmitting substrate 5. As an example, the thickness coefficient of the semiconductor substrate 2 is about ten μm, and the thickness coefficient of the light-transmitting substrate 5 is about 100 μm.

In the semiconductor substrate 2, a through hole 7 reaching from the first surface 2a to the second surface 2b is formed. The first opening 7 a of the through hole 7 is located on the first surface 2 a of the semiconductor substrate 2, and the second opening 7 b of the through hole 7 is located on the second surface 2 b of the semiconductor substrate 2. The first opening 7 a is continuous with the opening 4 a of the oxide film 4 and is covered by the pad portion 3 a of the first wiring 3. The inner surface 7c of the through hole 7 is a tapered surface that expands from the first surface 2a to the second surface 2b. For example, the through hole 7 is formed in a quadrangular truncated cone shape that expands from the first surface 2a toward the second surface 2b. In addition, when viewed from a direction parallel to the center line CL of the through line 7, the edge of the first opening 7a of the through hole 7 and the edge of the opening 4a of the oxide film 4 do not have to be the same, for example, the edge of the opening 4a of the oxide film 4 The edge may be located inside with respect to the edge of the first opening 7a of the through hole 7.

The aspect ratio of the through hole 7 is 0.2~10. The so-called aspect ratio is the depth of the through hole 7 (the distance between the first opening 7a and the second opening 7b) divided by the width of the second opening 7b (when the second opening 7b is rectangular, the ratio of the second opening 7b) The distance between the sides is the value of the diameter of the second opening 7b when the second opening 7b is circular. As an example, the depth of the through hole 7 is 30 μm, and the width of the second opening 7b is 130 μm. In this case, the aspect ratio becomes 0.23.

A resin insulating layer 10 is provided on the inner surface 7c of the through hole 7 and the second surface 2b of the semiconductor substrate 2. The resin insulating layer 10 is continuous through the second opening 7 b of the through hole 7. The resin insulating layer 10 is located inside the through hole 7, reaches the pad portion 3 a of the first wiring 3 through the opening 4 a of the oxide film 4, and has an opening 10 a on the first surface 2 a side of the semiconductor substrate 2.

On the surface 10b of the resin insulating layer 10 (the surface on the side opposite to the inner surface 7c of the through hole 7 and the second surface 2b of the semiconductor substrate 2), for example, a second wiring 8 containing aluminum is provided. The second wiring 8 is electrically connected to the pad portion 3a of the first wiring 3 in the opening 10a of the resin insulating layer 10. Furthermore, on the surface 10b of the resin insulating layer 10 (the surface on the side opposite to the second surface 2b of the semiconductor substrate 2), for example, a third wiring 22 containing aluminum is provided. The third wiring 22 is electrically connected to the second surface 2b of the semiconductor substrate 2 in the opening 10c formed in the resin insulating layer 10.

The second wiring 8 and the third wiring 22 are covered with a resin protective layer 21. A relatively shallow recess 21a having a smooth inner surface is formed in a portion of the resin protective layer 21 corresponding to the through hole 7. In the portion of the resin protective layer 21 corresponding to the pad portion 8a of the second wiring 8, an opening 21b for exposing the pad portion 8a is formed. In the portion of the resin protective layer 21 corresponding to the pad portion 22a of the third wiring 22, an opening 21c for exposing the pad portion 22a is formed. In the opening 21b of the resin protective layer 21, a bump electrode, ie, a lead electrode 9, is arranged. The extraction electrode 9 is electrically connected to the pad portion 8a of the second wiring 8. In the opening 21c of the resin protective layer 21, a bump electrode, ie, a lead electrode 23, is arranged. The extraction electrode 23 is electrically connected to the pad portion 22 a of the third wiring 22. The semiconductor device 1 is mounted on a circuit board via the extraction electrode 9 and the extraction electrode 23, and the extraction electrode 9 and the extraction electrode 23 function as an anode electrode and a cathode electrode, respectively. In addition, instead of the resin protective layer 21, a protective layer containing other insulating materials (for example, an oxide film, a nitride film, etc.) may be provided. In addition, the thickness of the resin protective layer 21 may be the same as the thickness of the resin insulating layer 10, or may be smaller than the thickness of the resin insulating layer 10. In particular, if the thickness of the resin protective layer 21 is the same as the thickness of the resin insulating layer 10, the stress applied to the second wiring 8 and the third wiring 22 can be reduced.

The above-mentioned resin insulating layer 10 will be described in more detail while referring to FIG. 2. In addition, in FIG. 2, the light-transmitting substrate 5, the adhesive layer 6 and the resin protective layer 21 are omitted.

As shown in FIG. 2, the surface 10b of the resin insulating layer 10 includes: a first area 11 that reaches the first opening 7a inside the through hole 7; and a second area 12 that reaches the first opening 7a inside the through hole 7 2 opening 7b; and the third region 13, which is outside the through hole 7 and the semiconductor substrate 2 The second surface 2b opposes.

The first region 11 is a tapered region that expands from the first surface 2a of the semiconductor substrate 2 to the second surface 2b. The first region 11 has an average inclination angle α. The average inclination angle α of the first region 11 refers to a plane including the center line CL of the through hole 7, when focusing on the region on one side of the center line CL, the intersection line of the plane and the first region 11 is relative to The average value of the angles formed by the first surface 2a. When the line of intersection is a straight line, the angle formed by the straight line and the first surface 2a becomes the average inclination angle α of the first region 11. When the line of intersection is a curve, the average value of the angles formed by the line of the curve and the first surface 2a becomes the average inclination angle α of the first region 11. The average inclination angle α of the first region 11 is greater than 0° and less than 90°.

The second region 12 is a tapered region that expands from the first surface 2a of the semiconductor substrate 2 to the second surface 2b. The second region 12 has an average inclination angle β. The average inclination angle β of the second region 12 refers to a plane including the center line CL of the through hole 7 and when focusing on the region on one side of the center line CL, the line of intersection between the plane and the second region 12 is relative to The average value of the angles formed by the first surface 2a. When the line of intersection is a straight line, the angle formed by the straight line and the first surface 2 a becomes the average inclination angle β of the second region 12. When the line of intersection is a curve, the average value of the angles formed by the line of the curve and the first surface 2a becomes the average inclination angle β of the second region 12. The average inclination angle β of the second region 12 is greater than 0° and less than 90°.

The average inclination angle β of the second area 12 is smaller than the average inclination angle α of the first area 11. That is, the second area 12 is an area having a gentler slope than the first area 11. In addition, the average inclination angle β of the second region 12 is smaller than the average inclination angle γ of the inner surface 7c of the through hole 7. That is, the second region 12 is a region having a gentler slope than the inner surface 7c of the through hole 7. In the present embodiment, the average inclination angle α of the first region 11 is closer to the average inclination angle γ of the inner surface 7c of the through hole 7 than the average inclination angle β of the second region 12. Here, the average inclination angle α of the first region 11> the average inclination angle γ of the inner surface 7 c of the through hole 7> the average inclination angle β of the second region 12. The so-called average inclination angle γ of the inner surface 7c of the through hole 7 is when focusing on the area on the side of the center line CL on the plane including the center line CL of the through hole 7, The average value of the angle formed by the intersection line of the plane and the inner surface 7c with respect to the first surface 2a. When the line of intersection is a straight line, the angle formed by the straight line and the first surface 2 a becomes the average inclination angle γ of the inner surface 7 c of the through hole 7. When the intersection is a curve, the average value of the angles formed by the line of the curve and the first surface 2a becomes the average inclination angle γ of the inner surface 7c of the through hole 7.

The surface 10b of the resin insulating layer 10 further includes: a fourth area 14 having a convex maximum curvature on the side opposite to the inner surface 7c of the through hole 7; and a fifth area 15 along the second opening of the through hole 7 The fate of 7b. The so-called maximum curvature of the side convex opposite to the inner surface 7c of the through hole is when the plane including the center line CL of the through line 7 is focused on the area on the side of the center line CL, the plane and the surface The maximum value of the curvature of the part that is convexly curved on the side opposite to the inner surface 7c of the through hole 7 in the intersection line of 10b. In addition, the first region 11 is located on the surface 10b of the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 and is closer to the first opening 7a side of the through hole 7 (and the center of the through hole 7 than the fourth region 14 The area on the side of the first opening 7a in the direction parallel to the line CL. The second region 12 is provided on the surface 10b of the resin insulating layer 10 of the inner surface 7c of the through hole 7 and is closer to the second opening 7b side of the through hole 7 than the fourth region 14 (parallel to the center line CL of the through hole 7 (Ie, the area between the fourth area 14 and the fifth area 15) on the side of the second opening 7b).

The fourth area 14 is curved so as to be continuously connected to the first area 11 and the second area 12. That is, the fourth area 14 is a curved surface with rounded corners, and smoothly connects the first area 11 and the second area 12. Here, assuming that the fourth region 14 does not exist, and the first region 11 is extended toward the second surface 2b side of the semiconductor substrate 2, and the second region 12 is extended toward the first surface 2a side of the semiconductor substrate 2, then The first area 11 and the second area 12 form a line of intersection (corner, curved portion). The fourth area 14 is equivalent to a curved surface formed when the intersection (corner, curved portion) is round-chamfered. The fourth area 14 is a plane including the center line CL of the through hole 7 and when focusing on the area on one side of the center line CL, the intersection of the plane and the surface 10b corresponds to the first area 11 Between the portion and the portion corresponding to the second region 12, facing the inner surface 7c of the through hole 7 The opposite side convexly curved part.

The fifth area 15 is bent so as to continuously connect the second area 12 and the third area 13. That is, the fifth area 15 is a curved surface with rounded corners, and smoothly connects the second area 12 and the third area 13. Here, assuming that the fifth region 15 does not exist, and the second region 12 is extended toward the second surface 2b side of the semiconductor substrate 2, and the third region 13 is extended toward the center line CL of the through hole 7, the second The area 12 and the third area 13 form a line of intersection (corner, bend, etc.). The fifth area 15 corresponds to a curved surface formed when the intersection line (corner, curved portion, etc.) is rounded. The fifth area 15 is a plane including the center line CL of the through hole 7 and when focusing on the area on one side of the center line CL, the part of the intersection of the plane and the surface 10b corresponding to the second area 12 And the portion corresponding to the third region 13 is convexly curved toward the side opposite to the edge of the second opening 7b of the through hole 7.

In the present embodiment, the first region 11, the fourth region 14, and the fifth region 15 are curved surfaces that are convexly curved toward the side opposite to the inner surface 7c of the through hole 7. The second area 12 is a curved surface curved convexly on the inner surface 7c side of the through hole 7 (that is, a curved surface curved concavely when viewed from the side opposite to the inner surface 7c of the through hole 7). The third region 13 is a plane substantially parallel to the second surface 2b of the semiconductor substrate 2. As described above, the fourth region 14 is curved to continuously connect the first region 11 and the second region 12, and the fifth region 15 is curved to continuously connect the second region 12 and the third region 13 Therefore, the surface 10b of the resin insulating layer 10 becomes a continuous surface (there is no discontinuous part such as the intersection line (corner, bend, etc.) between the surface and the surface, and the regions 11, 12, 13, 14, 15 are smoothly connected surface).

The average thickness of the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 is greater than the average thickness of the resin insulating layer 10 provided on the second surface 2b of the semiconductor substrate 2. The average thickness of the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 is the average value of the thickness of the resin insulating layer 10 in the direction perpendicular to the inner surface 7c. The average thickness of the resin insulating layer 10 provided on the second surface 2b of the semiconductor substrate 2 is the average thickness of the resin insulating layer 10 in the direction perpendicular to the second surface 2b.

In the direction parallel to the first surface 2a and the second surface 2b of the semiconductor substrate 2, the average thickness of the portion corresponding to the first region 11 in the resin insulating layer 10 corresponds to that of the second region 12 in the resin insulating layer 10 The average thickness of the part is large. In the direction parallel to the first surface 2a and the second surface 2b of the semiconductor substrate 2, the so-called average thickness of the portion corresponding to the first region 11 in the resin insulating layer 10 is the first region 11 and The average value of the distance between the inner surface 7c of the through hole 7. In the direction parallel to the first surface 2a and the second surface 2b of the semiconductor substrate 2, the so-called average thickness of the portion of the resin insulating layer 10 corresponding to the second region 12 is the second region 12 and the through hole in that direction 7 is the average value of the distance between the inner surface 7c.

In the resin insulating layer 10, the first region 11 is the surface of the portion having the height H from the first surface 2a of the semiconductor substrate 2 in the resin insulating layer 10 provided on the inner surface 7c of the through hole 7. The height H is less than 1/2 of the sum D of the thickness of the semiconductor substrate 2 (ie, the distance between the first surface 2a and the second surface 2b) and the average thickness of the resin insulating layer 10 provided on the second surface 2b of the semiconductor substrate 2 .

In the resin insulating layer 10, the surface S that passes through the edge of the opening 10a of the resin insulating layer 10 and the edge of the second opening 7b of the through hole 7 is set as the boundary surface. If the focus is on the surface S and the inside of the through hole 7 The volume of the portion P1 on the surface 7c side and the portion P2 on the side opposite to the inner surface 7c of the through hole 7 with respect to the surface S is larger than the volume of the portion P2. In addition, in the resin insulating layer 10, if the area on one side of the center line CL is focused on the plane including the center line CL of the through hole 7, the area of the triangle T1 is larger than the area of the triangle T2. The triangle T1 is in a plane including the center line CL of the through hole 7 (ie, in the cross section of FIG. 2), and the edge of the first opening 7a of the through hole 7 and the edge of the second opening 7b of the through hole 7 The edge of the opening 10a of the resin insulating layer 10 is a triangle with a vertex. The triangle T2 is in the plane including the center line CL of the through hole 7 (ie, in the cross section of FIG. 2), and the edge of the opening 10a of the resin insulating layer 10, the edge of the second opening 7b of the through hole 7, and the fourth The top of the area 14 is a triangle with the vertex.

The resin insulating layer 10 has a first bent portion 101, a second bent portion 102, and a third bent portion 103. The first bending portion 101 is located between the first opening 7a and the second opening 7b to cover the through hole 7 的内surface 7c. The second bent portion 102 covers the edge of the second opening 7b of the through hole 7 (that is, the intersection of the second surface 2b of the semiconductor substrate 2 and the inner surface 7c of the through hole). The second bent portion 102 is formed so as to span the second surface 2b of the semiconductor substrate 2 and the inner surface 7c of the through hole. In this embodiment, regardless of whether the shape of the edge of the second opening 7b is rectangular or circular, the edge of the second opening 7b does not become chamfered, but becomes a corner (edge). The second bending portion 102 covers this corner. The third bending portion 103 is located between the first bending portion 101 and the second bending portion 102 to cover the inner surface 7 c of the through hole 7. The first bending portion 101 and the third bending portion 103 are separated from each other, and the second bending portion 102 and the third bending portion 103 are separated from each other. The surface 10b (corresponding to the fourth region 14 in the present embodiment) of the resin insulating layer 10 of the first bent portion 101 is convexly curved toward the side opposite to the inner surface 7c of the through hole 7. The surface 10b of the resin insulating layer 10 of the second bending portion 102 (corresponding to the fifth region 15 in this embodiment) is convexly curved toward the side opposite to the inner surface 7c of the through hole 7. The surface 10b of the resin insulating layer 10 of the third bending portion 103 (in this embodiment, corresponding to the second region 12) is convexly curved toward the inner surface 7c side of the through hole 7 (that is, if it is connected to the through hole 7 When viewed from the opposite side of the inner surface 7c, it is concavely curved). The curvature of the surface 10b of the resin insulating layer 10 of the first bent portion 101 and the curvature of the surface 10b of the resin insulating layer 10 of the second bent portion 102 are different from each other.

The so-called convex curvature to the side opposite to the inner surface 7c of the through hole 7 refers to a plane containing the center line CL of the through hole 7 when focusing on the area on the side of the center line CL, the plane and The intersection line of the surface 10 b is convexly curved toward the side opposite to the inner surface 7 c of the through hole 7. The so-called convex curvature toward the inner surface 7c side of the through hole 7 refers to a plane including the center line CL of the through hole 7 when focusing on the area on the side of the center line CL, the plane and the surface 10b The line of intersection is convexly curved toward the inner surface 7c side of the through hole 7.

As shown in FIG. 3, when viewed from a direction parallel to the center line CL of the through hole 7, the outer edge of the second wiring 8 is located outside the second opening 7 b of the through hole 7. That is, the outer edge of the second wiring 8 is located on the surface of the surface 10b of the resin insulating layer 10 on the side opposite to the second surface 2b of the semiconductor substrate 2. In addition, in FIG. 3, the resin insulating layer 10 is shown by a dotted line , The second wiring 8 is displayed as a two-dot chain line.

When the through hole 7 is formed in a quadrangular pyramid shape that expands from the first surface 2a to the second surface 2b, the surface 10b of the resin insulating layer 10 of the second bent portion 102 (in this embodiment, corresponds to the first In area 15), when viewed in a direction parallel to the center line CL of the through hole 7, compared to the distance from each side of the second opening 7b of the through hole 7 to the surface 10b, the first 2 The distance between the corners of the opening 7b and the surface 10b is relatively large. Thereby, in each corner of the second opening 7b of the through hole 7, the second curved portion 102 becomes a more gentle curved surface, so that the edge of the second opening 7b of the through hole 7 can be reliably prevented from being exposed, and the edge of the second opening 7b of the through hole 7 can be more reliably prevented. The leakage of current between the second wiring 8 and the semiconductor substrate 2 is suppressed.

In addition, on the surface 10b of the resin insulating layer 10 of the first bent portion 101 (in this embodiment, it corresponds to the fourth region 14), when viewed from a direction parallel to the center line CL of the through hole 7, The distance from each corner of the first opening 7a of the through hole 7 to the surface 10b is larger than the distance from each side of the first opening 7a of the through hole 7 to the surface 10b. Furthermore, when viewed from a direction parallel to the center line CL of the through hole 7, the surface 10b of the resin insulating layer 10 of the second bent portion 102 (corresponding to the fifth region 15 in this embodiment), and the first 2 The distance between the surface 10b of the resin insulating layer 10 of the bent portion 102 (in this embodiment, corresponding to the fifth region 15) is compared with the distance between the sides of the first opening 7a of the through hole 7, and the distance between the through hole The distance between the corners of the first opening 7a of 7 is relatively large. Thereby, although the corner portion (valley portion) of the quadrangular pyramid-shaped through-hole 7 is a portion where the insulating film is more likely to be thinned, the thickness of the resin insulating layer 10 can be sufficiently ensured in the corner portion (valley portion).

As described above, in the semiconductor device 1, the resin insulating layer 10 has the second bent portion 102 covering the edge of the second opening 7b of the through hole 7, and the surface 10b of the second bent portion 102 faces the inside of the through hole 7 The opposite side of the surface 7c is convexly curved. Thereby, the surface 10b of the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 and the surface 10b of the resin insulating layer 10 provided on the second surface 2b of the semiconductor substrate 2 are smoothly connected. Therefore, it is possible to prevent disconnection of the second wiring 8 in the portion of the second opening 7b of the through hole 7 during or after the manufacturing. also , The resin insulating layer 10 has a first curved portion 101 covering the inner surface 7c of the through hole 7 between the first opening 7a and the second opening 7b, and the surface 10b of the first curved portion 101 faces the inner surface 7c of the through hole 7 The opposite side is convexly curved. Thereby, even when the diameter of the through hole 7 is reduced, for example, the width of the opening 10a of the resin insulating layer 10 on the first surface 2a side of the semiconductor substrate 2 can be sufficiently ensured. Therefore, it is possible to prevent disconnection of the first wiring 3 and the second wiring 8 in the opening 10a of the resin insulating layer 10 during or after the manufacturing. Therefore, according to the semiconductor device 1, the electrical connection of the semiconductor substrate 2 via the through hole 7 can be assured.

In the semiconductor device 1, the resin insulating layer 10 further has a third curved portion 103 covering the inner surface 7c of the through hole 7 between the first curved portion 101 and the second curved portion 102, and the surface 10b of the third curved portion 103 faces The inner surface 7c side of the through hole 7 is convexly curved. Thereby, even if some external force acts on the first opening 7a side from the second opening 7b side of the through hole 7, for example, the third bent portion 103 can function as a buffer area. Therefore, the stress generated at the connection portion between the first wiring 3 and the second wiring 8 can be reduced, and the disconnection of the first wiring 3 and the second wiring 8 can be further reliably prevented.

In the semiconductor device 1, the average thickness of the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 is larger than the average thickness of the resin insulating layer 10 provided on the second surface 2b. Thereby, even when the semiconductor substrate 2 is thinned, the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 can also function as a reinforcing layer, so that the strength of the peripheral portion of the through hole 7 can be sufficiently ensured . In addition, the average inclination angle of the first region 11 and the average inclination angle of the second region 12 can be set to desired angles, and the surface 10b can be obtained as a continuous surface (there is no intersection line (corner, curved part, etc.) between the surface and the surface). ) And other discontinuous parts, the areas 11, 12, 13, 14, and 15 are smoothly connected surfaces) of the resin insulating layer 10. For example, when the resin insulating layer 10 is formed with a uniform thickness along the inner surface 7c of the through hole 7, it is impossible to obtain the resin insulating layer 10 whose surface 10b becomes a continuous surface.

In the semiconductor device 1, the inner surface 7c of the through hole 7 is a tapered surface that expands from the first surface 2a to the second surface 2b. In this case, the semiconductor substrate 2 can also be passed through the through hole 7 The electrical connection is confirmed.

In the semiconductor device 1, the first region 11 reaching the first opening 7a of the through hole 7 and the second region 12 reaching the second opening 7b of the through hole 7 in the surface 10b of the resin insulating layer 10 are from The first surface 2a of the semiconductor substrate 2 is a tapered region that expands toward the second surface 2b. Then, the average inclination angle of the second region 12 is smaller than the average inclination angle of the inner surface 7 c of the through hole 7. Thereby, the third region 13 of the surface 10b of the resin insulating layer 10 opposite to the second surface 2b of the semiconductor substrate 2 and the second region 12 reaching the second opening 7b of the through hole 7 form an angle that is greater than The angle formed by the second surface 2b of the semiconductor substrate 2 and the inner surface 7c of the through hole 7 is large (ie, gentle). Therefore, the second wiring 8 in the portion of the second opening 7b of the through hole 7 is prevented from disconnecting during or after the manufacturing. In addition, compared to the case where the resin insulating layer 10 is formed with a uniform thickness along the inner surface 7c of the through hole 7, for example, the inclination of the second region 12 is gentle, so that the second wiring 8 can be easily and reliably formed. Furthermore, since the second wiring 8 can be formed independently of the shape of the inner surface 7c of the through hole 7, for example, when a sharp portion remains on the inner surface 7c of the through hole 7, it can be prevented from being caused by such a portion. The second wiring 8 is disconnected. In addition, the average inclination angle of the second area 12 is smaller than the average inclination angle of the first area 11. In other words, the average inclination angle of the first region 11 reaching the first opening 7a of the through hole 7 is greater than the average inclination angle of the second region 12. Thereby, when the diameter of the through hole 7 is reduced, for example, the width of the opening 10a of the resin insulating layer 10 on the first surface 2a side of the semiconductor substrate 2 can be sufficiently ensured. Therefore, it is possible to prevent disconnection of the first wiring 3 and the second wiring 8 in the opening 10a of the resin insulating layer 10 during or after the manufacturing. Furthermore, in the surface 10b of the resin insulating layer 10, the fourth region 14 is bent so as to continuously connect the first region 11 and the second region 12, and the fifth region 15 is formed to connect the second region 12 and the third region 13 The way of continuous connection is bent. Therefore, it is possible to prevent disconnection of the second wiring 8 in the entire area of the surface 10b of the resin insulating layer 10 during or after the manufacture. Especially after manufacturing, the stress concentration can be relieved in the entire area of the surface 10b of the resin insulating layer 10, so it is effective to prevent the disconnection of the second wiring 8. Based on the above, according to the semiconductor device 1. The electrical connection of the semiconductor substrate 2 through the through hole 7 can be confirmed.

In the semiconductor device 1, the surface 10b of the resin insulating layer 10 becomes a continuous surface (there is no discontinuous part such as the intersection line (corner, bend, etc.) between the surface and the surface, and the regions 11, 12, 13, 14, 15 are Smoothly connected surfaces). Thereby, stress concentration can be relieved and the disconnection of the second wiring 8 can be prevented.

In the semiconductor device 1, the average inclination angle of the first region 11 is closer to the average inclination angle of the inner surface 7 c of the through hole 7 than the average inclination angle of the second region 12. Thereby, an opening 10a having a sufficient width for exposing the pad portion 3a of the first wiring 3 can be obtained. As a result, the opening 10a in the resin insulating layer 10 can be reliably prevented both during and after production Part of the first wiring 3 and the second wiring 8 are disconnected.

In the semiconductor device 1, the average inclination angle α of the first region 11> the average inclination angle γ of the inner surface 7 c of the through hole 7> the average inclination angle β of the second region 12. Thereby, disconnection of the second wiring 8 can be prevented, and an opening 10a having a sufficient width in order to expose the pad portion 3a of the first wiring 3 can be obtained.

In the semiconductor device 1, in the direction parallel to the first surface 2a and the second surface 2b of the semiconductor substrate 2, the average thickness of the portion corresponding to the first region 11 in the resin insulating layer 10 is greater than that of the resin insulating layer 10 The average thickness of the portion corresponding to the second region 12 is large. Thereby, it is possible to obtain the resin insulating layer 10 having a shape in which the disconnection of the second wiring 8 and the disconnection of the first wiring 3 and the second wiring 8 are hard to occur.

In the semiconductor device 1, for example, even if there is a protrusion or the like remaining at the edge of the second opening 7b of the through hole 7, the protrusion or the like is covered by the resin insulating layer 10, and is in the fifth region 15 which is a convexly curved curved surface. The second wiring 8 is provided. Thereby, disconnection of the second wiring 8 in the portion of the second opening 7b of the through hole 7 can be reliably prevented.

In the semiconductor device 1, the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 has 1/2 of the sum D of the thickness provided on the semiconductor substrate 2 and the average thickness of the resin insulating layer 10 on the second surface 2b The surface of the portion of height H below becomes the first region 11. By this, In the surface 10b of the resin insulating layer 10, the first area 11 and the second area 12 can be smoothly connected, and disconnection of the second wiring 8 at the boundary between the first area 11 and the second area 12 can be reliably prevented.

In the resin insulating layer 10 of the semiconductor device 1, the surface S that passes through the edge of the opening 10a of the resin insulating layer 10 and the edge of the second opening 7b of the through hole 7 is set as the boundary surface, and it penetrates the surface S with a focus on The volume of the portion P1 on the inner surface 7c side of the hole 7 and the portion P2 on the side opposite to the inner surface 7c of the through hole 7 with respect to the surface S is larger than the volume of the portion P2. Moreover, if the plane including the center line CL of the through hole 7 is focused on the area on one side of the center line CL, the area of the triangle T1 is larger than the area of the triangle T2. By these, in the surface 10b of the resin insulating layer 10, the first area 11 and the second area 12 can also be smoothly connected, and the second area at the boundary between the first area 11 and the second area 12 can be reliably prevented. Disconnection of wiring 8.

In the semiconductor device 1, the surface 10b of the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 has a convex maximum curvature on the side opposite to the inner surface 7c of the through hole 7, which is closer to the fourth region 14 The area on the side of the first opening 7 a becomes the first area 11, and the area on the side closer to the second opening 7 b than the fourth area 14 becomes the second area 12. Such a shape of the resin insulating layer 10 is particularly effective in ensuring the electrical connection of the semiconductor substrate 2 through the through hole 7.

Next, the method of manufacturing the above-mentioned semiconductor device 1 will generally be described with reference to FIGS. 4 to 9. First, as shown in FIG. 4(a), a p-type region 2c is formed on the semiconductor substrate 2, and the oxide film 4 and the first wiring 3 are provided on the first surface 2a of the semiconductor substrate 2 (first step). Next, as shown in FIG. 4(b), a light-transmitting substrate (supporting substrate) 5 is mounted on the first surface 2a of the semiconductor substrate 2 via an adhesive layer 6 (second step).

Next, as shown in FIG. 5(a), the second surface 2b of the semiconductor substrate 2 on which the light-transmitting substrate 5 is mounted is polished (that is, by removing the portion on the second surface 2b side of the semiconductor substrate 2), The semiconductor substrate 2 can be made thinner in such a way that the thickness of the semiconductor substrate 2 is smaller than the thickness of the light transmission substrate 5 (third step). In this way, by making the semiconductor substrate 2 thinner, the through hole 7 can be easily formed in the subsequent step. Also, even in the completed semiconductor device 1 It can also seek to improve the response speed. Next, as shown in FIG. 5(b), through-holes 7 are formed in the semiconductor substrate 2 by anisotropic wet etching, and further, as shown in FIG. 6(a), in the oxide film 4 The portion corresponding to the pad portion 3a of the first wiring 3 is removed, and an opening 4a is formed in the oxide film 4. Thereby, the pad part 3a of the 1st wiring 3 is exposed in the 1st opening 7a of the through-hole 7 (4th step). In addition, when viewed from a direction parallel to the center line CL of the through hole 7, it is not necessary to form the oxide film 4 in such a way that the edge of the first opening 7a of the through hole 7 coincides with the edge of the opening 4a of the oxide film 4 The opening 4a may also be formed in the oxide film 4 in such a way that the edge of the opening 4a of the oxide film 4 is located inside with respect to the edge of the first opening 7a of the through hole 7, for example.

Next, prepare a positive type first resin material with a viscosity of 10 cp or more, and use the first resin material to implement the dip coating method (the object is immersed in the resin paint, and the object is sucked from the resin paint to The method of forming a resin layer), whereby as shown in FIG. 6(b), a resin insulating layer 10 is provided on the inner surface 7c of the through hole 7 and the second surface 2b of the semiconductor substrate 2 (5th step). Thereby, in the resin insulating layer 10, a recess 17 having the inner surface following the second region 12, the third region 13 and the fifth region 15 is formed. In addition, the first resin material is also attached to the surface of the side opposite to the semiconductor substrate 2 of the light-transmitting substrate 5, and the resin layer 100 is formed. In addition, as the first resin material, for example, phenol resin, polyimide resin, epoxy resin, and the like can be used.

Next, as shown in FIG. 7(a), using a mask (not shown), only the portion corresponding to the contact hole 16 and the portion corresponding to the opening 10c in the resin insulating layer 10 are irradiated with light, and only The other parts are exposed. Furthermore, the resin layer 100 (refer to FIG. 6(b)) is also irradiated with light, and the resin layer 100 is also exposed. Then, the part corresponding to the contact hole 16 and the part corresponding to the opening 10c, and the resin layer 100 are developed in the resin insulating layer 10, thereby forming the contact hole 16 and the opening 10c in the resin insulating layer 10, and removing the resin layer 100 (ie, the first resin material attached to the surface of the light-transmitting substrate 5 on the opposite side of the semiconductor substrate 2). Thereby, the opening 10a of the resin insulating layer 10 exposes the pad part 3a of the first wiring 3, And a part of the second surface 2b of the semiconductor substrate 2 is exposed in the opening 10c of the resin insulating layer 10 (6th step). In addition, when forming the contact hole 16, ashing treatment or the like may be used in combination.

At the time of exposure, a gap is formed by the recess 17 formed in the resin insulating layer 10 between the light transmitting portion of the mask (not shown) and the portion of the resin insulating layer 10 corresponding to the contact hole 16. Thereby, the light is diffracted and irradiated on the resin insulating layer 10. Therefore, at the time of development, a contact hole 16 having the inner surface of the first region 11 and the second region 12 having a tapered shape that expands from the first surface 2a to the second surface 2b of the semiconductor substrate 2 is formed.

Next, as shown in FIG. 7(b), for example, aluminum is used for sputtering, whereby the second wiring 8 and the third wiring 22 are provided on the surface 10b of the resin insulating layer 10, and the openings of the resin insulating layer 10 In 10a, the first wiring 3 and the second wiring 8 are electrically connected, and the third wiring 22 and the second surface 2b of the semiconductor substrate 2 are electrically connected in the opening 10c of the resin insulating layer 10 (step 7). At this time, the contact hole 16 has an inner surface that follows the tapered first region 11 that expands from the first surface 2a to the second surface 2b of the semiconductor substrate 2. Therefore, a metal film is surely formed on the inner surface. Furthermore, The first wiring 3 and the second wiring 8 are reliably connected in the opening 10a of the resin insulating layer 10.

Next, prepare a positive type second resin material with a viscosity of 10 cp or more, and apply the dip coating method by using the second resin material, as shown in Figure 8(a), to cover the second wiring 8 and For the third wiring 22, the resin protective layer 21 is provided on the surface 10b of the resin insulating layer 10 (8th step). Thereby, a recess 21a is formed in the resin protective layer 21. In addition, a second resin material is also attached to the surface of the light-transmitting substrate 5 on the side opposite to the semiconductor substrate 2 to form a resin layer 210. In addition, as the second resin material, for example, phenol resin, polyimide resin, epoxy resin, and the like can be used.

Next, as shown in FIG. 8(b), a mask (not shown) is used, and in the resin protective layer 21, only the portion corresponding to the pad portion 8a of the second wiring 8 and the third wiring 22 The corresponding part of the pad part 22a is irradiated with light, and only the part thereof is exposed. Furthermore, the resin layer 210 (refer to FIG. 8(a)) is also irradiated with light, and the resin layer 210 is exposed. Then, in the resin The portion of the protective layer 21 corresponding to the pad portion 8a of the second wiring 8 and the portion corresponding to the pad portion 22a of the third wiring 22, and the resin layer 210 are developed, thereby forming openings 21b and The opening 21c is opened, and the resin layer 210 (that is, the second resin material attached to the surface of the light-transmitting substrate 5 opposite to the semiconductor substrate 2) is removed. Thereby, the opening 21b of the resin protective layer 21 exposes the pad portion 8a of the second wiring 8 and the opening 21c of the resin protective layer 21 exposes the pad portion 22a of the third wiring 22 (9th step). Finally, the extraction electrode 9 is arranged on the pad portion 8a of the second wiring 8 not covered by the resin protective layer 21, and the extraction electrode 23 is arranged on the pad portion 22a of the third wiring 22 not covered by the resin protective layer 21 to obtain The above-mentioned semiconductor device 1.

The steps of implementing the above-mentioned dip coating method will be described in further detail. In this embodiment, the first resin material used to form the resin insulating layer 10 is the same as the first resin material used to form the resin protective layer 21. Therefore, the dip coating method for forming the resin insulating layer 10 and the dip coating method for forming the resin protective layer 21 are implemented as follows. In addition, each step of the above-mentioned manufacturing method of the semiconductor device 1 is implemented at the wafer level, and finally, a wafer including a plurality of semiconductor devices 1 is cut to obtain each semiconductor device 1.

As shown in FIG. 9, the resin material F stored in the container C is impregnated with a wafer W containing a portion corresponding to a plurality of semiconductor devices 1. When the resin material F is immersed in the wafer W, the state where the liquid level FL of the resin material F stored in the container C intersects the first surface 2a of the semiconductor substrate 2 is maintained (in this embodiment, it is an orthogonal state, namely The first surface 2a of the semiconductor substrate 2 is in a state parallel to the vertical direction).

Next, from the resin material F stored in the container C, the wafer W including the portion corresponding to the plurality of semiconductor devices 1 is pulled up. When the resin material F is pulled up from the wafer W, maintain a state where the liquid level FL of the resin material F stored in the container C intersects the first surface 2a of the semiconductor substrate 2 (in this embodiment, it is orthogonal That is, the first surface 2a of the semiconductor substrate 2 is parallel to the vertical direction).

After that, the resin material F coated on the wafer W is pre-baked. It is preferable to maintain the orientation of the wafer W during the pre-baking to the same orientation as when dipping and pulling up the semiconductor substrate 2 with respect to the resin material F. The reason is as follows. That is, the reason is that during the pre-baking, if the orientation of the wafer is changed in a different direction from when dipping and pulling up the semiconductor substrate 2 with respect to the resin material F, the adhesion state of the resin material F changes. There is a risk of deviation in the formation state of the resin insulating layer 10 and the resin protective layer 21 in each through hole 7.

In addition, a detailed example of the step of patterning each of the resin insulating layer 10 and the resin protective layer 21 is as follows. That is, the resin material is coated by the dip coating method, the above-mentioned resin material is pre-baked, the above-mentioned resin material is exposed, the resin material is dried, the above-mentioned resin material is developed, and the resin material is developed. drying. In addition, the drying of the resin material after the above-mentioned exposure of the resin material and before the development of the resin material may not be performed.

As described above, in the method of manufacturing the semiconductor device 1, the steps after the step of reducing the thickness of the semiconductor substrate 2 can be implemented in a state where the semiconductor substrate 2 is mounted with the light-transmitting substrate 5. Thereby, it is possible to prevent damage to the peripheral portion of the through hole 7. In addition, the resin insulating layer 10 is formed by the implementation of the dip coating method. Thereby, the resin insulating layer 10 having a sufficient thickness that can ensure electrical insulation can be reliably formed. Therefore, according to the method of manufacturing the semiconductor device 1, the semiconductor substrate 2 can be thinned while preventing damage to the peripheral portion of the through hole 7, and electrical properties between the wiring in the through hole 7 and the semiconductor substrate 2 can be ensured insulation.

In the method of manufacturing the semiconductor device 1, in each of the dip coating method for forming the resin insulating layer 10 and the dip coating method for forming the resin protective layer 21, the method is performed relative to the resin material as follows F impregnation and pull up. That is, so that the liquid level FL of the stored resin material F crosses the first surface 2a of the semiconductor substrate 2, the semiconductor substrate 2 on which the light-transmitting substrate 5 is mounted is impregnated in the stored resin material F, and Deposited resin material F In such a way that the liquid level FL crosses the first surface 2a of the semiconductor substrate 2, the self-stored resin material F pulls up the semiconductor substrate 2 on which the light-transmitting substrate 5 is mounted. Thereby, compared with the case where the liquid level FL of the deposited resin material F is parallel to the first surface 2a of the semiconductor substrate 2 and the resin material F is impregnated and pulled up, it is possible to reduce the penetration hole 7 the stress generated in the peripheral part. In addition, for example, compared with the case where the liquid level FL of the deposited resin material F is parallel to the first surface 2a of the semiconductor substrate 2, the impregnation and pull-up of the resin material F can be suppressed to form Air bubbles remain in the resin insulating layer 10 on the inner surface 7c of the through hole 7.

In the method of manufacturing the semiconductor device 1, in each of the dip coating method for forming the resin insulating layer 10 and the dip coating method for forming the resin protective layer 21, the same one having a viscosity of 10 cp or more is used Resin material. By using a resin material with a viscosity of 10 cp or more, a resin insulating layer 10 with sufficient thickness can be reliably formed to ensure electrical insulation, and a resin insulating layer 10 that can protect the second wiring 8 and the third wiring 22 can be reliably formed A resin protective layer 21 of sufficient thickness. In addition, by using the same resin material, even if the resin insulating layer 10 and the resin protective layer 21 are deformed due to temperature changes, the degree of deformation due to them becomes the same, so the degree of deformation due to them can be prevented from being too large. Differently, the second wiring 8 and the third wiring 222 are damaged.

In addition, in the dip coating method, generally, resin materials with lower viscosity are used (for example, resin materials used for water-repellent coating, such as resin materials with a viscosity of less than 1 cp). However, even if the dip coating method is performed using such a resin material, the resin insulating layer 10 is formed with a substantially uniform thickness along the inner surface 7c of the through hole 7. Therefore, in the manufacturing method of the semiconductor device 1 described above, the resin insulating layer 10 having the above-mentioned shape can be easily and surely obtained by applying the dip coating method using a resin material having a viscosity of 10 cp or more.

In the method of manufacturing the semiconductor device 1, when the contact hole 16 and the opening 10c are formed in the resin insulating layer 10, the resin layer 100 (that is, the resin layer 100 attached to the light-transmitting substrate 5 and the semiconductor base The first resin material on the opposite side of the board 2). When the opening 21b and the opening 21c are formed in the resin protective layer 21, the resin layer 210 (that is, the second resin material attached to the surface of the light-transmitting substrate 5 opposite to the semiconductor substrate 2) is removed. Thereby, even if the light-transmitting substrate 5 is used as a supporting substrate, the resin layer 100 and the resin layer 210 can be removed from the supporting substrate, so that the supporting substrate can effectively function as the light-transmitting substrate 5.

In addition, it is preferable not to remove the resin layer 100 and the resin layer 210 collectively, and to remove each of the resin layer 100 and the resin layer 210 during development of each. After developing, the resin material is dried. After the drying, the resin material cannot be completely removed, so for example, the resin layer 100 is kept in a residual state, even if the resin layer 100 is to be removed together with the resin layer 210 in the final step , The resin layer 100 cannot be completely removed. Therefore, each of the resin layer 100 and the resin layer 210 is removed during the development of each. The reliable removal of the resin layer 100 and the resin layer 210 is effective when the supporting substrate is used as the light-transmitting substrate 5. In addition, when the supporting substrate is not used as the light-transmitting substrate 5 (when it is finally removed), if the resin layer 100 and the resin layer 210 are not reliably removed, there will be irregularities on the fixed surface during the wafer manufacturing process. It also becomes unstable, and stress acts on the semiconductor substrate 2. Therefore, the reliable removal of the resin layer 100 and the resin layer 210 is also effective in the case where the supporting substrate is not used as the light-transmitting substrate 5 (in the case of final removal).

In the manufacturing method of the semiconductor device 1, the resin protective layer 21 is formed on the surface 10 b of the resin insulating layer 10 by applying the dip coating method to cover the second wiring 8 and the third wiring 22. Thereby, a relatively shallow recess 21a having a smooth inner surface is formed in a portion corresponding to the through hole 7 in the resin protective layer 21. Therefore, when the semiconductor device 1 is mounted on the circuit board via the extraction electrode 9 and the extraction electrode 23, and the underfill resin is filled between the semiconductor device 1 and the circuit substrate, the underfill resin easily flows into the recess 21a. And it is difficult for air bubbles or the like to remain inside the recess 21a.

In the method of manufacturing the semiconductor device 1 described above, a positive resin material is used, and the resin insulating layer 10 is provided on the inner surface 7 c of the through hole 7 and the second surface 2 b of the semiconductor substrate 2. Of course After that, the part corresponding to the contact hole 16 in the resin insulating layer 10 is exposed and developed, thereby forming the contact hole 16 in the resin insulating layer 10. Thereby, the resin insulating layer 10 having the above-mentioned shape can be easily and reliably obtained. In addition, during exposure and development, by forming the recess 17 in the resin insulating layer 10, the thickness of the portion corresponding to the contact hole 16 in the resin insulating layer 10 becomes thinner (that is, because the portion corresponding to the contact hole 16 is In the resin insulating layer 10, the thickness of the semiconductor substrate 2 and the average thickness of the resin insulating layer 10 provided on the second surface 2b is a part of the height H below 1/2 of the sum D), so it can be easily and reliably obtained Contact hole 16 of desired shape.

Above, one embodiment of the present invention has been described, but the present invention is not limited to the above-mentioned embodiment. For example, in the above-mentioned embodiment, the first opening 7a of the through hole 7 is covered by the pad portion 3a of the first wiring 3. However, as long as a part of the first wiring 3 is located on the first opening 7a, the first wiring 3 It may cover the entire area of the first opening 7a.

Furthermore, in the above embodiment, the average inclination angle of the first region 11 is closer to the average inclination angle of the inner surface 7c of the through hole 7 than the average inclination angle of the second region 12, but it may be the average inclination angle of the second region 12 The angle is closer to the average inclination angle of the inner surface 7c of the through hole 7 than the average inclination angle of the first region 11.

In the above-mentioned embodiment, the light-transmitting substrate 5 is used as the supporting substrate. However, when the semiconductor device 1 does not include the light-transmitting substrate 5, other substrates may be used as the supporting substrate. When using another substrate as a supporting substrate, the supporting substrate may be removed from the semiconductor substrate 2 after the extraction electrode 9 and the extraction electrode 23 are provided in the manufacturing step of the semiconductor device 1. In addition, when another substrate is used as a support substrate, the resin layer 100 and the resin layer 210 attached to the support substrate can be removed by performing a dip coating method, and can also be left. Furthermore, when another substrate is used as a supporting substrate, it is not necessary to use an optical adhesive as the adhesive layer 6.

Furthermore, in the above-mentioned embodiment, when viewed from a direction parallel to the center line CL of the through hole 7, the pad portion 8a of the second wiring 8 and the extraction electrode 9 are located at the second of the through hole 7. Near the outer side of the opening 7b, but the pad portion 8a of the second wiring 8 and the lead electrode 9 can also be sufficiently separated from the second opening 7b of the through hole 7, which is located on the surface 10b of the resin insulating layer 10 and the semiconductor substrate 2 The surface on the opposite side of the second surface 2b. However, when viewed from a direction parallel to the center line CL of the through hole 7, even if the pad portion 8a of the second electrode 8 and the extraction electrode 9 are located near the outer side of the second opening 7b of the through hole 7, as shown in the figure As shown in 10, the stress generated when the extraction electrode 9 expands due to heat or the like is dispersed in the directions of the arrows A1, A2, and A3. This is due to the bending of the side wall (inner surface) of the opening 21b of the resin protective layer 21 provided with the extraction electrode 9. In addition, the surface 10b of the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 and the surface 10b of the resin insulating layer 10 provided on the second surface 2b of the semiconductor substrate 2 are smoothly connected. Furthermore, the stress acting in the direction of arrow A3 acts along the second wiring 8 in the direction of arrow A4. Therefore, even if the pad portion 8a and the lead electrode 9 of the second wiring 8 are located near the outer side of the second opening 7b of the through hole 7, the disconnection of the second wiring 8 near the portion of the second opening 7b of the through hole 7 is prevented. If stress is applied only in the direction of arrow A3, the opening 21b of the resin protective layer 21 is pushed open, and the second wiring 8 may be disconnected.

In addition, as shown in FIG. 11, the extraction electrode 9 may be arranged inside the through hole 7 so as to protrude from the second surface 2 b of the semiconductor substrate 2. When the extraction electrode 9 is arranged inside the through hole 7, the inner surface 7c of the through hole 7 is a tapered surface that expands from the first surface 2a to the second surface 2b, so the molten solder and other metal materials ( The material used to form the extraction electrode 9 easily flows into the inside of the through hole 7, and it is difficult for air bubbles or the like to remain inside the through hole 7. In addition, even if some external force is applied to the extraction electrode 9 from the second opening 7b side of the through hole 7 to the first opening 7a side, the resin insulating layer 10 (especially the above-mentioned third bent portion 103) also functions as a buffer area . Therefore, the stress generated in the extraction electrode 9 can be reduced, and the electrical connection between the first wiring 3, the second wiring 8 and the extraction electrode 9 can be reliably maintained. In addition, when the extraction electrode 9 is arranged inside the through hole 7, it is not necessary to lead the second wiring 8 to the outside of the second opening 7b of the through hole 7, so it is from parallel to the center line CL of the through hole 7 When viewed from the direction, the outer edge of the second wiring 8 can also be located at the second opening 7b of the through hole 7 的内。 The inside. That is, the outer edge of the second wiring 8 may be located on the surface 10b of the resin insulating layer 10 on the opposite side to the inner surface 7c of the through hole 7.

Also, as shown in FIGS. 12 and 13, when viewed from a direction parallel to the center line CL of the through hole 7, the outer edge of the second wiring 8 is not only the part extending from the pad portion 8a, but also It can be located inside the second opening 7b of the through hole 7. That is, the outer edge of the second wiring 8 may be located on the surface 10b of the resin insulating layer 10 opposite to the inner surface 7c of the through hole 7 in addition to the portion extending from the pad portion 8a. In this case, only the portion of the second wiring 8 that extends over the pad portion 8a crosses the second opening 7b of the through hole 7. Therefore, the portion of the second opening 7b of the through hole 7 can be further reliably suppressed The leakage of current between the second wiring 8 and the semiconductor substrate 2 occurs. Particularly, when the shape of the second opening 7b of the through hole 7 is rectangular, the portion of the second wiring 8 extending from the pad portion 8a is formed by horizontally cutting off the sides other than the corners of the rectangle As a result, in the portion of the second opening 7b of the through hole 7, the leakage of current between the second wiring 8 and the semiconductor substrate 2 can be further reliably suppressed. In addition, in FIG. 13, the resin insulating layer 10 is shown by a broken line, and the second wiring 8 is shown by a two-dot chain line.

Furthermore, as shown in FIG. 14, the inner surface 7c of the through hole 7 (when the inner surface 7c of the through hole 7 is a curved surface such as a cylindrical surface, it is a tangent plane of the curved surface) may be the same as the first surface 2a. A surface orthogonal to the second surface 2b. In this case, the electrical connection of the semiconductor substrate 2 via the through hole 7 can also be confirmed. Here, the aspect ratio of the through hole 7 is 0.2-10. As an example, the depth of the through hole 7 is 40 μm, and the width of the second opening 7b is 30 μm. In this case, the aspect ratio becomes 1.3. In addition, the through-hole 7 having a cylindrical shape, a quadrangular pillar shape, or the like is formed by, for example, dry etching.

Regarding the through hole 7 shown in FIG. 14, the average inclination angle β of the second region 12 is also smaller than the average inclination angle α of the first region 11, and smaller than the average inclination angle γ of the inner surface 7c of the through hole 7 (in this case Is 90°). That is, the second region 12 is a region that has a gentler slope than the first region 11 and has a gentler slope than the inner surface 7c of the through hole 7. Again, zone 1 The average inclination angle α of the domain 11 is closer to the average inclination angle γ of the inner surface 7c of the through hole 7 than the average inclination angle β of the second area 12. Here, the average inclination angle γ of the inner surface 7 c of the through hole 7> the average inclination angle α of the first region 11> the average inclination angle β of the second region 12. Thereby, disconnection of the second wiring 8 can be prevented, and an opening 10a having a sufficient width in order to expose the pad portion 3a of the first wiring 3 can be obtained. In addition, the surface 10b of the resin insulating layer 10 becomes a continuous surface (there is no discontinuous part such as the intersection line (corner, bend, etc.) between the surface and the surface, and the regions 11, 12, 13, 14, 15 are smoothly connected surface). In addition, in the resin insulating layer 10, the surface S that passes through the edge of the opening 10a of the resin insulating layer 10 and the edge of the second opening 7b of the through hole 7 is defined as the boundary surface. The volume of the portion P1 on the inner surface 7c side and the portion P2 on the side opposite to the inner surface 7c of the through hole 7 with respect to the surface S is larger than the volume of the portion P2. In addition, in the resin insulating layer 10, for the plane including the center line CL of the through hole 7, if the area on one side of the center line CL is focused, the area of the triangle T1 is larger than the area of the triangle T2. In addition, in the direction parallel to the first surface 2a and the second surface 2b of the semiconductor substrate 2, the average thickness of the portion corresponding to the first region 11 in the resin insulating layer 10 is greater than that of the second region in the resin insulating layer 10 The average thickness of the part corresponding to 12 is large.

In addition, the first region 11 may also be an average thickness of the resin insulating layer 10 provided on the inner surface 7c of the through hole 7 having the thickness of the semiconductor substrate 2 and the resin insulating layer 10 provided on the second surface 2b of the semiconductor substrate 2 The surface 10b of the part of the height H below 2/3 of the sum D (refer to FIG. 14). In this case, in the surface 10b of the resin insulating layer 10, the first area 11 and the second area 12 are smoothly connected, and the second wiring at the boundary between the first area 11 and the second area 12 can be reliably prevented 8 of the disconnection. In addition, during exposure and development, by forming the recess 17 in the resin insulating layer 10, the thickness of the portion corresponding to the contact hole 16 in the resin insulating layer 10 becomes thinner (that is, the portion corresponding to the contact hole 16 is made of resin In the insulating layer 10, the thickness of the semiconductor substrate 2 and the average thickness of the resin insulating layer 10 provided on the second surface 2b is a part of the height H below 2/3 of the sum D), so it can be easily and reliably obtained Contact of shape 孔16.

In addition, in the manufacturing method of the semiconductor device 1 described above, a positive resin material is used, and a resin insulating layer 10 is provided on the inner surface 7c of the through hole 7 and the second surface 2b of the semiconductor substrate 2, and the resin insulating layer 10 The part corresponding to the contact hole 16 and the part corresponding to the opening 10c are exposed and developed, thereby forming the contact hole 16 and the opening 10c in the resin insulating layer 10, but the present invention is not limited thereto. For example, a negative resin material can also be used, and the resin insulating layer 10 is provided on the inner surface 7c of the through hole 7 and the second surface 2b of the semiconductor substrate 2. In this case, the part of the resin insulating layer 10 corresponding to the contact hole 16 and the part other than the part corresponding to the opening 10c may be exposed, and the part of the resin insulating layer 10 corresponding to the contact hole 16 and The portion corresponding to the opening 10c is developed, thereby forming the contact hole 16 and the opening 10c in the resin insulating layer 10. Due to the attenuation of light, the diffraction of light, etc., although the taper-shaped contact hole 16 expanding from the second surface 2b of the semiconductor substrate 2 to the first surface 2a can be formed only by developing, it is further subjected to heat treatment, etc. , A tapered contact hole 16 that expands from the first surface 2a of the semiconductor substrate 2 to the second surface 2b can be obtained.

In addition, in the above-mentioned embodiment, the p-type region 2c in which p-type impurities are selectively diffused is provided in a specific region on the first surface 2a side of the semiconductor substrate 2 containing n-type silicon, but each conductivity type It can also be the opposite. In this case, the extraction electrode 9 and the extraction electrode 23 function as a cathode electrode and an anode electrode, respectively. Furthermore, it is not limited to the area where the second conductivity type (the other of the p-type and the n-type) is formed in the semiconductor substrate 2 of the first conductivity type (one of the p-type and the n-type), and may be 1 Conductive type (one of p-type and n-type) semiconductor substrate 2 is formed with a second conductive type (the other of p-type and n-type) semiconductor layer, and the first conductive type may also be formed on the substrate Type (one of p-type and n-type) semiconductor layer, and a second conductive layer (the other of p-type and n-type) semiconductor layer is formed on the first conductive type semiconductor layer. That is, as long as it is a region with a second conductivity type formed in the first conductivity type region of the semiconductor substrate 2, and in the above-mentioned embodiment, the semiconductor device 1 is an optical device such as a silicon photodiode. The device 1 can also be other optical devices, and can also be an electronic device or the like.

In addition, in the method of manufacturing the semiconductor device 1 described above, the resin insulating layer 10 and the resin protective layer 21 are provided by performing the dip coating method, but the present invention is not limited to this. For example, other methods, such as a lamination method using a resin sheet, a spin coating method using a resin paint, etc., may be implemented to provide the resin insulating layer 10 and/or the resin protective layer 21.

[Industrial availability]

According to the present invention, it is possible to provide a method for manufacturing a semiconductor device that can prevent damage to the peripheral portion of the through hole while reducing the thickness of the semiconductor substrate, and can ensure electrical insulation between the wiring in the through hole and the semiconductor substrate.

2‧‧‧Semiconductor substrate

2a‧‧‧The first surface

2b‧‧‧Second surface

2c‧‧‧p-type area

3‧‧‧First wiring

3a‧‧‧Pad part

4‧‧‧Oxide film

4a‧‧‧Opening

4b‧‧‧Opening

5‧‧‧Light transmission substrate (support substrate)

6‧‧‧Next layer

7‧‧‧Through hole

7a‧‧‧The first opening

7b‧‧‧Second opening

7c‧‧‧Inner surface

8‧‧‧Second wiring

8a‧‧‧Pad part

10‧‧‧Resin insulation layer

10a‧‧‧Open

10b‧‧‧surface

10c‧‧‧Open

11‧‧‧Region 1

14‧‧‧Region 4

16‧‧‧Contact hole

17‧‧‧Concave

22‧‧‧3rd wiring

22a‧‧‧Pad part

Claims (37)

A method for manufacturing a semiconductor device, comprising: a first step of disposing a first wiring on the first surface of a semiconductor substrate having a first surface and a second surface facing each other; After the step, mount the support substrate on the first surface; in the third step, after the second step, by removing the portion on the second surface side of the semiconductor substrate, the thickness of the semiconductor substrate is smaller than that of the support substrate In the fourth step, after the third step, a through hole is formed in the semiconductor substrate from the first surface to the second surface, and is formed in the through hole. The first opening on the first surface side exposes a part of the first wiring; the fifth step, after the fourth step, is applied to the inner surface of the through hole by applying a dip coating method with the first resin material And the second surface is provided with a resin insulating layer continuous through the second opening on the second surface side of the through hole; in the sixth step, after the fifth step, a contact hole is formed in the resin insulating layer, and A part of the first wiring is exposed in the opening on the first surface side of the contact hole; and a seventh step, after the sixth step, a second wiring is provided on the surface of the resin insulating layer, and the contact hole The opening on the side of the first surface electrically connects the first wiring and the second wiring. The method of manufacturing a semiconductor device according to claim 1, wherein in the fifth step, the semiconductor substrate on which the support substrate is mounted is mounted such that the liquid level of the deposited first resin material crosses the first surface Impregnated in the deposited first resin material, and with the deposited first resin material In such a way that the liquid surface intersects the first surface, the self-stored first resin material pulls up the semiconductor substrate on which the support substrate is mounted. The method for manufacturing a semiconductor device according to claim 1, wherein in the fifth step, the dip coating method is performed using the first resin material having a viscosity of 10 cp or more. The method for manufacturing a semiconductor device according to claim 2, wherein in the fifth step, the dip coating method is performed using the first resin material having a viscosity of 10 cp or more. The method for manufacturing a semiconductor device according to any one of claims 1 to 4, wherein in the sixth step, the first step attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the fifth step is removed 1 Resin material. The method for manufacturing a semiconductor device according to any one of claims 1 to 4, which further comprises: an eighth step, which uses a second resin material to apply a dip coating method after the seventh step to cover the above In the second wiring method, a resin protective layer is provided on the surface of the resin insulating layer; and in the ninth step, after the eighth step, an opening is formed in the resin protective layer and a part of the second wiring is exposed to the Open up. The method for manufacturing a semiconductor device according to claim 5, which further includes: an eighth step of applying a dip coating method using a second resin material after the seventh step, thereby covering the second wiring, A resin protective layer is provided on the surface of the resin insulating layer; and a ninth step, after the eighth step, an opening is formed in the resin protective layer, and a part of the second wiring is exposed in the opening. The method of manufacturing a semiconductor device according to claim 6, wherein in the eighth step, the liquid level of the deposited second resin material and the The first surface intersects the semiconductor substrate on which the support substrate is mounted is immersed in the deposited second resin material, and the liquid level of the deposited second resin material crosses the first surface , The self-contained second resin material pulls up the semiconductor substrate on which the support substrate is mounted. The method for manufacturing a semiconductor device according to claim 7, wherein in the eighth step, the semiconductor substrate on which the support substrate is mounted is mounted such that the liquid surface of the second resin material deposited crosses the first surface Impregnated in the stored second resin material, and such that the liquid level of the stored second resin material intersects the first surface, the self-stored second resin material will be mounted with the support substrate The above-mentioned semiconductor substrate is pulled up. The method for manufacturing a semiconductor device according to claim 6, wherein in the eighth step, the dip coating method is performed using the second resin material having a viscosity of 10 cp or more. The method for manufacturing a semiconductor device according to claim 7, wherein in the eighth step, the dip coating method is performed using the second resin material having a viscosity of 10 cp or more. The method for manufacturing a semiconductor device according to claim 8, wherein in the eighth step, the dip coating method is performed using the second resin material having a viscosity of 10 cp or more. The method for manufacturing a semiconductor device according to claim 9, wherein in the eighth step, the dip coating method is performed using the second resin material having a viscosity of 10 cp or more. The method for manufacturing a semiconductor device according to claim 6, wherein in the ninth step, the second resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the eighth step is removed. Such as the method of manufacturing a semiconductor device of claim 7, wherein In the ninth step, the second resin material adhering to the surface of the support substrate on the side opposite to the semiconductor substrate in the eighth step is removed. The method for manufacturing a semiconductor device according to claim 8, wherein in the ninth step, the second resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the eighth step is removed. The method for manufacturing a semiconductor device according to claim 9, wherein in the ninth step, the second resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the eighth step is removed. The method for manufacturing a semiconductor device according to claim 10, wherein in the ninth step, the second resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the eighth step is removed. The method for manufacturing a semiconductor device according to claim 11, wherein in the ninth step, the second resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the eighth step is removed. The method for manufacturing a semiconductor device according to claim 12, wherein in the ninth step, the second resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the eighth step is removed. The method of manufacturing a semiconductor device according to claim 13, wherein in the ninth step, the second resin material attached to the surface of the support substrate on the opposite side of the semiconductor substrate in the eighth step is removed. The method for manufacturing a semiconductor device according to claim 6, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 7, wherein the first resin material is the same as the second resin material. The method of manufacturing a semiconductor device according to claim 8, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 9, wherein the first resin material is the same as the second resin material. The method of manufacturing a semiconductor device according to claim 10, wherein the first resin material is the same as the second resin material. The method of manufacturing a semiconductor device according to claim 11, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 12, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 13, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 14, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 15, wherein the first resin material is the same as the second resin material. The method of manufacturing a semiconductor device according to claim 16, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 17, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 18, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 19, wherein the first resin material is the same as the second resin material. The method for manufacturing a semiconductor device according to claim 20, wherein the first resin material is the same as the second resin material. The method of manufacturing a semiconductor device according to claim 21, wherein the first resin material is the same as the second resin material.

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