TWI713372B - Microphone, mems device and method for manufacturing the same - Google Patents

Microphone, mems device and method for manufacturing the same Download PDF

Info

Publication number
TWI713372B
TWI713372B TW108139396A TW108139396A TWI713372B TW I713372 B TWI713372 B TW I713372B TW 108139396 A TW108139396 A TW 108139396A TW 108139396 A TW108139396 A TW 108139396A TW I713372 B TWI713372 B TW I713372B
Authority
TW
Taiwan
Prior art keywords
support structure
layer
carrier substrate
filter
particle filter
Prior art date
Application number
TW108139396A
Other languages
Chinese (zh)
Other versions
TW202110206A (en
Inventor
鄭鈞文
朱家驊
郭文政
Original Assignee
台灣積體電路製造股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 台灣積體電路製造股份有限公司 filed Critical 台灣積體電路製造股份有限公司
Application granted granted Critical
Publication of TWI713372B publication Critical patent/TWI713372B/en
Publication of TW202110206A publication Critical patent/TW202110206A/en

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0009—Structural features, others than packages, for protecting a device against environmental influences
    • B81B7/0029—Protection against environmental influences not provided for in groups B81B7/0012 - B81B7/0025
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B3/00—Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
    • B81B3/0018—Structures acting upon the moving or flexible element for transforming energy into mechanical movement or vice versa, i.e. actuators, sensors, generators
    • B81B3/0021—Transducers for transforming electrical into mechanical energy or vice versa
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
    • B81C1/00158—Diaphragms, membranes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
    • B81C1/0023—Packaging together an electronic processing unit die and a micromechanical structure die
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261—Processes for packaging MEMS devices
    • B81C1/00325—Processes for packaging MEMS devices for reducing stress inside of the package structure
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00349—Creating layers of material on a substrate
    • B81C1/00357—Creating layers of material on a substrate involving bonding one or several substrates on a non-temporary support, e.g. another substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00444—Surface micromachining, i.e. structuring layers on the substrate
    • B81C1/00468—Releasing structures
    • B81C1/00476—Releasing structures removing a sacrificial layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00523—Etching material
    • B81C1/00539—Wet etching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00777—Preserve existing structures from alteration, e.g. temporary protection during manufacturing
    • B81C1/00825—Protect against mechanical threats, e.g. against shocks, or residues
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C3/00—Assembling of devices or systems from individually processed components
    • B81C3/001—Bonding of two components
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R19/00—Electrostatic transducers
    • H04R19/04—Microphones
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0257—Microphones or microspeakers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2203/00—Basic microelectromechanical structures
    • B81B2203/01—Suspended structures, i.e. structures allowing a movement
    • B81B2203/0127—Diaphragms, i.e. structures separating two media that can control the passage from one medium to another; Membranes, i.e. diaphragms with filtering function
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/01—Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS
    • B81B2207/012—Microstructural systems or auxiliary parts thereof comprising a micromechanical device connected to control or processing electronics, i.e. Smart-MEMS the micromechanical device and the control or processing electronics being separate parts in the same package
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/11—Structural features, others than packages, for protecting a device against environmental influences
    • B81B2207/115—Protective layers applied directly to the device before packaging
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0006—Interconnects
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0061—Packages or encapsulation suitable for fluid transfer from the MEMS out of the package or vice versa, e.g. transfer of liquid, gas, sound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
    • H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
    • H01L2224/0345—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
    • H01L2224/0346—Plating
    • H01L2224/03462—Electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
    • H01L2224/0346—Plating
    • H01L2224/03464—Electroless plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05655—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/48195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4905—Shape
    • H01L2224/4909—Loop shape arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/80003—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding involving a temporary auxiliary member not forming part of the bonding apparatus
    • H01L2224/80006—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
    • H01L2224/808—Bonding techniques
    • H01L2224/80894—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
    • H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R2201/00—Details of transducers, loudspeakers or microphones covered by H04R1/00 but not provided for in any of its subgroups
    • H04R2201/003—Mems transducers or their use
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R31/00—Apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor
    • H04R31/006—Interconnection of transducer parts

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • General Health & Medical Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Micromachines (AREA)

Abstract

Various embodiments of the present disclosure are directed towards a microphone including a support structure layer disposed between a particle filter and a microelectromechanical systems (MEMS) structure. A carrier substrate is disposed below the particle filter and has opposing sidewalls that define a carrier substrate opening. The MEMS structure overlies the carrier substrate and includes a diaphragm having opposing sidewalls that define a diaphragm opening overlying the carrier substrate opening. The particle filter is disposed between the carrier substrate and the MEMS structure. A plurality of filter openings extend through the particle filter. The support structure layer includes a support structure having one or more segments spaced laterally between the opposing sidewalls of the carrier substrate. The one or more segments of the support structure are spaced laterally between the plurality of filter openings.

Description

麥克風、微機電系統裝置及其製造方法 Microphone, microelectromechanical system device and manufacturing method thereof

本發明實施例是關於麥克風、微機電系統裝置及其製造方法。 The embodiment of the present invention relates to a microphone, a MEMS device and a manufacturing method thereof.

微機電系統(Microelectromechanical system，MEMS)裝置(例如，加速度計、壓力感測器及麥克風)已廣泛地用於許多現代電子裝置中。舉例來說，MEMS加速度計及麥克風通常存在於汽車(例如，氣囊部署系統)、平板電腦或智慧型電話中。MEMS裝置可具有用於檢測運動並將運動轉換成電信號的可移動(movable)部件。舉例來說，MEMS加速度計包括將加速移動轉化成電信號的可移動部件。麥克風包括將聲音轉化成電信號的可移動隔膜(membrane)。 Microelectromechanical system (MEMS) devices (for example, accelerometers, pressure sensors, and microphones) have been widely used in many modern electronic devices. For example, MEMS accelerometers and microphones are usually found in automobiles (for example, airbag deployment systems), tablets, or smart phones. The MEMS device may have movable parts for detecting movement and converting the movement into electrical signals. For example, MEMS accelerometers include movable parts that convert accelerated movement into electrical signals. The microphone includes a movable membrane (membrane) that converts sound into electrical signals.

在一些實施例中，本申請提供一種麥克風，所述麥克風包括：載體基底，具有界定載體基底開口的相對的側壁；微機電系統(MEMS)結構，上覆在所述載體基底上，其中所述微機電系統結構包括上覆在所述載體基底開口上的膜片，所述膜片具有界定膜片開口的相對的側壁；顆粒過濾器，設置在所述載體基底與 所述微機電系統結構之間，其中多個過濾器開口延伸穿過所述顆粒過濾器；以及支撐結構層，設置在所述顆粒過濾器與所述微機電系統結構之間，其中所述支撐結構層包括支撐結構，所述支撐結構具有在所述載體基底的所述相對的側壁之間在橫向上間隔開的一個或多個段，其中所述支撐結構的所述一個或多個段在所述多個過濾器開口之間在橫向上間隔開。 In some embodiments, the present application provides a microphone including: a carrier substrate having opposite side walls defining an opening of the carrier substrate; a microelectromechanical system (MEMS) structure overlying the carrier substrate, wherein the The MEMS structure includes a membrane covering the opening of the carrier substrate, the membrane having opposite side walls that define the opening of the membrane; a particle filter is arranged on the carrier substrate and Between the microelectromechanical system structure, wherein a plurality of filter openings extend through the particle filter; and a support structure layer disposed between the particle filter and the microelectromechanical system structure, wherein the support The structural layer includes a support structure having one or more segments spaced laterally between the opposed side walls of the carrier substrate, wherein the one or more segments of the support structure The plurality of filter openings are spaced apart in the lateral direction.

在一些實施例中，本申請提供一種微機電系統(MEMS)裝置，所述微機電系統裝置包括：微機電系統結構，沿支撐結構層的上表面設置，其中所述微機電系統結構包括第一背板及在垂直方向上與所述第一背板隔開的膜片；載體基底，位於所述支撐結構層之下，其中所述載體基底具有界定載體基底開口的相對的側壁，其中所述載體基底開口位於所述膜片之下；過濾器堆疊，設置在所述載體基底與所述支撐結構層之間，其中所述過濾器堆疊包括顆粒過濾器層，所述顆粒過濾器層具有顆粒過濾器，其中所述顆粒過濾器包括多個過濾器開口，所述多個過濾器開口延伸穿過所述顆粒過濾器層且在橫向上位於所述載體基底的所述相對的側壁之間；以及支撐結構，設置在所述過濾器堆疊與所述微機電系統結構之間，其中所述支撐結構是所述支撐結構層的在橫向上位於延伸穿過所述支撐結構層的支撐結構開口之間的段。 In some embodiments, the present application provides a micro-electro-mechanical system (MEMS) device. The micro-electro-mechanical system device includes a micro-electro-mechanical system structure arranged along an upper surface of a supporting structure layer, wherein the micro-electro-mechanical system structure includes a first A backing plate and a membrane separated from the first backing plate in a vertical direction; a carrier substrate located under the supporting structure layer, wherein the carrier substrate has opposite side walls defining openings of the carrier substrate, wherein the The carrier substrate opening is located under the membrane; the filter stack is arranged between the carrier substrate and the support structure layer, wherein the filter stack includes a particle filter layer, the particle filter layer having particles A filter, wherein the particulate filter includes a plurality of filter openings extending through the particulate filter layer and located between the opposing side walls of the carrier substrate in the lateral direction; And a support structure, which is disposed between the filter stack and the micro-electromechanical system structure, wherein the support structure is located in the support structure layer in the lateral direction of the support structure opening extending through the support structure layer Between the segments.

在一些實施例中，本申請提供一種製造微機電系統(MEMS)裝置的方法，所述方法包括：在犧牲基底之上形成微機電系統結構，所述微機電系統結構包括可移動膜片；在載體基底之上形成過濾器堆疊，其中所述過濾器堆疊包括一個或多個介電層及設置在所述一個或多個介電層中的顆粒過濾器層，所述顆粒 過濾器層具有顆粒過濾器；在所述過濾器堆疊之上形成支撐結構層；將所述支撐結構層圖案化，以在所述支撐結構層中界定支撐結構，其中所述支撐結構具有一個或多個段；將所述支撐結構層結合到所述微機電系統結構；以及將所述載體基底圖案化以界定載體基底開口，其中所述支撐結構的所述一個或多個段在所述載體基底的界定所述載體基底開口的相對的側壁之間在橫向上間隔開。 In some embodiments, the present application provides a method of manufacturing a microelectromechanical system (MEMS) device, the method comprising: forming a microelectromechanical system structure on a sacrificial substrate, the microelectromechanical system structure including a movable diaphragm; A filter stack is formed on the carrier substrate, wherein the filter stack includes one or more dielectric layers and a particle filter layer disposed in the one or more dielectric layers, and the particles The filter layer has a particle filter; a support structure layer is formed on the filter stack; the support structure layer is patterned to define a support structure in the support structure layer, wherein the support structure has one or Multiple segments; bonding the support structure layer to the MEMS structure; and patterning the carrier substrate to define a carrier substrate opening, wherein the one or more segments of the support structure are in the carrier The opposite side walls of the substrate defining the opening of the carrier substrate are spaced apart in the lateral direction.

100、300a、300b:微機電系統(MEMS)麥克風 100, 300a, 300b: Microelectromechanical system (MEMS) microphone

101:載體基底開口 101: Carrier base opening

102:MEMS結構 102: MEMS structure

103:載體基底 103: carrier substrate

104:過濾器堆疊 104: filter stack

104a:第一介電層 104a: first dielectric layer

104b:顆粒過濾器層 104b: Particle filter layer

104c:第二介電層 104c: second dielectric layer

104d:第三介電層 104d: third dielectric layer

105:支撐結構 105: support structure

105a:第一細長段 105a: The first slender section

105b:第二細長段 105b: second slender section

105os:支撐結構開口 105os: Support structure opening

106:顆粒過濾器 106: Particulate filter

107:過濾器開口 107: filter opening

108:第一背板 108: first backplane

109:膜片開口 109: diaphragm opening

110:膜片 110: diaphragm

111:支撐結構層 111: supporting structure layer

111ia、111ib:第一相對的內側壁 111ia, 111ib: the first opposite inner side wall

111ic、111id:第二相對的內側壁 111ic, 111id: the second opposite inner wall

112:第二背板 112: second backplane

113:空氣體積空間 113: Air volume space

114、116、118:電接觸件 114, 116, 118: electrical contacts

120、413:層間介電(ILD)結構 120, 413: Interlayer dielectric (ILD) structure

122:導通孔 122: Via

124:導電線 124: Conductive thread

140:水平線 140: horizontal line

200a、200b、200c、200d:俯視圖 200a, 200b, 200c, 200d: top view

302:下部顆粒過濾器層 302: Lower particle filter layer

304:中間顆粒過濾器層 304: Intermediate particle filter layer

306:上部顆粒過濾器層 306: Upper particle filter layer

400:積體晶片 400: Integrated chip

401:封裝 401: Package

401a:前側結構 401a: Front structure

401b:外殼結構 401b: shell structure

402:互補金屬氧化物半導體(CMOS)積體電路(IC)晶粒 402: Complementary Metal Oxide Semiconductor (CMOS) Integrated Circuit (IC) Die

403:空腔 403: cavity

404:焊料球 404: Solder Ball

406:結合配線 406: combined wiring

408:電晶體 408: Transistor

410:CMOS基底 410: CMOS substrate

412:後段(BEOL)金屬化堆疊 412: Back-end (BEOL) metallization stack

414:內連通孔 414: Internal connection hole

416:內連線 416: internal connection

418:結合墊 418: Binding Pad

500、600、700、800、900、1000、1100、1200、1300:剖視圖 500, 600, 700, 800, 900, 1000, 1100, 1200, 1300: sectional view

502:犧牲載體基底 502: Sacrificial Carrier Substrate

1102:上部罩幕層 1102: Upper mask layer

1104:下部罩幕層 1104: Lower mask layer

1400:方法 1400: method

1402、1404、1406、1408、1410、1412、1414、1416、1418:動作 1402, 1404, 1406, 1408, 1410, 1412, 1414, 1416, 1418: Action

A-A’、B-B’:切割線 A-A’, B-B’: cutting line

d:直徑 d: diameter

T1、T2:初始厚度 T1, T2: initial thickness

Tcs、Tms:厚度 Tcs, Tms: thickness

結合附圖閱讀以下詳細說明，會最好地理解本公開的各個方面。應注意，根據本行業中的標準慣例，各種特徵並非按比例繪製。事實上，為使論述清晰起見，可任意增大或減小各種特徵的尺寸。 Read the following detailed description in conjunction with the accompanying drawings to best understand all aspects of the present disclosure. It should be noted that the various features are not drawn to scale according to standard practice in this industry. In fact, for clarity of discussion, the size of various features can be increased or decreased arbitrarily.

圖1示出具有顆粒過濾器及支撐結構的微機電系統(MEMS)麥克風的一些實施例的剖視圖。 Figure 1 shows a cross-sectional view of some embodiments of a microelectromechanical system (MEMS) microphone with a particulate filter and a support structure.

圖2A到圖2D示出圖1的MEMS麥克風的一些替代實施例的俯視圖。 2A to 2D show top views of some alternative embodiments of the MEMS microphone of FIG. 1.

圖3A到3B示出具有顆粒過濾器及支撐結構的MEMS麥克風的一些實施例的剖視圖。 3A to 3B show cross-sectional views of some embodiments of MEMS microphones with particle filters and support structures.

圖4示出積體晶片的一些實施例的剖視圖，積體晶片的所述一些實施例包括打線結合到互補金屬氧化物半導體(complementary metal-oxide-semiconductor，CMOS)積體電路(integrated circuit，IC)晶粒的圖1的MEMS麥克風的一些實施 例。 Figure 4 shows a cross-sectional view of some embodiments of an integrated wafer that includes wire bonding to a complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) ) Some implementations of the MEMS microphone of Figure 1 of the die example.

圖5到圖13示出形成具有顆粒過濾器及支撐結構的MEMS麥克風的方法的一些實施例的剖視圖。 5 to 13 show cross-sectional views of some embodiments of a method of forming a MEMS microphone having a particle filter and a supporting structure.

圖14以流程圖的形式示出一種方法，所述流程圖示出形成具有顆粒過濾器及支撐結構的MEMS麥克風的方法的一些實施例。 Fig. 14 shows a method in the form of a flowchart showing some embodiments of a method of forming a MEMS microphone with a particle filter and a supporting structure.

本公開提供用於實施本公開的不同特徵的許多不同的實施例或實例。以下闡述元件及排列的具體實例以簡化本公開。當然，這些僅為實例而非旨在進行限制。舉例來說，以下說明中將第一特徵形成在第二特徵之上或第二特徵上可包括其中第一特徵與第二特徵被形成為直接接觸的實施例，且也可包括其中第一特徵與第二特徵之間可形成有附加特徵從而使得所述第一特徵與所述第二特徵可不直接接觸的實施例。另外，本公開可能在各種實例中重複使用參考編號和/或字母。這種重複使用是出於簡潔及清晰的目的，而不是自身指示所論述的各種實施例和/或配置之間的關係。 The present disclosure provides many different embodiments or examples for implementing different features of the present disclosure. Specific examples of elements and arrangements are described below to simplify the present disclosure. Of course, these are only examples and not intended to be limiting. For example, forming the first feature on or on the second feature in the following description may include an embodiment in which the first feature and the second feature are formed in direct contact, and may also include the first feature An embodiment in which an additional feature may be formed between the second feature and the first feature may not directly contact the second feature. In addition, the present disclosure may reuse reference numbers and/or letters in various examples. This repeated use is for the purpose of brevity and clarity, rather than indicating the relationship between the various embodiments and/or configurations discussed.

此外，為易於說明，本文中可能使用例如「在...之下」、「在...下方」、「下部的」、「在...上方」、「上部的」等空間相對性用語來闡述圖中所示的一個元件或特徵與另一(其他)元件或特徵的關係。所述空間相對性用語旨在除圖中所繪示的取向外還囊括裝置在使用或操作中的不同取向。設備可具有其他取向(旋轉90度或處於其他取向)，且本文中所使用的空間相對性描述語可同樣相應地進行解釋。 In addition, for ease of explanation, spatially relative terms such as "below", "below", "lower", "above", and "upper" may be used in this article To illustrate the relationship between one element or feature shown in the figure and another (other) element or feature. The terms of spatial relativity are intended to encompass different orientations of the device in use or operation in addition to the orientations shown in the figures. The device can have other orientations (rotated by 90 degrees or in other orientations), and the spatial relativity descriptors used herein can also be interpreted accordingly.

此外，為易於說明起見，本文中可使用「第一」、「第二」、「第三」等以在一個圖或一系列圖的不同元件之間進行區分。「第一」、「第二」、「第三」等並不旨在闡述對應的元件。因此，結合第一圖所述的「第一介電層」可能未必對應於結合另一圖所述的「第一介電層」。 In addition, for ease of description, "first", "second", "third", etc. may be used herein to distinguish between different elements of a drawing or a series of drawings. "First", "Second", "Third", etc. are not intended to describe corresponding components. Therefore, the "first dielectric layer" described in connection with the first figure may not necessarily correspond to the "first dielectric layer" described in connection with another figure.

用於聲學應用(acoustical application)的微機電系統(MEMS)裝置(例如，MEMS麥克風)常常被收容在具有開口(即，入口)的封裝結構內。封裝結構被配置成提供對MEMS裝置的保護，同時開口使得聲波到達封裝結構的容納MEMS裝置的空腔。在此種封裝結構內，MEMS裝置可電耦合到設置在空腔內的應用專用積體電路(application-specific integrated circuit，ASIC)。MEMS裝置具有直接上覆在封裝結構的開口上的可移動部件以及設置在可移動部件與封裝結構的開口之間的顆粒過濾器。顆粒過濾器被配置成防止顆粒進入封裝結構的開口，從而減少到達可移動部件的顆粒。與可移動部件相互作用的顆粒可例如通過引起短路和/或降低MEMS裝置的聲學超載點(acoustic overload point，AOP)來降低MEMS裝置的性能。 Microelectromechanical systems (MEMS) devices (for example, MEMS microphones) used for acoustical applications are often housed in a package structure having an opening (ie, entrance). The packaging structure is configured to provide protection for the MEMS device, while the opening allows sound waves to reach the cavity of the packaging structure containing the MEMS device. In this packaging structure, the MEMS device can be electrically coupled to an application-specific integrated circuit (ASIC) disposed in the cavity. The MEMS device has a movable part directly overlying the opening of the packaging structure and a particle filter disposed between the movable part and the opening of the packaging structure. The particle filter is configured to prevent particles from entering the opening of the encapsulation structure, thereby reducing particles reaching the movable part. Particles that interact with movable parts can reduce the performance of the MEMS device, for example, by causing a short circuit and/or reducing the acoustic overload point (AOP) of the MEMS device.

一種製作MEMS裝置的顆粒過濾器的方法是獨立於製作MEMS裝置及ASIC而形成顆粒過濾器。舉例來說，MEMS裝置可用可移動元件來製作，且ASIC可用半導體裝置(例如，電晶體)來製作。可提供封裝基底來積體MEMS裝置與ASIC。可在封裝基底中形成封裝結構開口，且隨後，可在封裝結構開口之上形成顆粒過濾器。在形成顆粒過濾器之後，MEMS裝置直接附接到顆粒過濾器。因此，MEMS裝置的可移動元件直接上覆在封裝結構開 口上。 One method of making a particle filter for a MEMS device is to form a particle filter independently of making a MEMS device and an ASIC. For example, MEMS devices can be fabricated with movable elements, and ASICs can be fabricated with semiconductor devices (eg, transistors). A package substrate can be provided to integrate MEMS devices and ASICs. An encapsulation structure opening can be formed in the encapsulation substrate, and then, a particle filter can be formed over the encapsulation structure opening. After the particle filter is formed, the MEMS device is directly attached to the particle filter. Therefore, the movable element of the MEMS device is directly overlaid on the package structure. Mouth.

前述方法的問題是用於形成顆粒過濾器並將顆粒過濾器直接附接到MEMS裝置的額外的處理步驟會增加與將MEMS裝置及ASIC積體在封裝結構上相關聯的時間及成本。此外，在進行直接附接製程期間，顆粒過濾器的小的厚度(例如，小於0.5微米)可能導致對顆粒過濾器的損壞和/或破壞，從而降低顆粒過濾器保護可移動元件免受顆粒傷害的能力。 The problem with the foregoing method is that the additional processing steps for forming the particulate filter and attaching the particulate filter directly to the MEMS device increase the time and cost associated with integrating the MEMS device and ASIC on the package structure. In addition, during the direct attachment process, the small thickness of the particle filter (for example, less than 0.5 microns) may cause damage and/or damage to the particle filter, thereby reducing the particle filter to protect the movable element from particle damage Ability.

作為另外一種選擇，可將顆粒過濾器及MEMS裝置形成為可附接到封裝結構的積體結構。儘管這種方法可減少用於將顆粒過濾器附接到MEMS裝置的額外的處理步驟，但是顆粒過濾器的小的厚度(例如，小於0.5微米)仍然可能造成對顆粒過濾器的損壞和/或破壞。 Alternatively, the particle filter and the MEMS device can be formed as an integrated structure that can be attached to the packaging structure. Although this method can reduce the additional processing steps for attaching the particulate filter to the MEMS device, the small thickness of the particulate filter (for example, less than 0.5 microns) may still cause damage to the particulate filter and/or damage.

在一些實施例中，本公開關於一種簡化具有顆粒過濾器的MEMS裝置的製作的方法。所述方法在將顆粒過濾器及MEMS裝置附接到封裝結構之前，將顆粒過濾器及MEMS裝置形成為積體結構。此外，所述方法採用支撐結構，支撐結構設置在顆粒過濾器與MEMS裝置的可移動元件之間。支撐結構在製作具有顆粒過濾器的MEMS裝置期間和/或之後會增加顆粒過濾器的結構完整性，從而減少對顆粒過濾器的損壞。舉例來說，在將MEMS裝置結合到支撐結構層的同時，顆粒過濾器容易受到損壞。然而，支撐結構會消除或減輕對顆粒過濾器的損壞。這會提高顆粒過濾器阻擋和/或減輕顆粒與可移動元件相互作用的能力，從而提高MEMS裝置的性能、可靠性及耐久性。 In some embodiments, the present disclosure relates to a method of simplifying the fabrication of a MEMS device with a particulate filter. The method forms the particle filter and the MEMS device into an integrated structure before attaching the particle filter and the MEMS device to the packaging structure. In addition, the method adopts a supporting structure, which is arranged between the particle filter and the movable element of the MEMS device. The support structure increases the structural integrity of the particulate filter during and/or after the manufacture of the MEMS device with the particulate filter, thereby reducing damage to the particulate filter. For example, while bonding the MEMS device to the support structure layer, the particle filter is vulnerable to damage. However, the support structure will eliminate or reduce damage to the particulate filter. This will increase the particle filter's ability to block and/or reduce the interaction of particles with movable elements, thereby improving the performance, reliability and durability of the MEMS device.

圖1示出具有顆粒過濾器106及支撐結構105的微機電 系統(MEMS)麥克風100的一些實施例的剖視圖。 Figure 1 shows a microelectromechanical system with a particulate filter 106 and a support structure 105 A cross-sectional view of some embodiments of system (MEMS) microphone 100.

MEMS麥克風100包括MEMS結構102、支撐結構層111、過濾器堆疊104及載體基底103。過濾器堆疊104設置在載體基底103與支撐結構層111之間。MEMS結構102包括設置在上覆在支撐結構層111上的層間介電(inter-level dielectric，ILD)結構120內的導電線124及導通孔122。MEMS結構102更包括第一背板108、第二背板112及設置在第一背板108與第二背板112之間的膜片110。膜片110與第一背板108及第二背板112間隔開一個或多個非零距離。此外，膜片110以及第一背板108及第二背板112可為導電的，這會形成電容元件。在一些實施例中，電接觸件118電耦合到膜片110且形成電容元件的第一端子，電接觸件114電耦合到第一背板108且形成電容元件的第二端子，且電接觸件116電耦合到第二背板112且形成電容元件的第三端子。在一些實施例中，第二端子與第三端子電耦合在一起。在一些實施例中，通過導電線124及導通孔122實現電耦合。 The MEMS microphone 100 includes a MEMS structure 102, a supporting structure layer 111, a filter stack 104 and a carrier substrate 103. The filter stack 104 is disposed between the carrier substrate 103 and the support structure layer 111. The MEMS structure 102 includes conductive lines 124 and vias 122 disposed in an inter-level dielectric (ILD) structure 120 overlying the support structure layer 111. The MEMS structure 102 further includes a first back plate 108, a second back plate 112, and a diaphragm 110 disposed between the first back plate 108 and the second back plate 112. The diaphragm 110 is spaced apart from the first back plate 108 and the second back plate 112 by one or more non-zero distances. In addition, the diaphragm 110 and the first back plate 108 and the second back plate 112 may be conductive, which forms a capacitive element. In some embodiments, the electrical contact 118 is electrically coupled to the diaphragm 110 and forms the first terminal of the capacitive element, the electrical contact 114 is electrically coupled to the first backplate 108 and forms the second terminal of the capacitive element, and the electrical contact 116 is electrically coupled to the second back plate 112 and forms the third terminal of the capacitive element. In some embodiments, the second terminal and the third terminal are electrically coupled together. In some embodiments, the electrical coupling is achieved through the conductive wire 124 and the via 122.

膜片110包括一個或多個膜片開口109且可被ILD結構120錨定(anchor)在多個點處。將膜片110錨定在所述多個點處使得膜片110的邊界相對於第一背板108及第二背板112固定。當聲波通過載體基底103中的載體基底開口101對膜片110施加壓力時，膜片110可通過聲波的能量變形成使得膜片110朝向或遠離第一背板108和/或第二背板112彎曲。載體基底103具有界定載體基底開口101的側壁且支撐結構層111具有界定支撐結構開口105os的側壁。第一背板108及第二背板112分別包括多個開口，空氣可通過這些開口而經過。 The diaphragm 110 includes one or more diaphragm openings 109 and can be anchored at multiple points by the ILD structure 120. The diaphragm 110 is anchored at the multiple points so that the boundary of the diaphragm 110 is fixed with respect to the first back plate 108 and the second back plate 112. When sound waves pass through the carrier substrate opening 101 in the carrier substrate 103 to apply pressure to the diaphragm 110, the diaphragm 110 can be deformed by the energy of the sound waves so that the diaphragm 110 faces or moves away from the first back plate 108 and/or the second back plate 112 bending. The carrier substrate 103 has side walls that define the carrier substrate opening 101 and the support structure layer 111 has side walls that define the support structure opening 105os. The first back plate 108 and the second back plate 112 respectively include a plurality of openings through which air can pass.

在第一背板108與第二背板112之間存在空氣體積空間(air volume space)113。空氣體積空間113位於膜片110的上方及下方。空氣可通過由第一背板108及第二背板112中的每一者中的所述多個開口形成的空氣通道(air passage way)和/或通過膜片110的所述一個或多個膜片開口109從空氣體積空間113放出或進入到空氣體積空間113中。當膜片110朝向或遠離第一背板108和/或第二背板112彎曲時，空氣從空氣體積空間113排出或進入到空氣體積空間113中。通過聲波進行的膜片110相對於第一背板108和/或第二背板112的彎曲移動會改變膜片110與第一背板108和/或第二背板112之間的電容元件的電容。電容的這種改變可通過電接觸件114、116、118而提供到被配置成測量電容的外部電路系統。所測量的電容可被轉變成與引起空氣的移動的聲波對應的聲學信號。 There is an air volume space 113 between the first back plate 108 and the second back plate 112. The air volume 113 is located above and below the diaphragm 110. Air may pass through the air passage way formed by the plurality of openings in each of the first back plate 108 and the second back plate 112 and/or through the one or more of the diaphragm 110 The diaphragm opening 109 discharges from or enters into the air volume space 113. When the diaphragm 110 is bent toward or away from the first back plate 108 and/or the second back plate 112, air is discharged from the air volume space 113 or enters into the air volume space 113. The bending movement of the diaphragm 110 relative to the first back plate 108 and/or the second back plate 112 by sound waves will change the capacitance of the capacitive element between the diaphragm 110 and the first back plate 108 and/or the second back plate 112. capacitance. This change in capacitance may be provided through electrical contacts 114, 116, 118 to an external circuit system configured to measure capacitance. The measured capacitance can be converted into an acoustic signal corresponding to the sound wave causing the movement of the air.

過濾器堆疊104包括對設置在第一介電層104a內的顆粒過濾器106進行界定的顆粒過濾器層104b。在一些實施例中，顆粒過濾器層104b可包含多晶矽(例如，本質多晶矽)，且第一介電層104a可包含氧化物(例如，氧化矽)。顆粒過濾器106是顆粒過濾器層104b的位於載體基底開口101與支撐結構105之間的段。顆粒過濾器106具有被配置成將空氣從載體基底開口101傳送到空氣體積空間113的多個過濾器開口107。空氣在穿過(travel through)載體基底103中的載體基底開口101到達空氣體積空間113時經過顆粒過濾器106，顆粒過濾器106被配置成阻擋和/或移除空氣中可能對膜片110的移動產生不利影響的顆粒。在一些實施例中，顆粒可例如為來自被實施成形成MEMS麥克風100的雷 射劃切製程(laser dicing process)的副產品和/或雷射劃切製程中使用的化學品，例如多晶矽、二氧化矽等。與膜片110相互作用的顆粒可通過例如引起短路(例如，在第一背板108及第二背板112與膜片110之間引起短路)和/或降低MEMS麥克風100的聲學超載點(AOP)來降低MEMS麥克風100的性能。 The filter stack 104 includes a particle filter layer 104b that defines the particle filter 106 disposed in the first dielectric layer 104a. In some embodiments, the particulate filter layer 104b may include polysilicon (for example, intrinsic polysilicon), and the first dielectric layer 104a may include oxide (for example, silicon oxide). The particle filter 106 is a section of the particle filter layer 104b between the carrier substrate opening 101 and the support structure 105. The particulate filter 106 has a plurality of filter openings 107 configured to convey air from the carrier substrate opening 101 to the air volume space 113. When the air travels through the carrier substrate opening 101 in the carrier substrate 103 to the air volume space 113, it passes through the particulate filter 106, which is configured to block and/or remove the air that may affect the diaphragm 110. Movement of particles adversely affected. In some embodiments, the particles may be, for example, from mines that are implemented to form the MEMS microphone 100. By-products of the laser dicing process and/or chemicals used in the laser dicing process, such as polysilicon, silicon dioxide, etc. The particles that interact with the diaphragm 110 can cause short circuits (for example, short circuits between the first back plate 108 and the second back plate 112 and the diaphragm 110) and/or reduce the acoustic overload point (AOP) of the MEMS microphone 100, for example. ) To reduce the performance of the MEMS microphone 100.

支撐結構105是支撐結構層111的段(segment)，其中支撐結構105包含與支撐結構層111相同的材料。在一些實施例中，支撐結構105的上表面及MEMS結構102的下表面分別沿著實質上直的水平線140設置。在一些實施例中，支撐結構層111包含矽、多晶矽(例如，本質多晶矽)等。支撐結構105包括在過濾器開口107之間在橫向上間隔開且在顆粒過濾器106與MEMS結構102之間在垂直方向上間隔開的一個或多個段(例如，圖2A的第一細長段105a)。通過將支撐結構105設置在顆粒過濾器106與MEMS結構102之間，顆粒過濾器106的結構完整性得以增加。舉例來說，在MEMS麥克風100的製作期間，支撐結構105可形成在過濾器堆疊104之上。隨後，MEMS結構102通過支撐結構層111結合到載體基底103。支撐結構105防止在前述結合製程期間對顆粒過濾器層104b的損壞和/或破壞。此外，支撐結構105在隨後的處理步驟期間和/或在MEMS麥克風100的操作期間保持在適當位置。因此，支撐結構105可減少或消除對顆粒過濾器106的應變和/或損壞，從而提高MEMS麥克風100的耐久性、可靠性及性能。 The support structure 105 is a segment of the support structure layer 111, wherein the support structure 105 includes the same material as the support structure layer 111. In some embodiments, the upper surface of the support structure 105 and the lower surface of the MEMS structure 102 are respectively arranged along a substantially straight horizontal line 140. In some embodiments, the support structure layer 111 includes silicon, polysilicon (for example, intrinsic polysilicon), and the like. The support structure 105 includes one or more sections spaced in the lateral direction between the filter openings 107 and in the vertical direction between the particulate filter 106 and the MEMS structure 102 (for example, the first elongate section of FIG. 2A 105a). By arranging the support structure 105 between the particle filter 106 and the MEMS structure 102, the structural integrity of the particle filter 106 is increased. For example, during the fabrication of the MEMS microphone 100, the support structure 105 may be formed on the filter stack 104. Subsequently, the MEMS structure 102 is bonded to the carrier substrate 103 through the support structure layer 111. The support structure 105 prevents damage and/or damage to the particle filter layer 104b during the aforementioned bonding process. Furthermore, the support structure 105 remains in place during subsequent processing steps and/or during the operation of the MEMS microphone 100. Therefore, the support structure 105 can reduce or eliminate strain and/or damage to the particle filter 106, thereby improving the durability, reliability, and performance of the MEMS microphone 100.

圖2A示出沿著圖1的切割線A-A’截取的支撐結構105及顆粒過濾器106的一些替代實施例的俯視圖200a。圖1示出沿 著圖2A的切割線B-B’截取的剖視圖的一些實施例。 Figure 2A shows a top view 200a of some alternative embodiments of the support structure 105 and the particulate filter 106 taken along the cutting line A-A' of Figure 1. Figure 1 shows the edge Some examples of cross-sectional views taken along the cutting line B-B' of Fig. 2A.

所述多個過濾器開口107位於支撐結構105之下且分別具有圓形形狀和/或橢圓形狀。所述多個過濾器開口107可排列成包括橫跨載體基底開口(圖1的101)的行和/或列的陣列。顆粒過濾器106被配置成阻擋和/或移除從顆粒過濾器106的第一表面傳送到顆粒過濾器106的相對的第二表面的空氣中的顆粒(例如，通過過濾器開口107的形狀/大小和/或顆粒過濾器層104b的材料)。支撐結構105是支撐結構層111的在過濾器開口107之上延伸且為顆粒過濾器106提供結構支撐的段。支撐結構105包括第一細長段105a，所述第一細長段105a在支撐結構層111的第一相對的內側壁111ia、111ib之間連續地延伸。在一些實施例中，支撐結構105的第一細長段105a在橫向上與過濾器開口107偏移開非零距離。在此種實施例中，通過在橫向上從過濾器開口107移動細長段，空氣可更容易地通過支撐結構開口105os從過濾器開口107流到空氣體積空間113。在又一些實施例中，支撐結構105可包括任意數目的第一細長段105a。舉例來說，第一細長段105a可設置在過濾器開口107(未示出)的每一相鄰的行之間。 The plurality of filter openings 107 are located under the support structure 105 and respectively have a circular shape and/or an elliptical shape. The plurality of filter openings 107 may be arranged in an array including rows and/or columns spanning the carrier substrate openings (101 of FIG. 1). The particle filter 106 is configured to block and/or remove particles in the air conveyed from the first surface of the particle filter 106 to the opposite second surface of the particle filter 106 (for example, passing through the shape of the filter opening 107/ Size and/or material of the particle filter layer 104b). The support structure 105 is a section of the support structure layer 111 that extends above the filter opening 107 and provides structural support for the particle filter 106. The support structure 105 includes a first elongated section 105a that continuously extends between the first opposed inner side walls 111ia, 111ib of the support structure layer 111. In some embodiments, the first elongate section 105a of the support structure 105 is laterally offset from the filter opening 107 by a non-zero distance. In such an embodiment, by moving the elongated section from the filter opening 107 in the lateral direction, air can more easily flow from the filter opening 107 to the air volume space 113 through the support structure opening 105os. In still other embodiments, the support structure 105 may include any number of first elongated sections 105a. For example, the first elongated section 105a may be provided between each adjacent row of filter openings 107 (not shown).

在一些實施例中，過濾器開口107各自具有可例如介於約3微米到約10微米的範圍內的直徑d。在一些實施例中，如果直徑d小於約3微米，則可降低將空氣從顆粒過濾器106的第一表面傳送到顆粒過濾器106的相對的第二表面的能力，從而降低MEMS裝置結構102的性能。在又一些實施例中，如果直徑d大於約10微米，則可降低顆粒過濾器106阻擋和/或移除經過顆粒過濾器106的空氣中的顆粒的能力。舉例來說，顆粒過濾器開口107 可大於顆粒，以使得顆粒可經過顆粒過濾器開口且對膜片(圖1的110)的移動產生不利影響。 In some embodiments, the filter openings 107 each have a diameter d that may be in the range of about 3 microns to about 10 microns, for example. In some embodiments, if the diameter d is less than about 3 microns, the ability to transport air from the first surface of the particulate filter 106 to the opposite second surface of the particulate filter 106 can be reduced, thereby reducing the MEMS device structure 102 performance. In still other embodiments, if the diameter d is greater than about 10 microns, the ability of the particulate filter 106 to block and/or remove particles in the air passing through the particulate filter 106 may be reduced. For example, the particle filter opening 107 The particles may be larger, so that the particles can pass through the particle filter opening and adversely affect the movement of the diaphragm (110 of FIG. 1).

圖2B示出沿著圖1的切割線A-A’截取的支撐結構105的一些替代實施例的俯視圖200b。圖1示出沿著圖2B的切割線B-B’截取的剖視圖的一些實施例。 Fig. 2B shows a top view 200b of some alternative embodiments of the support structure 105 taken along the cutting line A-A' of Fig. 1. Figure 1 shows some embodiments of cross-sectional views taken along the cutting line B-B' of Figure 2B.

支撐結構105包括第一細長段105a及第二細長段105b。第一細長段105a分別在第一相對的內側壁111ia、111ib之間連續地延伸，且第二細長段105b分別在第二相對的內側壁111ic、111id之間連續地延伸。第一相對的內側壁111ia、111ib在第二相對的內側壁111ic、111id之間連續地延伸。此外，第一細長段105a分別在第一方向上延伸且第二細長段105b分別在與第一方向正交的第二方向上延伸。在一些實施例中，第一細長段105a分別與每一第二細長段105b相交。在又一些實施例中，第一細長段105a可設置在過濾器開口107的每一相鄰的行之間和/或第二細長段105b可設置在過濾器開口107的每一相鄰的行之間(未示出)。 The supporting structure 105 includes a first elongated section 105a and a second elongated section 105b. The first elongated section 105a continuously extends between the first opposed inner sidewalls 111ia and 111ib, respectively, and the second elongated section 105b continuously extends between the second opposed inner sidewalls 111ic and 111id, respectively. The first opposed inner side walls 111ia and 111ib continuously extend between the second opposed inner side walls 111ic and 111id. In addition, the first elongated sections 105a respectively extend in a first direction and the second elongated sections 105b respectively extend in a second direction orthogonal to the first direction. In some embodiments, the first elongated section 105a intersects each second elongated section 105b, respectively. In still other embodiments, the first elongated section 105a may be provided between each adjacent row of the filter opening 107 and/or the second elongated section 105b may be provided between each adjacent row of the filter opening 107 Between (not shown).

圖2C示出沿著圖1的切割線A-A’截取的支撐結構105的一些替代實施例的俯視圖200c。圖1示出沿著圖2C的切割線B-B’截取的剖視圖的一些實施例。 Figure 2C shows a top view 200c of some alternative embodiments of the support structure 105 taken along cutting line A-A' of Figure 1. Figure 1 shows some embodiments of cross-sectional views taken along the cutting line B-B' of Figure 2C.

所述多個支撐結構開口105os延伸穿過支撐結構層111且分別具有圓形形狀和/或橢圓形狀。所述多個支撐結構開口105os可排列成包括橫跨載體基底開口(圖1的101)行的和/或列的陣列。在一些實施例中，所述多個支撐結構開口105os直接對準在過濾器開口107上方。在一些實施例中，支撐結構105被配置成第二顆粒過濾器。在此種實施例中，支撐結構105被配置成阻擋 和/或移除從支撐結構105的第一表面傳送到支撐結構105的相對的第二表面的空氣中的顆粒(例如，通過支撐結構開口105os的形狀/大小和/或支撐結構層111的材料來進行)。因此，支撐結構105可增加顆粒過濾器106的結構完整性且用作第二顆粒過濾器，從而進一步提高MEMS麥克風100的性能、可靠性及耐久性。在一些實施例中，支撐結構105具有第一材料(例如，矽)且顆粒過濾器(圖1的106)具有與第一材料不同的第二材料(例如，氮化矽和/或多晶矽)。 The plurality of support structure openings 105os extend through the support structure layer 111 and respectively have a circular shape and/or an oval shape. The plurality of support structure openings 105os may be arranged in an array including rows and/or columns across the carrier substrate opening (101 in FIG. 1). In some embodiments, the plurality of support structure openings 105os are directly aligned above the filter opening 107. In some embodiments, the support structure 105 is configured as a second particulate filter. In this embodiment, the support structure 105 is configured to block And/or remove particles in the air that are transferred from the first surface of the support structure 105 to the opposite second surface of the support structure 105 (for example, through the shape/size of the support structure opening 105os and/or the material of the support structure layer 111 To proceed). Therefore, the supporting structure 105 can increase the structural integrity of the particulate filter 106 and serve as a second particulate filter, thereby further improving the performance, reliability, and durability of the MEMS microphone 100. In some embodiments, the support structure 105 has a first material (for example, silicon) and the particulate filter (106 in FIG. 1) has a second material (for example, silicon nitride and/or polysilicon) that is different from the first material.

圖2D示出沿著圖1的切割線A-A’截取的顆粒過濾器106及支撐結構105的一些替代實施例的俯視圖200d。圖1示出沿著圖2D的切割線B-B’截取的剖視圖的一些實施例。 FIG. 2D shows a top view 200d of some alternative embodiments of the particulate filter 106 and the support structure 105 taken along the cutting line A-A' of FIG. 1. Fig. 1 shows some embodiments of cross-sectional views taken along cutting line B-B' of Fig. 2D.

所述多個支撐結構開口105os延伸穿過支撐結構層111且分別具有多邊形形狀(例如三角形、矩形、五邊形等)。所述多個過濾器開口107位於支撐結構105之下且分別具有圓形形狀和/或橢圓形狀。因此，過濾器開口107可分別具有與支撐結構開口105os不同的形狀。所述多個支撐結構開口105os分別大於對應的下伏的過濾器開口107。在又一些實施例中，支撐結構開口105os可分別小於對應的下伏的過濾器開口107(未示出)。在又一些實施例中，支撐結構105用作具有與顆粒過濾器106不同的開口形狀的第二顆粒過濾器。這可進一步降低顆粒到達MEMS結構(圖1的102)的能力，從而進一步提高MEMS麥克風(圖1的100)的性能、可靠性及耐久性。 The plurality of support structure openings 105os extend through the support structure layer 111 and respectively have a polygonal shape (for example, a triangle, a rectangle, a pentagon, etc.). The plurality of filter openings 107 are located under the support structure 105 and respectively have a circular shape and/or an elliptical shape. Therefore, the filter openings 107 may have different shapes from the support structure openings 105os, respectively. The plurality of support structure openings 105os are respectively larger than the corresponding underlying filter openings 107. In still other embodiments, the support structure openings 105os may be respectively smaller than the corresponding underlying filter openings 107 (not shown). In still other embodiments, the support structure 105 functions as a second particulate filter having a different opening shape from the particulate filter 106. This can further reduce the ability of particles to reach the MEMS structure (102 in FIG. 1), thereby further improving the performance, reliability and durability of the MEMS microphone (100 in FIG. 1).

圖3A示出與圖1的MEMS麥克風100的一些替代實施例對應的MEMS麥克風300a的剖視圖。 3A shows a cross-sectional view of a MEMS microphone 300a corresponding to some alternative embodiments of the MEMS microphone 100 of FIG. 1.

在一些實施例中，顆粒過濾器層104b包括下部顆粒過濾器層302、中間顆粒過濾器層304及上部顆粒過濾器層306。下部顆粒過濾器層302可例如為或包含矽、氮化物、氮化矽等和/或具有介於約0.2微米到約1微米的範圍內的厚度。中間顆粒過濾器層304可例如為或包含多晶矽、未經摻雜的多晶矽等和/或具有介於約0.2微米到約1微米的範圍內的厚度。上部顆粒過濾器層306可例如為或包含矽、氮化物、氮化矽等和/或具有介於約0.2微米到約1微米的範圍內的厚度。在一些實施例中，顆粒過濾器層104b內的層可各自具有實質上相同的厚度。在又一些實施例中，下部顆粒過濾器層302與上部顆粒過濾器層306可包含相同的材料(例如，氮化矽)。在一些實施例中，顆粒過濾器層104b包括多晶矽層(例如，中間顆粒過濾器層304)，所述多晶矽層設置在兩個氮化矽層(例如，下部顆粒過濾器層302與上部顆粒過濾器層306)之間且被配置成減少在顆粒過濾器106上誘發的應力，從而增加顆粒過濾器106的結構完整性及可靠性。在再一些實施例中，導通孔122、導電線124、第一背板108及第二背板112、膜片110及顆粒過濾器106可分別包含相同的材料(例如，金屬、多晶矽等)。 In some embodiments, the particulate filter layer 104b includes a lower particulate filter layer 302, a middle particulate filter layer 304, and an upper particulate filter layer 306. The lower particulate filter layer 302 may, for example, be or include silicon, nitride, silicon nitride, etc. and/or have a thickness ranging from about 0.2 micrometer to about 1 micrometer. The intermediate particle filter layer 304 may be, for example, or include polysilicon, undoped polysilicon, etc. and/or have a thickness in the range of about 0.2 micrometer to about 1 micrometer. The upper particulate filter layer 306 may, for example, be or include silicon, nitride, silicon nitride, etc. and/or have a thickness ranging from about 0.2 micrometer to about 1 micrometer. In some embodiments, the layers within the particulate filter layer 104b may each have substantially the same thickness. In still other embodiments, the lower particulate filter layer 302 and the upper particulate filter layer 306 may include the same material (for example, silicon nitride). In some embodiments, the particulate filter layer 104b includes a polysilicon layer (e.g., middle particulate filter layer 304) disposed on two silicon nitride layers (e.g., lower particulate filter layer 302 and upper particulate filter layer 304). Between the filter layers 306) and is configured to reduce the stress induced on the particulate filter 106, thereby increasing the structural integrity and reliability of the particulate filter 106. In still other embodiments, the vias 122, the conductive wires 124, the first back plate 108 and the second back plate 112, the diaphragm 110, and the particle filter 106 may each include the same material (for example, metal, polysilicon, etc.).

圖3B示出與圖1的MEMS麥克風100的一些替代實施例對應的MEMS麥克風300b的剖視圖。 FIG. 3B shows a cross-sectional view of a MEMS microphone 300b corresponding to some alternative embodiments of the MEMS microphone 100 of FIG. 1.

過濾器堆疊104包括第一介電層104a、顆粒過濾器層104b、第二介電層104c及第三介電層104d。在一些實施例中，第一介電層104a、第二介電層104c及第三介電層104d可為或包含第一材料(例如氧化物(例如二氧化矽))且顆粒過濾器層104b 可為或包含與第一材料不同的第二材料(例如氮化物(例如氮化矽)、多晶矽等)。此外，如圖3B中所示，支撐結構層111具有界定多個支撐結構開口105os的多個基底側壁且顆粒過濾器層104b具有界定所述多個過濾器開口107的多個顆粒過濾器側壁。在一些實施例中，所述多個基底側壁在橫向上與所述多個顆粒過濾器側壁對齊。在此種實施例中，所述多個支撐結構開口105os分別上覆在對應的過濾器開口107上且支撐結構105被配置成第二顆粒過濾器，如圖2C中示出及闡述。 The filter stack 104 includes a first dielectric layer 104a, a particulate filter layer 104b, a second dielectric layer 104c, and a third dielectric layer 104d. In some embodiments, the first dielectric layer 104a, the second dielectric layer 104c, and the third dielectric layer 104d may be or include a first material (such as oxide (such as silicon dioxide)) and the particle filter layer 104b It may be or include a second material different from the first material (for example, nitride (such as silicon nitride), polysilicon, etc.). In addition, as shown in FIG. 3B, the support structure layer 111 has a plurality of base sidewalls defining a plurality of support structure openings 105os and the particle filter layer 104b has a plurality of particle filter sidewalls that define the plurality of filter openings 107. In some embodiments, the plurality of base sidewalls are aligned with the plurality of particulate filter sidewalls in the lateral direction. In such an embodiment, the plurality of support structure openings 105os respectively cover the corresponding filter openings 107 and the support structure 105 is configured as a second particle filter, as shown and explained in FIG. 2C.

圖4示出積體晶片400的一些實施例的剖視圖，積體晶片400的所述一些實施例包括打線結合到互補金屬氧化物半導體(CMOS)積體電路(IC)晶粒402的圖1的MEMS麥克風100的一些替代實施例。 FIG. 4 shows a cross-sectional view of some embodiments of an integrated wafer 400 that includes wire bonding to a complementary metal oxide semiconductor (CMOS) integrated circuit (IC) die 402 of FIG. 1 Some alternative embodiments of MEMS microphone 100.

積體晶片400包括MEMS麥克風100，MEMS麥克風100在橫向上鄰近CMOS IC晶粒402且設置在封裝401的空腔403內。在一些實施例中，MEMS麥克風100的支撐結構層111包括被配置成增加MEMS麥克風100的結構完整性的支撐結構105。在一些實施例中，CMOS IC晶粒402可為應用專用積體電路(ASIC)。在一些實施例中，空腔403由封裝401的內側壁界定。封裝401包括前側結構401a及外殼結構(enclosure structure)401b。CMOS IC晶粒402及MEMS麥克風100設置在前側結構401a上。在一些實施例中，封裝401的開口(即入口)可為MEMS麥克風100的載體基底開口101，以使得任何進入或離開空腔403的空氣都經過顆粒過濾器106。 The integrated chip 400 includes a MEMS microphone 100, and the MEMS microphone 100 is laterally adjacent to the CMOS IC die 402 and disposed in the cavity 403 of the package 401. In some embodiments, the support structure layer 111 of the MEMS microphone 100 includes a support structure 105 configured to increase the structural integrity of the MEMS microphone 100. In some embodiments, the CMOS IC die 402 may be an application specific integrated circuit (ASIC). In some embodiments, the cavity 403 is defined by the inner sidewall of the package 401. The package 401 includes a front structure 401a and an enclosure structure 401b. The CMOS IC die 402 and the MEMS microphone 100 are arranged on the front structure 401a. In some embodiments, the opening (ie, the inlet) of the package 401 may be the carrier substrate opening 101 of the MEMS microphone 100 so that any air entering or leaving the cavity 403 passes through the particle filter 106.

CMOS IC晶粒402包括上覆在CMOS基底410上的後段 (back-end-of-line，BEOL)金屬化堆疊412。BEOL金屬化堆疊包括層間介電(ILD)結構413、內連線416及內連通孔414。CMOS基底410及ILD結構413包括例如電晶體408等電子元件和/或例如一個或多個電容器、電阻器、電感器和/或二極體等其他電氣組件(未示出)。CMOS基底410可例如為或包括塊狀半導體基底或絕緣體上矽(silicon-on-insulator，SOI)基底。ILD結構413可包括一個或多個堆疊的ILD層，所述一個或多個堆疊的ILD層分別包含低介電常數(low-k)電介質(即介電常數小於約3.9的介電材料)及氧化物(例如二氧化矽)等。內連通孔414及內連線416可例如分別為或包含導電材料，例如鋁、銅、鎢等。 The CMOS IC die 402 includes a back section overlying the CMOS substrate 410 (back-end-of-line, BEOL) metallization stack 412. The BEOL metallization stack includes an interlayer dielectric (ILD) structure 413, interconnection lines 416, and interconnection holes 414. The CMOS substrate 410 and the ILD structure 413 include electronic components such as a transistor 408 and/or other electrical components such as one or more capacitors, resistors, inductors, and/or diodes (not shown). The CMOS substrate 410 may be, for example, or include a bulk semiconductor substrate or a silicon-on-insulator (SOI) substrate. The ILD structure 413 may include one or more stacked ILD layers, the one or more stacked ILD layers each including a low-k dielectric (ie, a dielectric material with a dielectric constant less than about 3.9) and Oxide (such as silicon dioxide), etc. The inner via 414 and the inner wire 416 may be, for example, respectively, or include conductive materials, such as aluminum, copper, tungsten, etc.

在MEMS麥克風100的每一電接觸件114、116、118之上設置有焊料球404。焊料球404為多條結合配線406提供接觸點。在內連線416的頂層上方上覆有結合墊418，且結合墊418在CMOS IC晶粒402上為結合配線406提供打線結合位置。在一些實施例中，電晶體408通過BEOL金屬化堆疊412、結合配線406及結合墊418電耦合到電接觸件114、116、118。電晶體408可被配置成從第一背板108、第二背板112、和/或膜片110接收信號。 A solder ball 404 is provided on each electrical contact 114, 116, 118 of the MEMS microphone 100. The solder balls 404 provide contact points for a plurality of bonding wires 406. A bonding pad 418 is covered on the top layer of the interconnect 416, and the bonding pad 418 provides a wire bonding location for the bonding wiring 406 on the CMOS IC die 402. In some embodiments, the transistor 408 is electrically coupled to the electrical contacts 114, 116, 118 through the BEOL metallization stack 412, bonding wires 406, and bonding pads 418. The transistor 408 may be configured to receive signals from the first backplate 108, the second backplate 112, and/or the diaphragm 110.

圖5到圖13示出根據本公開的形成具有顆粒過濾器及支撐結構的MEMS麥克風的方法的一些實施例的剖視圖500到剖視圖1300。儘管參照方法闡述圖5到圖13中所示的剖視圖500到剖視圖1300，然而應理解，圖5到圖13中所示的結構並不僅限於所述方法，而是可單獨地獨立於所述方法。此外，儘管圖5到圖13被闡述為一系列動作，然而應理解，這些動作並不限制在其他實 施例中可改變的動作的次序，且所公開的方法也適用於其他結構。在其他實施例中，可全部或部分地省略示出和/或闡述的一些動作。 5 to 13 show cross-sectional views 500 to 1300 of some embodiments of a method of forming a MEMS microphone with a particle filter and a supporting structure according to the present disclosure. Although the cross-sectional view 500 to the cross-sectional view 1300 shown in FIGS. 5 to 13 are explained with reference to the method, it should be understood that the structure shown in FIGS. 5 to 13 is not limited to the method, but may be independently independent of the method. . In addition, although Figures 5 to 13 are described as a series of actions, it should be understood that these actions are not limited to other implementations. The sequence of actions can be changed in the embodiments, and the disclosed method is also applicable to other structures. In other embodiments, some actions shown and/or explained may be omitted in whole or in part.

如圖5的剖視圖500中所示，在犧牲載體基底502之上形成MEMS結構102。在一些實施例中，犧牲載體基底502可例如為塊狀基底(例如塊狀矽基底)、絕緣體上矽(SOI)基底、或另一種合適的基底。MEMS結構102包括導電線124、導通孔122、層間介電(ILD)結構120、第一背板108、第二背板112、以及設置在第一背板108與第二背板112之間的膜片110。ILD結構120可為和/或包括一個或多個介電層。所述一個或多個介電層可例如為或包含氧化物(例如二氧化矽)、或另一種合適的氧化物。在一些實施例中，形成MEMS結構102的製程包括：通過單鑲嵌製程形成導電線124的最底層；以及隨後通過單鑲嵌製程形成導通孔122的最底層。此外，在一些實施例中，所述製程包括通過重複執行雙鑲嵌製程來形成導通孔122及導電線124的剩餘的層。 As shown in the cross-sectional view 500 of FIG. 5, the MEMS structure 102 is formed on the sacrificial carrier substrate 502. In some embodiments, the sacrificial carrier substrate 502 may be, for example, a bulk substrate (such as a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or another suitable substrate. The MEMS structure 102 includes conductive lines 124, vias 122, an interlayer dielectric (ILD) structure 120, a first back plate 108, a second back plate 112, and a second back plate 112 disposed between the first back plate 108 and the second back plate 112.膜片110。 Diaphragm 110. The ILD structure 120 may be and/or include one or more dielectric layers. The one or more dielectric layers may, for example, be or include an oxide (such as silicon dioxide), or another suitable oxide. In some embodiments, the process of forming the MEMS structure 102 includes: forming the bottom layer of the conductive line 124 by a single damascene process; and subsequently forming the bottom layer of the via 122 by a single damascene process. In addition, in some embodiments, the process includes repeatedly performing a dual damascene process to form the remaining layers of vias 122 and conductive lines 124.

另外，第一背板108、第二背板112及膜片110可在導電線124的對應的層的雙鑲嵌製程或單鑲嵌製程期間形成。舉例來說，第二背板112可與形成導電線124的最底層的單鑲嵌製程同時形成。在另一實例中，第一背板108、第二背板112及膜片110可各自通過以下步驟形成：對多晶矽的層進行沉積(例如，通過化學氣相沉積(chemical vapor deposition，CVD)、物理氣相沉積(physical vapor deposition，PVD)、或另一種合適的沉積製程)；根據罩幕層(未示出)將多晶矽的層圖案化；以及執行移除製程來移除罩幕層。在一些實施例中，導電線124、導通孔122、第一 背板108、第二背板112及膜片110可例如分別包含多晶矽、金屬或另一種合適的導電材料。 In addition, the first backplane 108, the second backplane 112, and the diaphragm 110 may be formed during a dual damascene process or a single damascene process of the corresponding layers of the conductive wires 124. For example, the second backplane 112 can be formed simultaneously with the single damascene process for forming the bottom layer of the conductive lines 124. In another example, the first back plate 108, the second back plate 112, and the diaphragm 110 may be formed by the following steps: depositing a layer of polysilicon (for example, by chemical vapor deposition (CVD), Physical vapor deposition (PVD), or another suitable deposition process); pattern the polysilicon layer according to the mask layer (not shown); and perform a removal process to remove the mask layer. In some embodiments, the conductive line 124, the via 122, the first The back plate 108, the second back plate 112, and the diaphragm 110 may each include polysilicon, metal, or another suitable conductive material, for example.

如圖6的剖視圖600中所示，提供載體基底103。在一些實施例中，載體基底103可例如為或包含塊狀基底(例如塊狀矽基底)、絕緣體上矽(SOI)基底或另一種合適的基底，和/或可具有介於約250微米到約725微米的範圍內的初始厚度T1。在載體形成基底之上形成過濾器堆疊104。過濾器堆疊104包括第一介電層104a、顆粒過濾器層104b、第二介電層104c及第三介電層104d。 As shown in the cross-sectional view 600 of FIG. 6, a carrier substrate 103 is provided. In some embodiments, the carrier substrate 103 may be, for example, or include a bulk substrate (such as a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or another suitable substrate, and/or may have a thickness ranging from about 250 microns to The initial thickness T1 in the range of about 725 microns. A filter stack 104 is formed on the carrier forming substrate. The filter stack 104 includes a first dielectric layer 104a, a particulate filter layer 104b, a second dielectric layer 104c, and a third dielectric layer 104d.

在一些實施例中，形成過濾器堆疊104的製程包括：在載體基底103之上沉積第一介電層104a且隨後執行第一退火製程；在第一介電層104a之上沉積顆粒過濾器層104b，執行第二退火製程，且將顆粒過濾器層104b圖案化以界定顆粒過濾器106；在顆粒過濾器層104b之上沉積第二介電層104c且隨後執行第一平坦化製程(例如，化學機械平坦化(chemical-mechanical planarization，CMP)製程)；以及在第二介電層104c之上沉積第三介電層104d且隨後執行第二平坦化製程(例如，CMP製程)。在一些實施例中，將顆粒過濾器層104b圖案化包括：在顆粒過濾器層104b之上形成罩幕層(未示出)；將顆粒過濾器層104b的未被罩幕的區暴露到一種或多種蝕刻劑，從而界定顆粒過濾器106；以及執行移除製程以移除罩幕層。在一些實施例中，過濾器堆疊104的層可分別例如通過CVD、PVD、原子層沉積(atomic layer deposition，ALD)、熱氧化、或另一種合適的沉積製程來沉積和/或生長。在又一些實施例中，第一介電層104a、第二介電層104c及第三介電層104d可分別通過電漿增強型化學氣相沉積 (plasma-enhanced chemical vapor deposition，PECVD)、高密度電漿化學氣相沉積(high density plasma chemical vapor deposition，HDPCVD)、低壓化學氣相沉積(LPCVD)、或另一種合適的沉積製程形成。 In some embodiments, the process of forming the filter stack 104 includes: depositing a first dielectric layer 104a on the carrier substrate 103 and then performing a first annealing process; depositing a particulate filter layer on the first dielectric layer 104a 104b, perform a second annealing process, and pattern the particle filter layer 104b to define the particle filter 106; deposit a second dielectric layer 104c on the particle filter layer 104b and then perform a first planarization process (for example, Chemical-mechanical planarization (CMP) process); and depositing a third dielectric layer 104d on the second dielectric layer 104c and then performing a second planarization process (for example, a CMP process). In some embodiments, patterning the particle filter layer 104b includes: forming a mask layer (not shown) on the particle filter layer 104b; exposing the unmasked area of the particle filter layer 104b to one or A variety of etchants to define the particle filter 106; and a removal process is performed to remove the mask layer. In some embodiments, the layers of the filter stack 104 may be respectively deposited and/or grown, for example, by CVD, PVD, atomic layer deposition (ALD), thermal oxidation, or another suitable deposition process. In still other embodiments, the first dielectric layer 104a, the second dielectric layer 104c, and the third dielectric layer 104d may be respectively deposited by plasma enhanced chemical vapor deposition (plasma-enhanced chemical vapor deposition, PECVD), high density plasma chemical vapor deposition (HDPCVD), low pressure chemical vapor deposition (LPCVD), or another suitable deposition process.

在一些實施例中，第一介電層104a可例如為或包含氧化物(例如二氧化矽)或者另一種介電材料，和/或可具有介於約10微米到約40微米的範圍內的厚度。在一些實施例中，顆粒過濾器層104b可例如為或包含多晶矽、氮化矽等，和/或可具有介於約0.5微米到約10微米的範圍內的厚度。在一些實施例中，第二介電層104c可例如為或包含氧化物(例如二氧化矽)或者另一種介電材料，和/或可具有約2微米的厚度。在又一些實施例中，第三介電層104d可例如為或包含氧化物(例如二氧化矽)或者另一種介電材料，和/或可具有約1微米的厚度。在又一些實施例中，第一介電層104a、第二介電層104c及第三介電層104d可分別為或包含相同的材料。 In some embodiments, the first dielectric layer 104a may be, for example, or include an oxide (such as silicon dioxide) or another dielectric material, and/or may have a thickness ranging from about 10 microns to about 40 microns. thickness. In some embodiments, the particulate filter layer 104b may be, for example, or include polysilicon, silicon nitride, etc., and/or may have a thickness ranging from about 0.5 microns to about 10 microns. In some embodiments, the second dielectric layer 104c may be, for example, or include an oxide (such as silicon dioxide) or another dielectric material, and/or may have a thickness of about 2 microns. In still other embodiments, the third dielectric layer 104d may be, for example, or include an oxide (such as silicon dioxide) or another dielectric material, and/or may have a thickness of about 1 micrometer. In still other embodiments, the first dielectric layer 104a, the second dielectric layer 104c, and the third dielectric layer 104d may respectively be or include the same material.

如圖7的剖視圖700中所示，在第三介電層104d上形成支撐結構層111。在一些實施例中，形成製程包括將支撐結構層111結合到第三介電層104d。在此種實施例中，結合製程可例如為熔合結合製程、或另一種合適的結合製程。在一些實施例中，支撐結構層111可例如為塊狀基底(例如，塊狀矽基底)、絕緣體上矽(SOI)基底、或者具有初始厚度T2的另一種合適的基底。在執行結合製程之後，對支撐結構層111執行薄化製程(thinning process)，以將支撐結構層111的初始厚度T2減小到厚度Tms。在一些實施例中，厚度Tms介於約10微米到約200微米的範圍 內。在一些實施例中，薄化製程是通過機械研磨製程、CMP製程、一些其它薄化製程、或前述製程的任意組合來執行。舉例來說，薄化製程可完全通過機械研磨製程來執行。 As shown in the cross-sectional view 700 of FIG. 7, a supporting structure layer 111 is formed on the third dielectric layer 104d. In some embodiments, the forming process includes bonding the support structure layer 111 to the third dielectric layer 104d. In such an embodiment, the bonding process may be, for example, a fusion bonding process or another suitable bonding process. In some embodiments, the support structure layer 111 may be, for example, a bulk substrate (for example, a bulk silicon substrate), a silicon-on-insulator (SOI) substrate, or another suitable substrate with an initial thickness T2. After the bonding process is performed, a thinning process is performed on the support structure layer 111 to reduce the initial thickness T2 of the support structure layer 111 to a thickness Tms. In some embodiments, the thickness Tms ranges from about 10 microns to about 200 microns Inside. In some embodiments, the thinning process is performed by a mechanical polishing process, a CMP process, some other thinning process, or any combination of the foregoing processes. For example, the thinning process can be performed entirely by a mechanical polishing process.

在又一些實施例中，支撐結構層111可通過在過濾器堆疊104之上沉積支撐結構層111來形成。沉積製程可例如為或包括CVD、PVD、LPCVD、PECVD、或另一種沉積製程。舉例來說，沉積製程完全通過CVD製程(例如，PECVD)執行。在此種實施例中，支撐結構層111可例如為或包含多晶矽、本質多晶矽等，和/或可具有約4微米的厚度。這可減少在顆粒過濾器106上誘發的物理應變(例如，通過省略圖7的結合製程和/或薄化製程)，和/或減少與形成支撐結構層111相關的成本及時間。 In still other embodiments, the support structure layer 111 may be formed by depositing the support structure layer 111 on the filter stack 104. The deposition process may, for example, be or include CVD, PVD, LPCVD, PECVD, or another deposition process. For example, the deposition process is completely performed by a CVD process (for example, PECVD). In such an embodiment, the support structure layer 111 may be, for example, or include polysilicon, intrinsic polysilicon, etc., and/or may have a thickness of about 4 microns. This can reduce the physical strain induced on the particulate filter 106 (for example, by omitting the bonding process and/or the thinning process of FIG. 7), and/or reduce the cost and time associated with forming the support structure layer 111.

如圖8的剖視圖800中所示，將支撐結構層111圖案化，從而界定延伸穿過支撐結構層111及支撐結構105的支撐結構開口105os。在一些實施例中，以將支撐結構105配置成第二顆粒過濾器這樣一種方式來將支撐結構層111圖案化，如圖3B和/或圖2C中示出及闡述。在一些實施例中，將支撐結構層111圖案化的製程包括：在支撐結構層111之上形成罩幕層；將支撐結構層111的未被罩幕的區暴露到一種或多種蝕刻劑(例如，氟化硫(例如，六氟化硫(SF6))等)，從而界定支撐結構105；以及執行移除製程以移除罩幕層。在一些實施例中，前述圖案化製程包括執行乾式蝕刻製程、電漿蝕刻製程、或另一種合適的蝕刻製程。 As shown in the cross-sectional view 800 of FIG. 8, the support structure layer 111 is patterned to define a support structure opening 105os extending through the support structure layer 111 and the support structure 105. In some embodiments, the support structure layer 111 is patterned in such a way that the support structure 105 is configured as a second particulate filter, as shown and explained in FIG. 3B and/or FIG. 2C. In some embodiments, the process of patterning the support structure layer 111 includes: forming a mask layer on the support structure layer 111; exposing the unmasked area of the support structure layer 111 to one or more etchants (for example, Sulfur fluoride (for example, sulfur hexafluoride (SF6), etc.), thereby defining the support structure 105; and performing a removal process to remove the mask layer. In some embodiments, the aforementioned patterning process includes performing a dry etching process, a plasma etching process, or another suitable etching process.

如圖9的剖視圖900中所示，將支撐結構層111結合到MEMS結構102。在一些實施例中，結合製程可例如為熔合結合製程或另一種合適的結合製程。在執行結合製程之後，對載體基底 103執行薄化製程，以將載體基底的初始厚度T1減小到厚度Tcs。在一些實施例中，厚度Tcs介於約200微米到約400微米的範圍內。在一些實施例中，薄化製程通過機械研磨製程、CMP製程、一些其它薄化製程、或前述製程的任意組合來執行。舉例來說，薄化製程可完全通過機械研磨製程來執行。 As shown in the cross-sectional view 900 of FIG. 9, the support structure layer 111 is bonded to the MEMS structure 102. In some embodiments, the bonding process may be, for example, a fusion bonding process or another suitable bonding process. After performing the bonding process, the carrier substrate 103 performs a thinning process to reduce the initial thickness T1 of the carrier substrate to a thickness Tcs. In some embodiments, the thickness Tcs is in the range of about 200 microns to about 400 microns. In some embodiments, the thinning process is performed by a mechanical polishing process, a CMP process, some other thinning process, or any combination of the foregoing processes. For example, the thinning process can be performed entirely by a mechanical polishing process.

如圖10的剖視圖1000中所示，將圖9的結構翻轉且對犧牲載體基底(圖9的502)執行移除製程，從而移除犧牲載體基底(圖9的502)。在一些實施例中，犧牲載體基底(圖9的502)的移除製程包括：對犧牲載體基底(圖9的502)執行研磨製程(例如，機械研磨製程)；以及對犧牲載體基底(圖9的502)的剩餘部分和/或ILD結構120執行濕式蝕刻製程，從而暴露出ILD結構120的上表面。在一些實施例中，在移除犧牲載體基底(圖9的502)之後，執行沉積製程以在ILD結構120的上表面上形成一個或多個ILD層(例如，包含二氧化矽的一個或多個ILD層)。在此種實施例中，所述一個或多個ILD層是ILD結構120的一部分且可通過例如PECVD來沉積。 As shown in the cross-sectional view 1000 of FIG. 10, the structure of FIG. 9 is turned over and a removal process is performed on the sacrificial carrier substrate (502 of FIG. 9), thereby removing the sacrificial carrier substrate (502 of FIG. 9). In some embodiments, the removal process of the sacrificial carrier substrate (502 of FIG. 9) includes: performing a polishing process (for example, a mechanical polishing process) on the sacrificial carrier substrate (502 of FIG. 9); The remaining part of 502) and/or the ILD structure 120 is subjected to a wet etching process, thereby exposing the upper surface of the ILD structure 120. In some embodiments, after removing the sacrificial carrier substrate (502 of FIG. 9), a deposition process is performed to form one or more ILD layers (for example, one or more silicon dioxide-containing layers) on the upper surface of the ILD structure 120 ILD layer). In such an embodiment, the one or more ILD layers are part of the ILD structure 120 and can be deposited by, for example, PECVD.

同樣如圖10中所示，在ILD結構120中形成電接觸件114、116、118。在一些實施例中，形成電接觸件114、116、118的製程包括：在ILD結構120之上形成罩幕層(未示出)；將ILD結構120的未被罩幕的區暴露到一種或多種蝕刻劑，從而界定電接觸件開口；以及將電接觸件114、116、118沉積在電接觸件開口中。在此種實施例中，電接觸件114、116、118可例如通過無電鍍覆、濺鍍、電鍍、或另一種合適的沉積製程來沉積和/或生長。在一些實施例中，電接觸件114、116、118可分別例如為或包含 金、鎳等。 As also shown in FIG. 10, electrical contacts 114, 116, 118 are formed in the ILD structure 120. In some embodiments, the process of forming the electrical contacts 114, 116, 118 includes: forming a mask layer (not shown) on the ILD structure 120; exposing the unmasked area of the ILD structure 120 to one or more An etchant, thereby defining the electrical contact opening; and depositing the electrical contacts 114, 116, 118 in the electrical contact opening. In such an embodiment, the electrical contacts 114, 116, 118 may be deposited and/or grown, for example, by electroless plating, sputtering, electroplating, or another suitable deposition process. In some embodiments, the electrical contacts 114, 116, 118 may be, for example, or include Gold, nickel, etc.

如圖11的剖視圖1100中所示，在ILD結構120的上表面之上形成上部罩幕層1102。上部罩幕層1102覆蓋電接觸件114、116、118且被配置成在後續處理步驟期間保護電接觸件114、116、118。在載體基底103的下表面上形成下部罩幕層1104。在形成下部罩幕層1104之後，根據下部罩幕層1104將載體基底103圖案化，從而在載體基底103中形成載體基底開口101。在一些實施例中，將載體基底103圖案化包括執行乾式蝕刻製程，例如電漿蝕刻製程和/或深反應離子蝕刻(deep reactive-ion etch，DRIE)製程。 As shown in the cross-sectional view 1100 of FIG. 11, an upper mask layer 1102 is formed on the upper surface of the ILD structure 120. The upper mask layer 1102 covers the electrical contacts 114, 116, 118 and is configured to protect the electrical contacts 114, 116, 118 during subsequent processing steps. A lower mask layer 1104 is formed on the lower surface of the carrier substrate 103. After the lower mask layer 1104 is formed, the carrier substrate 103 is patterned according to the lower mask layer 1104 to form a carrier substrate opening 101 in the carrier substrate 103. In some embodiments, patterning the carrier substrate 103 includes performing a dry etching process, such as a plasma etching process and/or a deep reactive-ion etch (DRIE) process.

如圖12的剖視圖1200中所示，根據上部罩幕層1102和/或下部罩幕層1104對圖11的結構執行圖案化製程，從而界定MEMS麥克風100。在一些實施例中，對圖11的結構進行的圖案化製程包括：執行濕式蝕刻製程和/或將圖11的結構暴露到一種或多種蝕刻劑。圖案化製程移除ILD結構120的一部分，從而界定空氣體積空間113。此外，圖案化製程從顆粒過濾器106的上方及下方移除第一介電層104a、第二介電層104c及第三介電層104d。在執行圖案化製程之後，執行移除製程以移除上部罩幕層及下部罩幕層(圖11的1102、1104)。在蝕刻製程期間中，顆粒過濾器106被釋放且可通過蝕刻劑和/或通過MEMS麥克風的移動而移動。支撐結構105限制顆粒過濾器106的移動，以防止對顆粒過濾器106的損壞(例如，防止顆粒過濾器106接觸第一背板108)。 As shown in the cross-sectional view 1200 of FIG. 12, a patterning process is performed on the structure of FIG. 11 according to the upper mask layer 1102 and/or the lower mask layer 1104 to define the MEMS microphone 100. In some embodiments, the patterning process performed on the structure of FIG. 11 includes performing a wet etching process and/or exposing the structure of FIG. 11 to one or more etchants. The patterning process removes a part of the ILD structure 120 to thereby define the air volume 113. In addition, the patterning process removes the first dielectric layer 104a, the second dielectric layer 104c, and the third dielectric layer 104d from above and below the particle filter 106. After the patterning process is performed, a removal process is performed to remove the upper mask layer and the lower mask layer (1102, 1104 in FIG. 11). During the etching process, the particulate filter 106 is released and can be moved by the etchant and/or by the movement of the MEMS microphone. The support structure 105 restricts the movement of the particle filter 106 to prevent damage to the particle filter 106 (for example, to prevent the particle filter 106 from contacting the first back plate 108).

如圖13的剖視圖1300中所示，將MEMS麥克風100結合到封裝401的前側結構401a。在一些實施例中，結合製程可例 如為熔合結合製程、或者另一種合適的結合製程。支撐結構會增加結構支撐和/或限制顆粒過濾器106的移動，從而防止在前述結合製程期間對顆粒過濾器106的損壞。此外，在執行結合製程之後，將電接觸件114、116、118打線結合到CMOS IC晶粒402。此外，在打線結合製程之後，在前側結構401a之上形成外殼結構401b，從而界定空腔403。在一些實施例中，封裝401的開口(即入口)可為MEMS麥克風100的載體基底開口101，以使得任何進入或離開空腔403的空氣都經過顆粒過濾器106。 As shown in the cross-sectional view 1300 of FIG. 13, the MEMS microphone 100 is bonded to the front structure 401 a of the package 401. In some embodiments, the combination process can be Such as fusion bonding process, or another suitable bonding process. The supporting structure will increase the structural support and/or restrict the movement of the particulate filter 106, thereby preventing damage to the particulate filter 106 during the aforementioned bonding process. In addition, after performing the bonding process, the electrical contacts 114, 116, 118 are wire-bonded to the CMOS IC die 402. In addition, after the wire bonding process, a shell structure 401b is formed on the front side structure 401a, thereby defining a cavity 403. In some embodiments, the opening (ie, the inlet) of the package 401 may be the carrier substrate opening 101 of the MEMS microphone 100 so that any air entering or leaving the cavity 403 passes through the particle filter 106.

在一些實施例中，由於在圖6到圖12的處理步驟期間，第一介電層104a及第二介電層104c環繞顆粒過濾器層104b，因此顆粒過濾器層104b被保護免受由於圖6到圖12的處理步驟而產生的顆粒和/或造成的損壞。因此，在圖6到圖12的處理步驟期間，顆粒不會聚集在顆粒過濾器層104b周圍和/或顆粒過濾器層104b上，從而增加顆粒過濾器106阻止顆粒到達膜片110的能力。在又一些實施例中，由於顆粒過濾器106通過圖12的濕式蝕刻製程被釋放，因此可減輕對顆粒過濾器106的損壞。舉例來說，在再一些實施例中，如果顆粒過濾器106通過乾式蝕刻製程被釋放，則顆粒過濾器106可能更容易收集顆粒和/或具有結構損壞，從而降低顆粒過濾器106的性能。 In some embodiments, since the first dielectric layer 104a and the second dielectric layer 104c surround the particle filter layer 104b during the processing steps of FIGS. 6 to 12, the particle filter layer 104b is protected from Particles and/or damage caused by the processing steps from 6 to 12. Therefore, during the processing steps of FIGS. 6-12, particles will not accumulate around and/or on the particle filter layer 104b, thereby increasing the ability of the particle filter 106 to prevent particles from reaching the diaphragm 110. In still other embodiments, since the particulate filter 106 is released through the wet etching process of FIG. 12, damage to the particulate filter 106 can be reduced. For example, in still other embodiments, if the particle filter 106 is released through a dry etching process, the particle filter 106 may more easily collect particles and/or have structural damage, thereby reducing the performance of the particle filter 106.

圖14示出根據一些實施例的形成具有顆粒過濾器及支撐結構的MEMS麥克風的方法1400。儘管方法1400被示出和/或闡述為一系列動作或事件，然而應理解，所述方法並非僅限於所示次序或動作。因此，在一些實施例中，所述動作可以與所示不同的次序施行和/或可同時施行。此外，在一些實施例中，所示的動 作或事件可被細分為多個動作或事件，所述多個動作或事件可在單獨的時間施行或者與其他動作或子動作同時施行。在一些實施例中，可省略一些示出的動作或事件，且可包括其他未示出的動作或事件。 FIG. 14 shows a method 1400 of forming a MEMS microphone with a particle filter and a support structure according to some embodiments. Although the method 1400 is shown and/or described as a series of actions or events, it should be understood that the method is not limited to the order or actions shown. Therefore, in some embodiments, the actions may be performed in a different order than shown and/or may be performed simultaneously. In addition, in some embodiments, the action shown Actions or events can be subdivided into multiple actions or events, which can be performed at a single time or simultaneously with other actions or sub-actions. In some embodiments, some actions or events shown may be omitted, and other actions or events not shown may be included.

在動作1402處，在犧牲載體基底之上形成MEMS結構。MEMS結構包括第一背板、第二背板及設置在第一背板與第二背板之間的膜片。圖5示出與動作1402的一些實施例對應的剖視圖500。 At act 1402, a MEMS structure is formed on the sacrificial carrier substrate. The MEMS structure includes a first back plate, a second back plate, and a diaphragm arranged between the first back plate and the second back plate. FIG. 5 shows a cross-sectional view 500 corresponding to some embodiments of act 1402.

在動作1404處，提供載體基底，且在載體基底之上形成過濾器堆疊。過濾器堆疊包括一個或多個介電層及顆粒過濾器層，顆粒過濾器層具有設置在所述一個或多個介電層中的顆粒過濾器。圖6示出與動作1404的一些實施例對應的剖視圖600。 At act 1404, a carrier substrate is provided, and a filter stack is formed on the carrier substrate. The filter stack includes one or more dielectric layers and a particle filter layer, the particle filter layer having a particle filter disposed in the one or more dielectric layers. FIG. 6 shows a cross-sectional view 600 corresponding to some embodiments of act 1404.

在動作1406處，在過濾器堆疊之上形成支撐結構層。圖7示出與動作1406的一些實施例對應的剖視圖700。 At act 1406, a support structure layer is formed over the filter stack. FIG. 7 shows a cross-sectional view 700 corresponding to some embodiments of act 1406.

在動作1408處，將支撐結構層圖案化，從而在支撐結構層中界定支撐結構。圖8示出與動作1408的一些實施例對應的剖視圖800。 At act 1408, the support structure layer is patterned to define the support structure in the support structure layer. FIG. 8 shows a cross-sectional view 800 corresponding to some embodiments of act 1408.

在動作1410處，將支撐結構層結合到MEMS結構。支撐結構設置在膜片與顆粒過濾器之間。圖9示出與動作1410的一些實施例對應的剖視圖900。 At act 1410, the support structure layer is bonded to the MEMS structure. The supporting structure is arranged between the membrane and the particle filter. FIG. 9 shows a cross-sectional view 900 corresponding to some embodiments of act 1410.

在動作1412處，執行移除製程以移除犧牲載體基底。圖10示出與動作1412的一些實施例對應的剖視圖1000。 At act 1412, a removal process is performed to remove the sacrificial carrier substrate. FIG. 10 shows a cross-sectional view 1000 corresponding to some embodiments of act 1412.

在動作1414處，將載體基底圖案化以在顆粒過濾器下方界定載體基底開口(例如，入口)。圖11示出與動作1414的一些 實施例對應的剖視圖1100。 At act 1414, the carrier substrate is patterned to define a carrier substrate opening (e.g., inlet) below the particulate filter. Figure 11 shows some of the actions 1414 A cross-sectional view 1100 corresponding to the embodiment.

在動作1416處，對MEMS結構及過濾器堆疊執行蝕刻製程，從而在第一背板、第二背板及膜片周圍界定空氣體積空間。蝕刻製程從顆粒過濾器移除所述一個或多個介電層。圖12示出與動作1416的一些實施例對應的剖視圖1200。 At act 1416, an etching process is performed on the MEMS structure and the filter stack, thereby defining an air volume space around the first backplate, the second backplate, and the diaphragm. The etching process removes the one or more dielectric layers from the particulate filter. FIG. 12 shows a cross-sectional view 1200 corresponding to some embodiments of act 1416.

在動作1418處，將載體基底結合到封裝的前側結構。圖13示出與動作1418的一些實施例對應的剖視圖1300。 At act 1418, the carrier substrate is bonded to the front side structure of the package. FIG. 13 shows a cross-sectional view 1300 corresponding to some embodiments of act 1418.

因此，在一些實施例中，本公開關於一種包括設置在顆粒過濾器與膜片之間的支撐結構的MEMS麥克風。 Therefore, in some embodiments, the present disclosure relates to a MEMS microphone including a support structure disposed between the particle filter and the diaphragm.

在一些實施例中，本申請提供一種麥克風，所述麥克風包括：載體基底，具有界定載體基底開口的相對的側壁；微機電系統(MEMS)結構，上覆在所述載體基底上，其中所述微機電系統結構包括上覆在所述載體基底開口上的膜片，所述膜片具有界定膜片開口的相對的側壁；顆粒過濾器，設置在所述載體基底與所述微機電系統結構之間，其中多個過濾器開口延伸穿過所述顆粒過濾器；以及支撐結構層，設置在所述顆粒過濾器與所述微機電系統結構之間，其中所述支撐結構層包括支撐結構，所述支撐結構具有在所述載體基底的所述相對的側壁之間在橫向上間隔開的一個或多個段，其中所述支撐結構的所述一個或多個段在所述多個過濾器開口之間在橫向上間隔開。 In some embodiments, the present application provides a microphone including: a carrier substrate having opposite side walls defining an opening of the carrier substrate; a microelectromechanical system (MEMS) structure overlying the carrier substrate, wherein the The MEMS structure includes a diaphragm overlying the opening of the carrier substrate, the diaphragm having opposite side walls that define the opening of the diaphragm; a particle filter is disposed between the carrier substrate and the MEMS structure Between, wherein a plurality of filter openings extend through the particulate filter; and a support structure layer disposed between the particulate filter and the MEMS structure, wherein the support structure layer includes a support structure, so The support structure has one or more sections spaced apart in the lateral direction between the opposing side walls of the carrier substrate, wherein the one or more sections of the support structure open in the plurality of filters Spaced apart in the lateral direction.

在一些實施例中，所述顆粒過濾器包含多晶矽且所述支撐結構包含矽。在一些實施例中，所述膜片、所述顆粒過濾器及所述支撐結構分別包含多晶矽。在一些實施例中，還包括：過濾器堆疊，夾置在所述載體基底與所述支撐結構層之間，其中所述 過濾器堆疊包括介電層及設置在所述介電層內的顆粒過濾器層，其中所述顆粒過濾器是所述顆粒過濾器層的段，且其中所述介電層的內側壁與所述載體基底的所述相對的側壁對齊。在一些實施例中，所述支撐結構的所述一個或多個段具有多個相對的側壁，所述多個相對的側壁界定多個支撐結構開口。在一些實施例中，當從上方觀察時，所述多個支撐結構開口與所述多個過濾器開口具有相同的形狀。在一些實施例中，所述多個支撐結構開口分別上覆在所述多個過濾器開口中的單個過濾器開口上。在一些實施例中，所述支撐結構設置在所述支撐結構層的第一對相對的內側壁與第二對相對的內側壁之間，且其中所述支撐結構層的所述第二對相對的內側壁與所述載體基底的所述相對的側壁對齊。在一些實施例中，所述支撐結構的所述一個或多個段包括第一細長段及第二細長段，其中所述第一細長段在所述支撐結構層的所述第一對相對的內側壁之間連續地延伸，且其中所述第二細長段在所述支撐結構層的所述第二對相對的內側壁之間連續地延伸。 In some embodiments, the particulate filter includes polysilicon and the support structure includes silicon. In some embodiments, the membrane, the particle filter, and the support structure each include polysilicon. In some embodiments, it further includes: a filter stack sandwiched between the carrier substrate and the support structure layer, wherein the The filter stack includes a dielectric layer and a particle filter layer disposed in the dielectric layer, wherein the particle filter is a segment of the particle filter layer, and wherein the inner sidewall of the dielectric layer is The opposite side walls of the carrier substrate are aligned. In some embodiments, the one or more segments of the support structure have a plurality of opposing side walls that define a plurality of support structure openings. In some embodiments, when viewed from above, the plurality of support structure openings and the plurality of filter openings have the same shape. In some embodiments, the plurality of support structure openings respectively overlie a single filter opening of the plurality of filter openings. In some embodiments, the support structure is disposed between a first pair of opposed inner side walls and a second pair of opposed inner side walls of the support structure layer, and wherein the second pair of the support structure layer is opposed to each other. The inner sidewall of the carrier substrate is aligned with the opposite sidewall of the carrier substrate. In some embodiments, the one or more segments of the support structure include a first elongated segment and a second elongated segment, wherein the first elongated segment is opposite to the first pair of the support structure layer The inner side walls continuously extend between the inner side walls, and wherein the second elongated section continuously extends between the second pair of opposite inner side walls of the support structure layer.

在一些實施例中，本申請提供一種微機電系統(MEMS)裝置，所述微機電系統裝置包括：微機電系統結構，沿支撐結構層的上表面設置，其中所述微機電系統結構包括第一背板及在垂直方向上與所述第一背板隔開的膜片；載體基底，位於所述支撐結構層之下，其中所述載體基底具有界定載體基底開口的相對的側壁，其中所述載體基底開口位於所述膜片之下；過濾器堆疊，設置在所述載體基底與所述支撐結構層之間，其中所述過濾器堆疊包括顆粒過濾器層，所述顆粒過濾器層具有顆粒過濾器，其中所述顆粒過濾器包括多個過濾器開口，所述多個過濾器開口延伸 穿過所述顆粒過濾器層且在橫向上位於所述載體基底的所述相對的側壁之間；以及支撐結構，設置在所述過濾器堆疊與所述微機電系統結構之間，其中所述支撐結構是所述支撐結構層的在橫向上位於延伸穿過所述支撐結構層的支撐結構開口之間的段。 In some embodiments, the present application provides a micro-electro-mechanical system (MEMS) device. The micro-electro-mechanical system device includes a micro-electro-mechanical system structure arranged along an upper surface of a supporting structure layer, wherein the micro-electro-mechanical system structure includes a first A backing plate and a membrane separated from the first backing plate in a vertical direction; a carrier substrate located under the supporting structure layer, wherein the carrier substrate has opposite side walls defining openings of the carrier substrate, wherein the The carrier substrate opening is located under the membrane; the filter stack is arranged between the carrier substrate and the support structure layer, wherein the filter stack includes a particle filter layer, the particle filter layer having particles Filter, wherein the particulate filter includes a plurality of filter openings, the plurality of filter openings extending Passing through the particle filter layer and located between the opposing side walls of the carrier substrate in the lateral direction; and a support structure disposed between the filter stack and the microelectromechanical system structure, wherein the The support structure is a section of the support structure layer located between support structure openings extending through the support structure layer in the lateral direction.

在一些實施例中，所述顆粒過濾器包括下部顆粒過濾器層、上部顆粒過濾器層及設置在所述上部顆粒過濾器層與所述下部顆粒過濾器層之間的中間顆粒過濾器層，其中所述上部顆粒過濾器層及所述下部顆粒過濾器層包含氮化矽，且其中所述中間顆粒過濾器層及所述支撐結構包含多晶矽。在一些實施例中，所述支撐結構的厚度大於所述顆粒過濾器的厚度。在一些實施例中，所述載體基底的厚度大於所述支撐結構的厚度。在一些實施例中，當從上方觀察時，所述支撐結構開口分別具有與所述過濾器開口不同的形狀。在一些實施例中，所述支撐結構開口具有多邊形形狀且所述過濾器開口具有圓形形狀。在一些實施例中，所述過濾器堆疊包括介電層，其中所述顆粒過濾器層設置在所述介電層中，其中所述介電層的內側壁與所述載體基底的所述相對的側壁對齊，且其中所述支撐結構層的內側壁與所述介電層的所述內側壁對齊。 In some embodiments, the particle filter includes a lower particle filter layer, an upper particle filter layer, and an intermediate particle filter layer disposed between the upper particle filter layer and the lower particle filter layer, The upper particulate filter layer and the lower particulate filter layer include silicon nitride, and the middle particulate filter layer and the support structure include polysilicon. In some embodiments, the thickness of the support structure is greater than the thickness of the particle filter. In some embodiments, the thickness of the carrier substrate is greater than the thickness of the support structure. In some embodiments, when viewed from above, the support structure openings have different shapes from the filter openings. In some embodiments, the support structure opening has a polygonal shape and the filter opening has a circular shape. In some embodiments, the filter stack includes a dielectric layer, wherein the particle filter layer is disposed in the dielectric layer, and wherein the inner sidewall of the dielectric layer is opposite to the carrier substrate. The sidewalls of the support structure layer are aligned with the inner sidewalls of the dielectric layer.

在一些實施例中，本申請提供一種製造微機電系統(MEMS)裝置的方法，所述方法包括：在犧牲基底之上形成微機電系統結構，所述微機電系統結構包括可移動膜片；在載體基底之上形成過濾器堆疊，其中所述過濾器堆疊包括一個或多個介電層及設置在所述一個或多個介電層中的顆粒過濾器層，所述顆粒過濾器層具有顆粒過濾器；在所述過濾器堆疊之上形成支撐結構 層；將所述支撐結構層圖案化，以在所述支撐結構層中界定支撐結構，其中所述支撐結構具有一個或多個段；將所述支撐結構層結合到所述微機電系統結構；以及將所述載體基底圖案化以界定載體基底開口，其中所述支撐結構的所述一個或多個段在所述載體基底的界定所述載體基底開口的相對的側壁之間在橫向上間隔開。 In some embodiments, the present application provides a method of manufacturing a microelectromechanical system (MEMS) device, the method comprising: forming a microelectromechanical system structure on a sacrificial substrate, the microelectromechanical system structure including a movable diaphragm; A filter stack is formed on the carrier substrate, wherein the filter stack includes one or more dielectric layers and a particle filter layer disposed in the one or more dielectric layers, the particle filter layer having particles Filter; forming a support structure above the filter stack Layer; patterning the support structure layer to define a support structure in the support structure layer, wherein the support structure has one or more segments; bonding the support structure layer to the MEMS structure; And patterning the carrier substrate to define a carrier substrate opening, wherein the one or more segments of the support structure are laterally spaced apart between opposing side walls of the carrier substrate that define the carrier substrate opening .

在一些實施例中，形成所述支撐結構層包括：將所述支撐結構層熔合結合到所述過濾器堆疊；以及對所述支撐結構層執行機械研磨製程，以將所述支撐結構層的厚度減小到小於所述載體基底的厚度，其中所述支撐結構層包含矽且所述顆粒過濾器包含多晶矽。在一些實施例中，形成所述支撐結構層包括：通過化學氣相沉積製程在所述過濾器堆疊的上表面上沉積所述支撐結構層，其中所述支撐結構層及所述顆粒過濾器分別包含多晶矽。在一些實施例中，形成所述過濾器堆疊包括：在所述載體基底之上形成第一介電層；在所述第一介電層之上形成所述顆粒過濾器層；將所述顆粒過濾器層圖案化，以界定所述顆粒過濾器；在所述顆粒過濾器層之上形成第二介電層；以及在所述第二介電層之上形成第三介電層，其中在形成所述第一介電層及所述顆粒過濾器層之後，執行退火製程，其中在形成所述第二介電層及所述第三介電層之後，執行平坦化製程，其中所述第一介電層、所述第二介電層及所述第三介電層分別包含氧化物，且其中所述顆粒過濾器層包含多晶矽。 In some embodiments, forming the support structure layer includes: fusion bonding the support structure layer to the filter stack; and performing a mechanical grinding process on the support structure layer to reduce the thickness of the support structure layer Reduced to less than the thickness of the carrier substrate, wherein the support structure layer includes silicon and the particulate filter includes polysilicon. In some embodiments, forming the support structure layer includes: depositing the support structure layer on the upper surface of the filter stack by a chemical vapor deposition process, wherein the support structure layer and the particle filter are respectively Contains polysilicon. In some embodiments, forming the filter stack includes: forming a first dielectric layer on the carrier substrate; forming the particle filter layer on the first dielectric layer; The filter layer is patterned to define the particulate filter; a second dielectric layer is formed on the particulate filter layer; and a third dielectric layer is formed on the second dielectric layer, wherein After forming the first dielectric layer and the particle filter layer, an annealing process is performed, wherein after forming the second dielectric layer and the third dielectric layer, a planarization process is performed, wherein the first A dielectric layer, the second dielectric layer, and the third dielectric layer each include oxide, and the particle filter layer includes polysilicon.

以上概述了若干實施例的特徵，以使所屬領域中的技術人員可更好地理解本公開的各個方面。所屬領域中的技術人員應 理解，他們可容易地使用本公開作為設計或修改其他製程及結構的基礎來施行與本文中所介紹的實施例相同的目的和/或實現與本文中所介紹的實施例相同的優點。所屬領域中的技術人員還應認識到，這些等效構造並不背離本公開的精神及範圍，而且他們可在不背離本公開的精神及範圍的條件下在本文中作出各種改變、代替及變更。 The features of several embodiments have been summarized above, so that those skilled in the art can better understand various aspects of the present disclosure. Those skilled in the field should It is understood that they can easily use the present disclosure as a basis for designing or modifying other processes and structures to perform the same purposes and/or achieve the same advantages as the embodiments described herein. Those skilled in the art should also realize that these equivalent constructions do not depart from the spirit and scope of the present disclosure, and they can make various changes, substitutions and alterations in this article without departing from the spirit and scope of the present disclosure. .

100:微機電系統(MEMS)麥克風 100: Microelectromechanical system (MEMS) microphone

101:載體基底開口 101: Carrier base opening

102:MEMS結構 102: MEMS structure

103:載體基底 103: carrier substrate

104:過濾器堆疊 104: filter stack

104a:第一介電層 104a: first dielectric layer

104b:顆粒過濾器層 104b: Particle filter layer

105:支撐結構 105: support structure

105os:支撐結構開口 105os: Support structure opening

106:顆粒過濾器 106: Particulate filter

107:過濾器開口 107: filter opening

108:第一背板 108: first backplane

109:膜片開口 109: diaphragm opening

110:膜片 110: diaphragm

111:支撐結構層 111: supporting structure layer

112:第二背板 112: second backplane

113:空氣體積空間 113: Air volume space

114、116、118:電接觸件 114, 116, 118: electrical contacts

120:層間介電(ILD)結構 120: Interlayer dielectric (ILD) structure

122:導通孔 122: Via

124:導電線 124: Conductive thread

140:水平線 140: horizontal line

A-A’:切割線 A-A’: Cutting line

Claims (10)

一種麥克風，包括：載體基底，具有界定載體基底開口的相對的側壁；微機電系統結構，上覆在所述載體基底上，其中所述微機電系統結構包括上覆在所述載體基底開口上的膜片，所述膜片具有界定膜片開口的相對的側壁；顆粒過濾器，設置在所述載體基底與所述微機電系統結構之間，其中多個過濾器開口延伸穿過所述顆粒過濾器；以及支撐結構層，設置在所述顆粒過濾器與所述微機電系統結構之間，其中所述支撐結構層包括支撐結構，所述支撐結構具有在所述載體基底的所述相對的側壁之間在橫向上間隔開的一個或多個段，其中所述支撐結構的所述一個或多個段在所述多個過濾器開口之間在橫向上間隔開。 A microphone includes: a carrier substrate with opposite sidewalls defining an opening of the carrier substrate; a microelectromechanical system structure overlying the carrier substrate, wherein the microelectromechanical system structure includes a carrier substrate overlying the opening of the carrier substrate A membrane, the membrane has opposing side walls that define openings of the membrane; a particle filter is disposed between the carrier substrate and the MEMS structure, wherein a plurality of filter openings extend through the particle filter And a support structure layer disposed between the particle filter and the MEMS structure, wherein the support structure layer includes a support structure, the support structure having the opposite side walls of the carrier substrate One or more sections spaced apart in the transverse direction therebetween, wherein the one or more sections of the support structure are spaced apart in the transverse direction between the plurality of filter openings. 如申請專利範圍第1項所述的麥克風，其中所述顆粒過濾器包含多晶矽且所述支撐結構包含矽。 The microphone according to claim 1, wherein the particle filter includes polysilicon and the support structure includes silicon. 如申請專利範圍第1項所述的麥克風，其中所述膜片、所述顆粒過濾器及所述支撐結構分別包含多晶矽。 The microphone according to claim 1, wherein the diaphragm, the particle filter and the support structure each comprise polysilicon. 如申請專利範圍第1項所述的麥克風，更包括：過濾器堆疊，夾置在所述載體基底與所述支撐結構層之間，其中所述過濾器堆疊包括介電層及設置在所述介電層內的顆粒過濾器層，其中所述顆粒過濾器是所述顆粒過濾器層的段，且其中所述介電層的內側壁與所述載體基底的所述相對的側壁對齊。 The microphone described in item 1 of the scope of the patent application further includes: a filter stack sandwiched between the carrier substrate and the support structure layer, wherein the filter stack includes a dielectric layer and is arranged on the A particulate filter layer within a dielectric layer, wherein the particulate filter is a segment of the particulate filter layer, and wherein the inner sidewall of the dielectric layer is aligned with the opposite sidewall of the carrier substrate. 如申請專利範圍第1項所述的麥克風，其中所述支撐結構設置在所述支撐結構層的第一對相對的內側壁與第二對相對的 內側壁之間，且其中所述支撐結構層的所述第二對相對的內側壁與所述載體基底的所述相對的側壁對齊。 The microphone described in item 1 of the scope of patent application, wherein the supporting structure is arranged on the first pair of opposite inner side walls and the second pair of opposite inner side walls of the supporting structure layer Between the inner side walls, and wherein the second pair of opposite inner side walls of the support structure layer are aligned with the opposite side walls of the carrier substrate. 一種微機電系統裝置，包括：微機電系統結構，沿支撐結構層的上表面設置，其中所述微機電系統結構包括第一背板及在垂直方向上與所述第一背板隔開的膜片；載體基底，位於所述支撐結構層之下，其中所述載體基底具有界定載體基底開口的相對的側壁，其中所述載體基底開口位於所述膜片之下；過濾器堆疊，設置在所述載體基底與所述支撐結構層之間，其中所述過濾器堆疊包括顆粒過濾器層，所述顆粒過濾器層具有顆粒過濾器，其中所述顆粒過濾器包括多個過濾器開口，所述多個過濾器開口延伸穿過所述顆粒過濾器層且在橫向上位於所述載體基底的所述相對的側壁之間；以及支撐結構，設置在所述過濾器堆疊與所述微機電系統結構之間，其中所述支撐結構是所述支撐結構層的在橫向上位於延伸穿過所述支撐結構層的支撐結構開口之間的段。 A micro-electro-mechanical system device includes: a micro-electro-mechanical system structure arranged along the upper surface of a supporting structure layer, wherein the micro-electro-mechanical system structure includes a first back plate and a film spaced apart from the first back plate in a vertical direction A sheet; a carrier substrate located under the support structure layer, wherein the carrier substrate has opposite sidewalls defining a carrier substrate opening, wherein the carrier substrate opening is located under the membrane; a filter stack is arranged in the Between the carrier substrate and the support structure layer, wherein the filter stack includes a particle filter layer, the particle filter layer has a particle filter, wherein the particle filter includes a plurality of filter openings, the A plurality of filter openings extending through the particle filter layer and located between the opposite side walls of the carrier substrate in the lateral direction; and a support structure disposed between the filter stack and the MEMS structure , Wherein the support structure is a section of the support structure layer that is located between the support structure openings extending through the support structure layer in the lateral direction. 如申請專利範圍第6項所述的微機電系統裝置，其中所述顆粒過濾器包括下部顆粒過濾器層、上部顆粒過濾器層及設置在所述上部顆粒過濾器層與所述下部顆粒過濾器層之間的中間顆粒過濾器層，其中所述上部顆粒過濾器層及所述下部顆粒過濾器層包含氮化矽，且其中所述中間顆粒過濾器層及所述支撐結構包含多晶矽。 The micro-electromechanical system device described in item 6 of the scope of patent application, wherein the particle filter includes a lower particle filter layer, an upper particle filter layer, and is arranged on the upper particle filter layer and the lower particle filter An intermediate particulate filter layer between layers, wherein the upper particulate filter layer and the lower particulate filter layer comprise silicon nitride, and wherein the intermediate particulate filter layer and the support structure comprise polysilicon. 如申請專利範圍第6項所述的微機電系統裝置，其中所 述支撐結構的厚度大於所述顆粒過濾器的厚度。 As the MEMS device described in item 6 of the scope of patent application, the The thickness of the support structure is greater than the thickness of the particle filter. 一種微機電系統裝置的製造方法，所述方法包括：在犧牲基底之上形成微機電系統結構，所述微機電系統結構包括能夠移動的膜片；在載體基底之上形成過濾器堆疊，其中所述過濾器堆疊包括一個或多個介電層及設置在所述一個或多個介電層中的顆粒過濾器層，所述顆粒過濾器層具有顆粒過濾器；在所述過濾器堆疊之上形成支撐結構層；將所述支撐結構層圖案化，以在所述支撐結構層中界定支撐結構，其中所述支撐結構具有一個或多個段；將所述支撐結構層結合到所述微機電系統結構；以及將所述載體基底圖案化以界定載體基底開口，其中所述支撐結構的所述一個或多個段在所述載體基底的界定所述載體基底開口的相對的側壁之間在橫向上間隔開。 A method for manufacturing a microelectromechanical system device, the method comprising: forming a microelectromechanical system structure on a sacrificial substrate, the microelectromechanical system structure including a movable membrane; forming a filter stack on a carrier substrate, wherein The filter stack includes one or more dielectric layers and a particle filter layer disposed in the one or more dielectric layers, the particle filter layer having a particle filter; on the filter stack Forming a support structure layer; patterning the support structure layer to define a support structure in the support structure layer, wherein the support structure has one or more segments; bonding the support structure layer to the MEMS System structure; and patterning the carrier substrate to define a carrier substrate opening, wherein the one or more segments of the support structure are in the transverse direction between opposite side walls of the carrier substrate that define the carrier substrate opening Spaced on. 如申請專利範圍第9項所述的微機電系統裝置的製造方法，其中形成所述支撐結構層包括：將所述支撐結構層熔合結合到所述過濾器堆疊；以及對所述支撐結構層執行機械研磨製程，以將所述支撐結構層的厚度減小到小於所述載體基底的厚度，其中所述支撐結構層包含矽且所述顆粒過濾器包含多晶矽。 The method for manufacturing a microelectromechanical system device according to claim 9, wherein forming the support structure layer includes: fusing and bonding the support structure layer to the filter stack; and performing on the support structure layer The mechanical grinding process reduces the thickness of the support structure layer to less than the thickness of the carrier substrate, wherein the support structure layer includes silicon and the particle filter includes polysilicon.
TW108139396A 2019-08-16 2019-10-31 Microphone, mems device and method for manufacturing the same TWI713372B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/542,489 US10968097B2 (en) 2019-08-16 2019-08-16 Support structure for MEMS device with particle filter
US16/542,489 2019-08-16

Publications (2)

Publication Number Publication Date
TWI713372B true TWI713372B (en) 2020-12-11
TW202110206A TW202110206A (en) 2021-03-01

Family

ID=74568324

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108139396A TWI713372B (en) 2019-08-16 2019-10-31 Microphone, mems device and method for manufacturing the same

Country Status (3)

Country Link
US (2) US10968097B2 (en)
CN (1) CN112390223B (en)
TW (1) TWI713372B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10526196B2 (en) * 2017-11-08 2020-01-07 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device structure
US10941034B1 (en) * 2019-08-16 2021-03-09 Taiwan Semiconductor Manufacturing Co., Ltd. Particle filter for MEMS device
US11274037B2 (en) 2019-10-30 2022-03-15 Taiwan Semiconductor Manufacturing Co., Ltd. Dual micro-electro mechanical system and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2566183A1 (en) * 2011-09-02 2013-03-06 Saati S.p.A. MEMS microphone with a built-in textile material protecting screen
US8447057B2 (en) * 2011-03-18 2013-05-21 Analog Devices, Inc. Packages and methods for packaging MEMS microphone devices
US20150060955A1 (en) * 2013-09-03 2015-03-05 Windtop Technology Corp. Integrated mems microphone with mechanical electrical isolation
TW201918080A (en) * 2017-10-30 2019-05-01 台灣積體電路製造股份有限公司 Integrated microphone device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103347808B (en) * 2011-12-29 2016-02-10 歌尔声学股份有限公司 Silica-based MEMS microphone, the system comprising this microphone and encapsulation
US9078063B2 (en) * 2012-08-10 2015-07-07 Knowles Electronics, Llc Microphone assembly with barrier to prevent contaminant infiltration
US9469527B2 (en) * 2013-03-14 2016-10-18 Taiwan Semiconductor Manufacturing Company, Ltd. MEMS pressure sensor and microphone devices having through-vias and methods of forming same
US9240392B2 (en) 2014-04-09 2016-01-19 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co., Ltd. Method for fabricating embedded chips
CN105448648B (en) 2014-07-30 2018-09-25 北大方正集团有限公司 A kind of wafer track method
US9676606B2 (en) * 2015-04-29 2017-06-13 Taiwan Semiconductor Manufacturing Co., Ltd. Microelectromechanical systems (MEMS) structure to prevent stiction after a wet cleaning process
US9565488B2 (en) * 2015-05-20 2017-02-07 Infineon Technologies Ag Micro-electro-mechanical system devices
US10149032B2 (en) * 2017-01-30 2018-12-04 Apple Inc. Integrated particle and light filter for MEMS device
GB201708348D0 (en) * 2017-04-28 2017-07-12 Cirrus Logic Int Semiconductor Ltd MEMS devices and processes
WO2018223389A1 (en) 2017-06-09 2018-12-13 Goertek. Inc A mems microphone, a manufacturing method thereof and an electronic apparatus
GB2563461B (en) * 2017-06-16 2021-11-10 Cirrus Logic Int Semiconductor Ltd Transducer packaging
DE102017115405B3 (en) * 2017-07-10 2018-12-20 Epcos Ag MEMS microphone with improved particle filter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8447057B2 (en) * 2011-03-18 2013-05-21 Analog Devices, Inc. Packages and methods for packaging MEMS microphone devices
EP2566183A1 (en) * 2011-09-02 2013-03-06 Saati S.p.A. MEMS microphone with a built-in textile material protecting screen
US20150060955A1 (en) * 2013-09-03 2015-03-05 Windtop Technology Corp. Integrated mems microphone with mechanical electrical isolation
TW201918080A (en) * 2017-10-30 2019-05-01 台灣積體電路製造股份有限公司 Integrated microphone device

Also Published As

Publication number Publication date
US11807521B2 (en) 2023-11-07
CN112390223B (en) 2024-07-30
CN112390223A (en) 2021-02-23
TW202110206A (en) 2021-03-01
US20210047176A1 (en) 2021-02-18
US20210238030A1 (en) 2021-08-05
US10968097B2 (en) 2021-04-06

Similar Documents

Publication Publication Date Title
TWI718729B (en) Microphone, microelectromechanical systems device and method for manufacturing thereof
TWI713372B (en) Microphone, mems device and method for manufacturing the same
US11407636B2 (en) Inter-poly connection for parasitic capacitor and die size improvement
US9452920B2 (en) Microelectromechanical system device with internal direct electric coupling
CN106241727A (en) Semiconductor structure and manufacture method thereof
US11317219B2 (en) Method for manufacturing a thin filtering membrane and an acoustic transducer device including the filtering membrane
US10508021B2 (en) Microelectromechanical systems (MEMS) structure to prevent stiction after a wet cleaning process
US8252695B2 (en) Method for manufacturing a micro-electromechanical structure
US10766763B2 (en) Sidewall stopper for MEMS device
KR20150105240A (en) Sensor structure for sensing pressure waves and ambient pressure
US9462402B2 (en) Monolithic complementary metal-oxide semiconductor (CMOS)-integrated silicon microphone
TWI733711B (en) Semiconductor structure and manufacturing method thereof
US8502382B2 (en) MEMS and protection structure thereof
US20230382716A1 (en) Mems microphone and mems accelerometer on a single substrate
US11708262B2 (en) Manufacturing method of semiconductor structure
US20220348454A1 (en) Inter-poly connection for parasitic capacitor and die size improvement
KR20210122157A (en) Micro-electro mechanical system and manufacturing method thereof