TWI701655B - Common voltage compensation apparatus and common voltage compensation method applied to display driving circuit - Google Patents
Common voltage compensation apparatus and common voltage compensation method applied to display driving circuit Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
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Abstract
Description
本發明係與顯示器有關,尤其是關於一種應用於顯示驅動電路之公共電壓補償裝置及公共電壓補償方法。The present invention relates to displays, and in particular relates to a common voltage compensation device and a common voltage compensation method applied to a display driving circuit.
請參照圖1至圖5。圖1係繪示傳統的液晶顯示面板架構(LCD panel architecture)的示意圖。圖2至圖3係繪示公共電壓(Common voltage, VCOM)之耦合(Coupling)係直接受到源極驅動器之輸出電壓的影響。圖4A至圖4C係分別繪示顯示面板所顯示之理想的顯示圖樣、出現水平串擾(Crosstalk)的顯示圖樣以及不同資料線(Data line)位置之一實施例。圖5係繪示公共電壓分別被不同資料線扭曲而無法於閘極關閉前恢復至理想電壓值(如圈起處A3及A4所示)的時序圖。Please refer to Figure 1 to Figure 5. FIG. 1 is a schematic diagram showing a traditional LCD panel architecture. Figures 2 to 3 illustrate that the coupling of the common voltage (VCOM) is directly affected by the output voltage of the source driver. 4A to 4C respectively illustrate an embodiment of an ideal display pattern displayed on the display panel, a display pattern showing horizontal crosstalk (Crosstalk), and different data line positions. FIG. 5 shows a timing diagram in which the common voltage is distorted by different data lines and cannot be restored to the ideal voltage value before the gate is turned off (as shown in the circles A3 and A4).
一般而言,為了減少於液晶顯示面板側的公共電壓耦合現象,電路設計者可於顯示驅動電路的公共電壓緩衝電路中加入邏輯運算機制。但由於顯示驅動電路的面積有限,一旦在顯示驅動電路中加入更多的邏輯控制電路及公共電壓緩衝控制電路,勢必造成顯示驅動電路之面積浪費。Generally speaking, in order to reduce the common voltage coupling phenomenon on the side of the liquid crystal display panel, the circuit designer can add a logic operation mechanism to the common voltage buffer circuit of the display driving circuit. However, due to the limited area of the display driving circuit, once more logic control circuits and common voltage buffer control circuits are added to the display driving circuit, the area of the display driving circuit will inevitably be wasted.
此外,面板設計者可透過降低液晶顯示陣列的像素電容值的作法來降低公共電壓的雜訊,或是透過增強公共電壓的驅動能力的作法來抵抗顯示資料的耦合。然而,隨著顯示面板的尺寸愈來愈大,顯示面板設計的複雜度亦隨之提高,導致傳統上採用的降低像素電容值以及增強公共電壓的驅動能力等作法會受到較大的限制,亟待克服。In addition, panel designers can reduce the noise of the common voltage by reducing the pixel capacitance of the liquid crystal display array, or by enhancing the driving capability of the common voltage to resist the coupling of display data. However, as the size of the display panel becomes larger and larger, the complexity of the display panel design also increases. As a result, the traditional methods of reducing the pixel capacitance and enhancing the driving capability of the common voltage will be greatly restricted. get over.
有鑑於此,本發明提出一種應用於顯示驅動電路之公共電壓補償裝置及公共電壓補償方法,以有效解決先前技術所遭遇到之上述問題。In view of this, the present invention proposes a common voltage compensation device and a common voltage compensation method applied to a display driving circuit to effectively solve the above-mentioned problems encountered in the prior art.
根據本發明之一具體實施例為一種公共電壓補償裝置。於此實施例中,公共電壓補償裝置係應用於顯示驅動電路。顯示驅動電路包含接收單元及鎖存單元。接收單元接收複數個輸入資料並將該複數個輸入資料傳送至鎖存單元。公共電壓補償裝置包含判斷單元及補償單元。判斷單元耦接至接收單元與鎖存單元之間,用以根據該複數個輸入資料判斷是否需對耦合的公共電壓進行補償。補償單元耦接至判斷單元,用以根據判斷單元之判斷結果選擇性地對耦合的公共電壓進行補償,以產生補償後公共電壓。A specific embodiment according to the present invention is a common voltage compensation device. In this embodiment, the common voltage compensation device is applied to the display driving circuit. The display driving circuit includes a receiving unit and a latch unit. The receiving unit receives a plurality of input data and transmits the plurality of input data to the latch unit. The common voltage compensation device includes a judgment unit and a compensation unit. The judging unit is coupled between the receiving unit and the latch unit for judging whether to compensate the coupled common voltage according to the plurality of input data. The compensation unit is coupled to the judgment unit, and is used for selectively compensating the coupled common voltage according to the judgment result of the judgment unit to generate a compensated common voltage.
於一實施例中,若判斷單元之判斷結果為是,補償單元對耦合的公共電壓行補償,以產生補償後公共電壓;若判斷單元之判斷結果為否,補償單元不會對耦合的公共電壓進行補償。In one embodiment, if the judgment result of the judgment unit is yes, the compensation unit compensates the coupled common voltage to generate the compensated common voltage; if the judgment result of the judgment unit is no, the compensation unit will not compensate the coupled common voltage Make compensation.
於一實施例中,公共電壓補償裝置還包含緩衝單元。緩衝單元具有第一輸入端、第二輸入端及輸出端。第一輸入端耦接補償單元且第二輸入端耦接輸出端,並由輸出端輸出補償後共用電壓。In an embodiment, the common voltage compensation device further includes a buffer unit. The buffer unit has a first input terminal, a second input terminal and an output terminal. The first input terminal is coupled to the compensation unit and the second input terminal is coupled to the output terminal, and the output terminal outputs the compensated common voltage.
於一實施例中,顯示驅動電路還包含輸出墊。輸出墊耦接於顯示面板與緩衝單元之輸出端之間,用以輸出補償後共用電壓至顯示面板。In one embodiment, the display driving circuit further includes an output pad. The output pad is coupled between the display panel and the output terminal of the buffer unit for outputting the compensated common voltage to the display panel.
於一實施例中,當補償單元對耦合的公共電壓進行補償時,補償單元係根據該複數個輸入資料產生預充電/預放電電壓(Pre-charging/pre-discharging voltage)並將預充電/預放電電壓與耦合的公共電壓疊加,以產生補償後公共電壓。In an embodiment, when the compensation unit compensates for the coupled common voltage, the compensation unit generates a pre-charging/pre-discharging voltage (Pre-charging/pre-discharging voltage) and pre-charging/pre-discharging voltage according to the plurality of input data. The discharge voltage is superimposed with the coupled common voltage to generate the compensated common voltage.
於一實施例中,預充電/預放電電壓係與耦合的公共電壓彼此反相,且預充電/預放電電壓於時間上係領先於耦合的公共電壓。In one embodiment, the precharge/predischarge voltage and the coupled common voltage are inverse to each other, and the precharge/predischarge voltage is ahead of the coupled common voltage in time.
於一實施例中,顯示驅動電路為源極驅動積體電路。In one embodiment, the display drive circuit is a source drive integrated circuit.
根據本發明之另一具體實施例為一種公共電壓補償方法。於此實施例中,公共電壓補償方法應用於顯示驅動電路。共用電壓補償方法包含下列步驟:Another specific embodiment according to the present invention is a common voltage compensation method. In this embodiment, the common voltage compensation method is applied to the display driving circuit. The common voltage compensation method includes the following steps:
(a)顯示驅動電路接收複數個輸入資料;(a) The display driving circuit receives a plurality of input data;
(b)根據該複數個輸入資料判斷是否需對耦合的公共電壓進行補償;以及(b) Judging whether it is necessary to compensate the coupled common voltage based on the plurality of input data; and
(c)根據步驟(b)之判斷結果選擇性地對耦合的公共電壓進行補償,以產生補償後公共電壓。(c) According to the judgment result of step (b), selectively compensate the coupled common voltage to generate a compensated common voltage.
相較於先前技術,本發明之公共電壓補償裝置及公共電壓補償方法係於顯示驅動電路(源極驅動積體電路)根據其接收到的複數個輸入資料判斷是否需產生與耦合的公共電壓反相且於時間上領先的預充電/預放電電壓訊號來對耦合的公共電壓進行補償,以降低耦合的公共電壓的雜訊。藉此,面板設計者不需透過降低液晶顯示陣列的像素電容值的作法來降低公共電壓的雜訊,亦不需透過增強公共電壓的驅動能力的作法來抵抗顯示資料的耦合,故可大幅降低顯示面板設計的複雜度。Compared with the prior art, the common voltage compensation device and the common voltage compensation method of the present invention are based on the display drive circuit (source drive integrated circuit) according to the multiple input data it receives to determine whether to generate and couple the common voltage The pre-charge/pre-discharge voltage signal leading in time is used to compensate the coupled common voltage to reduce the noise of the coupled common voltage. Therefore, the panel designer does not need to reduce the noise of the common voltage by reducing the pixel capacitance value of the liquid crystal display array, nor does it need to enhance the driving capability of the common voltage to resist the coupling of display data, so it can greatly reduce The complexity of the display panel design.
此外,本發明之公共電壓補償裝置及公共電壓補償方法對耦合的公共電壓進行的補償可根據顯示面板之不同的顯示資料、不同的偏壓設定(Bias setting)及不同的裝置大小控制(Device size control)進行相對應的調整,故可大幅增加進行公共電壓補償時之彈性。In addition, the common voltage compensation device and common voltage compensation method of the present invention can compensate the coupled common voltage according to different display data of the display panel, different bias settings and different device size control (Device size control) to make corresponding adjustments, so the flexibility of common voltage compensation can be greatly increased.
關於本發明之優點與精神可以藉由以下的發明詳述及所附圖式得到進一步的瞭解。The advantages and spirit of the present invention can be further understood from the following detailed description of the invention and the accompanying drawings.
根據本發明之一具體實施例為一種公共電壓補償裝置。於此實施例中,公共電壓補償裝置係應用於顯示驅動電路,例如源極驅動積體電路,但不以此為限。A specific embodiment according to the present invention is a common voltage compensation device. In this embodiment, the common voltage compensation device is applied to a display drive circuit, such as a source drive integrated circuit, but it is not limited to this.
請參照圖6,圖6係繪示此實施例中之公共電壓補償裝置應用於顯示驅動電路的示意圖。Please refer to FIG. 6. FIG. 6 is a schematic diagram showing the common voltage compensation device in this embodiment applied to the display driving circuit.
如圖6所示,顯示驅動電路SD係與顯示面板PL耦接。顯示驅動電路SD包含接收單元RX、鎖存單元LA、位準移位單元LS、數位類比轉換單元DAC以及分別對應於N個通道CH1~CHN之N個緩衝單元BF1~BFN,其中N為正整數。As shown in FIG. 6, the display driving circuit SD is coupled to the display panel PL. The display driving circuit SD includes a receiving unit RX, a latch unit LA, a level shift unit LS, a digital analog conversion unit DAC, and N buffer units BF1~BFN corresponding to N channels CH1~CHN, where N is a positive integer .
接收單元RX耦接至鎖存單元LA。鎖存單元LA耦接至位準移位單元LS。位準移位單元LS耦接至數位類比轉換單元DAC。數位類比轉換單元DAC耦接至N個緩衝單元BF1~BFN之正輸入端+。該N個緩衝單元BF1~BFN之負輸入端-與輸出端彼此耦接。The receiving unit RX is coupled to the latch unit LA. The latch unit LA is coupled to the level shift unit LS. The level shift unit LS is coupled to the digital-to-analog conversion unit DAC. The digital-to-analog conversion unit DAC is coupled to the positive input terminals + of the N buffer units BF1~BFN. The negative input terminals-and output terminals of the N buffer units BF1 ~ BFN are coupled to each other.
當接收單元RX接收到分別對應於該N個通道CH1~CHN之N個輸入資料DAT1~DATN時,接收單元RX將該N個輸入資料DAT1~DATN傳送至鎖存單元LA。接著,由位準移位單元LS對該N個輸入資料DAT1~DATN進行位準移位處理後,再由數位類比轉換單元DAC進行數位訊號轉換為類比訊號之處理後,由該N個緩衝單元BF1~BFN分別透過該N個通道CH1~CHN輸出至顯示面板PL。When the receiving unit RX receives N input data DAT1~DATN corresponding to the N channels CH1~CHN, the receiving unit RX transmits the N input data DAT1~DATN to the latch unit LA. Then, the level shift unit LS performs level shift processing on the N input data DAT1~DATN, and then the digital analog conversion unit DAC converts the digital signal into analog signal processing, and then the N buffer units BF1~BFN are respectively output to the display panel PL through the N channels CH1~CHN.
於此實施例中,公共電壓補償裝置6包含判斷單元60、補償單元62及緩衝單元64。緩衝單元64具有正輸入端+、負輸入端-及輸出端K。判斷單元60耦接至接收單元RX與鎖存單元LA之間。判斷單元60還耦接至補償單元62。補償單元62耦接至緩衝單元64的正輸入端+。緩衝單元64的負輸入端-與輸出端K彼此耦接。緩衝單元64的輸出端K透過輸出墊PAD耦接至顯示面板PL。In this embodiment, the common voltage compensation device 6 includes a
判斷單元60係用以根據該N個輸入資料DAT1~DATN判斷是否需對耦合的公共電壓VCOM進行補償並提供判斷結果JR給補償單元62。補償單元62係用以根據判斷單元60之判斷結果JR選擇性地對耦合的公共電壓VCOM進行補償,以產生補償後公共電壓VCOM’至緩衝單元64的正輸入端+,再由緩衝單元64的輸出端K透過輸出墊PAD將補償後公共電壓VCOM’輸出至顯示面板PL。The
詳細來說,若判斷單元60之判斷結果JR為是,亦即耦合的公共電壓VCOM需進行電壓補償,則補償單元62會對耦合的公共電壓VCOM進行電壓補償,以產生補償後公共電壓VCOM’;若判斷單元60之判斷結果JR為否,亦即耦合的公共電壓VCOM不需進行電壓補償,則步驟S14不會對耦合的公共電壓VCOM進行電壓補償。In detail, if the judgment result JR of the
於實際應用中,當補償單元62對耦合的公共電壓VCOM進行電壓補償時,補償單元62係根據該複數個輸入資料DAT1~DATN產生預充電/預放電電壓PC(如圖7所示),並將預充電/預放電電壓PC與耦合的公共電壓VCOM疊加,以產生補償後公共電壓VCOM’。In practical applications, when the
此外,預充電/預放電電壓PC係與耦合的公共電壓VCOM彼此反相,且預充電/預放電電壓PC於時間上係領先於耦合的公共電壓VCOM。藉此,當預充電/預放電電壓PC與耦合的公共電壓VCOM疊加時,耦合的公共電壓VCOM原本的雜訊大部分會被與其反相的預充電/預放電電壓PC所抵銷,使得補償後公共電壓VCOM’的雜訊大幅降低,故能有效避免顯示面板所顯示之畫面出現水平串擾(Crosstalk)的現象。In addition, the precharge/predischarge voltage PC and the coupled common voltage VCOM are inverse to each other, and the precharge/predischarge voltage PC is ahead of the coupled common voltage VCOM in time. In this way, when the precharge/predischarge voltage PC is superimposed on the coupled common voltage VCOM, most of the original noise of the coupled common voltage VCOM will be offset by the precharge/predischarge voltage PC which is inverted, so that compensation The noise of the rear common voltage VCOM' is greatly reduced, so it can effectively prevent the horizontal crosstalk (Crosstalk) phenomenon of the picture displayed on the display panel.
舉例而言,如圖7所示,當補償單元62對耦合的公共電壓VCOM進行電壓補償時,補償單元62係根據該複數個輸入資料DAT1~DATN產生預充電/預放電電壓PC,並將預充電/預放電電壓PC與耦合的公共電壓VCOM疊加,以產生補償後公共電壓VCOM’。For example, as shown in FIG. 7, when the
接下來,將以時間t1~t4為例進行說明。Next, the time t1~t4 will be taken as an example for description.
於時間t1,顯示驅動電路的輸出電壓VOUT(SD1)及VOUT(SD2)處於低位準,轉換訊號STB由低位準變為高位準。此時,補償單元62所產生的預放電電壓PC的電壓位準開始下降,至於耦合的公共電壓VCOM則仍維持不變。因此,於時間t1至t2的期間,將預充電/預放電電壓PC與耦合的公共電壓VCOM疊加後所產生的補償後公共電壓VCOM’的電壓位準會從理想電壓值VID往下降,而於時間t2達到一低點。At time t1, the output voltages VOUT (SD1) and VOUT (SD2) of the display driving circuit are at a low level, and the conversion signal STB changes from a low level to a high level. At this time, the voltage level of the pre-discharge voltage PC generated by the
於時間t2,轉換訊號STB由高位準變為低位準,顯示驅動電路的輸出電壓VOUT(SD1)及VOUT(SD2)由低位準變為高位準。此時,補償單元62所產生的預放電電壓PC的電壓位準開始從最低點往上升,至於耦合的公共電壓VCOM則會開始出現先往上升然後下降的雜訊。於時間t2至t3的顯示期間DR內,由於耦合的公共電壓VCOM的雜訊大部分可被與其反相的預放電電壓PC所抵銷,因此,將預充電/預放電電壓PC與耦合的公共電壓VCOM疊加後所產生的補償後公共電壓VCOM’的電壓位準會從低點上升至理想電壓值VID後維持於理想電壓值VID,故能有效避免於顯示期間DR內出現水平串擾(Crosstalk)的現象。At time t2, the conversion signal STB changes from a high level to a low level, indicating that the output voltages VOUT (SD1) and VOUT (SD2) of the driving circuit change from a low level to a high level. At this time, the voltage level of the pre-discharge voltage PC generated by the
於時間t3,顯示驅動電路的輸出電壓VOUT(SD1)及VOUT(SD2)處於高位準,轉換訊號STB由低位準變為高位準。此時,補償單元62所產生的預放電電壓PC的電壓位準開始上升,至於耦合的公共電壓VCOM則維持不變。因此,於時間t3至t4的期間,將預充電/預放電電壓PC與耦合的公共電壓VCOM疊加後所產生的補償後公共電壓VCOM’的電壓位準會從理想電壓值VID往上升,而於時間t4達到一高點。At time t3, the output voltages VOUT (SD1) and VOUT (SD2) of the display driving circuit are at a high level, and the conversion signal STB changes from a low level to a high level. At this time, the voltage level of the pre-discharge voltage PC generated by the
至於其餘情形均可依上述實施例類推,故於此不另行贅述。As for the other situations, analogy can be made according to the above-mentioned embodiment, so it will not be repeated here.
根據本發明之另一具體實施例為一種公共電壓補償方法。於此實施例中,公共電壓補償方法應用於顯示驅動電路,例如源極驅動積體電路,但不以此為限。Another specific embodiment according to the present invention is a common voltage compensation method. In this embodiment, the common voltage compensation method is applied to a display drive circuit, such as a source drive integrated circuit, but it is not limited to this.
請參照圖8,圖8係繪示此實施例中之共用電壓補償方法的流程圖。如圖8所示,共用電壓補償方法可包含下列步驟:Please refer to FIG. 8. FIG. 8 shows a flowchart of the common voltage compensation method in this embodiment. As shown in Figure 8, the common voltage compensation method may include the following steps:
步驟S10:顯示驅動電路接收複數個輸入資料;Step S10: the display driving circuit receives a plurality of input data;
步驟S12:根據該複數個輸入資料判斷是否需對耦合的公共電壓進行補償;以及Step S12: Determine whether the coupled common voltage needs to be compensated according to the plurality of input data; and
步驟S14:根據步驟S12之判斷結果選擇性地對耦合的公共電壓進行補償,以產生補償後公共電壓,並將其輸出至顯示面板。Step S14: selectively compensate the coupled common voltage according to the judgment result of step S12 to generate the compensated common voltage, and output it to the display panel.
詳細來說,若步驟S12之判斷結果為是,則步驟S14會對耦合的公共電壓進行補償,以產生補償後公共電壓;若步驟S12之判斷結果為否,則步驟S14不會對該耦合的公共電壓進行補償。In detail, if the judgment result of step S12 is yes, step S14 will compensate the coupled common voltage to generate a compensated common voltage; if the judgment result of step S12 is no, then step S14 will not affect the coupling The common voltage is compensated.
需說明的是,當步驟S14對耦合的公共電壓進行補償時,步驟S14係根據該複數個輸入資料產生預充電/預放電電壓並將預充電/預放電電壓與耦合的公共電壓疊加,以產生補償後公共電壓。It should be noted that when step S14 compensates for the coupled common voltage, step S14 generates a precharge/predischarge voltage according to the plurality of input data and superimposes the precharge/predischarge voltage with the coupled common voltage to generate Common voltage after compensation.
於實際應用中,預充電/預放電電壓係與耦合的公共電壓彼此反相,且預充電/預放電電壓於時間上係領先於耦合的公共電壓。藉此,當預充電/預放電電壓與耦合的公共電壓疊加時,耦合的公共電壓原本的雜訊大部分會被與其反相的預充電/預放電電壓所抵銷,使得補償後公共電壓的雜訊大幅降低,故能有效避免顯示面板所顯示之畫面出現水平串擾(Crosstalk)的現象。In practical applications, the pre-charge/pre-discharge voltage and the coupled common voltage are inverse to each other, and the pre-charge/pre-discharge voltage is ahead of the coupled common voltage in time. Therefore, when the pre-charge/pre-discharge voltage is superimposed on the coupled common voltage, most of the original noise of the coupled common voltage will be offset by the inverse pre-charge/pre-discharge voltage, so that the compensated common voltage is The noise is greatly reduced, so it can effectively avoid the phenomenon of horizontal crosstalk (Crosstalk) in the picture displayed on the display panel.
相較於先前技術,本發明之公共電壓補償裝置及公共電壓補償方法係於顯示驅動電路(源極驅動積體電路)根據其接收到的複數個輸入資料判斷是否需產生與耦合的公共電壓反相且於時間上領先的預充電/預放電電壓訊號來對耦合的公共電壓進行補償,以降低耦合的公共電壓的雜訊。藉此,面板設計者不需透過降低液晶顯示陣列的像素電容值的作法來降低公共電壓的雜訊,亦不需透過增強公共電壓的驅動能力的作法來抵抗顯示資料的耦合,故可大幅降低顯示面板設計的複雜度。Compared with the prior art, the common voltage compensation device and the common voltage compensation method of the present invention are based on the display drive circuit (source drive integrated circuit) according to the multiple input data it receives to determine whether to generate and couple the common voltage The pre-charge/pre-discharge voltage signal leading in time is used to compensate the coupled common voltage to reduce the noise of the coupled common voltage. Therefore, the panel designer does not need to reduce the noise of the common voltage by reducing the pixel capacitance value of the liquid crystal display array, nor does it need to enhance the driving capability of the common voltage to resist the coupling of display data, so it can greatly reduce The complexity of the display panel design.
此外,本發明之公共電壓補償裝置及公共電壓補償方法對耦合的公共電壓進行的補償可根據顯示面板之不同的顯示資料、不同的偏壓設定(Bias setting)及不同的裝置大小控制(Device size control)進行相對應的調整,故可大幅增加進行公共電壓補償時之彈性。In addition, the common voltage compensation device and common voltage compensation method of the present invention can compensate the coupled common voltage according to different display data of the display panel, different bias settings and different device size control (Device size control) to make corresponding adjustments, so the flexibility of common voltage compensation can be greatly increased.
藉由以上較佳具體實施例之詳述,係希望能更加清楚描述本發明之特徵與精神,而並非以上述所揭露的較佳具體實施例來對本發明之範疇加以限制。相反地,其目的是希望能涵蓋各種改變及具相等性的安排於本發明所欲申請之專利範圍的範疇內。Through the detailed description of the preferred embodiments above, it is hoped that the characteristics and spirit of the present invention can be described more clearly, and the scope of the present invention is not limited by the preferred embodiments disclosed above. On the contrary, its purpose is to cover various changes and equivalent arrangements within the scope of the patent application for the present invention.
S10~S14:步驟S10~S14: steps
1:顯示裝置1: display device
PL:顯示面板PL: display panel
PCB:電路板PCB: circuit board
TCON:時序控制器TCON: Timing Controller
PW:電源PW: Power
VCOM:耦合的公共電壓VCOM: coupled common voltage
SD、SD1~SDN:源極驅動積體電路SD, SD1~SDN: source drive integrated circuit
GD、GD1~GDN:閘極驅動積體電路GD, GD1~GDN: Gate drive integrated circuit
DAT:顯示資料DAT: display data
BF1~BF2:緩衝單元BF1~BF2: buffer unit
SW1~SW2:開關單元SW1~SW2: switch unit
CH1~CH2:通道CH1~CH2: Channel
CON:控制單元CON: control unit
VOUT(SD1)~VOUT(SD2):源極驅動積體電路之輸出電壓VOUT(SD1)~VOUT(SD2): The output voltage of the source drive integrated circuit
t1~t4:時間t1~t4: time
GPX:灰色畫素GPX: Gray pixels
BPX:黑色畫素BPX: black pixel
HCT:水平串擾HCT: horizontal crosstalk
DLA~DLB:顯示線DLA~DLB: display line
GX~GY:閘極線GX~GY: gate line
PXB1~PXB2:畫素PXB1~PXB2: pixels
RX:接收單元RX: receiving unit
LA:鎖存單元LA: Latch unit
LS:位準移位單元LS: Level shift unit
DAC:數位類比轉換單元DAC: digital analog conversion unit
BF1~BFN:緩衝單元BF1~BFN: buffer unit
CH1~CHN:通道CH1~CHN: Channel
C:電容C: Capacitance
R:電阻R: resistance
6:公共電壓補償裝置6: Public voltage compensation device
60:判斷單元60: Judgment unit
62:補償單元62: compensation unit
64:緩衝單元64: buffer unit
DAT1~DATN:輸入資料DAT1~DATN: input data
JR:判斷結果JR: Judgment result
VCOM’:補償後公共電壓VCOM’: Common voltage after compensation
PAD:輸出墊PAD: output pad
A1~A4:圈起處A1~A4: circle around
1FM:一幀1FM: One frame
STB:轉換訊號STB: Conversion signal
PC:預充電/預放電電壓PC: precharge/predischarge voltage
DR:顯示期間DR: Display period
VIC:理想電壓值VIC: ideal voltage value
本發明所附圖式說明如下: 圖1係繪示傳統的液晶顯示面板架構的示意圖。 圖2至圖3係繪示公共電壓之耦合係直接受到源極驅動器之輸出電壓的影響。 圖4A至圖4C係分別繪示顯示面板所顯示之理想的顯示圖樣、出現水平串擾的顯示圖樣以及不同資料線位置之一實施例。 圖5係繪示公共電壓分別被不同資料線扭曲而無法於閘極關閉前恢復至理想電壓值的時序圖。 圖6係繪示根據本發明之一較佳具體實施例中之公共電壓補償裝置應用於顯示驅動電路的示意圖。 圖7係繪示本發明的公共電壓補償裝置將預充電/預放電電壓與耦合的公共電壓疊加而產生補償後公共電壓的時序圖。 圖8係繪示本發明之另一較佳具體實施例中之公共電壓補償方法的流程圖。The drawings of the present invention are described as follows: FIG. 1 is a schematic diagram showing the structure of a traditional liquid crystal display panel. Figures 2 to 3 show that the coupling of the common voltage is directly affected by the output voltage of the source driver. 4A to 4C respectively show an embodiment of an ideal display pattern displayed on the display panel, a display pattern with horizontal crosstalk, and different data line positions. FIG. 5 is a timing diagram in which the common voltage is distorted by different data lines and cannot be restored to the ideal voltage value before the gate is turned off. FIG. 6 is a schematic diagram illustrating the application of the common voltage compensation device in a display driving circuit according to a preferred embodiment of the present invention. FIG. 7 is a timing diagram of the common voltage compensation device of the present invention superimposing the precharge/predischarge voltage and the coupled common voltage to generate the compensated common voltage. FIG. 8 is a flowchart of a common voltage compensation method in another preferred embodiment of the present invention.
S10~S14:步驟 S10~S14: steps
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