TWI699084B - Circulating current suppressing method for three-level inverter - Google Patents

Abstract

A circulating current suppressing method for a three-level inverter is disclosed. The circulating current suppressing method shifts a switching state corresponding to a phase command voltage belonging to an intermediate voltage among three-phase command voltages so as to make the switching states corresponding to the intermediate voltage and the phase command voltage with the same polarity as the intermediate voltage not overlap and be connected with each other. Therefore, when the three-phase command voltages are balanced and there is no zero-sequence voltage added into the three-level inverter, the sum of the three-phase instantaneous output voltages output by the three-level inverter is zero, that is, the common-mode voltage generated by the three-level inverter is zero.

Description

Circulating current suppression method applied to three-level inverter

This case belongs to the field of three-level inverters, and especially refers to a circulating current suppression method applied to three-level inverters.

Three-level inverters, such as neutral point clamped (NPC) inverters, are often used for high-power applications, such as converting three-phase AC power to drive loads. If compared with a two-level inverter, the voltage across the switching element of the neutral-point clamp inverter is only half of that of the two-level converter under the same DC link voltage. In addition, the neutral point clamped inverter can output three levels of phase output voltage and five levels of line-to-line output voltage, so it can effectively reduce the harmonic components of the output voltage and current. In three-level inverters, space vector pulse width modulation is commonly used, such as phase disposition pulse width modulation (PDPWM) or phase opposition disposition pulse width modulation (Phase opposition disposition pulse width modulation). ;PODPWM), etc., to control the switching elements of the three-level inverter.

At present, the industry even connects multiple three-level inverters in parallel, that is, users can expand or reduce the number of three-level inverters in parallel according to their needs. This will not only increase the overall capacity, but also in case of failure, Only replace the damaged three-level inverter. However, when multiple three-level inverters are connected in parallel, due to a slight error between the independent three-level inverters, each independent three-level inverter generates different common mode voltages. As a result, This will cause the current of the three-level inverters to not be completely output to the load, but flow between the three-level inverters, and then generate a circulating current phenomenon, which causes the circulation between the three-level inverters The cause of the error is that the pulse width modulation carrier is not synchronized.

Please refer to Figure 1 and Figure 2. Figure 1 shows the three-phase command voltage (Va*, Vb, Vc*) received by the three-level inverter when the three-level inverter uses phase configuration pulse width modulation. ), the generated three-phase output voltage (Va, Vb, Vc) and the timing diagram of the common mode voltage V _CMV . Figure 2 is a three-level inverter using phase configuration pulse width modulation to control the switching element, the switch All possible schematic diagrams of the switching states of the components. When using phase configuration pulse width modulation to control a three-level inverter, the switching elements in the three-level inverter have 25 switching states, as shown in the figure, where the phase configuration pulse width modulation provides upper and lower phase Two triangular waves (hereinafter referred to as the upper carrier wave and the download wave). When the phase command voltage is greater than the upper carrier wave, the phase output voltage of the three-level inverter is positive half the DC terminal voltage of the three-level inverter. The switching state of the switching element of the inverter is marked as (P). When the phase command voltage is between the upper and lower carrier, the phase output voltage of the three-level inverter is zero, and the switching state of the switching element of the three-level inverter is marked as (O). When the phase command voltage is less than the download wave, the phase output voltage of the three-level inverter is negative half of the DC terminal voltage, and the switching state of the switching element of the three-level inverter is marked as (N). The common mode voltage V _{CMV is} defined as the average value of the three-phase output voltage, and when the phase configuration pulse width modulation is used for control, the maximum common mode voltage V _CMV of the three-level inverter is one third of the DC terminal voltage. It can be seen from Figure 1 that when the phase configuration pulse width modulation is used for control, the three-level inverter will have a non-zero common mode voltage V _CMV . Therefore, once the phase configuration pulse width modulation is used to control the multiple three If the tier inverters are connected in parallel, if there is a slight error between the independent three-tier inverters, the three-tier inverters will generate a circulating current phenomenon.

Please refer to Figures 3 and 4. Figure 3 is the three-phase command voltage received by the three-level inverter and the three-phase output generated when the three-level inverter uses the inverted configuration pulse width modulation The timing diagram of voltage and common-mode voltage. Figure 4 is a schematic diagram of all possible switching states of the switching elements when a three-level inverter uses an inverted configuration pulse width modulation to control the switching elements. When the inverted configuration pulse width modulation is used to control the three-level inverter, the switching elements in the three-level inverter have 19 switching states, as shown in the figure, where the inverted configuration pulse width modulation provides 180 Two triangular waves with a high phase difference, in which the switching state of the switching elements of the three-level inverter is generated based on the comparison between the phase command voltage and the carrier wave in the same way as the phase configuration pulse width modulation. When using inverted configuration pulse width modulation for control, the maximum common-mode voltage V _CMV of the three-level inverter is one-sixth of the DC terminal voltage of the three-level inverter. When the pulse width modulation is configured for control, the circulating current generated by each three-level inverter is about half of the circulating current generated by the three-level inverter using the phase configuration pulse width modulation, but the circulating current generated by each three-level inverter is still It is not zero and cannot effectively suppress the occurrence of circulation phenomenon.

It can be seen from the above that whether it is controlled by phase configuration pulse width modulation or reverse configuration pulse width modulation, the three-level inverters all have common mode voltages. In order to make the instantaneous common-mode voltage of each three-level inverter equal and avoid circulating current generation, when multiple three-level inverters are connected in parallel, the current practice is to use each three-level inverter to generate pulse width modulation The carrier of the signal is synchronized so that each three-level inverter maintains the same instantaneous switching state, so that the instantaneous common-mode voltages of the multiple three-level inverters connected in parallel are equal. However, this method requires multiple The three-level inverters have a high-frequency, low-latency mutual communication method. As a result, each three-level inverter will incur additional communication costs.

The purpose of this case is to provide a circulating current suppression method applied to three-level inverters. The circulating current suppression method can make the common mode voltage of the three-level inverters zero, so even if multiple three-level inverters with errors are connected in parallel , The common mode voltage difference between multiple three-level inverters is still zero, so the circulating current can be suppressed to zero, so that multiple three-level inverters connected in parallel can improve the overall stability without increasing additional communication costs. degree.

To achieve the above objective, the broader implementation of this case is to provide a circulating current suppression method, which is applied to a three-level inverter. The three-level inverter has a plurality of switching elements and receives a command voltage including a first phase and a second phase. The three-phase command voltage of the command voltage and the third phase command voltage. The circulating current suppression method includes: (a) providing a carrier and download wave with a phase difference of 180 degrees; (b) command voltage from the first phase and the second phase command voltage And the third phase command voltage is the maximum, minimum, and intermediate values to form the maximum voltage, minimum voltage, and intermediate voltage respectively; (c) Choose a voltage with the same polarity as the intermediate voltage from the maximum voltage and minimum voltage , And added to the intermediate voltage to form a combined voltage; (d) Select a carrier wave with the same polarity as the maximum voltage from the upper carrier wave and the download wave to form the first comparison carrier wave, and compare it with the maximum voltage, where the maximum voltage When it is greater than the first comparison carrier, set the switching state of the switching element corresponding to the maximum voltage to P, when the maximum voltage is less than the first comparison carrier, set the switching state of the switching element corresponding to the maximum voltage to 0; (e) From above Select a carrier with the same polarity as the minimum voltage from the carrier and the download wave to form a second comparison carrier and compare it with the minimum voltage. When the minimum voltage is greater than the second comparison carrier, the switching state of the switching element corresponding to the minimum voltage is set When the minimum voltage is less than the second comparison carrier, set the switching state of the switching element corresponding to the minimum voltage to N; (f) select a voltage with the same polarity as the combined voltage from the maximum voltage and the minimum voltage to form the comparison voltage, And select the same polarity as the combined voltage from the upper carrier and the download wave to form the third comparison carrier, and then when the combined voltage is greater than 0 and the third comparison carrier is between the comparison voltage and the combined voltage, set the corresponding intermediate voltage The switching state of the switching element is P, and when the combined voltage is less than 0 and the third comparison carrier is between the comparison voltage and the combined voltage, the switching state of the switching element corresponding to the intermediate voltage is set to N; and (g) according to step ( The execution results of d), (e), and (f) correspond to a three-phase pulse width modulation signal to control the operation of multiple switching elements of the three-level inverter.

Some typical embodiments embodying the features and advantages of this case will be described in detail in the following description. It should be understood that this case can have various changes in different aspects, which do not deviate from the scope of the case, and the descriptions and diagrams therein are essentially for illustrative purposes, rather than being constructed to limit the case.

Please refer to Fig. 5, Fig. 6 and Fig. 7. Fig. 5 is the step flow chart of the circulation suppression method according to the preferred embodiment of the project, and Fig. 6 is the third application of the circulation suppression method shown in Fig. 5. The circuit structure diagram of the hierarchical inverter, Figure 7 shows the three-phase command voltage received by the three-tier inverter and the three-phase output voltage generated when the circulating current suppression method shown in Figure 5 is applied to the three-tier inverter And the timing diagram of the first aspect of the common mode voltage. As shown in Figures 5, 6, and 7, the circulating current suppression method in this case can be applied to the three-level inverter 1 shown in Figure 6, such as a neutral point clamped inverter, where the three-level inverse Inverter 1 can receive three-phase command voltages (ie first-phase command voltage Va*, second-phase command voltage Vb*, third-phase command voltage Vc*), and the circulating current suppression method in this case will adjust the three-phase command voltage , And then generate a three-phase pulse width modulation signal to control a plurality of switching elements in the three-level inverter 1 to perform state switching, wherein the three-phase pulse width modulation signal is generated according to the space vector pulse width modulation method . Of course, the three-level inverter 1 applied in the circulating current suppression method in this case is not limited to the neutral point clamped inverter shown in Figure 6, and may also be a flying capacitor type inverter. Since the circuit structure of neutral point clamped inverters and flying capacitor inverters and the principle of space vector pulse width modulation are common technologies, they will not be repeated here.

The following will describe the execution steps of the circulating current suppression method of this case. In order to make it easier to understand the technology of this case, the circulating current suppression method of this case will be explained in the situation as illustrated in Figure 7, where Figure 7 illustrates the three-phase command voltage The first-phase command voltage Va*>the second-phase command voltage Vb*>the third-phase command voltage Vc*, and the first-phase command voltage Va* and the second-phase command voltage Vb* have the same polarity and are both greater than zero, the third phase The command voltage Vc* is less than zero and has a different polarity from the first phase command voltage Va* and the second phase command voltage Vb*. The circulation suppression method of this case first executes step S1, which is to provide the upper carrier and the download wave with a phase difference of 180 degrees. Then step S2 is executed, and the three-phase command voltages of the first phase command voltage Va*, the second phase command voltage Vb*, and the third phase command voltage Vc* are the maximum value, the minimum value, and the intermediate value to form Maximum voltage, minimum voltage and intermediate voltage. Taking Figure 7 as an example, since the first phase command voltage Va*>the second phase command voltage Vb*>the third phase command voltage Vc*, the first phase command voltage Va* constitutes the maximum voltage, and the second phase command The voltage Vb* constitutes the intermediate voltage, and the third phase command voltage Vc* constitutes the minimum voltage.

Then, step S3 is performed to select a voltage with the same polarity as the intermediate voltage from the maximum voltage and the minimum voltage, and add it to the intermediate voltage to form a combined voltage. Taking Figure 7 as an example, since the first phase command voltage Va*, which is the maximum voltage, and the second phase command voltage Vb*, which is the intermediate voltage, have the same polarity, in step S3, the first phase command voltage Va* is selected (In Figure 7, the symbol d refers to the voltage value of the phase command voltage added to the intermediate voltage) is added to the second phase command voltage Vb* which is the intermediate voltage to form the combined voltage Vd.

Then, step S4 is performed to select a carrier wave with the same polarity as the maximum voltage from the upper carrier wave and the download wave to form a first comparison carrier wave, and compare it with the maximum voltage to set the switching of the switching element corresponding to the maximum voltage according to the comparison result When the maximum voltage is greater than the first comparison carrier, the switching state of the switching element corresponding to the maximum voltage is set to P, and when the maximum voltage is less than the first comparison carrier, the switching state of the switching element corresponding to the maximum voltage is set to 0 . Taking Figure 7 as an example, since the upper carrier and the first phase command voltage Va* which is the maximum voltage have the same polarity, in step S4, the upper carrier constitutes the first comparison carrier, which is compared with the first phase of the maximum voltage. Phase command voltage Va* comparison. In step S4, it is used to generate the phase pulse width modulation signal of the first phase command voltage Va*.

Then, step S5 is performed to select a carrier wave with the same polarity as the minimum voltage from the upper carrier wave and the download wave to form a second comparison carrier wave, and compare it with the minimum voltage to set the switching element corresponding to the minimum voltage according to the comparison result When the minimum voltage is greater than the second comparison carrier, the switching state of the switching element corresponding to the minimum voltage is set to 0; when the minimum voltage is less than the second comparison carrier, the switching state of the switching element corresponding to the minimum voltage is set to N . Taking Figure 7 as an example, since the download wave and the third phase command voltage Vc* which is the minimum voltage have the same polarity, in step S5, the download wave is used to form the second comparison carrier, which is compared with the third phase of the minimum voltage. Phase command voltage Vc* comparison. In step S5, it is used to generate the phase pulse width modulation signal of the third phase command voltage Vc*.

Then, step S6 is executed to select a voltage with the same polarity as the combined voltage from the maximum voltage and the minimum voltage to form a comparison voltage, and from the upper carrier and the download wave, select the same polarity as the combined voltage to form a third comparison carrier, and then When the combined voltage is greater than 0 and the third comparison carrier is between the comparison voltage and the combined voltage, set the switching state of the switching element corresponding to the intermediate voltage to P, when the combined voltage is less than 0 and the third comparison carrier is between the comparison voltage and the combination Between voltages, set the switching state of the switching element corresponding to the intermediate voltage to N. Taking Figure 7 as an example, since the first phase command voltage Va*, which is the maximum voltage, and the combined voltage Vd have the same polarity, the comparison voltage is formed by the first phase command voltage Va*, which is the maximum voltage. The combined voltage Vd has the same polarity, so the upper carrier forms the third comparison carrier. In step S6, it is used to generate the phase pulse width modulation signal of the second phase command voltage Vb*.

Finally, step S7 is executed, and a three-phase pulse width modulation signal is correspondingly generated according to the execution results of step S4, step S5, and step S6 to control the operation of a plurality of switching elements of the three-level inverter 1. As shown in Figure 7, when the first phase command voltage Va*>the second phase command voltage Vb*>the third phase command voltage Vc* in the three-phase command voltage, and the first phase command voltage Va* and the second phase command voltage Va* When the phase command voltage Vb* has the same polarity and both are greater than zero, and the third phase command voltage Vc* is less than zero but has different polarities from the first phase command voltage Va* and the second phase command voltage Vb*, three-phase pulse width modulation The switching state of the signal-controlled switching element belongs to the three vectors of PON-OPN-OOO (in Figure 7, the switching state of the switching element is PON-OPN-OOO-OPN-PON in order), which is a space vector pulse The width modulation originally had the middle vector and the zero vector (defined as area II in Figure 13) of the two midpoints of the large hexagon among the 27 vectors. In addition, it can be clearly seen from Fig. 7 that the circulating current suppression method in this case shifts the switching state corresponding to the phase command voltage of the intermediate voltage among the three-phase command voltages, so that the intermediate voltage corresponds to the phase command voltage of the same polarity. The switching states of are not overlapped and connected to each other. Therefore, when the three-phase command voltage is balanced and the zero sequence voltage is not added, the sum of the three-phase instantaneous output voltages (Va, Vb, Vc) output by the three-level inverter is zero. That is, the common mode voltage V _CMV generated by the three-level inverter is zero. As a result, when a plurality of three-level inverters are connected in parallel using the circulating current suppression method of this case to increase the overall capacity, because each three-level inverse The common mode voltage V _{CMV of the} converter is zero, so even if the three-phase pulse width modulation carrier waves received by each three-level converter are not synchronized, the common mode voltage V _CMV difference between each other is still zero, so it will not Circulating current occurs in a plurality of three-level inverters connected in parallel. Therefore, the use of the circulating current suppression method in this case to connect a plurality of three-level inverters in parallel can improve the stability of the system without increasing the additional communication cost.

Figure 8 shows the second state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram. In some embodiments, when Figure 8 illustrates that the first phase command voltage Va*>the second phase command voltage Vb*>the third phase command voltage Vc* in the three-phase command voltage, and the third phase command voltage Vc* is equal to When the second-phase command voltage Vb* has the same polarity but both are less than zero, and the first-phase command voltage Va* is greater than zero but has different polarities from the second-phase command voltage Vb* and the third-phase command voltage Vc*, the circulating current suppression method in this case The three-phase pulse width modulation signal generated after execution will control the switching state of the switching element to belong to the three vectors of PON-PNO-OOO, that is, the space vector pulse width modulation originally has 27 vectors. The middle vector and zero vector of the two midpoints of the polygon (defined as zone I in Figure 13).

Figure 9 is the third state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage, and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram. In some embodiments, when Fig. 9 illustrates that the second phase command voltage Vb*> the third phase command voltage Vc*> the first phase command voltage Va* in the three-phase command voltage, and the third phase command voltage Vc* is equal to When the second-phase command voltage Vb* has the same polarity and both are greater than zero, and the first-phase command voltage Va* is less than zero but has different polarities from the second-phase command voltage Vb* and the third-phase command voltage Vc*, the circulating current suppression method in this case The three-phase pulse width modulation signal generated after execution belongs to the three vectors of NPO–NOP–OOO, which is the largest of the 27 vectors in the space vector pulse width modulation. The middle vector and zero vector of the two midpoints of the polygon (defined as zone IV in Figure 13).

Figure 10 shows the fourth state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage, and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram. In some embodiments, when Figure 10 illustrates that the second phase command voltage Vb*> the third phase command voltage Vc*> the first phase command voltage Va* in the three-phase command voltage, and the third phase command voltage Vc* is equal to When the first phase command voltage Va* has the same polarity but both are less than zero, and the second phase command voltage Vb* is greater than zero but has different polarities from the first phase command voltage Va* and the third phase command voltage Vc*, the circulating current suppression method in this case The three-phase pulse width modulation signal generated after execution belongs to the three vectors of NPO-OPN-OOO, which is the largest of the 27 vectors in the original space vector pulse width modulation. The middle vector and zero vector of the two midpoints of the polygon (defined as zone III in Figure 13).

Figure 11 is the fifth state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage, and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram. In some embodiments, when Figure 11 illustrates that the third-phase command voltage Vc*> the first-phase command voltage Va*> the second-phase command voltage Vb* among the three-phase command voltages, and the third-phase command voltage Vc* is equal to When the first phase command voltage Va* has the same polarity but both are greater than zero, the second phase command voltage Vb* is less than zero but has different polarities from the first phase command voltage Va* and the third phase command voltage Vc*, then the circulating current suppression method in this case The three-phase pulse width modulation signal generated after execution belongs to the three vectors of ONP-PNO-OOO, which is the largest of the 27 vectors in the space vector pulse width modulation. The middle vector and zero vector of the two midpoints of the polygon (defined as area VI in Figure 13).

Figure 12 is the sixth state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage, and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram. In some embodiments, when Figure 12 illustrates that the third-phase command voltage Vc*> the first-phase command voltage Va*> the second-phase command voltage Vb* among the three-phase command voltages, and the second-phase command voltage Vb* is equal to When the first phase command voltage Va* has the same polarity but both are less than zero, and the third phase command voltage Vc* is greater than zero but has different polarities from the second phase command voltage Vb* and the first phase command voltage Va*, the circulating current suppression method of this case The three-phase pulse width modulation signal generated after execution belongs to the three vectors of ONP-NOP-OOO, which is the largest of the 27 vectors in the space vector pulse width modulation. The middle vector and zero vector of the two midpoints of the polygon (defined as area V in Figure 13).

Please refer to Fig. 13, which is a schematic diagram of all possible switching states of the switching element when the three-phase pulse width modulation signal generated by the circulating current suppression method of this case is used to control the switching element. It can be seen from the figure that the three-phase pulse width modulation signal generated by the circulating current suppression method in this case can control the possible switching states of the switching element. There are seven kinds of vectors (Figure 13), which are located at the six midpoints of the large hexagon. A middle vector and a zero vector, and are attributed to the first-phase command voltage Va*, the second-phase command voltage Vb*, and the third-phase command voltage Vc* among the three-phase command voltages, which belong to area I in Figure 13~ One of the Ⅵ areas.

In summary, this case provides a circulating current suppression method applied to a three-level inverter. The circulating current suppression method shifts the switching state corresponding to the phase command voltage belonging to the intermediate voltage in the three-phase command voltage, so that the intermediate voltage is the same The switching states corresponding to the phase command voltages of the polarity do not overlap and are connected to each other. Therefore, when the three-phase command voltage is balanced and the zero sequence voltage is not added, the sum of the three-phase instantaneous output voltages output by the three-level inverter is zero. That is, the common mode voltage generated by the three-level inverters is zero. As a result, when a plurality of three-level inverters are connected in parallel using the circulating current suppression method of this case to increase the overall capacity, because each three-level inverter The common mode voltage is zero, so even if the three-phase pulse width modulation carriers received by each three-level converter are not synchronized, the common mode voltage difference between each other is still zero. Circulating current phenomenon occurs in the tiered inverters, so the multiple three-tiered inverters connected in parallel using the circulating current suppression method of this case can improve the stability of the system without increasing the additional communication cost.

S1~S7: Steps of the circulating current suppression method Va*, Vb*, Vc*: Phase command voltage Va, Vb, Vc: Output voltage V _CMV : Common mode voltage Vd: Combined voltage d: Phase command voltage added to the intermediate voltage Voltage

Figure 1 is a timing diagram of the three-phase command voltage received by the three-level inverter, the generated three-phase output voltage, and the common mode voltage when the three-level inverter uses phase configuration pulse width modulation; Figure 2 is a schematic diagram of all possible switching states of the switching elements when the three-level inverter uses phase configuration pulse width modulation to control the switching elements; Figure 3 is a timing diagram of the three-phase command voltage received by the three-level inverter, the generated three-phase output voltage, and the common-mode voltage when the three-level inverter uses the reverse configuration pulse width modulation; Figure 4 is a schematic diagram of all possible switching states of the switching elements when the three-level inverter uses the inverted configuration pulse width modulation to control the switching elements; Figure 5 is a flowchart of the steps of the circulation suppression method of the preferred embodiment of the present invention; Figure 6 is a circuit structure diagram of a three-level inverter applied by the circulating current suppression method shown in Figure 5; Figure 7 is the first state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage, and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram; Figure 8 shows the second state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram; Figure 9 shows the third state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage, and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram; Figure 10 shows the fourth state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram; Figure 11 shows the fifth state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage, and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram; Figure 12 is the sixth state of the three-phase command voltage received by the three-tier inverter, the generated three-phase output voltage, and the common mode voltage when the three-tier inverter uses the circulating current suppression method shown in Figure 5 Such a timing diagram; Figure 13 is a schematic diagram of all possible switching states of the switching element when the three-phase pulse width modulation signal generated by the circulating current suppression method of this case is used to control the switching element.

S1~S7: steps of the circulation suppression method

Claims (9)

A circulating current suppression method, applied to a three-level inverter, the three-level inverter has a plurality of switching elements, and receives a first-phase command voltage, a second-phase command voltage, and a third-phase command voltage A three-phase command voltage, the circulating current suppression method includes: (a) Provide an upper carrier and a lower carrier with a phase difference of 180 degrees; (b) The maximum, minimum, and intermediate values of the first phase command voltage, the second phase command voltage, and the third phase command voltage are respectively constituted as a maximum voltage, a minimum voltage, and an intermediate value. Voltage; (c) Select a voltage with the same polarity as the intermediate voltage from the maximum voltage and the minimum voltage, and add it to the intermediate voltage to form a combined voltage; (d) Select a carrier with the same polarity as the maximum voltage from the upper carrier and the download wave to form a first comparison carrier and compare it with the maximum voltage, wherein when the maximum voltage is greater than the first comparison carrier , Set the switching state of the switching element corresponding to the maximum voltage to P, when the maximum voltage is less than the first comparison carrier, set the switching state of the switching element corresponding to the maximum voltage to 0; (e) Select a carrier with the same polarity as the minimum voltage from the upper carrier and the download wave to form a second comparison carrier, and compare it with the minimum voltage, wherein when the minimum voltage is greater than the second comparison carrier , Set the switching state of the switching element corresponding to the minimum voltage to 0, and when the minimum voltage is less than the second comparison carrier, set the switching state of the switching element corresponding to the minimum voltage to N; (f) Select a voltage with the same polarity as the combined voltage from the maximum voltage and the minimum voltage to form a comparison voltage, and select the voltage with the same polarity as the combined voltage from the upper carrier and the download wave to form a third Compare the carrier, and when the combined voltage is greater than 0 and the third comparison carrier is between the comparison voltage and the combined voltage, set the switching state of the switching element corresponding to the intermediate voltage to P, when the combined voltage is less than 0 and when the third comparison carrier is between the comparison voltage and the combined voltage, the switching state of the switching element corresponding to the intermediate voltage is set to N; and (g) According to the execution results of the steps (d), (e), and (f), a three-phase pulse width modulation signal is correspondingly generated to control the operation of the plurality of switching elements of the three-level inverter. The circulating current suppression method according to claim 1, wherein the three-level inverter is a neutral point clamped inverter. The circulating current suppression method according to claim 1, wherein the three-level inverter is a flying capacitor type inverter. The circulating current suppression method according to claim 1, wherein when the first phase command voltage>the second phase command voltage>the third phase command voltage, the first phase command voltage and the second phase command voltage are both greater than zero , And when the third-phase command voltage is less than zero, the switching state of the switching element corresponding to the three-phase pulse width modulation signal control belongs to the three vectors of PON-OPN-OOO. The circulating current suppression method according to claim 1, wherein when the first phase command voltage>the second phase command voltage>the third phase command voltage, the third phase command voltage and the second phase command voltage are both less than zero , And when the first phase command voltage is greater than zero, the switching state of the switching element corresponding to the three-phase pulse width modulation signal control belongs to the three vectors PON-PNO-OOO. The circulating current suppression method according to claim 1, wherein when the second phase command voltage>the third phase command voltage>the first phase command voltage, the third phase command voltage and the second phase command voltage are both greater than zero , And when the first-phase command voltage is less than zero, the switching state of the switching element corresponding to the three-phase pulse width modulation signal control belongs to the three vectors of NPO-NOP-OOO. The circulating current suppression method according to claim 1, wherein when the second phase command voltage>the third phase command voltage>the first phase command voltage, the third phase command voltage and the first phase command voltage are both less than zero , And when the first-phase command voltage is greater than zero, the switching state of the switching element corresponding to the three-phase pulse width modulation signal control belongs to the three vectors of NPO-OPN-OOO. The circulating current suppression method according to claim 1, wherein when the third phase command voltage>the first phase command voltage>the second phase command voltage, the third phase command voltage and the first phase command voltage are both greater than zero And when the second-phase command voltage is less than zero, the switching state of the switching element corresponding to the three-phase pulse width modulation signal control belongs to the three vectors of ONP-PNO-OOO. The circulating current suppression method according to claim 1, wherein when the third phase command voltage>the first phase command voltage>the second phase command voltage, the second phase command voltage and the first phase command voltage are both less than zero , And when the third-phase command voltage is greater than zero, the switching state of the corresponding switching element controlled by the three-phase pulse width modulation signal belongs to the three vectors of ONP-NOP-OOO.

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