TWI694550B - Method and system for die testing - Google Patents

Method and system for die testing Download PDF

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TWI694550B
TWI694550B TW107130719A TW107130719A TWI694550B TW I694550 B TWI694550 B TW I694550B TW 107130719 A TW107130719 A TW 107130719A TW 107130719 A TW107130719 A TW 107130719A TW I694550 B TWI694550 B TW I694550B
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die
coil
closed loop
electromotive force
pairs
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TW107130719A
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TW202011525A (en
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奚鵬博
林振祺
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友達光電股份有限公司
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Priority to CN201811415461.XA priority patent/CN109585322A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

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  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The present invention provides a method and a system for testing a plurality of dies on a source wafer. The method includes: electrically connecting the positive terminal of each die with the negative terminal thereof using a conductive element so as to form a closed loop; providing a coil next to the plurality of dies; applying an alternating current to the coil so as to generate a change in magnetic flux across the coil, in which each closed loop generates an induced EMF that is higher than the threshold voltage of the die; determining whether an induced current flows through the die in each closed loop.

Description

晶粒檢測方法及系統 Grain detection method and system

本發明係關於一種晶粒檢測方法及系統,尤其是關於一種在源晶圓上檢測晶粒的晶粒檢測方法及系統。 The invention relates to a die detection method and system, in particular to a die detection method and system for detecting die on a source wafer.

傳統的晶圓檢測方式是利用直徑約10μm的探針與晶粒上的接點接觸,以進行電性測試。當晶粒經檢測無瑕疵,才進行切割、挑揀、封裝等後續製程。然而,當晶粒尺寸微小時至與探針尺寸相當時,如:微發光二極體(micro LED),難以利用現有技術的檢測方式對晶粒進行電性測試。 The traditional method of wafer inspection is to use a probe with a diameter of about 10 μm to contact the contacts on the die for electrical testing. After the die is inspected without defects, the subsequent processes such as cutting, picking and packaging are carried out. However, when the size of the die is small to be comparable to the size of the probe, such as a micro LED, it is difficult to perform electrical testing on the die using the detection methods of the prior art.

因此,現有技術中的微發光二極體通常在源晶圓上完成晶粒切割之後即透過微轉印(micro transfer printing)程序將晶粒轉移到面板上,並無法掌控面板的晶粒瑕疵率。緣此,現有的晶粒檢測方法難以應用到小尺度的晶粒,使小尺度的晶粒存在檢測上的困難,故現有的晶粒檢測方法仍存在不足而有改進的空間。 Therefore, in the prior art, the micro light emitting diode usually transfers the die to the panel through a micro transfer printing process after the die is cut on the source wafer, and cannot control the die defect rate of the panel . For this reason, the existing grain detection method is difficult to apply to small-scale grains, which makes the detection of small-scale grains difficult. Therefore, the existing grain detection methods still have insufficient and room for improvement.

承上述,本發明之目的在於,針對現有技術的不足提供一種晶粒檢測方法及系統,使源晶圓上的每一晶粒各自形成一迴路,並通過變化磁通量而使每一迴路中的晶粒因感應電動勢而被通以感應電流,藉此達到晶粒的檢測。 In view of the above, the object of the present invention is to provide a die detection method and system in response to the shortcomings of the prior art, so that each die on the source wafer forms a loop, and by changing the magnetic flux, the crystal in each loop The granules are energized with induced current due to the induced electromotive force, thereby achieving the detection of the crystal grains.

本發明實施例所提供的其中之一技術方案是提供一種在源 晶圓上檢測晶粒的方法;其中,源晶圓的上表面設置有複數個晶粒。晶粒檢測方法包含:通過導電材料將每一晶粒之正極與負極電性連接以形成封閉迴路;設置線圈鄰近於複數個晶粒;對線圈輸入以交流電壓,以使線圈產生磁通量變化,其中,每一封閉迴路根據磁通量變化而產生感應電動勢,感應電動勢的峰值高於晶粒的導通電壓;以及判斷每一封閉迴路中的晶粒是否因應感應電動勢而被通以感應電流。 One of the technical solutions provided by the embodiments of the present invention is to provide a source A method for detecting die on a wafer; wherein, a plurality of die are provided on the upper surface of the source wafer. The die detection method includes: electrically connecting the positive electrode and the negative electrode of each die with a conductive material to form a closed loop; setting the coil adjacent to a plurality of die; inputting an alternating voltage to the coil to change the magnetic flux of the coil, wherein Each closed loop generates an induced electromotive force according to the change of magnetic flux, and the peak value of the induced electromotive force is higher than the conduction voltage of the die; and it is determined whether the die in each closed loop is energized with an induced current in response to the induced electromotive force.

本發明實施例所提供的另外一技術方案是提供一種在源晶圓上檢測晶粒的方法;其中,源晶圓的上表面設置有複數個晶粒,每兩個相鄰的晶粒形成一晶粒對,且每一晶粒對包括第一晶粒以及第二晶粒。晶粒檢測方法包含:通過導電材料將每一晶粒對的第一晶粒與第二晶粒形成封閉迴路,每一晶粒對中,第一晶粒的正極與第二晶粒的負極電性連接,且第一晶粒的負極與第二晶粒的正極電性連接以在封閉迴路中形成並聯;設置至少一線圈鄰近於複數個晶粒對;對線圈輸入交流電壓,以使線圈產生正向磁通量變化以及反向磁通量變化,其中,每一封閉迴路根據正向磁通量變化而產生正向感應電動勢,正向感應電動勢的峰值高於第一晶粒的導通電壓且小於第二晶粒的崩潰電壓;每一封閉迴路根據反向磁通量變化而產生反向感應電動勢,反向感應電動勢的峰值高於第二晶粒的導通電壓且小於第一晶粒的崩潰電壓;以及判斷每一封閉迴路中的每一晶粒是否因應正向感應電動勢或反向感應電動勢而被通以感應電流。 Another technical solution provided by an embodiment of the present invention is to provide a method for detecting a die on a source wafer; wherein, a plurality of dies are provided on the upper surface of the source wafer, and each two adjacent dies form a Die pairs, and each die pair includes a first die and a second die. The die detection method includes: forming a closed loop between the first die and the second die of each die pair through a conductive material. In each die pair, the positive electrode of the first die and the negative electrode of the second die are electrically connected And the negative electrode of the first die and the positive electrode of the second die are electrically connected to form a parallel connection in the closed loop; at least one coil is arranged adjacent to a plurality of die pairs; an AC voltage is input to the coil to cause the coil to generate Forward magnetic flux change and reverse magnetic flux change, where each closed loop generates a forward induced electromotive force according to the change in forward magnetic flux, the peak value of the forward induced electromotive force is higher than the conduction voltage of the first grain and smaller than that of the second grain Collapse voltage; each closed loop generates a reverse induced electromotive force according to the change of the reverse magnetic flux, the peak value of the reverse induced electromotive force is higher than the turn-on voltage of the second die and less than the collapse voltage of the first die; and judge each closed loop Whether each die in is responded to the induced electromotive force in the forward direction or the induced electromotive force in the reverse direction and is energized with an induced current.

本發明實施例所提供的另外一技術方案是提供一種晶粒檢測系統,其包含源晶圓以及線圈。源晶圓的上表面設置有複數個晶粒,且每晶粒之正極與負極電性連接以形成封閉迴路。線圈鄰近於複數個晶粒,線圈被用以輸入交流電壓,以產生磁通量變化。其中,每一封閉迴路根據磁通量變化而產生感應電動勢,感應電動勢的峰值高於晶粒的導通電壓。 Another technical solution provided by an embodiment of the present invention is to provide a die inspection system, which includes a source wafer and a coil. The upper surface of the source wafer is provided with a plurality of dies, and the positive electrode and the negative electrode of each die are electrically connected to form a closed loop. The coil is adjacent to a plurality of dies, and the coil is used to input an AC voltage to generate a change in magnetic flux. Among them, each closed loop generates an induced electromotive force according to the change of magnetic flux, and the peak value of the induced electromotive force is higher than the conduction voltage of the die.

本發明實施例提供的另外技術方案是提供一種晶粒檢測系統,其包含源晶圓以及至少一線圈。源晶圓的上表面設置有複數個晶粒,其中,每兩個相鄰的晶粒形成晶粒對,每一晶粒對包括第一晶粒以及第二晶粒,第一晶粒與第二晶粒通過導電材料形成封閉迴路,且每一晶粒對中,第一晶粒的正極與第二晶粒的負極電性連接,且第一晶粒的負極與第二晶粒的正極電性連接以在封閉迴路中形成並聯。線圈鄰近於複數個晶粒,被用以輸入交流電壓以產生正向磁通量變化以及反向磁通量變化。每封閉迴路根據正向磁通量變化而產生正向感應電動勢,其中,正向感應電動勢的峰值高於第一晶粒的導通電壓且小於第二晶粒的崩潰電壓。每一封閉迴路根據反向磁通量變化而產生反向感應電動勢,其中,反向感應電動勢的峰值高於第二晶粒的導通電壓且小於第一晶粒的崩潰電壓。 Another technical solution provided by an embodiment of the present invention is to provide a die inspection system, which includes a source wafer and at least one coil. The upper surface of the source wafer is provided with a plurality of dies, wherein each two adjacent dies form a die pair, and each die pair includes a first die and a second die, the first die and the second die The two grains form a closed loop through the conductive material, and each grain is centered, the positive electrode of the first grain is electrically connected to the negative electrode of the second grain, and the negative electrode of the first grain is electrically connected to the positive electrode of the second grain Sexual connection to form a parallel in a closed loop. The coil is adjacent to a plurality of crystal grains, and is used to input an alternating voltage to generate a forward magnetic flux change and a reverse magnetic flux change. Each closed loop generates a forward induced electromotive force according to the change of the forward magnetic flux, wherein the peak value of the forward induced electromotive force is higher than the turn-on voltage of the first die and less than the breakdown voltage of the second die. Each closed loop generates a reverse induced electromotive force according to the change of the reverse magnetic flux, wherein the peak value of the reverse induced electromotive force is higher than the turn-on voltage of the second die and smaller than the breakdown voltage of the first die.

為使能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與圖式,然而所提供的圖式僅用於提供參考與說明,並非用來對本發明加以限制。 In order to further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are for reference and explanation only, and are not intended to limit the present invention.

Z‧‧‧晶粒檢測系統 Z‧‧‧grain detection system

1‧‧‧線圈 1‧‧‧coil

11‧‧‧迴繞結構 11‧‧‧Wrap back structure

R‧‧‧線圈範圍 R‧‧‧coil range

2‧‧‧源晶圓 2‧‧‧ source wafer

20‧‧‧上表面 20‧‧‧upper surface

21‧‧‧晶粒 21‧‧‧ grain

21A‧‧‧第一晶粒 21A‧‧‧First die

21B‧‧‧第二晶粒 21B‧‧‧Second grain

210‧‧‧晶粒對 210‧‧‧ die pair

22‧‧‧連接部 22‧‧‧Connection

211‧‧‧正極 211‧‧‧Positive

212‧‧‧負極 212‧‧‧Negative

21’‧‧‧晶粒投影 21’‧‧‧ grain projection

L‧‧‧封閉迴路 L‧‧‧Closed loop

3‧‧‧顯示面板 3‧‧‧Display panel

i1‧‧‧正向電流 i1‧‧‧forward current

i2‧‧‧反向電流 i2‧‧‧Reverse current

i1’、i2’‧‧‧感應電流 i1’, i2’ ‧‧‧ induced current

C‧‧‧導電材料 C‧‧‧Conductive material

圖1顯示本發明第一實施例的晶粒檢測系統的示意圖。 FIG. 1 shows a schematic diagram of a die inspection system according to a first embodiment of the invention.

圖2顯示本發明第一實施例的晶粒檢測方法的流程圖。 FIG. 2 shows a flow chart of the grain inspection method of the first embodiment of the present invention.

圖3顯示本發明第一實施例的晶粒產生感應電流的示意圖。 FIG. 3 shows a schematic diagram of the induced current generated by the die of the first embodiment of the present invention.

圖4顯示本發明第一實施例的晶粒檢測方法中,將被通以感應電流的晶粒微轉印至顯示面板的示意圖。 FIG. 4 shows a schematic diagram of micro-transferring a die subjected to an induction current to a display panel in the die detection method according to the first embodiment of the present invention.

圖5顯示本發明第一實施例的晶粒檢測方法的變化實施例。 FIG. 5 shows a modified embodiment of the grain detection method of the first embodiment of the present invention.

圖6顯示本發明第二實施例的晶粒檢測系統的示意圖。 FIG. 6 shows a schematic diagram of a die inspection system according to a second embodiment of the invention.

圖7顯示本發明第二實施例的晶粒檢測方法的流程圖。 FIG. 7 shows a flow chart of the grain inspection method of the second embodiment of the present invention.

圖8顯示本發明第二實施例的晶粒對產生感應電流的示意 圖。 8 shows a schematic diagram of the induced current generated by the die pair of the second embodiment of the present invention Figure.

圖9顯示本發明第二實施例的線圈因交流電壓所產生的交流電流與感應電動勢隨時間變化的示意圖。 FIG. 9 is a schematic diagram showing the change of the alternating current and the induced electromotive force generated by the alternating voltage of the coil according to the second embodiment of the present invention with time.

圖10顯示本發明第二實施例的第一晶粒與第二晶粒的I-V特性曲線圖。 FIG. 10 shows I-V characteristic curves of the first die and the second die of the second embodiment of the present invention.

圖11顯示本發明第二實施例的晶粒檢測系統的一變化實施例示意圖。 FIG. 11 shows a schematic diagram of a modified embodiment of the die detection system according to the second embodiment of the present invention.

圖12顯示本發明第二實施例的晶粒檢測系統的另一變化實施例示意圖。 FIG. 12 shows a schematic diagram of another modified embodiment of the grain inspection system of the second embodiment of the present invention.

圖13顯示本發明第二實施例的晶粒檢測系統的另一變化實施例俯視示意圖。 FIG. 13 shows a schematic top view of another modified embodiment of the die detection system of the second embodiment of the present invention.

圖14顯示圖13的側視示意圖。 14 shows a schematic side view of FIG. 13.

圖15顯示本發明第二實施例的晶粒檢測系統的另一變化實施例的側視示意圖。 FIG. 15 shows a schematic side view of another modified embodiment of the grain inspection system of the second embodiment of the present invention.

圖16顯示本發明第二實施例的晶粒檢測系統的另一變化實施例的電路圖。 16 shows a circuit diagram of another modified embodiment of the die detection system of the second embodiment of the present invention.

圖17顯示本發明第二實施例的晶粒檢測系統的另一變化實施例的電路圖。 17 shows a circuit diagram of another modified embodiment of the die detection system of the second embodiment of the present invention.

以下通過特定的具體實施例並配合圖1至圖17說明本發明所公開的晶粒檢測方法及系統的實施方式,本領域技術人員可由本說明書所公開的內容瞭解本發明的優點與效果。然而,以下所公開的內容並非用以限制本發明的保護範圍,在不悖離本發明構思精神的原則下,本領域技術人員可基於不同觀點與應用以其他不同實施例實現本發明。另外,需事先 聲明的是,本發明的附圖僅為示意說明,並非依實際尺寸的描繪。此外,雖本文中可能使用第一、第二、第三等用語來描述各種元件,但該些元件不應受該些用語的限制。這些用語主要是用以區分元件。 The following describes the implementation of the disclosed grain detection method and system of the present invention through specific specific examples and FIG. 1 to FIG. 17. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. However, the content disclosed below is not intended to limit the protection scope of the present invention. Without departing from the spirit of the inventive concept, those skilled in the art can implement the present invention in other different embodiments based on different viewpoints and applications. In addition, prior It is stated that the drawings of the present invention are only schematic illustrations, and are not drawn according to actual sizes. In addition, although terms such as first, second, and third may be used herein to describe various elements, these elements should not be limited by these terms. These terms are mainly used to distinguish components.

第一實施例 First embodiment

以下配合圖1至圖3說明本發明第一實施例的晶粒檢測系統及方法。請見圖1,本實施例提供晶粒檢測系統Z,其具有線圈1以及源晶圓2。上述「源晶圓」包含但不限定為用以在其上長出晶粒21的矽晶片。源晶圓2的上表面20具有複數個晶粒21。本實施例中,晶粒21為微發光二極體(micro LED)晶粒,然而,本發明不限於此;在其他實施例中,晶粒21可為其他種類的半導體晶粒。 The crystal detection system and method of the first embodiment of the present invention will be described below with reference to FIGS. 1 to 3. Please refer to FIG. 1, this embodiment provides a die inspection system Z, which has a coil 1 and a source wafer 2. The above-mentioned "source wafer" includes, but is not limited to, a silicon wafer for growing the die 21 thereon. The upper surface 20 of the source wafer 2 has a plurality of dies 21. In this embodiment, the die 21 is a micro LED (micro LED) die. However, the present invention is not limited thereto; in other embodiments, the die 21 may be other types of semiconductor die.

請配合參閱圖1及圖2,本實施例提供使用晶粒檢測系統Z的晶粒檢測方法,晶粒檢測方法至少包括以下步驟。步驟S100:通過一導電材料C將每一晶粒21之正極211與負極212電性連接以形成一封閉迴路L;步驟S102:設置線圈1鄰近於該複數個晶粒21;步驟S104:對線圈1輸入交流電壓,以使線圈1產生磁通量變化,其中每一封閉迴路L根據該磁通量變化而產生一感應電動勢,該感應電動勢的峰值高於晶粒21的導通電壓;以及步驟S106:判斷每一封閉迴路L中的晶粒21是否因應該感應電動勢而被通以感應電流。 Please refer to FIG. 1 and FIG. 2. This embodiment provides a die detection method using the die detection system Z. The die detection method includes at least the following steps. Step S100: electrically connect the positive electrode 211 and the negative electrode 212 of each die 21 with a conductive material C to form a closed loop L; step S102: set the coil 1 adjacent to the plurality of die 21; step S104: match the coil 1 Input an AC voltage to cause the magnetic flux of the coil 1 to change, wherein each closed loop L generates an induced electromotive force according to the magnetic flux change, and the peak value of the induced electromotive force is higher than the conduction voltage of the die 21; and Step S106: determine each Whether the die 21 in the closed circuit L is energized with induced current due to the induced electromotive force.

如圖1右側的晶粒21放大圖所示,本實施例中,步驟S100中是以導線作為導電材料C來連接晶粒21的正極211及負極,即P極與N極。然而,本發明不限制導電材料的實施方式,例如,在其他實施例中,導電材料也可是導電塗料、導電薄膜等。 As shown in the enlarged view of the die 21 on the right side of FIG. 1, in this embodiment, in step S100, a wire is used as the conductive material C to connect the positive electrode 211 and the negative electrode of the die 21, that is, the P electrode and the N electrode. However, the present invention does not limit the implementation of the conductive material. For example, in other examples, the conductive material may also be a conductive paint, a conductive film, or the like.

進一步來說,如圖1所示,步驟S102中線圈1是設置為與源晶圓2並列,然而,本發明不限於此。在其他變化實施例中,線圈1也可設 置於源晶圓2上方、下方或設置於源晶圓2上表面20。更明確來說,線圈1設置的地點以其磁力線能通過源晶圓2上晶粒21的封閉迴路L為原則。如此,當步驟104中線圈1被通以交流電壓時,能使每一封閉迴路L經歷磁通量變化而生感應電動勢。 Further, as shown in FIG. 1, the coil 1 is arranged in parallel with the source wafer 2 in step S102, however, the present invention is not limited to this. In other modified embodiments, the coil 1 may also be provided Placed above, below, or on the upper surface 20 of the source wafer 2. More specifically, the location of the coil 1 is based on the principle that its magnetic field lines can pass through the closed loop L of the die 21 on the source wafer 2. In this way, when the coil 1 is energized with an AC voltage in step 104, each closed loop L can undergo a magnetic flux change to generate an induced electromotive force.

步驟S104中,晶粒21的封閉迴路感應產生的感應電動勢峰值高於晶粒21的導通電壓,以使封閉迴路可產生感應電流i1’,如圖3所示。明確來說,由於感應電動勢正比於線圈閘數與磁通量變化,且載流線圈的磁通量變化與線圈面積、電流大小、線圈與磁場的距離等參數相關,因此本實施例中,可透過對上述參數的調整而得到需要的感應電動勢值。 In step S104, the peak value of the induced electromotive force generated by the closed loop induction of the die 21 is higher than the conduction voltage of the die 21, so that the closed loop can generate an induced current i1', as shown in FIG. Specifically, because the induced electromotive force is proportional to the change in the number of coil gates and the magnetic flux, and the change in the magnetic flux of the current-carrying coil is related to the parameters such as the coil area, the current size, and the distance between the coil and the magnetic field, in this embodiment, the above parameters can be To obtain the required induced electromotive force value.

圖3繪示晶粒21的電路圖,其中,線圈1因被輸入交流電壓AC而被通以週期性交替的正向電流i1及反向電流i2。此處「正向」指順時針方向,「反向」指逆時針方向。當線圈1內為正向電流i1,線圈1所生的磁場垂直穿入圖面;當線圈1內為反向電流i2,線圈1所生的磁場垂直穿出圖面。當通行於線圈1內的電流由正向電流i1改為反向電流i2之際,線圈1穿入圖面的磁場首先漸減,此時源晶圓2上晶粒21的封閉迴路L產生正向感應電流i1’,以產生穿入圖面的感應磁場抗拒磁通量改變。接著,當線圈1內電流方向改變,通過反向電流i2,且反向電流i2漸漸增強,此時線圈1繼續產生正向感應電流i1’,以對抗反向電流i2所產生穿出圖面的磁場。當線圈1內的電流由反向電流i2改為正向電流i1之際,封閉迴路會依據抗拒磁通量變化的原理而生成反向的感應電動勢。然而,由於二極體的電流單向特性,此時晶粒21不會導通。 FIG. 3 shows a circuit diagram of the die 21 in which the coil 1 is supplied with alternating alternating forward current i1 and reverse current i2 due to the input of AC voltage AC. Here "forward" means clockwise, and "reverse" means counterclockwise. When the forward current i1 is in the coil 1, the magnetic field generated by the coil 1 vertically penetrates the plane; when the reverse current i2 is in the coil 1, the magnetic field generated by the coil 1 vertically exits the plane. When the current passing through the coil 1 is changed from the forward current i1 to the reverse current i2, the magnetic field of the coil 1 penetrating into the drawing first decreases gradually. At this time, the closed loop L of the die 21 on the source wafer 2 generates a forward direction The induced current i1' generates an induced magnetic field penetrating the graph to resist changes in magnetic flux. Then, when the direction of the current in the coil 1 changes, the reverse current i2 passes, and the reverse current i2 gradually increases. At this time, the coil 1 continues to generate the forward induced current i1' to counter the reverse current i2 generated through the figure magnetic field. When the current in the coil 1 is changed from the reverse current i2 to the forward current i1, the closed loop will generate a reverse induced electromotive force according to the principle of resisting the change of magnetic flux. However, due to the unidirectional current characteristics of the diode, the crystal grain 21 will not be turned on at this time.

接著,步驟S106中,本實施例是藉由判斷晶粒21是否發光,以判斷晶粒21是否被通以感應電流i1’,而進一步可判斷晶粒21的電性是否正常。需要說明的是,在其他實施例中,也可藉由其他判別電路是否 導通的方式以判斷感應電流i1’是否通過晶粒21,不限於上述。 Next, in step S106, in this embodiment, by determining whether the die 21 emits light to determine whether the die 21 is supplied with the induced current i1', it can further determine whether the electrical property of the die 21 is normal. It should be noted that, in other embodiments, other circuits can also be used to determine whether the circuit is The manner of conduction is to determine whether the induced current i1' passes through the die 21, and is not limited to the above.

請參閱圖4及圖5,在一變化實施例中,本發明的晶粒檢測方法還可進一步包括步驟S300:將被通以感應電流i1’的晶粒21通過一微轉印步驟(micro-transfer printing)轉移至一顯示面板3。本實施例中,被通以感應電流i1’的晶粒21可判斷為電性正常,而步驟S300中僅將源晶圓2上電性正常的晶粒21(圖4中,以黑色方塊表示電性被判斷為正常的晶粒21,以白色方塊表示電性被判斷為異常的晶粒21)轉印至顯示面板3。因此,相對於習知的晶粒檢測方法,本發明實施例的晶粒檢測系統及方法可使晶粒21在源晶圓2上進行檢測,降低後續產品的晶粒瑕疵率。 Please refer to FIG. 4 and FIG. 5, in a variant embodiment, the die detection method of the present invention may further include step S300: passing the die 21 to which the induced current i1′ is passed through a micro-transfer step (micro- transfer printing) to a display panel 3. In this embodiment, the die 21 fed with the induced current i1' can be judged to be electrically normal, and in step S300, only the die 21 with normal electrical conductivity on the source wafer 2 (in FIG. 4, indicated by black squares) The die 21 whose electrical property is judged to be normal, and the white square represents the die 21 whose electrical property is judged to be abnormal) are transferred to the display panel 3. Therefore, compared with the conventional die inspection method, the die inspection system and method of the embodiments of the present invention can enable the die 21 to be inspected on the source wafer 2 to reduce the defect rate of subsequent products.

藉由上述技術方案,本實施例使每一晶粒21的正極211與負極212相連接而形成封閉迴路L,並利用電磁感應的原理使封閉迴路產生感應電動勢,藉由觀察晶粒21是否發光而進一步判斷感應電流i1’是否通過晶粒21。如此,本實施例所提供的晶粒檢測方法及系統可解決習知的晶粒檢測方法的問題,使小尺度的晶粒能夠在源晶圓2上完成檢測。然而本實施例所提供的檢測方法及系統並不限於使用在小尺度的晶粒檢測上,特此說明。 With the above technical solution, this embodiment connects the positive electrode 211 and the negative electrode 212 of each die 21 to form a closed circuit L, and uses the principle of electromagnetic induction to generate an induced electromotive force in the closed circuit, by observing whether the die 21 emits light It is further determined whether the induced current i1' passes through the die 21. In this way, the die inspection method and system provided in this embodiment can solve the problems of the conventional die inspection methods, so that small-scale die can be inspected on the source wafer 2. However, the detection method and system provided in this embodiment are not limited to the use of small-scale grain detection, which is described here.

第二實施例 Second embodiment

以下配合圖6至圖17說明本發明第二實施例所提供的晶粒檢測系統Z及晶粒檢測方法。首先請參閱圖6,本實施例提供的晶粒檢測系統Z包括至少一線圈1以及源晶圓2。本實施例中,源晶圓2上的複數個晶粒21中,每兩個相鄰的晶粒21形成一晶粒對210,每一晶粒對210包括第一晶粒21A及第二晶粒21B。 The grain detection system Z and the grain detection method provided by the second embodiment of the present invention are described below with reference to FIGS. 6 to 17. First, please refer to FIG. 6. The die inspection system Z provided in this embodiment includes at least one coil 1 and a source wafer 2. In this embodiment, of the plurality of dies 21 on the source wafer 2, each two adjacent dies 21 form a die pair 210, and each die pair 210 includes a first die 21A and a second die Grain 21B.

以下配合圖6及圖7說明第二實施例的晶粒檢測方法,該方法使用上述晶粒檢測系統Z,且至少包括下列步驟。步驟S200:通過導電 材料將每一晶粒對210的第一晶粒21A與第二晶粒21B形成封閉迴路,其中每一晶粒對210中的第一晶粒21A以正極211與第二晶粒21B的負極212相接,並以負極212與第二晶粒21B的正極211相接,且第一晶粒21A與第二晶粒21B形成並聯。圖6右側的放大圖繪示源晶圓2上的其中之一晶粒對210,其中第一晶粒21A與第二晶粒21B通過導線W以正負相接的方式在封閉迴路L中形成並聯。 The grain detection method of the second embodiment is described below with reference to FIGS. 6 and 7. The method uses the grain detection system Z described above and includes at least the following steps. Step S200: through conduction The material forms a closed loop of the first die 21A and the second die 21B of each die pair 210, wherein the first die 21A in each die pair 210 has a positive electrode 211 and a negative electrode 212 of the second die 21B They are connected, and the negative electrode 212 is connected to the positive electrode 211 of the second die 21B, and the first die 21A and the second die 21B are connected in parallel. The enlarged view on the right side of FIG. 6 shows one of the die pairs 210 on the source wafer 2, wherein the first die 21A and the second die 21B are connected in parallel in the closed loop L through the wire W in a positive and negative manner .

接著,本實施例的晶粒檢測方法進一步包括步驟S202:設置線圈1鄰近於複數個晶粒對210;步驟S204:對線圈1輸入交流電壓,以使線圈1產生正向磁通量變化以及反向磁通量變化,其中每一封閉迴路L根據該正向磁通量變化而產生正向感應電動勢,該正向感應電動勢的峰值高於第一晶粒21A的導通電壓且小於第二晶粒21B的崩潰電壓;每一封閉迴路根據該反向磁通量變化而產生反向感應電動勢,該反向感應電動勢的峰值高於第二晶粒21B的導通電壓且小於第一晶粒21A的崩潰電壓;以及步驟S206:判斷每一封閉迴路L中的每一晶粒21是否因應該正向感應電動勢或該反向感應電動勢而被通以感應電流。 Next, the die detection method of this embodiment further includes step S202: setting the coil 1 adjacent to the plurality of die pairs 210; step S204: inputting an AC voltage to the coil 1 to cause the coil 1 to generate forward magnetic flux changes and reverse magnetic flux Change, wherein each closed loop L generates a forward induced electromotive force according to the change of the forward magnetic flux, the peak value of the forward induced electromotive force is higher than the turn-on voltage of the first die 21A and less than the breakdown voltage of the second die 21B; A closed loop generates a reverse induced electromotive force according to the change of the reverse magnetic flux, the peak value of the reverse induced electromotive force is higher than the turn-on voltage of the second die 21B and less than the collapse voltage of the first die 21A; and Step S206: determine each Whether each die 21 in a closed loop L is energized with induced current due to the forward induced electromotive force or the reverse induced electromotive force.

圖8繪示晶粒對210產生感應電流的示意圖。本實施例與第一實施例的其中之一差異點在於,第一實施例中,每一晶粒21自成一迴路,而由於二極體的電流單向性,每一晶粒21形成的迴路在交流電壓的一單位週期內雖能分別感應出一正向感應電動勢與一反向感應電動勢,但其中僅有一個方向的感應電動勢能使迴路產生感應電流。而本實施例中,藉由將第一晶粒21A與第二晶粒21B以正負極相接的方式並聯,第一晶粒21A與第二晶粒21B所形成的封閉迴路L可因正向感應電動勢與反向感應電動勢分別產生正向感應電流與反向感應電流,所生的正向感應電流與反向感應電流分別通過第一晶粒21A與第二晶粒21B。藉此,能夠更佳地利用交流 電壓的電能進行晶粒21的電性檢測。 FIG. 8 shows a schematic diagram of the induced current generated by the die pair 210. One of the differences between this embodiment and the first embodiment is that in the first embodiment, each die 21 forms a loop, and due to the unidirectional current of the diode, each die 21 forms Although the loop can induce a forward induced electromotive force and a reverse induced electromotive force in a unit cycle of AC voltage, only one direction of induced electromotive force can cause the loop to generate an induced current. In this embodiment, by connecting the first die 21A and the second die 21B in parallel with the positive and negative electrodes, the closed loop L formed by the first die 21A and the second die 21B can be positive The induced electromotive force and the reverse induced electromotive force generate a forward induced current and a reverse induced current, respectively, and the generated forward induced current and reverse induced current pass through the first die 21A and the second die 21B, respectively. In this way, you can make better use of communication The electrical energy of the voltage is used for electrical detection of the die 21.

請配合參閱圖8及圖9。圖8的實施例中,交流電壓AC使正向電流i1與反向電流i2交替通過線圈1。在正向電流i1與反向電流i2交替之際,線圈1穿入圖面的磁通量首先減弱,變換電流方向後穿出圖面的磁通量漸強,形成如圖9所示的磁通量變化φA。封閉迴路L相應產生正向感應電流i1’,以抗拒穿入圖面的磁通量減少與穿出圖面的磁通量增加,以彌補磁通量變化φA。因第一晶粒21A正極211至負極212的方向與正向感應電流i1’的方向一致,第一晶粒21A被通以感應電流i1’。相反地,反向電流i2轉為正向電流i1之際,線圈1穿出圖面地磁通量首先減弱,接著,變換電流方向後,穿入圖面地磁通量漸強,形成如圖9所示的磁通量變化φB。此時,封閉迴路L相應產生反向感應電流i2’,以抗拒穿出圖面的磁通量減小與穿入圖面的磁通量增加,抵銷磁通量變化φA,且因第二晶粒21B的正極211至負極212的方向與反向感應電流i2’的方向一致,反向感應電流i2’通過第二晶粒21B。 Please refer to Figure 8 and Figure 9 together. In the embodiment of FIG. 8, the alternating voltage AC causes the forward current i1 and the reverse current i2 to alternately pass through the coil 1. When the forward current i1 and the reverse current i2 alternate, the magnetic flux of the coil 1 penetrating into the drawing first weakens, and after changing the current direction, the magnetic flux penetrating out of the drawing becomes stronger, forming a magnetic flux change φA as shown in FIG. 9. The closed loop L accordingly generates a forward induced current i1' to resist the decrease in the magnetic flux penetrating into the drawing and the increase in the magnetic flux penetrating the drawing to compensate for the magnetic flux change φA. Since the direction of the positive electrode 211 to the negative electrode 212 of the first die 21A coincides with the direction of the forward induced current i1', the first die 21A is energized with the induced current i1'. Conversely, when the reverse current i2 turns into the forward current i1, the geomagnetic flux of the coil 1 passing through the drawing first weakens. Then, after changing the direction of the current, the geomagnetic flux penetrating into the drawing becomes stronger, forming The magnetic flux changes by φB. At this time, the closed loop L correspondingly generates a reverse induced current i2' to resist the decrease of the magnetic flux passing through the plane and the increase of the magnetic flux penetrating into the plane, offsetting the change in magnetic flux φA, and due to the positive electrode 211 of the second die 21B The direction to the negative electrode 212 is consistent with the direction of the reverse induced current i2', and the reverse induced current i2' passes through the second die 21B.

請參閱圖10,其顯示第一晶粒21A與第二晶粒21B的I-V特性曲線。步驟S204中,本實施例藉由調整線圈閘數、線圈形狀、源晶圓與線圈的距離以及交流電壓等與磁通量變化相關的參數,使得正向感應電動勢峰值高於第一晶粒21A的導通電壓V1且小於第二晶粒21B的崩潰電壓V2,反向感應電流i2’對應的反向感應電動勢峰值高於第二晶粒21B的導通電壓V3且小於第一晶粒的崩潰電壓V4。需要說明的是,此處的感應電動勢值指的是絕對值,不具向量性。如此,藉由感應電動勢的控制,本發明實施例可使封閉迴路中未損壞待檢測的晶粒21被通以感應電流i1’、í2’,也同時保護晶粒21不易因崩潰效應而損壞。 Please refer to FIG. 10, which shows I-V characteristic curves of the first die 21A and the second die 21B. In step S204, in this embodiment, by adjusting the parameters related to the change in magnetic flux such as the number of coil gates, the coil shape, the distance between the source wafer and the coil, and the AC voltage, the forward induced electromotive force peak is higher than the conduction of the first die 21A The voltage V1 is less than the collapse voltage V2 of the second die 21B, and the peak value of the reverse induced electromotive force corresponding to the reverse induced current i2' is higher than the turn-on voltage V3 of the second die 21B and less than the collapse voltage V4 of the first die. It should be noted that the induced electromotive force value here refers to an absolute value, and is not vectorial. In this way, by controlling the induced electromotive force, the embodiment of the present invention can enable the die 21 to be detected in the closed loop to be passed through the induced currents i1', í2', while also protecting the die 21 from damage due to the collapse effect.

本實施例中,步驟S206是藉由觀察第一晶粒21A與第二晶 粒21B是否發亮,以判斷感應電流i1’、í2’是否產生,若判斷產生感應電流,則可判斷晶粒21電性正常。此外,也可藉由晶粒21發亮的情形,例如是否閃爍或亮度是否正常,來判斷晶粒21是否存在瑕疵。此外,需要強調的是,本發明不限於以觀察晶粒是否發光的方式來判斷感應電流是否生成。在其他實施例中,當晶粒21為發光二極體以外的晶粒,也可經由其他方式判斷晶粒是否被感應電流通過,例如利用檢流計判斷感應電流的生成,或利用磁場感測器感測感應磁場的生成。 In this embodiment, step S206 is by observing the first crystal 21A and the second crystal Whether the grain 21B is lit to determine whether the induced currents i1' and í2' are generated. If it is determined that the induced current is generated, it can be determined that the grain 21 is electrically normal. In addition, whether the die 21 has a defect can also be determined by whether the die 21 is shiny, for example, whether it flashes or whether the brightness is normal. In addition, it should be emphasized that the present invention is not limited to determining whether the induced current is generated by observing whether the crystal grain emits light. In other embodiments, when the die 21 is a die other than the light emitting diode, it can also be determined whether the die is passed by the induced current through other methods, such as using a galvanometer to determine the generation of the induced current, or using a magnetic field to sense The sensor senses the generation of the induced magnetic field.

請參閱圖11。本實施例中,線圈1設置的位置不限於如圖6所示。在本發明的其他變化實施例當中,也可將線圈1設置在源晶圓2的上方或下方(圖11以下方為例),其中線圈1較佳與源晶圓2的上表面20大致平行,且源晶圓2上複數個晶粒對210在線圈1的平面所形成的垂直投影21’落在線圈1所定義的範圍R之內。明確而言,如圖上述平面指線圈1最上圈圍繞所定義成的圓形平面,線圈1所定義的範圍R指線圈1該圓形平面的範圍。 See Figure 11. In this embodiment, the position where the coil 1 is provided is not limited to that shown in FIG. 6. In other modified embodiments of the present invention, the coil 1 may also be disposed above or below the source wafer 2 (the lower side in FIG. 11 is an example), wherein the coil 1 is preferably substantially parallel to the upper surface 20 of the source wafer 2 , And the vertical projection 21 ′ formed by the plurality of die pairs 210 on the source wafer 2 on the plane of the coil 1 falls within the range R defined by the coil 1. Specifically, as described above, the plane refers to the uppermost circle of the coil 1 surrounding the defined circular plane, and the range R defined by the coil 1 refers to the range of the circular plane of the coil 1.

在另一變化實施例中,線圈1也可如圖12所示,設置在源晶圓2的上表面20,且晶粒對210位在線圈1所定義的範圍R之內。需要說明的是,線圈1的設置位置不限於上述所舉之例,只要線圈1的磁力線可通過晶粒21所形成的封閉迴路即可, In another modified embodiment, the coil 1 may also be disposed on the upper surface 20 of the source wafer 2 as shown in FIG. 12, and the die pair 210 is located within the range R defined by the coil 1. It should be noted that the installation position of the coil 1 is not limited to the above-mentioned example, as long as the magnetic force lines of the coil 1 can pass through the closed circuit formed by the crystal grains 21,

上文皆以設置一個線圈1的實施例為例說明,然而,本發明亦不以此為限。請參閱圖13及圖14,其中圖13為本發明一變化實施例的晶粒對210的俯視圖,圖14為圖13的側視圖。在本發明一變化實施例中,可在上表面20對應每一晶粒對210皆設置一個線圈1,其中線圈1以晶粒對210為中心形成一迴繞結構11。舉例而言,圖13的實施例中,第一晶粒21A的正極211與第二晶粒21B的負極212連接於封閉迴路L的A點,第一晶粒21A 的負極212與第二晶粒21B的正極211連接於封閉迴路L的B點,且A點與B點通過導線W相接使第一晶粒21A與第二晶粒形成並聯,線圈1形成一圍繞第一晶粒21A與第二晶粒21B的迴繞結構11。此外,本實施例中,線圈1兩端分別連接於A點與B點,以使線圈1與封閉迴路L形成並聯。此種連接方式可提高封閉迴路L與線圈1的製作效率,然而,本發明不以此為限。 The embodiments above are all described with an example in which one coil 1 is provided, however, the invention is not limited thereto. Please refer to FIGS. 13 and 14, wherein FIG. 13 is a top view of a die pair 210 according to a variant embodiment of the invention, and FIG. 14 is a side view of FIG. 13. In a variant embodiment of the invention, a coil 1 may be provided on the upper surface 20 for each die pair 210, wherein the coil 1 forms a wrap-around structure 11 with the die pair 210 as the center. For example, in the embodiment of FIG. 13, the positive electrode 211 of the first die 21A and the negative electrode 212 of the second die 21B are connected to point A of the closed loop L, and the first die 21A The negative electrode 212 and the positive electrode 211 of the second die 21B are connected to point B of the closed circuit L, and point A and point B are connected by a wire W so that the first die 21A and the second die are connected in parallel, and the coil 1 forms a The rewind structure 11 surrounding the first die 21A and the second die 21B. In addition, in this embodiment, both ends of the coil 1 are connected to points A and B, respectively, so that the coil 1 and the closed loop L form a parallel connection. This connection method can improve the manufacturing efficiency of the closed loop L and the coil 1, however, the present invention is not limited to this.

請參閱圖14,本變化實施例中,線圈1與第一晶粒21A和第二晶粒21B的連接部22連接。連接部22較佳是在微發光二極體的製程中所形成,用以在微發光二極體晶粒21被巨量轉移至如圖4所示的顯示面板3之前連接晶粒21與源晶圓2。在將晶粒21巨量轉移的過程中,連接部22會被破壞而斷裂,使晶粒21得到釋放而得以轉移。此外,不同於前一實施例是以導線實現導電材料C,本實施例是以導電物質電性連接第一晶粒21A與第二晶粒21B。 Please refer to FIG. 14. In this modified embodiment, the coil 1 is connected to the connection portion 22 of the first die 21A and the second die 21B. The connecting portion 22 is preferably formed in the manufacturing process of the micro-luminescent diode to connect the die 21 and the source before the micro-emitting diode die 21 is transferred to the display panel 3 shown in FIG. 4 in a large amount Wafer 2. In the process of transferring the crystal grains 21 in a large amount, the connecting portion 22 is broken and broken, so that the crystal grains 21 are released to be transferred. In addition, unlike the previous embodiment in which the conductive material C is implemented by wires, in this embodiment, the first die 21A and the second die 21B are electrically connected by a conductive substance.

圖13與圖14的變化實施例中,線圈1在垂直於源晶圓2的方向上與第一晶粒21A及第二晶粒21B不重疊,然而,本發明不限於此。在另外一變化實施例中,本發明也可如圖15所示,將線圈1設置在源晶圓2與晶粒對210之間,使晶粒對210與線圈1在垂直於源晶圓2的方向上至少部分重疊,以提高源晶圓2表面的空間利用率。 In the modified embodiments of FIGS. 13 and 14, the coil 1 does not overlap with the first die 21A and the second die 21B in the direction perpendicular to the source wafer 2, however, the present invention is not limited to this. In another modified embodiment, as shown in FIG. 15, the present invention may also arrange the coil 1 between the source wafer 2 and the die pair 210 so that the die pair 210 and the coil 1 are perpendicular to the source wafer 2 At least partially overlap in the direction of to increase the space utilization of the source wafer 2 surface.

除了如圖6將源晶圓2上的每一晶粒對210正負極相接而形成並聯的封閉迴圈,在本發明另一變化實施例中,還可將正負極相接的多個晶粒對210透過導電材料形成多對晶粒對210並聯的封閉迴圈,如圖16所示。更進一步來說,在另外一變化實施例中,上述多對晶粒對210並聯的封閉迴圈可進一步彼此並聯,成為如圖17所示的結構。以圖16或圖17的封閉迴路結構實施本發明實施例的晶粒檢測方法,可增加檢測效率。這是因為在多對晶粒對210並聯的形況下,正向感應電流i1’與反向感應電流i2’可 一次通過一個封閉迴路L內的所有第一晶粒21A或第二晶粒21B。 In addition to connecting each die pair 210 on the source wafer 2 with positive and negative electrodes to form a parallel closed loop as shown in FIG. 6, in another variation of the present invention, multiple crystals with positive and negative electrodes can also be connected The pair of grains 210 penetrates through the conductive material to form multiple closed loops of the pair of grains 210 connected in parallel, as shown in FIG. 16. Furthermore, in another modified embodiment, the closed loops in which the multiple pairs of die pairs 210 are connected in parallel may be further connected in parallel to each other, as shown in FIG. 17. Implementing the grain detection method of the embodiment of the present invention with the closed loop structure of FIG. 16 or FIG. 17 can increase the detection efficiency. This is because in the case where multiple pairs of die pairs 210 are connected in parallel, the forward induced current i1' and the reverse induced current i2' can All the first die 21A or the second die 21B in one closed loop L are passed through at a time.

綜合上述,本發明實施例所提供的晶粒檢測方法及系統藉由「通過導電材料將每一晶粒對210的第一晶粒21A與第二晶粒21B形成一封閉迴路L,每一晶粒對210中,第一晶粒21A的正極211與第二晶粒21B的負極212電性連接,且第一晶粒21A的負極212與第二晶粒21B的正極211電性連接以在封閉迴路L中形成並聯」、「對線圈1輸入一交流電壓」以及「正向感應電動勢的峰值高於第一晶粒21A的導通電壓V1且小於第二晶粒21B的崩潰電壓V2、反向感應電動勢的峰值高於第二晶粒21B的導通電壓V3且小於第一晶粒21A的崩潰電壓V4」的技術方案,以「判斷每一封閉迴路L中的每一晶粒21是否因應正向感應電動勢或反向感應電動勢而被通以感應電流」。 In summary, the die detection method and system provided by the embodiments of the present invention form a closed loop L by "forming the first die 21A and the second die 21B of each die pair 210 through a conductive material. In the pair 210, the positive electrode 211 of the first die 21A and the negative electrode 212 of the second die 21B are electrically connected, and the negative electrode 212 of the first die 21A and the positive electrode 211 of the second die 21B are electrically connected to seal Parallel formation in the loop L, "input of an AC voltage to the coil 1" and "the peak value of the forward induced electromotive force is higher than the conduction voltage V1 of the first die 21A and less than the breakdown voltage V2 of the second die 21B, reverse induction The peak value of the electromotive force is higher than the turn-on voltage V3 of the second die 21B and less than the breakdown voltage V4 of the first die 21A" to "determine whether each die 21 in each closed loop L responds to forward sensing The electromotive force or the reverse induced electromotive force is passed through induced current."

藉此,本發明實施利提供的晶粒檢測方法與系統Z可使晶粒21在源晶圓2上被檢測,解決習知之中小尺度的晶粒21無法在晶粒21巨量轉移前先進行檢測的問題。此外,通過使晶粒21在封閉迴路L中形成並聯結構,本發明實施例可進一步提高檢測效率。 In this way, the die detection method and system Z provided by the embodiment of the present invention can enable the die 21 to be detected on the source wafer 2 to solve the conventional problem that the small-scale die 21 cannot be carried out before the massive transfer of the die 21 Problems detected. In addition, by making the crystal grains 21 form a parallel structure in the closed loop L, the embodiment of the present invention can further improve the detection efficiency.

以上所公開的內容僅為本發明的優選可行實施例,並非因此侷限本發明的申請專利範圍,所以凡是運用本發明說明書及圖式內容所做的等效技術變化,均落入本發明的申請專利範圍內。 The content disclosed above is only a preferred and feasible embodiment of the present invention, and therefore does not limit the scope of the patent application of the present invention, so any technical changes made by using the description and drawings of the present invention fall into the application of the present invention. Within the scope of the patent.

本說明書指定代表圖為流程圖,故無符號簡單說明。 This manual specifies the representative diagram as a flow chart, so there is no symbol for a simple explanation.

Claims (19)

一種在一源晶圓上檢測晶粒的方法,其中,該源晶圓的一上表面設置有複數個晶粒,該方法包含:通過一導電材料將每一該晶粒之正極與負極電性連接以形成一封閉迴路;設置一線圈鄰近於該複數個晶粒;對該線圈輸入以一交流電壓,以使該線圈產生一磁通量變化,其中,每一該封閉迴路根據該磁通量變化而產生一感應電動勢,該感應電動勢的峰值高於該晶粒的導通電壓;以及判斷每一該封閉迴路中的該晶粒是否因應該感應電動勢而被通以一感應電流。 A method for detecting dies on a source wafer, wherein a plurality of dies are provided on an upper surface of the source wafer, the method includes: electrically connecting the positive electrode and the negative electrode of each die with a conductive material Connected to form a closed loop; setting a coil adjacent to the plurality of dies; inputting an AC voltage to the coil to cause the coil to produce a change in magnetic flux, wherein each closed loop generates a Induced electromotive force, the peak value of the induced electromotive force is higher than the conduction voltage of the die; and it is determined whether the die in each closed loop is energized with an induced current due to the induced electromotive force. 一種在一源晶圓上檢測晶粒的方法,其中,該源晶圓的一上表面設置有複數個晶粒,每兩個相鄰的該晶粒形成一晶粒對,且每一該晶粒對包括一第一晶粒以及一第二晶粒,該方法包含:通過一導電材料將每一該晶粒對的該第一晶粒與該第二晶粒形成一封閉迴路,其中,每一該晶粒對中,該第一晶粒的正極與該第二晶粒的負極電性連接,且該第一晶粒的負極與該第二晶粒的正極電性連接以在該封閉迴路中形成並聯;設置至少一線圈鄰近於該複數個晶粒對;對該線圈輸入一交流電壓,以使該線圈產生一正向磁通量變化以及一反向磁通量變化,其中,每一該封閉迴路根據該正向磁通量變化而產生一正向感應電動勢,其中,該正向感應電動勢的峰值高於該第一晶粒的導通電壓且小於該第二晶粒的崩潰電壓;每一該封閉迴路根據該反向磁通量變化而產生一反向感應電動勢,其中,該反向感 應電動勢的峰值高於該第二晶粒的導通電壓且小於該第一晶粒的崩潰電壓;以及判斷每一該封閉迴路中的每一該晶粒是否因應該正向感應電動勢或該反向感應電動勢而被通以一感應電流。 A method for detecting crystal grains on a source wafer, wherein a plurality of crystal grains are provided on an upper surface of the source wafer, and every two adjacent crystal grains form a crystal grain pair, and each crystal grain The particle pair includes a first die and a second die. The method includes: forming a closed loop between the first die and the second die of each die pair through a conductive material, wherein each In the center of the die, the positive electrode of the first die is electrically connected to the negative electrode of the second die, and the negative electrode of the first die is electrically connected to the positive electrode of the second die in the closed loop Parallel formation; at least one coil is adjacent to the plurality of die pairs; an AC voltage is input to the coil to cause the coil to produce a forward magnetic flux change and a reverse magnetic flux change, wherein each closed loop is based on The forward magnetic flux changes to generate a forward induced electromotive force, wherein the peak value of the forward induced electromotive force is higher than the turn-on voltage of the first die and less than the breakdown voltage of the second die; each of the closed loops is based on the The reverse magnetic flux changes to generate a reverse induced electromotive force, where the reverse sense The peak value of the electromotive force is higher than the turn-on voltage of the second die and less than the breakdown voltage of the first die; and it is determined whether each of the die in each closed loop should be induced by the electromotive force in the forward direction or the reverse direction The induced electromotive force is passed through an induced current. 如請求項2所述的方法,其中,判斷每一該封閉迴路中的每一該晶粒是否因應該正向感應電動勢或該反向感應電動勢而被通以該感應電流的步驟之後,還進一步包括:將被通以該感應電流的該晶粒通過一微轉印步驟(micro-transfer printing)轉移至一顯示面板。 The method according to claim 2, wherein after determining whether each of the dies in each of the closed loops is energized with the induced current due to the forward induced electromotive force or the reverse induced electromotive force, further The method includes: transferring the die passed by the induced current to a display panel through a micro-transfer printing process. 如請求項2所述的方法,其中,設置該線圈鄰近於該複數個晶粒對的步驟之中還進一步包括:在該上表面對應每一該晶粒對設置一線圈,每一該線圈以該晶粒對為中心形成一迴繞結構。 The method according to claim 2, wherein the step of arranging the coil adjacent to the plurality of die pairs further comprises: providing a coil corresponding to each die pair on the upper surface, each of the coils The pair of crystal grains is centered to form a wrap-around structure. 如請求項4所述的方法,其中,每一該線圈與對應的該晶粒對形成並聯。 The method according to claim 4, wherein each of the coils is connected in parallel with the corresponding die pair. 如請求項2所述的方法,其中,設置該線圈鄰近於該複數個晶粒對的步驟之中還進一步包括:在該上表面對應每一該晶粒對設置一線圈,該線圈在垂直於該上表面的方向上位於該源晶圓與對應的該晶粒對之間,且每一該晶粒對與對應的該線圈在垂直於該源晶圓的方向上至少部分重疊。 The method of claim 2, wherein the step of arranging the coil adjacent to the plurality of die pairs further comprises: providing a coil corresponding to each die pair on the upper surface, the coil being perpendicular to The direction of the upper surface is located between the source wafer and the corresponding die pair, and each of the die pair and the corresponding coil at least partially overlap in a direction perpendicular to the source wafer. 如請求項2所述的方法,其中,設置該線圈鄰近於該複數個晶粒對的步驟之中還進一步包括:在平行於該上表面的一平面設置一線圈,該複數個晶粒對在該平面的投影落在該線圈所定義出的一範圍。 The method of claim 2, wherein the step of arranging the coil adjacent to the plurality of die pairs further comprises: arranging a coil on a plane parallel to the upper surface, the plurality of die pairs The projection of the plane falls within a range defined by the coil. 如請求項2所述的方法,其中,設置該線圈鄰近於該複數個晶粒對的步驟之中還進一步包括:在該上表面設置一線圈,該複數個晶粒對位於該線圈所定義出的一範圍。 The method according to claim 2, wherein the step of arranging the coil adjacent to the plurality of die pairs further comprises: setting a coil on the upper surface, the plurality of die pairs located in the coil A range. 如請求項2所述的方法,其中,通過該導電材料將每一該晶粒對的該第一晶粒與該第二晶粒形成該封閉迴路,其中,每一該晶粒對中,該第一晶粒的正極與該第二晶粒的負極電性連接,且該第一晶粒的負極與該第二晶粒的正極電性連接以在該封閉迴路中形成並聯的步驟之中,還進一步包括:通過該導電材料將複數個該晶粒對相互並聯以形成該封閉迴路。 The method according to claim 2, wherein the first die and the second die of each die pair form the closed loop through the conductive material, wherein each of the die pairs is centered, the The positive electrode of the first die is electrically connected to the negative electrode of the second die, and the negative electrode of the first die is electrically connected to the positive electrode of the second die to form a parallel step in the closed loop, The method further includes: connecting a plurality of the grain pairs in parallel with each other by the conductive material to form the closed loop. 如請求項9所述的方法,其中,通過該導電材料將複數個該晶粒對相互並聯以形成該封閉迴路的步驟之中,還進一步包括:通過該導電材料將複數個相互並聯的該晶粒對形成的迴路再相互並聯以形成該封閉迴路。 The method according to claim 9, wherein in the step of connecting the plurality of crystal grain pairs in parallel with each other to form the closed loop through the conductive material, the method further includes: connecting the plurality of crystal grains in parallel with each other through the conductive material The loops formed by the particle pairs are then connected in parallel to each other to form the closed loop. 一種晶粒檢測系統,其包含:一源晶圓,該源晶圓的一上表面設置有複數個晶粒,且每一該晶粒之正極與負極電性連接以形成一封閉迴路;以及一線圈,該線圈鄰近於該複數個晶粒,該線圈被用以輸入一交流電壓,以產生一磁通量變化,其中,每一該封閉迴路根據該磁通量變化而產生一感應電動勢,該感應電動勢的峰值高於該晶粒的導通電壓。 A die detection system includes: a source wafer, a plurality of dies are provided on an upper surface of the source wafer, and the positive electrode and the negative electrode of each die are electrically connected to form a closed loop; and a A coil adjacent to the plurality of dies, the coil is used to input an alternating voltage to generate a magnetic flux change, wherein each closed loop generates an induced electromotive force according to the magnetic flux change, the peak value of the induced electromotive force Higher than the turn-on voltage of the die. 一種晶粒檢測系統,其包含:一源晶圓,該源晶圓的一上表面設置有複數個晶粒,其中,每兩個相鄰的該晶粒形成一晶粒對,每一該晶粒對包括一第一晶粒以及一第 二晶粒,該第一晶粒與該第二晶粒通過一導電材料形成一封閉迴路,且每一該晶粒對中,該第一晶粒的正極與該第二晶粒的負極電性連接,且該第一晶粒的負極與該第二晶粒的正極電性連接以在該封閉迴路中形成並聯;以及至少一線圈,該至少一線圈鄰近於該複數個晶粒,該線圈被用以輸入一交流電壓以產生一正向磁通量變化以及一反向磁通量變化,其中,每一該封閉迴路根據該正向磁通量變化而產生一正向感應電動勢,其中,該正向感應電動勢的峰值高於該第一晶粒的導通電壓且小於該第二晶粒的崩潰電壓;每一該封閉迴路根據該反向磁通量變化而產生一反向感應電動勢,其中,該反向感應電動勢的峰值高於該第二晶粒的導通電壓且小於該第一晶粒的崩潰電壓。 A die detection system, comprising: a source wafer, a plurality of dies are provided on an upper surface of the source wafer, wherein each two adjacent dies form a die pair, and each die The grain pair includes a first grain and a first Two die, the first die and the second die form a closed loop through a conductive material, and each of the die is centered, the positive electrode of the first die and the negative electrode of the second die are electrically Connected, and the negative electrode of the first die and the positive electrode of the second die are electrically connected to form a parallel in the closed loop; and at least one coil, the at least one coil is adjacent to the plurality of die, the coil is It is used to input an AC voltage to generate a forward magnetic flux change and a reverse magnetic flux change, wherein each closed loop generates a forward induced electromotive force according to the forward magnetic flux change, wherein the peak value of the positive induced electromotive force Higher than the conduction voltage of the first die and smaller than the breakdown voltage of the second die; each closed loop generates a back-induced electromotive force according to the change of the reverse magnetic flux, wherein the peak value of the back-induced electromotive force is high The turn-on voltage of the second die is less than the breakdown voltage of the first die. 如請求項12所述的晶粒檢測系統,其中,每一該線圈設置於該上表面且分別對應每一該晶粒對,每一該線圈以該晶粒對為中心形成一迴繞結構。 The die inspection system according to claim 12, wherein each of the coils is disposed on the upper surface and corresponds to each of the die pairs, and each of the coils forms a wrap-around structure with the die pairs as the center. 如請求項12所述的晶粒檢測系統,其中,每一該線圈與對應的該晶粒對形成並聯。 The die inspection system according to claim 12, wherein each of the coils forms a parallel connection with the corresponding die pair. 如請求項14所述的晶粒檢測系統,其中,每一該線圈設置於該上表面且分別對應每一該晶粒對,該線圈在垂直於該上表面的方向上位於該源晶圓與對應的該晶粒對之間,且每一該晶粒對與對應的該線圈在垂直於該源晶圓的方向上至少部分重疊。 The die inspection system according to claim 14, wherein each of the coils is disposed on the upper surface and corresponds to each of the die pairs, and the coil is located on the source wafer and in a direction perpendicular to the upper surface Between the corresponding die pairs, and each of the die pairs and the corresponding coil at least partially overlap in a direction perpendicular to the source wafer. 如請求項12所述的晶粒檢測系統,其中,其中之一該線圈界定平行於該上表面的一平面,該複數個晶粒對在該平面的投影位於該線圈所定義出的一範圍。 The die inspection system according to claim 12, wherein one of the coils defines a plane parallel to the upper surface, and the projection of the plurality of die pairs on the plane lies within a range defined by the coil. 如請求項12所述的晶粒檢測系統,其中,其中之一該線圈設置於該上 表面,該複數個晶粒對位於該其中之一線圈所定義出的一範圍。 The die inspection system according to claim 12, wherein one of the coils is disposed on the On the surface, the plurality of die pairs are located within a range defined by one of the coils. 如請求項12所述的晶粒檢測系統,其中,每一該封閉迴路包括複數個通過該導電材料相互並聯的該晶粒對。 The die inspection system according to claim 12, wherein each of the closed loops includes a plurality of the die pairs connected in parallel with each other through the conductive material. 如請求項18所述的晶粒檢測系統,其中,每一該封閉迴路包括複數個通過該導電材料相互並聯的該晶粒對形成的迴路,且該複數個迴路通過該導電材料相互並聯。 The grain inspection system according to claim 18, wherein each of the closed loops includes a plurality of loops formed by the pair of grains connected in parallel with each other by the conductive material, and the plurality of loops are connected in parallel with each other by the conductive material.
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