TWI692749B - Driving method and display device - Google Patents

Abstract

A driving method and display device are provided. The driving method includes: providing a reset signal to discharge a plurality of pixel circuits of the display panel in a reset time interval of a first time interval within a frame period; providing a plurality of scan signals to write in a plurality of display data in a write-in time interval of the first time interval; and providing an emitting signal to drive all of the pixel circuits to generate a display picture according to respective display data in a second time interval within the frame period. During the frame period, the first time interval is earlier than the second time interval.

Description

Driving method and display device

The present invention relates to a driving method and a display device, and particularly to a driving method and a method for resetting a display unit in a display device and enabling all pixel circuits with a laser signal in a frame time period Display device.

In the conventional technology, whether it is a liquid crystal display (LCD) or an organic light-emitting diode (OLED) display device, in each frame time, the display unit in the display device will receive The display data of will continue to glow until the updated display data is received, the display unit will adjust accordingly.

However, when the display device operates in the above-mentioned holding type (Holding Type) display mode to present a moving picture, a problem of a dynamic picture response time (MPRT) of the display device may occur. In other words, since the image that the user sees on the display device is the result of the integration of the luminous brightness of each display unit, when the mobile device presents a moving picture on the display device, the continuously illuminating display unit will make the user feel that there is a The phenomenon of "tail" further reduces the user's satisfaction with the display device.

The invention provides a driving method and a display device, which can effectively reduce the brightness integration result of the display device, thereby solving the problem of dynamic picture response time generated when a user views the display device.

The driving method of the present invention includes providing a reset signal to discharge a plurality of pixel circuits in the display device in the reset time interval in the first time interval in the frame time period. In the data writing time interval in the first time interval, multiple scan signals are provided to write multiple display data to the pixel circuits in the display device, respectively. And in the second time interval in the picture frame time period, a laser signal is provided to enable all the pixel circuits to generate display images according to the display data. In the picture frame time period, the first time interval is before the second time interval.

The invention also provides a display device including a plurality of pixel circuits and a control signal generator. The pixel circuit can perform a display operation according to the reset signal, multiple scan signals, laser signals, and multiple display data. The control signal generator is coupled to the pixel circuit and can be used to provide a reset signal in the reset time interval in the first time interval in the frame time period to discharge the pixel circuit in the display device. In the data writing time interval in the first time interval, a scan signal is provided to write display data to the pixel circuits in the display device, respectively. And in the second time interval in the picture frame time period, a laser signal is provided to enable all the pixel circuits to generate display images according to the display data. In the picture frame time period, the first time interval is before the second time interval.

Based on the above, the embodiment of the present invention can effectively solve the dynamic picture response time generated when the user views the display device by resetting the time interval.

In order to make the above-mentioned features and advantages of the present invention more obvious and understandable, the embodiments are specifically described below in conjunction with the accompanying drawings for detailed description as follows.

Please refer to FIG. 1, which is a schematic diagram of a display device 1 according to an embodiment of the present invention. As shown in FIG. 1, the display device 1 includes a pixel array 10, a timing controller 11, a source driving circuit 12, and a gate driving circuit 13 . The pixel array 10 is composed of a plurality of pixel circuits 10a. Each pixel circuit 10a can receive the display data Din1 to Dinm transmitted from the source driving circuit 12 through the source lines S1 to Sm and the gate lines. G1 ˜Gn receive the reset signal RST, the scan driving signals SC1 ˜SCn and the laser signal EM transmitted by the gate driving circuit 13. Among them, the reset signal RST, the scan driving signals SC1 to SCn and the laser signal EM are used to control the operation of each pixel circuit 10a in the pixel array 10, so that the pixel circuit 10a can respectively receive the display data Din1 to Dinm and according to The display data Din1～Dinm performs display operation. The timing controller 11 can be used to control the timing operation of the source driving circuit 12 and the gate driving circuit 13. Although the pixel array 10 shown in the present invention is a rectangular area, the present invention is not limited to this. The pixel array 10 of the present invention can be adjusted according to different usage requirements and design concepts. For example, the picture of the present invention The pixel array 10 may also be circular, triangular, polygonal, or other irregular shapes.

For details of the operation of the display device 1, please refer to FIG. 2, which is a schematic diagram of a driving process according to an embodiment of the invention. The display device 1 of the present invention can be used to execute a driving process. In step S21, a reset signal RST is provided in the reset time interval in the first time interval in the frame time period to perform multiple drawing operations on the display device 1. The element circuit 10a discharges. In addition, step S22 provides scan signals SC1 to SCn in the data writing time interval in the first time interval in the frame time period to write the display data Din1 to Dinm to the pixel circuit 10a in the display device 1, respectively. The above reset time interval is earlier than the data writing time interval.

In addition, in step S23, a laser signal EM is provided in the second time interval in the frame time period to enable all the pixel circuits 10a to generate display screens based on the display data Din1-Dinm, respectively.

In the embodiment of the present invention, the display device 1 performs a reset operation for discharging all pixel circuits before performing a writing operation of display data in a frame time period. In this way, the display device 1 according to the embodiment of the present invention can be operated in a so-called impulse type display mode, which is different from the maintenance-based display mode in the conventional technology, which can reduce user experience The result of the brightness integral, which effectively improves the use satisfaction of the present invention.

Please refer to FIG. 3, which is a schematic diagram of a pixel circuit 10a according to an embodiment of the present invention. The pixel circuit 10a shown in FIG. 3 is applied to the pixel array 10 in the display device 1 shown in FIG. For example, the pixel circuit 10a receives the display data Din1 transmitted by the source driving circuit 12, and the reset signal RST and the scanning driving signal SC1 laser signal EM transmitted by the gate driving circuit 13. The pixel circuit 10a includes switch units M11 to M14, storage units C1, C2, and a display unit D1.

In one implementation, the switching units M11-M14 are implemented with N-type metal oxide semiconductor field-effect transistors (MOSFETs). The storage units C11 and C12 are implemented by capacitors. The display unit D1 is realized by a light emitting diode (Light Emitting Diode, LED). One end of the display unit D1 is coupled to the source of the transistor M11, and the other end receives the ground voltage VSS. The drain of the transistor M11 is coupled to the source of the transistor M13, the source of the transistor M11 is coupled to one end of the display unit D1, and the gate of the transistor M11 is coupled to the source of the transistor M12. The capacitor C11 is coupled between the gate and the source of the transistor M11, and can be used to store the voltage of the display data Din1. Therefore, the capacitor C11 can store the voltage and provide it to the transistor M11, so that it provides the corresponding current value to the display unit D1 for the display operation.

The drain of the transistor M12 receives the display data Din1, the source of the transistor M12 is coupled to the gate of the transistor M11, and the gate of the transistor M12 receives the scan signal SC1. The drain of the transistor M13 receives the operating voltage VDD, the source of the transistor M13 is coupled to the drain of the transistor M11, and the gate of the transistor M13 receives the laser signal EM. The drain of the transistor M14 receives the reference voltage Vref1, the source of the transistor M14 is coupled to the source of the transistor M11, and the gate of the transistor M14 receives the reset signal RST. The capacitor C12 is coupled between the drain of the transistor M13 and the source of the transistor M11. Therefore, the pixel circuit 10a can control the transistors M12-14 through the scan signal SC1, the laser signal EM, and the reset signal RST to selectively receive the display data Din1, the operating voltage VDD, and the reference voltage Vref1.

Please refer to FIG. 4A. FIG. 4A is a timing diagram of each control signal transmitted to the pixel array 10 in the display device 1 according to an embodiment of the present invention. FIG. 4A shows the waveform of the display data Dinx transmitted from the source driving circuit 12 to the pixel circuit 10a in the pixel array 10 (the display data Dinx represents the display data Din1 to Dinm transmitted to each gate line), And the waveforms of the reset signal RST, the scan signals SC1 to SCn and the laser signal EM transmitted from the gate drive circuit 13 to the gate lines G1 to Gn in the pixel array 10.

Next, please refer to FIGS. 1 to 4A together to better understand the operation of the display device 1 of the present invention. In order to better explain the operation of the display device 1 of the present invention, the operation of a single pixel circuit 10a of the pixel array 10 in the display device 1 of the present invention will be described first. More specifically, the operation of the pixel circuit 10a coupled to the gate line G1 and the data line S1 in the display device 1 will be described first (that is, the pixel circuit 10a receives the reset signal RST, the scan signal SC1, and the laser signal EM And display information Din1).

As shown in FIG. 4A, in the first time interval T11 in the frame time period (not shown in FIG. 4A), when the reset signal RST is enabled, the pixel circuit 10a will operate in reset In the time interval (not shown in FIG. 4A), the transistor M14 of the pixel circuit 10a is turned on and provides the reference voltage Vref1 to the source of the transistor M11 to couple the capacitor C11 and the source of the transistor M11. The connected node is charged and discharged so that the node is not in an electrically floating state. According to this, the pixel circuit 10a can clear the display data previously written to the capacitor C11 in the reset time interval through the reset signal RST to reset the display operation of the display unit D1. In one embodiment, the reference voltage Vref1 may be the ground voltage VSS, and the reset signal RST may discharge the node coupled between the capacitor C11 and the source of the transistor M11, clear the display data stored in the capacitor C11, and reset the display The display action of unit D1.

After the reset time interval ends, when the reset signal RST is disabled and the laser signal EM is enabled in the first time interval T11, the transistor M14 will be turned off and the transistor M13 will be turned on. Transistor M13 will provide driving current to transistor M11 and display unit D1, so that the node voltage between the source of transistor M11 and display unit D1 gradually rises until the threshold voltage of transistor M11 (Threshold Voltage) Stored in capacitor C11.

In addition, in the first time interval T11, when the scan signal SC1 is enabled, the pixel circuit 10a operates in the data writing time interval. The transistor M12 of the pixel circuit 10a is turned on and provides the display data Din1 to the gate of the transistor M11, and transmits the display data Din1 to the gate of the transistor M11. The display data Din1 will write the voltage into the capacitor C11 according to the coupling relationship of the capacitors C11 and C12.

For the pixel array 10 as a whole, the pixel circuit 10a in the pixel array 10 is divided into a plurality of pixel rows (not labeled in FIG. 1) according to the coupled gate lines G1 to Gn. As shown in FIG. 4A, when the scan signals SC1 to SCn sequentially enable each pixel row, the pixel row coupled to the corresponding gate line will operate in the data writing time interval to store the corresponding display data Din1 to Dinm.

In the second time interval T12 in the frame time period, when the laser signal EM is enabled, the transistor M13 in the pixel circuit 10a is turned on to provide a driving current to the transistor M11 and the display unit D1. The transistor M11 adjusts the current according to the voltage of the display data Din1 written in the capacitor C11 to provide a current corresponding to the voltage of the display data Din1, so that the display unit D1 performs a display operation. Since the capacitor C11 stores the threshold voltage of the transistor M11 and the display data Din1 in the first time interval T11, when the laser signal EM is enabled, the current provided by the transistor M11 to the display unit D1 is not affected. The non-ideal effect of the pixel circuit 10a (for example, process variation or operating temperature, etc.) affects the display unit D1 to perform a more ideal display operation.

In short, the display device 1 of the present invention can reset the display unit D1 in the reset time interval, and in the second time interval T12, only a single laser signal RST instructs all the pixel circuits 10a to perform the display operation. Therefore, the display device 1 of the present invention can drive the display unit therein in a pulse form to generate a display screen on the display device 1, which can reduce the brightness integration result of the display device 1, thereby effectively improving the use satisfaction of the display device 1 of the present invention.

Please refer to FIG. 4B. FIG. 4B is a timing diagram of each control signal transmitted to the pixel array 10 in the display device 1 according to another embodiment of the present invention. In this embodiment, the display device 1 of the present invention is compatible with different operation cycles (for example, the display device of the present invention is compatible with G-Sync technology), a frame time period of the display device 1 There may be a first sub-frame time period T1 and a second sub-frame time period T2 of the same time length. The operation of the display device 1 during the first sub-frame time period T1 has been described in detail in the previous section, and will not be repeated here.

As shown in FIG. 4B, the first sub-frame time period T1 includes a first time interval T11 and a part of a second time interval T12. The second sub-frame time period T2 includes the remaining second time period T12. In the second sub-frame time period T2, the reset signal RST and the scan signals SC1 to SCn do not enable the pixel circuit 10a, so the display written by the frame circuit 10a in the first sub-frame time period T1 Data Din1～Dinm will not be cleared or overwritten. Therefore, when the laser signal EM is enabled, the pixel circuit 10a performs a display operation according to the display data Din1-Dinm written in the first sub-frame time period T1.

Although FIG. 4B only shows the first sub-frame time period T1 and the second sub-frame time period T2 of the same time length, the invention is not limited thereto, as long as the time length of the second sub-frame time period T2 is the first An integer multiple of the time length of the sub-frame time period T1 is sufficient. In one embodiment, when the time length of the first sub-frame time period T1 is 8.3 milliseconds (millisecond, ms), the time length of the second sub-frame time period T2 may be 0 milliseconds, 8.3 milliseconds, 16.6 milliseconds, etc. . In another embodiment, when the time length of the first sub-frame time period T1 is 6.9 milliseconds, the time length of the second sub-frame time period T2 may be 0 milliseconds, 6.9 milliseconds, 13.8 milliseconds, and so on.

Therefore, the display device 1 of the present invention enables the display device 1 to be compatible without additional hardware requirements through the second sub-frame time period T2 having an integer multiple of the time length of the first sub-frame time period T1 In different operation cycles, the hardware compatibility of the display device 1 of the present invention is increased.

Please refer to Figures 5A and 5B. 5A is a schematic diagram of a pixel circuit 10b according to an embodiment of the invention, and FIG. 5A is a schematic diagram of a pixel circuit 10b according to an embodiment of the invention. FIG. 5B is a schematic diagram of a pixel circuit 10c according to an embodiment of the invention. The pixel circuits 10b and 10c can be used to replace the pixel circuit 10a shown in FIG. 3 for application in the pixel array 10 of the display device 1, respectively.

As shown in FIG. 5A, the pixel circuit 10b includes transistors M11 to M14, and capacitors C11 and C12. The pixel circuit 10b is similar to the pixel circuit 10a, so the same elements follow the same symbols. The difference between the pixel circuit 10b and the pixel circuit 10a is that the drain of the transistor M14 in the pixel circuit 10b is not coupled to the reference voltage Vref1 in FIG. 3, instead, the drain of the transistor M14 in the pixel circuit 10b The electrode is used to receive the display data Din1 to charge and discharge the node coupled between the capacitor C11 and the drain of the transistor M11 in the reset time interval.

As shown in FIG. 5B, the pixel circuit 10c includes transistors M11 to M13 and M15 to 17, and capacitors C11 and C13. The pixel circuit 10c is similar to the pixel circuit 10a, so the same elements follow the same symbols. The difference between the pixel circuit 10b and the pixel circuit 10a is that the transistor M14 and the capacitor C12 are not provided in the pixel circuit 10c. Instead, the pixel circuit 10b is provided with transistors M16, M17, and a capacitor C13. The drain of the transistor M15 is coupled to the gate of the transistor M11, the drain of the transistor M15 is coupled to the source of the transistor M11, and the gate of the transistor M15 receives the compensation signal COM. The capacitor C13 is coupled between the electrode of the transistor M12 and the gate of the transistor M11. The drain of the transistor M16 receives the reference voltage Vref2, the source of the transistor M16 is coupled to the source of the transistor M12, and the gate of the transistor M16 receives the setting signal ST. The drain of the transistor M17 receives the reference voltage Vref2, the source of the transistor M17 is coupled to the drain of the transistor M11, and the gate of the transistor M17 receives the reset signal RST.

In summary, the present invention resets the display action of the display unit in the frame time period, and instructs all pixel circuits to perform the display action with a single laser signal to reduce the integration result of the brightness of the display device and improve user viewing Dynamic picture response time issues when displaying devices. In addition, the present invention enables the driving method and the display device of the present invention to have different operation cycles through the first sub-picture frame time period and the second sub-picture frame time period, effectively increasing hardware compatibility. Therefore, the display device of the present invention can effectively improve the user's satisfaction with use.

Although the present invention has been disclosed as above with examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be subject to the scope defined in the appended patent application.

1: display device 10: Pixel array 10a, 10b, 10c: pixel circuit 11: Timing controller 12: Source drive circuit 13: Gate drive circuit C11, C12, C13: capacitance COM: compensation signal D1: display unit Din1～Dinm, Dinx: display data EM: Laser signal G1～Gn: Gate line M11～17: Transistor RST: reset signal S1～Sm: source line S21, S22, S23: steps SC1～SCn: Scanning signal T1: Time period of the first sub-frame T2: the second sub-frame time period T11: the first time interval T12: Second time interval ST: Set signal VDD: operating voltage VSS: ground voltage Vref1, Vref2: reference voltage

FIG. 1 is a schematic diagram of a display device according to an embodiment of the invention. FIG. 2 is a schematic diagram of a driving process according to an embodiment of the invention. FIG. 3 is a schematic diagram of a pixel circuit according to an embodiment of the invention. 4A is a timing diagram of each control signal transmitted to the pixel array in the display device according to an embodiment of the invention. 4B is a timing diagram of each control signal transmitted to the pixel array in a display device according to another embodiment of the invention. 5A is a schematic diagram of a pixel circuit according to an embodiment of the invention. 5B is a schematic diagram of a pixel circuit according to an embodiment of the invention.

S21: Step

S22: Step

S23: Step

Claims (11)

A driving method is suitable for driving a display device. The driving method includes: providing a reset signal in a reset time interval in a first time interval in a picture frame time period to the display device A plurality of pixel circuits are discharged; in a data writing time interval in the first time interval, a plurality of scan signals are provided to write a plurality of display data to the pixel circuits in the display device; and In a second time interval in the picture frame time period, a laser signal is provided to enable all the pixel circuits to generate a display frame according to the display data; wherein, in the picture frame time period, The first time interval is before the second time interval, wherein the frame time period includes a first sub-frame time period and a second sub frame time period, wherein the first sub-frame time period includes the A first time interval and a first portion of the second time interval, the second sub-frame time period includes a second portion of the second time interval. The driving method as described in item 1 of the patent application scope, wherein the pixel circuits are divided into a plurality of pixel rows, wherein the scan signals are provided to write the displays to the pixel circuits in the display device, respectively The data step further includes: activating the order of the pixel rows in the display device according to the scan signals, and sequentially writing the display data to the pixel rows in the display device, respectively. The driving method as described in item 1 of the patent application scope, wherein the steps of providing the scan signals to write the display data to the pixel circuits in the display device, respectively, further comprising: providing the laser signal, The threshold voltages of the pixel circuits are recorded in the storage units of the pixel circuits. The driving method as described in item 1 of the patent application range, wherein the time length of the second sub-picture frame time period is an integer multiple of the time length of the first sub-picture frame time period. A display device includes: a plurality of pixel circuits for performing display operations according to a reset signal, a plurality of scan signals, a laser signal and a plurality of display data; and a control signal generator coupled to the pixel circuits To: provide the reset signal to discharge the pixel circuits in the display device in a reset time interval in a first time interval in a picture frame time period; in the first A data in the time interval is written in the time interval, the scan signals are provided to write the display data to the pixel circuits in the display device; and a second time in the frame time period In the interval, the laser signal is provided so that all the pixel circuits respectively generate a display frame according to the display data; wherein, in the frame time period, the first time interval is at the second time Before the interval, wherein the frame time period includes a first sub-frame time period and a second sub frame time period, wherein the first sub-frame time period includes the first time interval and a first portion of the In the second time interval, the second sub-frame time period includes a second portion of the second time interval. The display device as described in item 5 of the patent application scope, wherein the pixel circuits are divided into a plurality of pixel rows, and the pixel rows are further used to: enable the pixel rows of the display device according to the scan signals In order, the display data are sequentially written into the pixel rows in the display device. The display device as described in item 5 of the patent application scope, wherein the control signal generator is further used to: provide the laser signal to record the threshold voltages of the pixel circuits on the pixel circuits In multiple storage units. The display device according to item 5 of the patent application scope, wherein the time length of the second sub-picture frame time period is an integer multiple of the time length of the first sub-picture frame time period. The display device as described in item 5 of the patent application scope, wherein each pixel circuit of the pixel circuits includes: a display unit driven by a current to perform a display operation; and a first switch unit having a first terminal , A second terminal and a control terminal, wherein the second terminal of the first switch unit is coupled to the display unit; a second switch unit has a first terminal, a second terminal and a control terminal, which The first end of the second switch unit is coupled to the control signal generator to receive the display data, the second end of the second switch unit is coupled to the control end of the first switch unit, the second The control end of the switch unit is coupled to the control signal generator to receive the scan signals; a third switch unit has a first end, a second end, and a control end, wherein the first of the third switch unit One end is coupled to a first reference voltage, the second end of the third switch unit is coupled to the first end of the first switch unit, and the control end of the third switch unit is coupled to the control signal generator to Receiving the laser signal; a fourth switch unit having a first end, a second end and a control end, wherein the first end of the fourth switch unit is coupled to a second reference voltage and the fourth switch unit The second end is coupled to the second end of the control first switch unit, the control end of the third switch unit is coupled to the control signal generator to receive the reset signal; a first storage unit has a A first terminal and a second terminal, wherein the first terminal of the first storage unit is coupled to the first terminal of the three switch units, and the second terminal of the first storage unit is coupled to the first switch unit The second end; and a second storage unit having a first end and a second end, wherein the first end of the second storage unit is coupled to the control end of the first switch unit, the second storage The second terminal of the unit is coupled to the second terminal of the first switching unit. The display device as described in item 5 of the patent application scope, wherein each pixel circuit of the pixel circuits includes: a display unit driven by a current to perform a display operation; and a first switch unit having a first terminal , A second end and a control end, which The second end of the first switch unit is coupled to the display unit; a second switch unit has a first end, a second end and a control end, wherein the first end of the second switch unit is coupled Connected to the control signal generator to receive the display data, the second end of the second switch unit is coupled to the control end of the first switch unit, and the control end of the second switch unit is coupled to the control signal generation To receive the scan signals; a third switch unit has a first end, a second end, and a control end, wherein the first end of the third switch unit is coupled to a first reference voltage, the first The second end of the three switch units is coupled to the first end of the first switch unit, and the control end of the third switch unit is coupled to the control signal generator to receive the laser signal; a fourth switch unit has A first terminal, a second terminal and a control terminal, wherein the first terminal of the fourth switch unit is coupled to the control signal generator to receive the display data, and the second terminal of the fourth switch unit is coupled The second terminal connected to the first switch unit and the control terminal of the fourth switch unit are coupled to the control signal generator to receive the reset signal; a first storage unit has a first terminal and a second End, wherein the first end of the first storage unit is coupled to the first end of the three switch units, the second end of the first storage unit is coupled to the second end of the first switch unit; and one The second storage unit has a first terminal and a second terminal, wherein the first terminal of the second storage unit is coupled to the control terminal of the first switch unit, and the second terminal of the second storage unit is coupled Connected to the second end of the first switch unit. The display device as described in item 5 of the patent application scope, wherein each pixel circuit of the pixel circuits includes: a display unit driven by a current to perform a display operation; and a first switch unit having a first terminal , A second end and a control end, wherein the second end of the first switch unit is coupled to the display unit; a second switch unit has a first end, a second end, and a control end, wherein the The first end of the second switch unit is coupled to the control signal generator to receive the display data, the second end of the second switch unit is coupled to the control end of the first switch unit, and the second switch unit The control terminal is coupled to the control signal generator to receive the scan signals; a third switch unit has a first terminal, a second terminal, and a control terminal, wherein the first terminal of the third switch unit A first reference voltage is coupled, the second terminal of the third switch unit is coupled to the first terminal of the first switch unit, and the control terminal of the third switch unit is coupled to the control signal generator to receive the Laser signal; a fourth switch unit having a first end, a second end and a control end, wherein the first end of the fourth switch unit is coupled to the control end of the first switch unit, the fourth The second terminal of the switch unit is coupled to the second terminal of the first switch unit, the control terminal of the fourth switch unit is coupled to the control signal generator to receive a first clock signal; a fifth switch unit , Having a first end, a second end and a control end, wherein the first end of the fifth switch unit is coupled to a second reference voltage, and the second end of the fifth switch unit is coupled to the first switch The control terminal of the unit, the fifth switch unit The third terminal is coupled to the control signal generator to receive a second clock signal; a sixth switch unit has a first terminal, a second terminal and a control terminal, wherein the The first terminal is coupled to the second reference voltage, the second terminal of the sixth switching unit is coupled to the first terminal of the first switching unit, and the control terminal of the sixth switching unit is coupled to the control signal generator To receive the reset signal; and a storage unit having a first end and a second end, wherein the first end of the storage unit is coupled to the control end of the first switch unit, the first of the storage unit The two terminals are coupled to the second terminal of the first switch unit.

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