TWI684976B - Device, processing method and display device capable of improving processing efficiency of image cache architecture - Google Patents

Abstract

A device capable of improving the processing efficiency of the image cache architecture includes: a storage unit including a plurality of storage spaces and a first output terminal; and an image data reading and writing control unit having a judgment unit and an image processing unit, A writing control unit and a multiplexer; wherein, the judging unit is used for receiving a pixel data and judging whether there is already an input value in the plurality of storage spaces of the storage unit conforming to the storage space that is the same as the Pixel data, if it is, then drive the storage unit to output the output value conforming to the storage space through the first output terminal, and the multiplexer will choose to connect the first output terminal to a pixel data output terminal; if not , The image processing unit will perform an image processing procedure on the pixel data to generate a processed pixel data, and the write control unit will write the processed pixel data into one of the storage spaces of the storage unit The processed pixel data is output through a second output terminal of the image data read/write control unit, and the multiplexer will select to connect the second output terminal to the pixel data output terminal.

Description

Device, processing method and display device capable of improving processing efficiency of image cache architecture

The present invention relates to an image processing method, in particular to a technical solution that can improve the processing efficiency of an image cache architecture.

In order to optimize the display quality of traditional monitors, it is usually necessary to convert the pixel signal from RGB space to HSV or HSL space in order to perform related image processing operations. After the image processing is completed, the image data in the HSV or HSL space is converted into the RGB space to effectively optimize the display quality.

However, since each pixel must undergo the image processing operation once, a driver chip consumes considerable power due to a large amount of the image processing operation.

In order to solve the above-mentioned problems, a novel image processing method is urgently needed in the art.

An object of the present invention is to disclose a device that can improve the processing efficiency of the image cache architecture, by determining whether the currently input pixel data is the same as the previously input pixel data, to decide whether to perform an image processing procedure on it, Improve the overall image processing efficiency.

Another object of the present invention is to disclose a processing method that can improve the processing efficiency of the image cache architecture, by determining whether the currently input pixel data is the same as the previously input pixel data, to decide whether to perform an image processing procedure on it To improve the overall image processing efficiency.

Another object of the present invention is to disclose a display device, which can determine whether to perform an image processing procedure on the pixel data currently input by determining whether the currently input pixel data is the same as the previously input pixel data, so as to improve the overall image processing efficiency.

To achieve the foregoing objective, an apparatus that can improve the processing efficiency of the image cache architecture is proposed, which includes:

A storage unit includes a plurality of storage spaces, and the storage length of each storage space is at least a storage length sufficient to store an input value and an output value, and the storage unit has a first output end to output a storage The output value of the space; and

An image data reading and writing control unit, which has a judging unit, an image processing unit, a writing control unit and a multiplexer;

Wherein, the judging unit is used to receive a pixel data and judge whether the input value that matches the storage space already exists in the plurality of storage spaces of the storage unit is the same as the pixel data, if it is, then drive the storage unit to Output the output value conforming to the storage space through the first output terminal, and the multiplexer will select to connect the first output terminal to a pixel data output terminal of the image data read-write control unit; if not, Then, the image processing unit performs an image processing procedure on the pixel data to generate a processed pixel data, and the write control unit writes the processed pixel data into one of the storage spaces of the storage unit And output the processed pixel data through a second output terminal of the image data read-write control unit, and the multiplexer will choose to connect the second output terminal to the pixel data output terminal.

In an embodiment, when the plurality of storage spaces are filled, the write control unit determines the location of the storage space to be covered.

To achieve the foregoing objective, the present invention provides a processing method that can improve the processing efficiency of the image cache architecture, which includes:

A storage unit is used to store a plurality of pixel corresponding data, each of the pixel corresponding data includes a pixel input data and a processed pixel data corresponding to the pixel input data, and the storage unit has a first output terminal Output a processed pixel data; and

An image data read-write control unit is used to execute a data comparison read-write control program. The image data read-write control unit has a judgment unit, an image processing unit, a write control unit, and a multiplexer, and the data comparison The reading and writing control procedures include:

The judging unit receives a pixel data and judges whether the input value that matches the storage space already exists in the plurality of storage spaces of the storage unit is the same as the pixel data, and if so, drives the storage unit to pass the first The output terminal outputs the output value that matches the storage space, and the multiplexer will select to connect the first output terminal to a pixel data output terminal of the image data read-write control unit; if not, the image processing unit An image processing procedure is performed on the pixel data to generate a processed pixel data, and the write control unit writes the processed pixel data into one of the storage spaces of the storage unit and passes the image data A second output terminal of the read-write control unit outputs the processed pixel data, and the multiplexer will select to connect the second output terminal to the pixel data output terminal.

In an embodiment, when the plurality of storage spaces are filled, the write control unit determines the location of the storage space to be covered.

To achieve the foregoing objective, the present invention further provides a display device having a display and a device for providing display data to one of the displays to improve the processing efficiency of the image cache architecture, and the device to improve the processing efficiency of the image cache architecture include:

A storage unit includes a plurality of storage spaces, and the storage length of each storage space is at least a storage length sufficient to store an input value and an output value, and the storage unit has a first output end to output a storage The output value of the space; and

An image data reading and writing control unit, which has a judging unit, an image processing unit, a writing control unit and a multiplexer;

Wherein, the judging unit is used to receive a pixel data and judge whether the input value that matches the storage space already exists in the plurality of storage spaces of the storage unit is the same as the pixel data, if it is, then drive the storage unit to The output value conforming to the storage space is output through the first output terminal, and the multiplexer will select to connect the first output terminal to a pixel data output terminal of the image data read-write control unit to provide the Display data; if not, the image processing unit will perform an image processing procedure on the pixel data to generate a processed pixel data, and the write control unit will write the processed pixel data to the storage unit One of the storage spaces and output the processed pixel data through a second output terminal of the image data read-write control unit, and the multiplexer will choose to connect the second output terminal to the pixel data output terminal To provide the display information.

In an embodiment, when the plurality of storage spaces are filled, the write control unit determines the location of the storage space to be covered.

In order to enable your review committee to further understand the structure, features and purpose of the present invention, the drawings and detailed description of the preferred embodiments are attached as follows.

Please refer to FIG. 1, which illustrates a block diagram of an embodiment of an apparatus for improving the processing efficiency of an image cache architecture according to the present invention.

As shown in FIG. 1, a device 100 that can improve the processing efficiency of the image cache architecture has a storage unit 110 and an image data read-write control unit 120.

The storage unit 110 includes a plurality of storage spaces, the storage length of each storage space is at least a storage length sufficient to store an input value and an output value, and the storage unit 110 has a first output terminal D _OUT1 to output a storage The output value of the space.

The image data read/write control unit 120 has a determination unit 121, an image processing unit 122, a write control unit 123, and a multiplexer 124, wherein the determination unit 121 is used to receive a pixel data DIN and determine the storage unit 110 Whether the input value corresponding to the storage space is the same as the pixel data DIN in the plurality of storage spaces, and if so, the storage unit 110 is driven to output the output value corresponding to the storage space through the first output terminal DOUT1, And the multiplexer 124 will choose to connect the first output terminal DOUT1 to a pixel data output terminal of the image data read-write control unit 120 to provide an image data DIMG; if not, the image processing unit 122 performs a The image processing program generates a processed pixel data, and the write control unit 123 writes the processed pixel data into one of the storage spaces of the storage unit 110 and reads and writes the image data through the first The two output terminals DOUT2 output the processed pixel data, and the multiplexer 124 selects to connect the second output terminal DOUT2 to the pixel data output terminal to provide image data DIMG.

In addition, when each of the storage spaces in the storage unit 110 is full, the write control unit 123 of the image data read-write control unit 120 determines the location of a storage space in the storage unit 110 to be covered.

Please refer to FIG. 2, which illustrates a flowchart of an embodiment of the method for improving the processing efficiency of the image cache architecture of the present invention.

As shown in FIG. 2, the process includes: storing a plurality of pixel corresponding data using a storage unit, each of the pixel corresponding data including a pixel input data and a processed pixel data corresponding to the pixel input data, and The storage unit has a first output terminal to output the processed pixel data (step a); and an image data read-write control unit executes a data comparison read-write control program (step b).

1, please refer to FIG. 1, the image data read-write control unit 120 has a judgment unit 121, an image processing unit 122, a write control unit 123 and a multiplexer 124, and the data comparison read-write control program includes : The judging unit 121 receives a pixel data DIN and judges whether the input value corresponding to the storage space in the plurality of storage spaces of the storage unit 110 is the same as the pixel data, and if so, drives the storage unit 110 to The output value conforming to the storage space is output through the first output terminal DOUT1, and the multiplexer 124 selects to connect the first output terminal DOUT1 to a pixel data output terminal of the image data read-write control unit 120 DIMG; if not, the image processing unit 122 will perform an image processing procedure on the pixel data DIN to generate a processed pixel data, and the write control unit 123 will write the processed pixel data to the storage In the storage space of one of the units 110, the processed pixel data is output through a second output terminal DOUT2 of the image data read/write control unit 120, and the multiplexer 124 will select to connect the second output terminal DOUT2 To the pixel data output terminal DIMG.

In addition, when each of the storage spaces in the storage unit 110 is full, the write control unit 123 of the image data read-write control unit 120 determines the location of a storage space in the storage unit 110 to be covered.

According to the above description, the present invention further provides a display device. Please refer to FIG. 3, which illustrates a block diagram of an embodiment of the display device of the present invention. As shown in FIG. 3, a display device 200 includes a display 210 and a device 220 for providing display data to one of the display 210 to improve the processing efficiency of the image cache architecture, wherein the device to improve the processing efficiency of the image cache architecture 220 is the same as the device 100 of FIG. 3 that can improve the processing efficiency of the image cache architecture.

In addition, because the color of each pixel in an image frame before, after, or near there is a certain dependence (repeatability), according to the technical solution of the present invention, the number of image processing operations can be effectively reduced, so as to achieve the following effect:

1. Reduce the overall power consumption of the driver chip.

2. Save electricity consumption.

3. Improve image processing efficiency.

The case disclosed in this case is a preferred embodiment, and any part of the modification or modification that originates from the technical idea of this case and can be easily inferred by those skilled in the art, does not deviate from the patent scope of this case.

In summary, regardless of the purpose, means and effects of this case, it shows that it is very different from the conventional technology, and its first invention is practical and practical, and it does meet the patent requirements of the invention. I urge your review committee to investigate and give the patent to the AirPlus as soon as possible. Society is for supreme prayer.

100‧‧‧A device capable of improving the processing efficiency of the image cache architecture

110‧‧‧Storage unit

120‧‧‧Image data read and write control unit

121‧‧‧judgment unit

122‧‧‧Image processing unit

123‧‧‧ write control unit

124‧‧‧Multiplexer

200‧‧‧Display device

210‧‧‧Monitor

220‧‧‧A device capable of improving the processing efficiency of the image cache architecture

Step a‧‧‧ Use a storage unit to store a plurality of pixel correspondence data, each of the pixel correspondence data includes a pixel input data and a processed pixel data corresponding to the pixel input data, and the storage unit has a The first output terminal outputs the processed pixel data

Step b‧‧‧Use an image data read-write control unit to execute a data comparison read-write control program

FIG. 1 is a block diagram of an embodiment of an apparatus for improving the processing efficiency of an image cache architecture according to the present invention. FIG. 2 is a flowchart of an embodiment of a method for improving the processing efficiency of an image cache architecture according to the present invention. 3 is a block diagram of an embodiment of the display device of the present invention.

100‧‧‧A device capable of improving the processing efficiency of the image cache architecture

110‧‧‧Storage unit

120‧‧‧Image data read and write control unit

121‧‧‧judgment unit

122‧‧‧Image processing unit

123‧‧‧ write control unit

124‧‧‧Multiplexer

Claims (6)

A device for improving the processing efficiency of an image cache architecture includes a storage unit including a plurality of storage spaces, and the storage length of each storage space is at least a storage length sufficient to store an input value and an output value, and The storage unit has a first output terminal to output the output value of the storage space; and an image data read-write control unit, which has a judgment unit, an image processing unit, a write control unit and a multiplex Wherein; the judging unit is used to receive a pixel data and judge whether the input value that matches the storage space in the plurality of storage spaces of the storage unit is the same as the pixel data, and if so, drive the storage The unit outputs the output value conforming to the storage space through the first output terminal 1, and the multiplexer will select to connect the first output terminal to a pixel data output terminal of the image data read-write control unit; If not, the image processing unit will perform an image processing procedure on the pixel data to generate a processed pixel data, and the write control unit will write the processed pixel data to one of the storage units. The processed pixel data is output through a second output terminal of the writing control unit in the storage space, and the multiplexer will select to connect the second output terminal to the pixel data output terminal. The device for improving the processing efficiency of the image cache architecture as described in item 1 of the patent scope, wherein, when the plurality of storage spaces are filled, the write control unit determines a storage to be overwritten The location of the space. A processing method that can improve the processing efficiency of an image cache architecture includes: storing a plurality of pixel corresponding data using a storage unit, each of the pixel corresponding data including a pixel input data and a processing corresponding to the pixel input data Pixel data, and the storage unit includes a plurality of storage spaces, the storage length of each storage space is at least a storage length sufficient to store an input value and an output value; the storage unit also has a first output terminal Output a processed pixel data; and use an image data read-write control unit to execute a data comparison read-write control program, the image data read-write control unit has a judgment unit, an image processing unit, a write control Unit and a multiplexer, and the data comparison read-write control program includes: The judging unit receives a pixel data and judges whether the input value that matches the storage space already exists in the plurality of storage spaces of the storage unit is the same as the pixel data, and if so, drives the storage unit to pass the first The output terminal outputs the output value that matches the storage space, and the multiplexer will select to connect the first output terminal to a pixel data output terminal of the image data read-write control unit; if not, the image processing unit An image processing procedure is performed on the pixel data to generate a processed pixel data, and the write control unit writes the processed pixel data into one of the storage spaces of the storage unit and writes through the A second output terminal of the control unit outputs the processed pixel data, and the multiplexer selects to connect the second output terminal to the pixel data output terminal. The processing method for improving the processing efficiency of the image cache architecture as described in Item 3 of the patent application scope, wherein, when the plurality of storage spaces are filled, the write control unit determines the one to be overwritten Location of storage space. A display device has a display and a device for providing display data to one of the displays to improve the processing efficiency of the image cache architecture, the device to improve the processing efficiency of the image cache architecture includes: a storage unit, including a plurality of Storage spaces, the storage length of each storage space is at least a storage length sufficient to store an input value and an output value, and the storage unit has a first output terminal to output the output value of the storage space; And an image data reading and writing control unit, which has a judging unit, an image processing unit, a writing control unit and a multiplexer; wherein the judging unit is used for receiving a pixel data and judging the storage unit Whether there is already an input value corresponding to the storage space in the plurality of storage spaces that is the same as the pixel data, and if so, driving the storage unit to output the output value corresponding to the storage space through the first output terminal, and the The multiplexer will choose to connect the first output terminal to a pixel data output terminal of the image data read-write control unit to provide the display data; if not, the image processing unit will perform an image on the pixel data The processing procedure generates a processed pixel data, and the write control unit writes the processed pixel data into one of the storage spaces of the storage unit and passes through a second output terminal of the write control unit Output the processed pixel data, and the multiplexer will choose to connect the second output to The pixel data output terminal provides the display data. The display device according to item 5 of the patent application scope, wherein, when the plurality of storage spaces are filled, the writing control unit determines the position of a storage space to be covered.

Images